diff --git a/src/devices/cpu/h8500/h8500.cpp b/src/devices/cpu/h8500/h8500.cpp
index b022749197c34..8160da62fe2bc 100644
--- a/src/devices/cpu/h8500/h8500.cpp
+++ b/src/devices/cpu/h8500/h8500.cpp
@@ -15,8 +15,8 @@
 h8500_device::h8500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, int buswidth, int ramsize, int defmode, address_map_constructor map)
 	: cpu_device(mconfig, type, tag, owner, clock)
 	, m_program_config("program", ENDIANNESS_BIG, buswidth, addrbits, 0, map)
-	, m_ram_config("intram", ENDIANNESS_BIG, 16, ramsize, 0, address_map_constructor(FUNC(h8500_device::ram_map), this))
 	, m_mode_control(defmode)
+	, m_ram_size((1 << ramsize) - 1)
 	, m_pc(0)
 	, m_ppc(0)
 	, m_sr(0)
@@ -43,19 +43,11 @@ std::unique_ptr<util::disasm_interface> h8500_device::create_disassembler()
 
 device_memory_interface::space_config_vector h8500_device::memory_space_config() const
 {
-	return m_ram_config.addr_width() == 0 ? space_config_vector {
+	return space_config_vector {
 		std::make_pair(AS_PROGRAM, &m_program_config)
-	} : space_config_vector {
-		std::make_pair(AS_PROGRAM, &m_program_config),
-		std::make_pair(AS_DATA, &m_ram_config)
 	};
 }
 
-void h8500_device::ram_map(address_map &map)
-{
-	map(0, (1 << m_ram_config.addr_width()) - 1).ram();
-}
-
 void h8500_device::debug_set_pc(offs_t pc) noexcept
 {
 	m_pc = m_ppc = pc & 0xffff;
@@ -66,8 +58,6 @@ void h8500_device::debug_set_pc(offs_t pc) noexcept
 void h8500_device::device_start()
 {
 	m_program = &space(AS_PROGRAM);
-	if (has_space(AS_DATA))
-		space(AS_DATA).cache(m_ram_cache);
 
 	set_icountptr(m_icount);
 
diff --git a/src/devices/cpu/h8500/h8500.h b/src/devices/cpu/h8500/h8500.h
index 3755ab7a4aba7..6c5fb06a5972c 100644
--- a/src/devices/cpu/h8500/h8500.h
+++ b/src/devices/cpu/h8500/h8500.h
@@ -46,17 +46,15 @@ class h8500_device : public cpu_device
 	virtual bool h8_maximum_mode() const noexcept { return m_mode_control == 3 || m_mode_control == 4; } // all except H8/570
 
 private:
-	void ram_map(address_map &map);
 	void debug_set_pc(offs_t pc) noexcept;
 
 	// address spaces
 	address_space_config m_program_config;
-	address_space_config m_ram_config;
 	address_space *m_program;
-	memory_access<11, 1, 0, ENDIANNESS_BIG>::cache m_ram_cache;
 
 	// misc. configuration
 	u8 m_mode_control;
+	[[maybe_unused]] u16 m_ram_size;
 
 	// internal registers
 	u16 m_pc;
diff --git a/src/devices/cpu/h8500/h8520.cpp b/src/devices/cpu/h8500/h8520.cpp
index 459a979da9862..753608467f09e 100644
--- a/src/devices/cpu/h8500/h8520.cpp
+++ b/src/devices/cpu/h8500/h8520.cpp
@@ -31,6 +31,7 @@ void h8520_device::internal_map(address_map &map)
 {
 	if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
 		map(0x0000, 0x3fff).rom().region(DEVICE_SELF, 0);
+	map(0xfd80, 0xff7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
 #if 0
 	map(0xff80, 0xff80).w(FUNC(h8520_device::p1ddr_w));
 	map(0xff81, 0xff81).w(FUNC(h8520_device::p2ddr_w));
diff --git a/src/devices/cpu/h8500/h8532.cpp b/src/devices/cpu/h8500/h8532.cpp
index 20c9869c4eeef..0f4dbd18e05b7 100644
--- a/src/devices/cpu/h8500/h8532.cpp
+++ b/src/devices/cpu/h8500/h8532.cpp
@@ -31,6 +31,7 @@ void h8532_device::internal_map(address_map &map)
 {
 	if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
 		map(0x0000, 0x7fff).rom().region(DEVICE_SELF, 0);
+	map(0xfb80, 0xff7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
 #if 0
 	map(0xff80, 0xff80).w(FUNC(h8532_device::p1ddr_w));
 	map(0xff81, 0xff81).w(FUNC(h8532_device::p2ddr_w));
diff --git a/src/devices/cpu/h8500/h8534.cpp b/src/devices/cpu/h8500/h8534.cpp
index 06c9b0dc24f16..6d32e58df860f 100644
--- a/src/devices/cpu/h8500/h8534.cpp
+++ b/src/devices/cpu/h8500/h8534.cpp
@@ -53,6 +53,7 @@ void h8534_device::internal_map(address_map &map)
 {
 	if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
 		map(0x0000, 0x7fff).rom().region(DEVICE_SELF, 0);
+	map(0xf680, 0xfe7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
 	register_field_map(map);
 }
 
@@ -62,6 +63,7 @@ void h8536_device::internal_map(address_map &map)
 		map(0x0000, 0xee7f).rom().region(DEVICE_SELF, 0);
 	else if (mode_control() == 4 || mode_control() == 7)
 		map(0x0000, 0xf67f).rom().region(DEVICE_SELF, 0);
+	map(0xf680, 0xfe7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
 	register_field_map(map);
 }
 
diff --git a/src/mame/roland/roland_jv80.cpp b/src/mame/roland/roland_jv80.cpp
index 3934601e340be..bf6088d31027c 100644
--- a/src/mame/roland/roland_jv80.cpp
+++ b/src/mame/roland/roland_jv80.cpp
@@ -8,7 +8,7 @@
 
 #include "emu.h"
 #include "cpu/h8500/h8532.h"
-//#include "machine/nvram.h"
+#include "machine/nvram.h"
 
 
 namespace {
@@ -33,7 +33,11 @@ class roland_jv80_state : public driver_device
 
 void roland_jv80_state::mem_map(address_map &map)
 {
-	map(0x08000, 0x3ffff).rom().region("progrom", 0x8000);
+	map(0x08000, 0x09fff).ram();
+	map(0x10000, 0x3ffff).rom().region("progrom", 0x10000);
+	map(0x40000, 0x4ffff).rom().region("progrom", 0);
+	map(0xa0000, 0xa7fff).ram();
+	map(0xe0000, 0xe7fff).ram().share("nvram");
 }
 
 static INPUT_PORTS_START(jv880)
@@ -44,7 +48,7 @@ void roland_jv80_state::jv880(machine_config &config)
 	HD6435328(config, m_maincpu, 20_MHz_XTAL);
 	m_maincpu->set_addrmap(AS_PROGRAM, &roland_jv80_state::mem_map);
 
-	//NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // LC36256AML-10 (IC18) + CR2032 battery
+	NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); // LC36256AML-10 (IC18) + CR2032 battery
 
 	//TC6116(config, "pcm", 23.2_MHz_XTAL);
 }