diff --git a/fabrication.py b/fabrication.py
index cfd1d33..2502d95 100644
--- a/fabrication.py
+++ b/fabrication.py
@@ -229,7 +229,7 @@ def generate_excellon(self):
 
     def zip_gerber_excellon(self):
         """Zip Gerber and Excellon files, ready for upload to JLCPCB."""
-        zipname = f"GERBER-{self.filename[:-4]}.zip"
+        zipname = f"GERBER-{Path(self.filename).stem}.zip"
         with ZipFile(
             os.path.join(self.outputdir, zipname),
             "w",
@@ -246,7 +246,7 @@ def zip_gerber_excellon(self):
 
     def generate_cpl(self):
         """Generate placement file (CPL)."""
-        cplname = f"CPL-{self.filename[:-4]}.csv"
+        cplname = f"CPL-{Path(self.filename).stem}.csv"
         self.corrections = self.parent.library.get_all_correction_data()
         aux_orgin = self.board.GetDesignSettings().GetAuxOrigin()
         add_without_lcsc = self.parent.settings.get("gerber", {}).get(
@@ -282,7 +282,7 @@ def generate_cpl(self):
 
     def generate_bom(self):
         """Generate BOM file."""
-        bomname = f"BOM-{self.filename[:-4]}.csv"
+        bomname = f"BOM-{Path(self.filename).stem}.csv"
         add_without_lcsc = self.parent.settings.get("gerber", {}).get(
             "lcsc_bom_cpl", True
         )