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main.cpp
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main.cpp
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#include <iostream>
#include <fstream>
#include <vector>
#include <cstring>
#include <thread>
#include <chrono>
#include <stack>
#include "common.h"
#include "regs.h"
#include "mr.h"
#include "rm.h"
#include "video.h"
#include "flags.h"
#include "instructions.h"
//#define SILENT_EXECUTION // for a major speed boost
#define NOREGDUMP // for a minor speed boost when simming long things
// undefine to disable, 16/17 is pretty fast but not too fast.
#define INSN_DELAY 16 // lol look below this basically has no unit
//#define INSN_DELAY_MS 2 // for >1ms insn delays, overrides the above.
//#define SINGLE_STEP // wait for keypress for every insn
#define BOOT_DISK "../disk/BOOTSEC.BIN"
unsigned long long cycles = 0;
uint16_t lastcmp;
uint8_t SEG_OVERRIDE = REGISTER_DS;
callstack_t callstack;
char lastinsn[512];
char lastinsn2[512];
char lastinsn3[512];
char lastinsn4[512];
void rotatelog() {
strcpy(lastinsn4, lastinsn3);
strcpy(lastinsn3, lastinsn2);
strcpy(lastinsn2, lastinsn);
}
void fixilog() {
for (char & i : lastinsn) {
if (i == '\n') {
i = 0x20;
}
}
for (char & i : lastinsn2) {
if (i == '\n') {
i = 0x20;
}
}
for (char & i : lastinsn3) {
if (i == '\n') {
i = 0x20;
}
}
for (char & i : lastinsn4) {
if (i == '\n') {
i = 0x20;
}
}
}
#ifndef SILENT_EXECUTION
#define FN_ILOG(...) printf(__VA_ARGS__); rotatelog(); snprintf(lastinsn,512,__VA_ARGS__); fixilog();
#else
#define FN_ILOG(...) rotatelog(); snprintf(lastinsn,512,__VA_ARGS__); fixilog();
#define NOREGDUMP
#endif
#define FN_ELOG(...) regdump_force(); rotatelog(); printf(__VA_ARGS__); snprintf(lastinsn,512,__VA_ARGS__); fixilog();
#define VIRTUAL_MEMORY_SIZE (1024 * 1025) // 1MiB of virtual memory for now
static uint8_t* virt_memory = NULL;
static uint16_t IP = 0;
static uint16_t regs[12]; // AX,BX,CX,DX SP,BP,SI,DI CS,DS,ES,SS
static int running = 1; // if the CPU is running, i.e executing instructions
static uint16_t FLAGS = 0;
uint8_t * getmemory() { return virt_memory; }
uint16_t getip() { return IP; }
uint16_t* getregs() { return regs; }
uint16_t getflags() { return FLAGS; }
int getrunning() { return running; }
char* getlastinsn() { return lastinsn; }
char* getlastinsn2() { return lastinsn2; }
char* getlastinsn3() { return lastinsn3; }
char* getlastinsn4() { return lastinsn4; }
uint32_t segcalc(uint16_t seg, uint16_t off);
uint32_t getstackptr() {
return segcalc(REGISTER_SS, getregval(REGISTER_SP));
}
callstack_t getcallstack(){
return callstack;
}
int loadsector(uint16_t sid, uint32_t destination, uint16_t count, const char* file);
unsigned long long getcycles(){
return cycles;
}
void regdump_force();
uint16_t getregval(uint8_t regid);
void setregval(uint8_t regid, uint16_t val);
void clearflag(uint16_t FLAGID);
void setflag(uint16_t FLAGID);
void writeByte(uint8_t seg, uint16_t off, uint8_t val);
uint16_t dispoff = 0;
void interrupt(uint8_t intid) {
if (!(FLAGS & FLAG_INT))
return;
if (intid == 0x10) { // BIOS display services
if (getregval(REGISTER_AH) == 0x0E) {
if (getregval(REGISTER_AL) >= 0x20) {
virt_memory[0xB8000 + dispoff] = getregval(REGISTER_AL);
//printf("VM BIOS print char: %c off=%d\n", getregval(REGISTER_AL), dispoff);
} else if (getregval(REGISTER_AL) == '\n') {
//printf("VM BIOS print NL off=%d\n", dispoff);
dispoff+=80;
dispoff -= (dispoff%80) + 1;
} else if (getregval(REGISTER_AL) == '\r') {
//printf("VM BIOS print CR off=%d\n", dispoff);
dispoff -= (dispoff%80) + 1;
}
dispoff++;
} else if (getregval(REGISTER_AH) == 0) {
printf("VM change video mode to %d\n",getregval(REGISTER_AL));
switch (getregval(REGISTER_AL)) {
case 0x13:
initvideo(320,200,0xA0000, GRAPHICS_MODE_8BPP);
break;
case 0x02:
initvideo(80,25,0xB8000, TEXT_MODE_16BPC);
break;
case 0x03:
initvideo(80,25,0xB8000, TEXT_MODE_8BPC);
break;
default:
printf("WARNING: Unimplemented video mode %d, defaulting to 03h(80x25 colour)\n",getregval(REGISTER_AH));
initvideo(80,25,0xB8000, TEXT_MODE_8BPC);
}
}
} else if (intid == 0xFF) { // 0:0 jump callback
printf("0000:0000 has been jumped to. Halting.\n");
} else if (intid == 0xFE) { // sooper secret prints for in-VM things like the boot ROM
printf("VM: %s\n", virt_memory + getregval(REGISTER_SI));
setregval(REGISTER_SI, 0);
} else if (intid == 0xFD) {
printf("VM sleep %dms\n",getregval(REGISTER_AX));
std::this_thread::sleep_for(std::chrono::milliseconds(getregval(REGISTER_AX)));
} else if (intid == 0xFC) {
printf("VM clear text display\n");
dispoff = 0;
memset(virt_memory + 0xB8000, 0, 80*25);
} else if (intid == 0x1A) {
setregval(REGISTER_DX, 0);
} else if (intid == 0x16) {
if (getregval(REGISTER_AH) == 0x01) {
if (isKeyPressed()) {
setflag(FLAG_ZERO);
} else {
clearflag(FLAG_ZERO);
}
} else if (getregval(REGISTER_AH) == 0x00) { // wait for and return key
waitForKey();
setregval(REGISTER_AL, getLatestKey());
setregval(REGISTER_AH, getLatestKey());
}
} else if (intid == 0x13) {
uint8_t AH = getregval(REGISTER_AH);
printf("VM Disk system interrupt, AH=%02X\n",AH);
if (AH==0) {
printf("VM Disk system reset. (NOP)\n");
} else if (AH==2) {
uint8_t sector = getregval(REGISTER_CL);
uint8_t head = getregval(REGISTER_DH);
uint8_t cylinder = getregval(REGISTER_CH);
uint8_t amt = getregval(REGISTER_AL);
uint32_t LBA = (cylinder * 1 * 8) + (head * 8) + (sector/* - 1*/);
uint16_t ES = getregval(REGISTER_ES);
uint16_t BX = getregval(REGISTER_BX);
regdump_force();
printf("VM read sector, from %d to %d [LBA=%08X, C=%d, H=%d, S=%d, bufstart = %04X:%04X (%08X)]\n",
sector, sector + amt, LBA, cylinder, head, sector, ES, BX, segcalc(getregval(REGISTER_ES), BX));
int q = loadsector(LBA, segcalc(REGISTER_ES, BX), amt, BOOT_DISK);
if (q>0)
clearflag(FLAG_CARRY);
else
setflag(FLAG_CARRY);
} else {
printf("VM illegal disk interrupt\n");
running = false;
}
} else {
printf("VM illegal interrupt %02X AH=%02X\n", intid,getregval(REGISTER_AH));
running = false;
}
}
void setregval(uint8_t regid, uint16_t val) {
if (regid < 4) {
//printf("SET LOW REG %s[%s] TO %x\n",getregname(regid), getregname(regid+8), val&0x00FF);
regs[regid] &= 0xFF00;
regs[regid] |= val & 0x00FF;
} else if (regid < 8) {
//printf("SET HIGH REG %s[%s] TO %02x\n",getregname(regid), getregname(regid+4), (val&0xFF));
regs[regid - 4] &= 0x00FF;
regs[regid - 4] |= (val & 0xFF) << 8;
} else {
//printf("SET REG %s[%d] TO %x\n",getregname(regid), regid - 8, val);
regs[regid - 8] = val;
}
}
uint16_t getregval(uint8_t regid) {
if (regid < 4) {
return regs[regid] & 0xFF;
} else if (regid < 8) {
return (regs[regid - 4] & 0xFF00) >> 8;
} else {
return regs[regid - 8];
}
}
void regdump_force() {
printf("[");
for (int i=0;i<0x8;i++) {
printf("%s=%04X ", getregname(i + 8), getregval(i + 8));
}
printf("IP=%04X CS=%04X DS=%04X ES=%04X SS=%04X FLAGS=%04X] ",IP,
getregval(REGISTER_CS), getregval(SEG_OVERRIDE), getregval(REGISTER_ES), getregval(REGISTER_SS), FLAGS);
}
void regdump() {
#ifndef NOREGDUMP
regdump_force();
#endif
}
uint8_t SEG = REGISTER_CS;
int loadsector(uint16_t sid, uint32_t destination, uint16_t count, const char* file) {
std::ifstream input( file, std::ios::binary );
std::vector<unsigned char> buffer(std::istreambuf_iterator<char>(input), {});
if (buffer.size() / 512 < count || buffer.size() < (sid*512 + count*512)) {
fprintf(stderr, "Warning: file %s doesn't contain enough data to read %d sectors (fz=%d, rq=%d). Aborting.\n", file, count, buffer.size(), (sid*512 + count*512));
input.close();
return 0;
}
memcpy(virt_memory + destination, buffer.data() + (sid*512), count * 512);
printf("Loaded %d sectors from %s [sector %d] to 0x%X\n", count, file, sid, destination);
return count;
}
void call_xhandler(uint16_t s, uint16_t a, uint16_t rip) {
std::pair<uint16_t, uint16_t> p(getregval(SEG), rip);
std::pair<uint16_t, uint16_t> p2(s,a);
callstack.push(CALLSTACK_ENTRY_INIT(p, p2));
}
void ret_xhandler(uint16_t s, uint16_t a) {
callstack.pop();
}
void jump(uint16_t addr) {
IP = addr;
}
uint32_t segcalc(uint16_t seg, uint16_t off) {
uint32_t ret = seg;
ret = ret << 4;
ret += off;
return ret;
}
uint32_t pushw(uint16_t val) {
uint32_t stackptr = segcalc(getregval(REGISTER_SS), getregval(REGISTER_SP));
setregval(REGISTER_SP, getregval(REGISTER_SP) - 2);
*((uint16_t*)virt_memory+stackptr) = val;
return stackptr;
}
uint16_t popw() {
setregval(REGISTER_SP, getregval(REGISTER_SP) + 2);
uint32_t stackptr = segcalc(getregval(REGISTER_SS), getregval(REGISTER_SP));
return *((uint16_t*)virt_memory+stackptr);
}
uint8_t isWriteAllowed(uint32_t addr) {
if (addr >= 0x100 && addr <= 0x200 && (IP <= 0x100 || IP >= 0x200)) {
// if out of "bios" region, prevent writes to this area of memory
return 0;
}
if (addr >= 0xFFFF0 && addr <= 0xFFFFF) { // reset vector
return 0;
}
return 1;
}
uint16_t readWord(uint8_t seg, uint16_t off) {
uint32_t real_addr = segcalc(getregval(seg), off);
return ((uint16_t)virt_memory[real_addr] + ((uint16_t)virt_memory[real_addr+1]<<8));
}
uint16_t readWordManualSeg(uint16_t seg, uint16_t off) {
uint32_t real_addr = segcalc(seg, off);
return ((uint16_t)virt_memory[real_addr] + ((uint16_t)virt_memory[real_addr+1]<<8));
}
uint8_t readByte(uint8_t seg, uint16_t off) {
uint32_t real_addr = segcalc(getregval(seg), off);
return (uint16_t)virt_memory[real_addr];
}
uint16_t swapWord(uint16_t word) {
return ((word&0xFF00) >> 8) | ((word&0xFF)<<8);
}
void writeWord(uint8_t seg, uint16_t off, uint16_t val) {
uint32_t real_addr = segcalc(getregval(seg), off);
if (!isWriteAllowed(real_addr) || !isWriteAllowed(real_addr + 1)) {
FN_ELOG("ERROR: CPU attempted disallowed write to %04X:%04X\n",getregval(seg),off);
running = false;
return;
}
virt_memory[real_addr] = (val&0xFF);
virt_memory[real_addr+1] = (val&0xFF00)>>8;
}
void writeByte(uint8_t seg, uint16_t off, uint8_t val) {
uint32_t real_addr = segcalc(getregval(seg), off);
if (!isWriteAllowed(real_addr)) {
FN_ELOG("ERROR: CPU attempted disallowed write to %04X:%04X\n",getregval(seg),off);
running = false;
return;
}
virt_memory[real_addr] = val;
}
void setflag(uint16_t FLAGID) {
FLAGS |= FLAGID;
}
void clearflag(uint16_t FLAGID) {
FLAGS &= ~FLAGID;
}
uint16_t getflag(uint16_t FLAGID) {
return (FLAGS & FLAGID);
}
// this is a lazy, likely buggy 8086 emulator.
// i will probably rewrite this in the future
int main() {
printf("Starting charlie86\n");
printf("Registers: [");
for (int i=0;i<0xF;i++) {
regs[i] = 0;
printf("%s=%X ", getregname(i), regs[i]);
}
printf("IP=%X]\n",IP);
virt_memory = (unsigned char*) malloc(VIRTUAL_MEMORY_SIZE);
memset(virt_memory, 0, VIRTUAL_MEMORY_SIZE);
printf("Starting GUI\n");
initvideo(80,25,0xB8000, TEXT_MODE_8BPC);
memset(virt_memory + 0xB8000, ' ', 80*25*2);
printf("Allocated %d bytes of virtual memory\n", VIRTUAL_MEMORY_SIZE);
printf("Loading bootsector..\n");
loadsector(0, 0x7C00,1, BOOT_DISK);
//loadsector(0, 0x7C00, 4, "../disk/BOOTSEC.BIN");
loadsector(0, 0x100, 1, "../disk/BOOTROM.BIN"); // load the ROM/(BIOS i guess) at 0x100
virt_memory[0xFFFF0] = 0xEA; // JMP FAR 0x0000:0x0100 at reset vector
virt_memory[0xFFFF1] = 0x00;
virt_memory[0xFFFF2] = 0x01;
virt_memory[0xFFFF3] = 0x00;
virt_memory[0xFFFF4] = 0x00;
setregval(REGISTER_CS, 0xFFFF);
jump(0x0000); // jump to reset vector
regdump_force();
FN_ILOG("Starting processor..\n");
// This is now handled in-VM (in the ROM)
//if (virt_memory[0x7DFE] != 0x55 || virt_memory[0x7DFF] != 0xAA) {
// fprintf(stderr, "Warning: Magic number 55AA not present in bootsector! [%x%x]\n", virt_memory[0x7DFE], virt_memory[0x7DFF]);
//}
while (running) {
uint8_t ipc = readByte(SEG, IP);
IP++;
switch (ipc) {
case OPCODE_MOV_A1_MEMBYTE2AL: { // MOV BYTE AL, [VAL] VAL=IMMEDIATE
uint8_t d = readByte(SEG, readWord(SEG,IP));
IP += 2;
setregval(REGISTER_AL, d);
regdump();
FN_ILOG("MOV BYTE AL, [0x%02X]\n", readWord(SEG,IP)-2);
break;
}
case OPCODE_MOV_A1_MEMWORD2AX: { // MOV WORD AX, [VAL] VAL=IMMEDIATE
uint16_t d = readWord(SEG, readWord(SEG,IP));
IP += 2;
setregval(REGISTER_AX, d);
regdump();
FN_ILOG("MOV BYTE AX, [0x%04X]\n", readWord(SEG,IP-2));
break;
}
case OPCODE_CMP_3C_BYTEINAL: { // CMP BYTE AL, VAL (IMMEDIATE)
uint8_t d = readByte(SEG,IP);
IP++;
if (d == (uint8_t)getregval(REGISTER_AL))
setflag(FLAG_ZERO);
else
clearflag(FLAG_ZERO);
regdump();
FN_ILOG("CMP BYTE AL, 0x%02X\n",d);
break;
}
case OPCODE_CMP_3D_WORDINAX: { // CMP WORD AX, VAL (IMMEDIATE)
uint16_t d = swapWord(readWord(SEG,IP));
IP+=2;
if (d == getregval(REGISTER_AX))
setflag(FLAG_ZERO);
else
clearflag(FLAG_ZERO);
regdump();
FN_ILOG("CMP WORD AX, 0x%04X %X\n",d,getregval(REGISTER_AX));
break;
}
case OPCODE_JA_77_8REL: //TODO: you know what do to future me
case OPCODE_JE_74_8REL: { // JZ 8 BIT RELATIVE
sint8_t t = readByte(SEG, IP);
IP++;
if (getflag(FLAG_ZERO))
jump(IP + t);
regdump();
FN_ILOG("JE 0x%04X %s [8rel]\n",IP,getflag(FLAG_ZERO)?"[jumped]":"[not jumped]");
break;
}
case OPCODE_JNE_75_8REL: { // JNZ 8 BIT RELATIVE
sint8_t t = readByte(SEG, IP);
IP++;
if (!getflag(FLAG_ZERO))
jump(IP + t);
regdump();
FN_ILOG("JNE 0x%04X %s [8rel]\n",IP,getflag(FLAG_ZERO)?"[not jumped]":"[jumped]");
break;
}
case OPCODE_MOV_B0_IMBYTE2AL : // MOV BYTE REG, VAL (NON-STACK, IMMEDIATE)
case OPCODE_MOV_B4_IMBYTE2AH :
case OPCODE_MOV_B2_IMBYTE2DL :
case OPCODE_MOV_B6_IMBYTE2DH :
case OPCODE_MOV_B1_IMBYTE2CL :
case OPCODE_MOV_B5_IMBYTE2CH :
case OPCODE_MOV_B3_IMBYTE2BL :
case OPCODE_MOV_B7_IMBYTE2BH : {
uint8_t regid = ipc&0xF; // get register ID from opcode
setregval(regid, readByte(SEG, IP));
IP++;
regdump();
FN_ILOG("MOV BYTE %s, 0x%02X [IM, b0-b8]\n", getregname(regid), getregval(regid));
break;
}
case OPCODE_MOV_B8_IMWORD2AX : // MOV WORD REG, VAL (NON-STACK, IMMEDIATE)
case OPCODE_MOV_BB_IMWORD2BX :
case OPCODE_MOV_B9_IMWORD2CX :
case OPCODE_MOV_BA_IMWORD2DX :
case OPCODE_MOV_BC_IMWORD2SP :
case OPCODE_MOV_BD_IMWORD2BP :
case OPCODE_MOV_BE_IMWORD2SI :
case OPCODE_MOV_BF_IMWORD2DI : {
uint8_t regid = ipc&0xF; // get register ID from opcode
setregval(regid, readWord(SEG, IP));
IP+=2;
regdump();
FN_ILOG("MOV WORD %s, 0x%04X [IM, b8-bf]\n", getregname(regid), getregval(regid));
break;
}
case OPCODE_MOV_8C_SR2RGWORD:
case OPCODE_MOV_8E_RGWORD2SR: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
mr.w = 1;
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = sr2regid(mr.rm);
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = sr2regid(mr.reg);
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1:
loc = rm2loc(mr.rm);
writeWord(SEG_OVERRIDE, loc, getregval(regid1));
regdump();
FN_ILOG("MOV %s, %s [movsr m0]\n", getrmname(mr.rm), getregname(regid1));
break;
case MR_RM2_DISP8:
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented MOV memory access mode %d\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("MOV %s, %s [movsr m3]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_MOV_C7_MRMOVWORD1: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm + (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg + (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1: {
loc = readWord(SEG, IP);
IP+=2;
uint16_t val = readWord(SEG, IP);
IP+=2;
writeWord(SEG_OVERRIDE, loc, val);
regdump();
FN_ILOG("MOV [0x%04X:0x%04X], 0x%04X [movmr16_RM1]\n",getregval(SEG_OVERRIDE), loc, val);
break;
}
case MR_RM2_DISP8: {
sint8_t disp = readByte(SEG, IP);
loc = getrmdispval(mr.rm, disp);
IP++;
uint16_t val = readWord(SEG, IP);
IP += 2;
writeWord(SEG_OVERRIDE, loc, val);
regdump();
FN_ILOG("MOV [%s+%d](%04X:%04X), 0x%X [movmr16_RM2_DISP8]\n", getrmnamenb(mr.rm), disp, getregval(SEG_OVERRIDE), loc, val);
break;
}
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented MOV memory access mode %d [ipcC7]\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("MOV %s, %s [movmr16_2REG]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_MOV_C6_MRMOVBYTE1: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm + (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg + (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1: {
if (mr.rm == 0b110) { // Drc't addition!
loc = readWord(SEG, IP);
IP+=2;
uint8_t val = readByte(SEG, IP);
IP++;
writeByte(SEG_OVERRIDE, loc, val);
regdump();
FN_ILOG("MOV [0x%04X:0x%04X], 0x%02X [movmr8_RM1]\n",
getregval(SEG_OVERRIDE), loc, val);
break;
} else {
loc = rm2loc(mr.rm);
uint8_t val = readByte(SEG, IP);
IP++;
writeByte(SEG_OVERRIDE, loc, val);
regdump();
FN_ILOG("MOV %s[0x%04X:0x%04X], 0x%02X [movmr8_RM1]\n", getrmname(mr.rm),
getregval(SEG_OVERRIDE), loc, val);
break;
}
}
case MR_RM2_DISP8: {
sint8_t disp = readByte(SEG, IP);
loc = getrmdispval(mr.rm, disp);
IP++;
uint8_t val = readByte(REGISTER_CS, IP);
IP ++;
writeByte(SEG_OVERRIDE, loc, val);
regdump();
FN_ILOG("MOV [%s+%d](%04X:%04X), 0x%X [movmr8_RM2_DISP8]\n", getrmnamenb(mr.rm), (sint8_t)disp, getregval(SEG_OVERRIDE), loc, val);
break;
}
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented MOV memory access mode %d [ipcC6]\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("MOV %s, %s [movmr8_2REG]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_MOV_88_MRMOVBYTE2: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
mr.w = 0;
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm + (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg + (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1: {
loc = rm2loc(mr.rm);
uint8_t reg = (mr.reg + (mr.w << 3));
if (mr.w) {
writeWord(SEG_OVERRIDE, loc, getregval(reg));
} else {
writeByte(SEG_OVERRIDE, loc, getregval(reg));
}
regdump();
FN_ILOG("MOV %s(%04X:%04X), %s(%04X) [w=%d]\n", getrmname(mr.rm), getregval(SEG_OVERRIDE), loc, getregname(reg), getregval(reg), mr.w);
break;
}
case MR_RM2_DISP8: {
loc = rm2loc(mr.rm);
loc += readByte(SEG, IP);
IP++;
uint8_t reg = (mr.reg + (mr.w << 3));
if (mr.w) {
writeWord(SEG_OVERRIDE, loc, getregval(reg));
} else {
writeByte(SEG_OVERRIDE, loc, getregval(reg));
}
regdump();
FN_ILOG("MOV %s(%04X:%04X), %s(%04X) [w=%d, disp8]\n", getrmname(mr.rm), getregval(SEG_OVERRIDE), loc, getregname(reg), getregval(reg), mr.w);
break;
}
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented MOV memory access mode %d [ipc88]\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("MOV BYTE %s, %s [movmr8_2REG]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_MOV_8A_MRMOVBYTE1: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
mr.w = 0;
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm + (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg + (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1: {
loc = rm2loc(mr.rm);
uint8_t reg = (mr.reg + (mr.w << 3));
if (mr.w) {
//writeWord(SEG_OVERRIDE, loc, getregval(reg));
setregval(reg, readWord(SEG_OVERRIDE, loc));
} else {
//writeByte(SEG_OVERRIDE, loc, getregval(reg));
setregval(reg, readByte(SEG_OVERRIDE, loc));
}
regdump();
FN_ILOG("MOV %s(%04X), %s(%04X:%04X) [w=%d]\n", getregname(reg), getregval(reg), getrmname(mr.rm), getregval(SEG_OVERRIDE), loc, mr.w);
break;
}
case MR_RM2_DISP8: {
loc = rm2loc(mr.rm);
loc += readByte(SEG, IP);
IP++;
uint8_t reg = (mr.reg + (mr.w << 3));
if (mr.w) {
//writeWord(SEG_OVERRIDE, loc, getregval(reg));
setregval(reg, readWord(SEG_OVERRIDE, loc));
} else {
//writeByte(SEG_OVERRIDE, loc, getregval(reg));
setregval(reg, readByte(SEG_OVERRIDE, loc));
}
regdump();
FN_ILOG("MOV %s(%04X), %s(%04X:%04X) [w=%d, disp8]\n", getregname(reg), getregval(reg), getrmname(mr.rm), getregval(SEG_OVERRIDE), loc, mr.w);
break;
}
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented MOV memory access mode %d [ipc88]\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("MOV BYTE %s, %s [movmr8_2REG]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_INT: {
interrupt(readByte(SEG, IP));
IP++;
regdump();
FN_ILOG("INT %02X\n", readByte(SEG, IP-1));
break;
}
case OPCODE_BREAKPOINT: {
interrupt(3);
regdump();
FN_ILOG("INT 3 [breakpoint]\n");
break;
}
case OPCODE_NOP: {
regdump();
FN_ILOG("NOP\n");
break;
}
case OPCODE_JMP_REL16: {
sint16_t targ = readWord(SEG, IP);
IP+=2;
jump(IP + targ);
regdump();
FN_ILOG("JMP SHORT 0x%04X [rel16]\n",IP);
break;
}
case OPCODE_JMP_REL8: {
sint8_t targ = readByte(SEG, IP);
IP++;
jump(IP + targ);
regdump();
FN_ILOG("JMP SHORT 0x%02X [rel8]\n",IP);
break;
}
case OPCODE_LODSB: {
uint8_t v = readByte(SEG_OVERRIDE, getregval(REGISTER_SI));
setregval(REGISTER_AL, v);
if (getflag(FLAG_DIRECTION))
setregval(REGISTER_SI, getregval(REGISTER_SI)-1);
else
setregval(REGISTER_SI, getregval(REGISTER_SI)+1);
regdump();
FN_ILOG("LODSB (%02X from %04X:%04X)\n", getregval(REGISTER_AL), getregval(SEG_OVERRIDE), getregval(REGISTER_SI));
break;
}
case OPCODE_LODSW: {
uint16_t v = readWord(SEG_OVERRIDE, getregval(REGISTER_SI));
setregval(REGISTER_AX, v);
if (getflag(FLAG_DIRECTION))
setregval(REGISTER_SI, getregval(REGISTER_SI)-2);
else
setregval(REGISTER_SI, getregval(REGISTER_SI)+2);
regdump();
FN_ILOG("LODSW (%04X from %04X:%04X)\n", getregval(REGISTER_AX), getregval(SEG_OVERRIDE), getregval(REGISTER_SI));
break;
}
case OPCODE_OR_09_WORD: {
mrfield mr = parsemr(IP, ipc);
IP++;
// if d is 1, move rmw to sr, else sr to rmw
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm + (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg + (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1:
loc = rm2loc(mr.rm);
writeWord(SEG_OVERRIDE, loc, getregval(regid1) | readWord(SEG_OVERRIDE, loc));
regdump();
FN_ILOG("OR %s, %s [ipc09, m0]\n", getrmname(mr.rm), getregname(regid1));
break;
case MR_RM2_DISP8:
case MR_RM2_DISP16:
regdump_force();
FN_ELOG("FIXME: Unimplemented OR memory access mode %d [ipc09]\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1) | getregval(regid2));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
regdump();
FN_ILOG("OR %s, %s [ipc09, m3]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_OR_08_BYTE: {
mrfield mr = parsemr(IP, ipc);
IP++;
mr.w = 0;
uint8_t regid1,regid2;
if (!mr.d) {
regid1 = (mr.reg + (mr.w << 3));
regid2 = (mr.rm+ (mr.w << 3));
} else {
regid1 = (mr.rm + (mr.w << 3));
regid2 = (mr.reg+ (mr.w << 3));
}
uint16_t loc;
switch (mr.mod) {
case MR_RM1:
loc = rm2loc(mr.rm);
writeByte(SEG_OVERRIDE, loc, getregval(regid1) | readByte(SEG_OVERRIDE, loc));
if (readByte(SEG_OVERRIDE, loc) == 0)
setflag(FLAG_ZERO);
else
clearflag(FLAG_ZERO);
regdump();
FN_ILOG("OR %s, %s [ipc08]\n", getrmname(mr.rm), getregname(regid1));
break;
case MR_RM2_DISP8:
case MR_RM2_DISP16:
FN_ELOG("FIXME: Unimplemented OR memory access mode %d\n",mr.mod);
running = false;
break;
case MR_2REG:
setregval(regid2, getregval(regid1) | getregval(regid2));
if (getregval(regid2) == 0)
setflag(FLAG_ZERO);
else
clearflag(FLAG_ZERO);
regdump();
FN_ILOG("OR %s, %s [ipc08]\n", getregname(regid2), getregname(regid1));
}
break;
}
case OPCODE_XOR_31_WORD: {
mrfield mr = parsemr(IP, ipc);
IP++;