From 3aa9e4d9986616bbdcd46aafba86e0f4e8f5eba3 Mon Sep 17 00:00:00 2001 From: wb Date: Thu, 25 Jul 2024 12:15:53 +0800 Subject: [PATCH 1/3] Fix the issue when the CH_CFG_ST_TIMEDELTA configuration is set to 2. --- demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h | 4 ++-- demos/WB32/RT-WB32F3G71-RTC/main.c | 6 +++--- demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h | 4 ++-- os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c | 10 +++++----- os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h | 8 +++++++- os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h | 8 ++++---- os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h | 8 ++++---- 7 files changed, 27 insertions(+), 21 deletions(-) diff --git a/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h b/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h index 3fd3c65f9e..d1e9351994 100644 --- a/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h +++ b/demos/WB32/RT-WB32F3G71-RTC/cfg/chconf.h @@ -63,7 +63,7 @@ * @note Allowed values are 16, 32 or 64 bits. */ #if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 +#define CH_CFG_ST_RESOLUTION 16 #endif /** @@ -100,7 +100,7 @@ * this value. */ #if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 0 +#define CH_CFG_ST_TIMEDELTA 2 #endif /** @} */ diff --git a/demos/WB32/RT-WB32F3G71-RTC/main.c b/demos/WB32/RT-WB32F3G71-RTC/main.c index 534b0f94c2..8d287119bc 100644 --- a/demos/WB32/RT-WB32F3G71-RTC/main.c +++ b/demos/WB32/RT-WB32F3G71-RTC/main.c @@ -121,9 +121,9 @@ int main(void) { while (true){ chThdSleepSeconds(2); rtcGetTime(&RTCD1, ×pec); - chprintf((BaseSequentialStream *)&SERIAL_DEBUG_DRIVER, - "lsi sleep %ds year = %d month = %d dstflag=%d dayofweek = %d day = %d millisecond = %d\r\n", - RTC_ALARMPERIOD, timespec.year, timespec.month, timespec.dstflag, timespec.dayofweek, timespec.day, timespec.millisecond); + // chprintf((BaseSequentialStream *)&SERIAL_DEBUG_DRIVER, + // "lsi sleep %ds year = %d month = %d dstflag=%d dayofweek = %d day = %d millisecond = %d\r\n", + // RTC_ALARMPERIOD, timespec.year, timespec.month, timespec.dstflag, timespec.dayofweek, timespec.day, timespec.millisecond); chThdSleepSeconds(3); chSysDisable(); diff --git a/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h b/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h index 3fd3c65f9e..d1e9351994 100644 --- a/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h +++ b/demos/WB32/RT-WB32FQ95-GENERIC/cfg/chconf.h @@ -63,7 +63,7 @@ * @note Allowed values are 16, 32 or 64 bits. */ #if !defined(CH_CFG_ST_RESOLUTION) -#define CH_CFG_ST_RESOLUTION 32 +#define CH_CFG_ST_RESOLUTION 16 #endif /** @@ -100,7 +100,7 @@ * this value. */ #if !defined(CH_CFG_ST_TIMEDELTA) -#define CH_CFG_ST_TIMEDELTA 0 +#define CH_CFG_ST_TIMEDELTA 2 #endif /** @} */ diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c index 80ecc755b9..88aedefd81 100644 --- a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c +++ b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.c @@ -243,22 +243,22 @@ void st_lld_serve_interrupt(void) { #if OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING #if ST_LLD_NUM_ALARMS > 1 if ((sr & TIM_SR_CC2IF) != 0U) { - if (st_callbacks[2] != NULL) { - st_callbacks[0](1U); + if (st_callbacks[1] != NULL) { + st_callbacks[1](1U); } } #endif #if ST_LLD_NUM_ALARMS > 2 if ((sr & TIM_SR_CC3IF) != 0U) { if (st_callbacks[2] != NULL) { - st_callbacks[1](2U); + st_callbacks[2](2U); } } #endif #if ST_LLD_NUM_ALARMS > 3 if ((sr & TIM_SR_CC4IF) != 0U) { - if (st_callbacks[2] != NULL) { - st_callbacks[2](3U); + if (st_callbacks[3] != NULL) { + st_callbacks[3](3U); } } #endif diff --git a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h index 4ef27ace13..d148f55a61 100644 --- a/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h +++ b/os/hal/ports/WB32/LLD/TIMv1/hal_st_lld.h @@ -154,7 +154,7 @@ #define ST_LLD_NUM_ALARMS WB32_ST_ENFORCE_ALARMS #endif -#elif OSAL_ST_MODE == OSAL_ST_MODE_FREERUNNING +#elif OSAL_ST_MODE == OSAL_ST_MODE_PERIODIC #define WB32_ST_USE_SYSTICK TRUE #define WB32_ST_USE_TIM2 FALSE @@ -225,8 +225,10 @@ static inline void st_lld_start_alarm(systime_t abstime) { WB32_ST_TIM->SR = 0; #if ST_LLD_NUM_ALARMS == 1 WB32_ST_TIM->DIER = WB32_TIM_DIER_CC1IE; + WB32_ST_TIM->CCER = WB32_TIM_CCER_CC1E; #else WB32_ST_TIM->DIER |= WB32_TIM_DIER_CC1IE; + WB32_ST_TIM->CCER |= WB32_TIM_CCER_CC1E; #endif } @@ -239,8 +241,10 @@ static inline void st_lld_stop_alarm(void) { #if ST_LLD_NUM_ALARMS == 1 WB32_ST_TIM->DIER = 0U; + WB32_ST_TIM->CCER = 0U; #else WB32_ST_TIM->DIER &= ~WB32_TIM_DIER_CC1IE; + WB32_ST_TIM->CCER &= ~WB32_TIM_CCER_CC1E; #endif } @@ -300,6 +304,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) { WB32_ST_TIM->CCR[alarm] = (uint32_t)abstime; WB32_ST_TIM->SR = 0; WB32_ST_TIM->DIER |= (WB32_TIM_DIER_CC1IE << alarm); + WB32_ST_TIM->CCER |= (WB32_TIM_CCER_CC1E << (alarm * 4)); } /** @@ -314,6 +319,7 @@ static inline void st_lld_start_alarm_n(unsigned alarm, systime_t abstime) { static inline void st_lld_stop_alarm_n(unsigned alarm) { WB32_ST_TIM->DIER &= ~(WB32_TIM_DIER_CC1IE << alarm); + WB32_ST_TIM->CCER &= ~(WB32_TIM_CCER_CC1E << (alarm * 4)); } /** diff --git a/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h b/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h index e18ab027e4..a5ee268c49 100644 --- a/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h +++ b/os/hal/ports/WB32/WB32F3G71xx/wb32_registry.h @@ -99,13 +99,13 @@ #define WB32_HAS_TIM3 TRUE #define WB32_HAS_TIM4 TRUE -#define WB32_TIM1_IS_32BITS TRUE +#define WB32_TIM1_IS_32BITS FALSE #define WB32_TIM1_CHANNELS 4 -#define WB32_TIM2_IS_32BITS TRUE +#define WB32_TIM2_IS_32BITS FALSE #define WB32_TIM2_CHANNELS 4 -#define WB32_TIM3_IS_32BITS TRUE +#define WB32_TIM3_IS_32BITS FALSE #define WB32_TIM3_CHANNELS 4 -#define WB32_TIM4_IS_32BITS TRUE +#define WB32_TIM4_IS_32BITS FALSE #define WB32_TIM4_CHANNELS 4 /* I2C attributes */ diff --git a/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h b/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h index ab8d897657..519fe2d01b 100644 --- a/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h +++ b/os/hal/ports/WB32/WB32FQ95xx/wb32_registry.h @@ -99,13 +99,13 @@ #define WB32_HAS_TIM3 TRUE #define WB32_HAS_TIM4 TRUE -#define WB32_TIM1_IS_32BITS TRUE +#define WB32_TIM1_IS_32BITS FALSE #define WB32_TIM1_CHANNELS 4 -#define WB32_TIM2_IS_32BITS TRUE +#define WB32_TIM2_IS_32BITS FALSE #define WB32_TIM2_CHANNELS 4 -#define WB32_TIM3_IS_32BITS TRUE +#define WB32_TIM3_IS_32BITS FALSE #define WB32_TIM3_CHANNELS 4 -#define WB32_TIM4_IS_32BITS TRUE +#define WB32_TIM4_IS_32BITS FALSE #define WB32_TIM4_CHANNELS 4 /* I2C attributes */ From 1578158053373a5606b281e6c128820524259d56 Mon Sep 17 00:00:00 2001 From: wb Date: Thu, 25 Jul 2024 12:16:11 +0800 Subject: [PATCH 2/3] Update EXTI isr. --- os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c | 23 ++++++++++++++++------- os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c | 23 ++++++++++++++++------- 2 files changed, 32 insertions(+), 14 deletions(-) diff --git a/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c b/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c index cba88e67b5..e9fa6d465f 100644 --- a/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c +++ b/os/hal/ports/WB32/WB32F3G71xx/wb32_isr.c @@ -63,10 +63,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI0_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR0; - EXTI->PR = pr; exti_serve_irq(pr, 0); + EXTI->PR = EXTI_PR_PR0; + OSAL_IRQ_EPILOGUE(); } #endif @@ -83,10 +84,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI1_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR1; - EXTI->PR = pr; exti_serve_irq(pr, 1); + EXTI->PR = EXTI_PR_PR1; + OSAL_IRQ_EPILOGUE(); } #endif @@ -103,9 +105,10 @@ OSAL_IRQ_HANDLER(WB32_EXTI2_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR2; - EXTI->PR = pr; exti_serve_irq(pr, 2); + + EXTI->PR = EXTI_PR_PR2; OSAL_IRQ_EPILOGUE(); } @@ -123,10 +126,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI3_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR3; - EXTI->PR = pr; exti_serve_irq(pr, 3); + EXTI->PR = EXTI_PR_PR3; + OSAL_IRQ_EPILOGUE(); } #endif @@ -143,10 +147,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI4_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR4; - EXTI->PR = pr; exti_serve_irq(pr, 4); + EXTI->PR = EXTI_PR_PR4; + OSAL_IRQ_EPILOGUE(); } #endif @@ -164,7 +169,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) { pr = EXTI->PR & (EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 | EXTI_PR_PR8 | EXTI_PR_PR9); - EXTI->PR = pr; exti_serve_irq(pr, 5); exti_serve_irq(pr, 6); @@ -172,6 +176,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) { exti_serve_irq(pr, 8); exti_serve_irq(pr, 9); + EXTI->PR = EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 | + EXTI_PR_PR8 | EXTI_PR_PR9; + OSAL_IRQ_EPILOGUE(); } #endif @@ -189,7 +196,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) { pr = EXTI->PR & (EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 | EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15); - EXTI->PR = pr; exti_serve_irq(pr, 10); exti_serve_irq(pr, 11); @@ -198,6 +204,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) { exti_serve_irq(pr, 14); exti_serve_irq(pr, 15); + EXTI->PR = EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 | + EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15; + OSAL_IRQ_EPILOGUE(); } #endif diff --git a/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c b/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c index 1533e3123e..3b89813c9a 100644 --- a/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c +++ b/os/hal/ports/WB32/WB32FQ95xx/wb32_isr.c @@ -63,10 +63,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI0_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR0; - EXTI->PR = pr; exti_serve_irq(pr, 0); + EXTI->PR = EXTI_PR_PR0; + OSAL_IRQ_EPILOGUE(); } #endif @@ -83,10 +84,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI1_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR1; - EXTI->PR = pr; exti_serve_irq(pr, 1); + EXTI->PR = EXTI_PR_PR1; + OSAL_IRQ_EPILOGUE(); } #endif @@ -103,9 +105,10 @@ OSAL_IRQ_HANDLER(WB32_EXTI2_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR2; - EXTI->PR = pr; exti_serve_irq(pr, 2); + + EXTI->PR = EXTI_PR_PR2; OSAL_IRQ_EPILOGUE(); } @@ -123,10 +126,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI3_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR3; - EXTI->PR = pr; exti_serve_irq(pr, 3); + EXTI->PR = EXTI_PR_PR3; + OSAL_IRQ_EPILOGUE(); } #endif @@ -143,10 +147,11 @@ OSAL_IRQ_HANDLER(WB32_EXTI4_IRQ_VECTOR) { OSAL_IRQ_PROLOGUE(); pr = EXTI->PR & EXTI_PR_PR4; - EXTI->PR = pr; exti_serve_irq(pr, 4); + EXTI->PR = EXTI_PR_PR4; + OSAL_IRQ_EPILOGUE(); } #endif @@ -164,7 +169,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) { pr = EXTI->PR & (EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 | EXTI_PR_PR8 | EXTI_PR_PR9); - EXTI->PR = pr; exti_serve_irq(pr, 5); exti_serve_irq(pr, 6); @@ -172,6 +176,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI9_5_IRQ_VECTOR) { exti_serve_irq(pr, 8); exti_serve_irq(pr, 9); + EXTI->PR = EXTI_PR_PR5 | EXTI_PR_PR6 | EXTI_PR_PR7 | + EXTI_PR_PR8 | EXTI_PR_PR9; + OSAL_IRQ_EPILOGUE(); } #endif @@ -189,7 +196,6 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) { pr = EXTI->PR & (EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 | EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15); - EXTI->PR = pr; exti_serve_irq(pr, 10); exti_serve_irq(pr, 11); @@ -198,6 +204,9 @@ OSAL_IRQ_HANDLER(WB32_EXTI15_10_IRQ_VECTOR) { exti_serve_irq(pr, 14); exti_serve_irq(pr, 15); + EXTI->PR = EXTI_PR_PR10 | EXTI_PR_PR11 | EXTI_PR_PR12 | + EXTI_PR_PR13 | EXTI_PR_PR14 | EXTI_PR_PR15; + OSAL_IRQ_EPILOGUE(); } #endif From d8ea1c1b8824ffb69236304c2056935d93a2cccb Mon Sep 17 00:00:00 2001 From: Joy Lee Date: Mon, 5 Aug 2024 09:04:41 +0800 Subject: [PATCH 3/3] Update demos/WB32/RT-WB32F3G71-RTC/main.c --- demos/WB32/RT-WB32F3G71-RTC/main.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/demos/WB32/RT-WB32F3G71-RTC/main.c b/demos/WB32/RT-WB32F3G71-RTC/main.c index 8d287119bc..f5b4f7e80d 100644 --- a/demos/WB32/RT-WB32F3G71-RTC/main.c +++ b/demos/WB32/RT-WB32F3G71-RTC/main.c @@ -121,9 +121,6 @@ int main(void) { while (true){ chThdSleepSeconds(2); rtcGetTime(&RTCD1, ×pec); - // chprintf((BaseSequentialStream *)&SERIAL_DEBUG_DRIVER, - // "lsi sleep %ds year = %d month = %d dstflag=%d dayofweek = %d day = %d millisecond = %d\r\n", - // RTC_ALARMPERIOD, timespec.year, timespec.month, timespec.dstflag, timespec.dayofweek, timespec.day, timespec.millisecond); chThdSleepSeconds(3); chSysDisable();