diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml new file mode 100644 index 0000000..2b95718 --- /dev/null +++ b/.github/workflows/build.yml @@ -0,0 +1,129 @@ +name: Dasharo +on: + push: + branches: + - rel_* + +jobs: + build_pcengines: + runs-on: ubuntu-22.04 + container: + image: ghcr.io/dasharo/dasharo-sdk:v1.6.0-rc4 + options: --user 1001 + strategy: + matrix: + vendor: [ pcengines ] + model: [ apu2, apu3, apu4, apu6 ] + payload: [ seabios ] + steps: + - name: Checkout coreboot + run: | + echo "VERSION=$(echo ${GITHUB_REF#refs/heads/rel_} | tr '/' '_')" >> $GITHUB_ENV + VERSION=$(echo ${GITHUB_REF#refs/heads/rel_} | tr '/' '_') + CORELABEL=$(echo $VERSION | awk -F '.' '{if ($3 == "00") print $1"."$2; else print $1"."$2"."$3}') + echo "Extracted Coreboot version: $CORELABEL" + git clone https://review.coreboot.org/coreboot + cd coreboot + git checkout $CORELABEL -b patchqueue + - name: Checkout repository + uses: actions/checkout@v4 + with: + # Checkout pull request HEAD commit instead of merge commit + # See: https://github.com/actions/checkout#checkout-pull-request-head-commit-instead-of-merge-commit + ref: ${{ github.event.pull_request.head.sha }} + # Fetch complete history + fetch-depth: 0 + path: coreboot/.git/patches + - name: Set Up Git + run: | + cd $GITHUB_WORKSPACE/coreboot + git config user.name "github-actions[bot]" + git config user.email "github-actions[bot]@users.noreply.github.com" + ln -s patches .git/patches/patchqueue + touch .git/patches/patchqueue/status + - name: Apply Patches Using Guilt + run: | + cd $GITHUB_WORKSPACE/coreboot + guilt push -a + - name: Checkout coreboot submodules and add annoted tag + run: | + cd $GITHUB_WORKSPACE/coreboot + git submodule update --init --recursive --checkout + # this is for verification of reproducibility in local builds + git tag -a github-actions-bot-tag -m "$GITHUB_REF_NAME" + - name: Build Dasharo + run: | + cd $GITHUB_WORKSPACE/coreboot + cp configs/config.${{ matrix.vendor }}_${{ matrix.payload }}_${{ matrix.model }} .config + make olddefconfig + make BUILD_TIMELESS=1 + - name: Save artifacts + uses: actions/upload-artifact@v4 + with: + name: "dasharo-${{ matrix.vendor }}-${{ matrix.model }}-${{ matrix.payload }}" + path: | + coreboot/build/coreboot.rom + retention-days: 30 + build_q35: + runs-on: ubuntu-22.04 + container: + image: ghcr.io/dasharo/dasharo-sdk:v1.6.0-rc4 + options: --user 1001 + strategy: + matrix: + vendor: [ emulation_qemu ] + model: [ x86_q35 ] + payload: [ smm_tseg_seabios ] + steps: + - name: Checkout coreboot + run: | + echo "VERSION=$(echo ${GITHUB_REF#refs/heads/rel_} | tr '/' '_')" >> $GITHUB_ENV + VERSION=$(echo ${GITHUB_REF#refs/heads/rel_} | tr '/' '_') + CORELABEL=$(echo $VERSION | awk -F '.' '{if ($3 == "00") print $1"."$2; else print $1"."$2"."$3}') + echo "Extracted Coreboot version: $CORELABEL" + git clone https://review.coreboot.org/coreboot + cd coreboot + git checkout $CORELABEL -b patchqueue + - name: Checkout repository + uses: actions/checkout@v4 + with: + # Checkout pull request HEAD commit instead of merge commit + # See: https://github.com/actions/checkout#checkout-pull-request-head-commit-instead-of-merge-commit + ref: ${{ github.event.pull_request.head.sha }} + # Fetch complete history + fetch-depth: 0 + path: coreboot/.git/patches + - name: Set Up Git + run: | + cd $GITHUB_WORKSPACE/coreboot + git config user.name "github-actions[bot]" + git config user.email "github-actions[bot]@users.noreply.github.com" + ln -s patches .git/patches/patchqueue + touch .git/patches/patchqueue/status + - name: Apply Patches Using Guilt + run: | + cd $GITHUB_WORKSPACE/coreboot + guilt push -a + - name: Checkout coreboot submodules and add annoted tag + run: | + cd $GITHUB_WORKSPACE/coreboot + git submodule update --init --recursive --checkout + # this is for verification of reproducibility in local builds + git tag -a github-actions-bot-tag -m "$GITHUB_REF_NAME" + - name: Build Dasharo + run: | + cd $GITHUB_WORKSPACE/coreboot + cp configs/config.${{ matrix.vendor }}_${{ matrix.model }}_${{ matrix.payload }} .config + make olddefconfig + make BUILD_TIMELESS=1 + mv build/coreboot.rom build/qemu_q35_${VERSION}.rom + sha256sum build/qemu_q35_${VERSION}.rom > build/qemu_q35_${VERSION}.rom.sha256 + - name: Save artifacts + uses: actions/upload-artifact@v4 + with: + name: "dasharo-${{ matrix.vendor }}-${{ matrix.model }}-${{ matrix.payload }}_${{ env.VERSION }}" + path: | + coreboot/build/qemu_q35_${{ env.VERSION }}.rom + coreboot/build/qemu_q35_${{ env.VERSION }}.rom.sha256 + retention-days: 30 + diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..2a7c4a5 --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +*.*~ +patches/status +patchqueue diff --git a/README.md b/README.md index a8478f5..1ccc35e 100644 --- a/README.md +++ b/README.md @@ -10,9 +10,9 @@ information on contributing to the Dasharo project. ## Usage -Following procedure was created while testing PC Engines v24.05.00.01. It -should be generalized after gaining better understanding of the Dasharo -Patchqueue Initiative. +Following procedure was created while testing PC Engines v24.05.00.01 and +retested while releasing v24.08.00.01. It should be generalized after gaining +better understanding of the Dasharo Patchqueue Initiative. ### Prepare code base @@ -29,7 +29,7 @@ cd coreboot Checkout branch on tag on which you would like to apply patchqueue: ```bash -git checkout 24.05 -b patchqueue +git checkout 24.08 -b patchqueue ``` Clone this repo: @@ -44,10 +44,11 @@ Go to `.git/patches` and checkout correct patchqueue version: cd .git/patches ``` -In this case we plan to build Dasahro (coreboot+SeaBIOS) v24.05.00.01 for PC Engines: +In this case we plan to build Dasharo (coreboot+SeaBIOS) v25.08.00.01 for PC +Engines: ```bash -git checkout v25.05.00.01 +git checkout v25.08.00.01 ``` Get back to coreboot main directory: @@ -114,24 +115,29 @@ Tag repository, otherwise hash of the build will not match since coreboot use tag during build process: ```sh -git tag -a v24.05.00.01 -m "Some annotation which conten really doesn't matter" +git tag -a v24.08.00.01 -m "Some annotation which conten really doesn't matter" ``` **NOTE:** It has to be annotated tag, coreboot does not pick others. -### Compile +## Release process notes -To compile created code base please use [pce-fw-builder](https://github.com/pcengines/pce-fw-builder). +After applying all patches binaries for all platforms can be build: + +```sh +./build.sh seabios_apu2 && ./build.sh seabios_apu3 && ./build.sh seabios_apu4 \ +&& ./build.sh seabios_apu6 +``` ## Development -### How to handle bug in patches ? +### How to handle bug in patches? -- pop patches using `guilt pop` until you will have broken one on top of stack, -- modify files, +- Pop patches using `guilt pop` until you will have broken one on top of stack, +- Modify files, - `guilt refresh` - this will store changes in required patch - `guilt push -a` - to make sure all patches on top apply without problems -- commit changes to this repository +- Commit changes to this repository Read `man guilt-pop` for efficient popping. @@ -159,16 +165,6 @@ application issues. After resolving issues for given patch use `git add` to stage required changes and `guilt refresh` to update patch, so it reflects cleanly applicable change. -At this point you may need to check if code still compiles at this point, that -why [pce-fw-builder update](#pce-fw-builder-update) may be useful. - -#### pce-fw-builder update - -To understood what changes may be needed to -[pce-fw-builder](https://github.com/pcengines/pce-fw-builder) when updating to -new coreboot version, please check [this -MR](https://github.com/pcengines/pce-fw-builder/pull/66). - ## Background The `dasharo-pq` repository was created as a proof of concept to address issues @@ -219,7 +215,7 @@ mentioned in [#310](https://github.com/Dasharo/dasharo-issues/issues/310). ### Why Track Patches in Git Instead of Just Using Branches? -> Follwing list of arguments was heavily influenced by discussion in +> Following list of arguments was heavily influenced by discussion in > [#5](https://github.com/Dasharo/dasharo-pq/pull/5). Kudos to: > [@krystian-hebel](https://github.com/krystian-hebel), > [@andyhhp](https://github.com/andyhhp), diff --git a/patches/0001-build.sh-dummy-patch-from-26ab7d99e984e662f6ed8ba2c0.patch b/patches/0001-build.sh-dummy-patch-from-26ab7d99e984e662f6ed8ba2c0.patch new file mode 100644 index 0000000..2cde31a --- /dev/null +++ b/patches/0001-build.sh-dummy-patch-from-26ab7d99e984e662f6ed8ba2c0.patch @@ -0,0 +1,325 @@ +From c452891745caa8013b98fc06d9258161848e5eae Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= +Date: Mon, 4 Nov 2024 23:17:41 +0100 +Subject: [PATCH 1/2] build.sh: dummy patch from + 26ab7d99e984e662f6ed8ba2c0e2725c43639a45 dasharo/coreboot +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Piotr Król +--- + build.sh | 301 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 301 insertions(+) + create mode 100644 build.sh + +diff --git a/build.sh b/build.sh +new file mode 100644 +index 000000000000..7ceb2613b239 +--- /dev/null ++++ b/build.sh +@@ -0,0 +1,301 @@ ++#!/bin/bash ++ ++set -euo pipefail ++ ++usage() { ++ echo "${0} CMD" ++ echo "Available CMDs:" ++ echo -e "\tz690a_ddr4 - build Dasharo image compatible with MSI PRO Z690-A (WIFI) DDR4" ++ echo -e "\tz690a_ddr5 - build Dasharo image compatible with MSI PRO Z690-A (WIFI)" ++ echo -e "\tz790p_ddr4 - build Dasharo image compatible with MSI PRO Z790-P (WIFI) DDR4" ++ echo -e "\tz790p_ddr5 - build Dasharo image compatible with MSI PRO Z790-P (WIFI)" ++ echo -e "\tvp66xx - build Dasharo for Protectli VP66xx" ++ echo -e "\tvp46xx - build Dasharo for Protectli VP46xx" ++ echo -e "\tvp32xx - build Dasharo for Protectli VP32xx" ++ echo -e "\tvp2420 - build Dasharo for Protectli VP2420" ++ echo -e "\tvp2410 - build Dasharo for Protectli VP2410" ++ echo -e "\tV1210 - build Dasharo for Protectli V1210" ++ echo -e "\tV1410 - build Dasharo for Protectli V1410" ++ echo -e "\tV1610 - build Dasharo for Protectli V1610" ++ echo -e "\tapu2 - build Dasharo for PC Engines APU2" ++ echo -e "\tapu3 - build Dasharo for PC Engines APU3" ++ echo -e "\tapu4 - build Dasharo for PC Engines APU4" ++ echo -e "\tapu6 - build Dasharo for PC Engines APU6" ++ echo -e "\toptiplex_9010 - build Dasharo compatible with Dell OptiPlex 7010/9010" ++ echo -e "\tqemu - build Dasharo for QEMU Q35" ++ echo -e "\tqemu_full - build Dasharo for QEMU Q35 with all menus available" ++} ++ ++SDKVER="2023-11-24_2731fa619b" ++ ++ ++function build_optiplex_9010 { ++ DEFCONFIG="configs/config.dell_optiplex_9010_sff_uefi_txt" ++ FW_VERSION=v0.1.0-rc1 ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make distclean" ++ ++ cp "${DEFCONFIG}" .config ++ ++ git submodule update --init --checkout ++ ++ echo "Building Dasharo compatible with Dell OptiPlex 7010/9010 (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom ${BOARD}_${FW_VERSION}.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/${BOARD}_${FW_VERSION}.rom" ++ sha256sum ${BOARD}_${FW_VERSION}.rom > ${BOARD}_${FW_VERSION}.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++function build_msi { ++ DEFCONFIG="configs/config.${BOARD}_$1" ++ FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make distclean" ++ ++ cp "${DEFCONFIG}" .config ++ ++ git submodule update --init --checkout ++ ++ echo "Building Dasharo compatible with MSI PRO $2(WIFI) (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom ${BOARD}_${FW_VERSION}_$1.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/${BOARD}_${FW_VERSION}_$1.rom" ++ sha256sum ${BOARD}_${FW_VERSION}_$1.rom > ${BOARD}_${FW_VERSION}_$1.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++function build_protectli_vault { ++ DEFCONFIG="configs/config.protectli_${BOARD}" ++ FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') ++ ++ if [ ! -d 3rdparty/dasharo-blobs/protectli ]; then ++ git submodule update --init --checkout ++ fi ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:2021-09-23_b0d87f753c \ ++ /bin/bash -c "make distclean" ++ ++ cp $DEFCONFIG .config ++ ++ echo "Building Dasharo for Protectli $BOARD (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom protectli_${BOARD}_${FW_VERSION}.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/protectli_${BOARD}_${FW_VERSION}.rom" ++ sha256sum protectli_${BOARD}_${FW_VERSION}.rom > protectli_${BOARD}_${FW_VERSION}.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++function build_v1x10 { ++ DEFCONFIG="configs/config.protectli_vault_jsl_$1" ++ FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') ++ ++ if [ ! -d 3rdparty/dasharo-blobs/protectli ]; then ++ git submodule update --init --checkout ++ fi ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make distclean" ++ ++ cp $DEFCONFIG .config ++ ++ echo "Building Dasharo for Protectli $1 (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom protectli_$1_${FW_VERSION}.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/protectli_$1_${FW_VERSION}.rom" ++ sha256sum protectli_$1_${FW_VERSION}.rom > protectli_$1_${FW_VERSION}.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++function build_pcengines { ++ VARIANT=$1 ++ DEFCONFIG="configs/config.pcengines_uefi_${VARIANT}" ++ FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') ++ ++ # checkout several submodules needed by these boards (some others are checked ++ # out by coreboot's Makefile) ++ git submodule update --init --force --checkout \ ++ 3rdparty/dasharo-blobs \ ++ 3rdparty/vboot ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make distclean" ++ ++ cp $DEFCONFIG .config ++ ++ echo "Building Dasharo for PC Engines ${VARIANT^^*} (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom pcengines_${VARIANT}_${FW_VERSION}.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/pcengines_${VARIANT}_${FW_VERSION}.rom" ++ sha256sum pcengines_${VARIANT}_${FW_VERSION}.rom > pcengines_${VARIANT}_${FW_VERSION}.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++function build_qemu { ++ DEFCONFIG="configs/config.emulation_qemu_x86_q35_uefi${1:-}" ++ FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') ++ ++ # checkout several submodules needed by these boards (some others are checked ++ # out by coreboot's Makefile) ++ git submodule update --init --force --checkout \ ++ 3rdparty/dasharo-blobs ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make distclean" ++ ++ cp $DEFCONFIG .config ++ ++ echo "Building Dasharo for QEMU Q35 (version $FW_VERSION)" ++ ++ docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ ++ -v $HOME/.ssh:/home/coreboot/.ssh \ ++ -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ ++ cp build/coreboot.rom qemu_q35_${FW_VERSION}.rom ++ if [ $? -eq 0 ]; then ++ echo "Result binary placed in $PWD/qemu_q35_${FW_VERSION}.rom" ++ sha256sum qemu_q35_${FW_VERSION}.rom > qemu_q35_${FW_VERSION}.rom.sha256 ++ else ++ echo "Build failed!" ++ exit 1 ++ fi ++} ++ ++CMD="$1" ++ ++case "$CMD" in ++ "ddr4" | "z690a_ddr4") ++ BOARD="msi_ms7d25" ++ build_msi ddr4 "Z690-A DDR4 " ++ ;; ++ "ddr5" | "z690a_ddr5") ++ BOARD="msi_ms7d25" ++ build_msi ddr5 "Z690-A DDR5 " ++ ;; ++ "z790p_ddr4") ++ BOARD="msi_ms7e06" ++ build_msi ddr4 "Z790-P DDR4 " ++ ;; ++ "z790p_ddr5") ++ BOARD="msi_ms7e06" ++ build_msi ddr5 "Z790-P DDR5 " ++ ;; ++ "vp66xx" | "VP66XX") ++ BOARD="vp66xx" ++ build_protectli_vault ++ ;; ++ "vp46xx" | "VP46XX") ++ BOARD="vp46xx" ++ build_protectli_vault ++ ;; ++ "vp32xx" | "VP32XX") ++ BOARD="vp32xx" ++ build_protectli_vault ++ ;; ++ "vp2410" | "VP2410") ++ BOARD="vp2410" ++ build_protectli_vault ++ ;; ++ "vp2420" | "VP2420") ++ BOARD="vp2420" ++ build_protectli_vault ++ ;; ++ "v1210" | "V1210" ) ++ build_v1x10 "v1210" ++ ;; ++ "v1211" | "V1211" ) ++ build_v1x10 "v1211" ++ ;; ++ "v1410" | "V1410" ) ++ build_v1x10 "v1410" ++ ;; ++ "v1610" | "V1610" ) ++ build_v1x10 "v1610" ++ ;; ++ "apu2" | "APU2" ) ++ build_pcengines "apu2" ++ ;; ++ "apu3" | "APU3" ) ++ build_pcengines "apu3" ++ ;; ++ "apu4" | "APU4" ) ++ build_pcengines "apu4" ++ ;; ++ "apu6" | "APU6" ) ++ build_pcengines "apu6" ++ ;; ++ "optiplex_9010" | "optiplex_7010" ) ++ BOARD=optiplex_9010 ++ build_optiplex_9010 ++ ;; ++ "qemu" | "QEMU" | "q35" | "Q35" ) ++ build_qemu ++ ;; ++ "qemu_full" | "QEMU_full" | "q35_full" | "Q35_full" ) ++ build_qemu "_all_menus" ++ ;; ++ *) ++ echo "Invalid command: \"$CMD\"" ++ usage ++ ;; ++esac +-- +2.39.5 + diff --git a/patches/0001-configs-add-pcengines_seabios_apu-2-4.patch b/patches/0001-configs-add-pcengines_seabios_apu-2-4.patch new file mode 100644 index 0000000..28928db --- /dev/null +++ b/patches/0001-configs-add-pcengines_seabios_apu-2-4.patch @@ -0,0 +1,71 @@ +From 19f423fbdfb3afbe7eca532f41a416b5f2bf57ec Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=3D=3FUTF-8=3Fq=3F=3D3D=3D3FUTF-8=3D3Fq=3D3FPiotr=3D3D20Kr?= + =?UTF-8?q?=3D3DC3=3D3DB3l=3D3F=3D3D=3F=3D?= <> +Date: Wed, 8 May 2024 13:32:17 +0200 +Subject: [PATCH] configs: add pcengines_seabios_apu{2,4} +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Piotr Król +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +new file mode 100644 +index 000000000000..7058b2c7cc5e +--- /dev/null ++++ b/configs/config.pcengines_seabios_apu2 +@@ -0,0 +1,24 @@ ++# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set ++# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set ++# CONFIG_IPXE_SERIAL_CONSOLE is not set ++CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 ++CONFIG_BOTTOMIO_POSITION=0xD0000000 ++CONFIG_BUILD_IPXE=y ++CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 ++CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y ++CONFIG_HUDSON_SATA_MODE=2 ++CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 ++CONFIG_IPXE_ADD_SCRIPT=y ++CONFIG_LOCALVERSION="v24.08.00.01" ++CONFIG_MEMTEST86PLUS_V5=y ++CONFIG_MEMTEST_SECONDARY_PAYLOAD=y ++CONFIG_NO_GFX_INIT=y ++CONFIG_POST_IO_PORT=0x80 ++CONFIG_PXE=y ++CONFIG_PXE_ROM_ID="8086,157b" ++CONFIG_SEABIOS_DEBUG_LEVEL=0 ++CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 ++CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 ++CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 ++CONFIG_TPM2=y ++CONFIG_VENDOR_PCENGINES=y +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +new file mode 100644 +index 000000000000..c1ad2636f14e +--- /dev/null ++++ b/configs/config.pcengines_seabios_apu4 +@@ -0,0 +1,25 @@ ++# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set ++# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set ++# CONFIG_IPXE_SERIAL_CONSOLE is not set ++CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 ++CONFIG_BOARD_PCENGINES_APU4=y ++CONFIG_BOTTOMIO_POSITION=0xD0000000 ++CONFIG_BUILD_IPXE=y ++CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 ++CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y ++CONFIG_HUDSON_SATA_MODE=2 ++CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 ++CONFIG_IPXE_ADD_SCRIPT=y ++CONFIG_LOCALVERSION="v24.08.00.01" ++CONFIG_MEMTEST86PLUS_V5=y ++CONFIG_MEMTEST_SECONDARY_PAYLOAD=y ++CONFIG_NO_GFX_INIT=y ++CONFIG_POST_IO_PORT=0x80 ++CONFIG_PXE=y ++CONFIG_PXE_ROM_ID="8086,1539" ++CONFIG_SEABIOS_DEBUG_LEVEL=0 ++CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 ++CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 ++CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 ++CONFIG_TPM2=y ++CONFIG_VENDOR_PCENGINES=y diff --git a/patches/0001-configs-add-pcengines_seabios_apu3.patch b/patches/0001-configs-add-pcengines_seabios_apu3.patch new file mode 100644 index 0000000..6617db2 --- /dev/null +++ b/patches/0001-configs-add-pcengines_seabios_apu3.patch @@ -0,0 +1,41 @@ +From 8b817ff3a8cdada62a15f8f55b693c01563bd3bb Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=3D=3FUTF-8=3Fq=3F=3D3D=3D3FUTF-8=3D3Fq=3D3FPiotr=3D3D20Kr?= + =?UTF-8?q?=3D3DC3=3D3DB3l=3D3F=3D3D=3F=3D?= <> +Date: Mon, 3 Jun 2024 16:01:18 +0200 +Subject: [PATCH] configs: add pcengines_seabios_apu3 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Piotr Król +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +new file mode 100644 +index 000000000000..91758066ac02 +--- /dev/null ++++ b/configs/config.pcengines_seabios_apu3 +@@ -0,0 +1,25 @@ ++# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set ++# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set ++# CONFIG_IPXE_SERIAL_CONSOLE is not set ++CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 ++CONFIG_BOARD_PCENGINES_APU3=y ++CONFIG_BOTTOMIO_POSITION=0xD0000000 ++CONFIG_BUILD_IPXE=y ++CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 ++CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y ++CONFIG_HUDSON_SATA_MODE=2 ++CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 ++CONFIG_IPXE_ADD_SCRIPT=y ++CONFIG_LOCALVERSION="v24.08.00.01" ++CONFIG_MEMTEST86PLUS_V5=y ++CONFIG_MEMTEST_SECONDARY_PAYLOAD=y ++CONFIG_NO_GFX_INIT=y ++CONFIG_POST_IO_PORT=0x80 ++CONFIG_PXE=y ++CONFIG_PXE_ROM_ID="8086,1539" ++CONFIG_SEABIOS_DEBUG_LEVEL=0 ++CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 ++CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 ++CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 ++CONFIG_TPM2=y ++CONFIG_VENDOR_PCENGINES=y diff --git a/patches/0001-configs-move-apu-2-3-4-6-configs-to-seabios_apu-2-3-.patch b/patches/0001-configs-move-apu-2-3-4-6-configs-to-seabios_apu-2-3-.patch deleted file mode 100644 index 02e832d..0000000 --- a/patches/0001-configs-move-apu-2-3-4-6-configs-to-seabios_apu-2-3-.patch +++ /dev/null @@ -1,45 +0,0 @@ -From b982a2728498d22b098a2a55d4eab0eb5db8d8bf Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= -Date: Wed, 19 Jun 2024 00:14:25 +0200 -Subject: [PATCH] configs: move apu{2,3,4,6} configs to seabios_apu{2,3,4,6} -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Dasharo Release Toolkit has problems with bash patterns for subset of -configs to be build, that why given release has to have distinct name -pattern. Because Dasharo(coreboot+UEFI) for PC Engines use -pcengines_uefi_apuX, here we use pcengines_seabios_apuX, but only for -apu{2,3,4,6} which are supported in this builds. - -Signed-off-by: Piotr Król ---- - configs/{config.pcengines_apu2 => config.pcengines_seabios_apu2} | 0 - configs/{config.pcengines_apu3 => config.pcengines_seabios_apu3} | 0 - configs/{config.pcengines_apu4 => config.pcengines_seabios_apu4} | 0 - configs/{config.pcengines_apu6 => config.pcengines_seabios_apu6} | 0 - 4 files changed, 0 insertions(+), 0 deletions(-) - rename configs/{config.pcengines_apu2 => config.pcengines_seabios_apu2} (100%) - rename configs/{config.pcengines_apu3 => config.pcengines_seabios_apu3} (100%) - rename configs/{config.pcengines_apu4 => config.pcengines_seabios_apu4} (100%) - rename configs/{config.pcengines_apu6 => config.pcengines_seabios_apu6} (100%) - -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_seabios_apu2 -similarity index 100% -rename from configs/config.pcengines_apu2 -rename to configs/config.pcengines_seabios_apu2 -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_seabios_apu3 -similarity index 100% -rename from configs/config.pcengines_apu3 -rename to configs/config.pcengines_seabios_apu3 -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_seabios_apu4 -similarity index 100% -rename from configs/config.pcengines_apu4 -rename to configs/config.pcengines_seabios_apu4 -diff --git a/configs/config.pcengines_apu6 b/configs/config.pcengines_seabios_apu6 -similarity index 100% -rename from configs/config.pcengines_apu6 -rename to configs/config.pcengines_seabios_apu6 --- -2.39.2 - diff --git a/patches/0001-configs-remove-apu1-and-add-apu2-4.patch b/patches/0001-configs-remove-apu1-and-add-apu2-4.patch deleted file mode 100644 index 6400018..0000000 --- a/patches/0001-configs-remove-apu1-and-add-apu2-4.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 144c63dd376af81b065ce0e12439b2b59e8975f0 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?=3D=3FUTF-8=3Fq=3FPiotr=3D20Kr=3DC3=3DB3l=3F=3D?= - -Date: Wed, 8 May 2024 13:32:17 +0200 -Subject: [PATCH] From 38278c77511b3312ead14b13fd11f5f588931673 Mon Sep 17 - 00:00:00 2001 [PATCH 01/80] configs: remove apu1 and add apu2/4 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Piotr Król -diff --git a/configs/config.pcengines_apu1 b/configs/config.pcengines_apu1 -deleted file mode 100644 -index a3e34b8df04d..000000000000 ---- a/configs/config.pcengines_apu1 -+++ /dev/null -@@ -1,10 +0,0 @@ --# CONFIG_COLLECT_TIMESTAMPS is not set --CONFIG_VENDOR_PCENGINES=y --CONFIG_BOARD_PCENGINES_APU1=y --CONFIG_NO_GFX_INIT=y --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y --CONFIG_PXE=y --CONFIG_BUILD_IPXE=y --CONFIG_PXE_ROM_ID="10ec,8168" --# CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index fe0a9d7ba431..5157ec1194e5 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 -@@ -1,12 +1,24 @@ --# CONFIG_COLLECT_TIMESTAMPS is not set --CONFIG_VENDOR_PCENGINES=y --CONFIG_BOARD_PCENGINES_APU2=y --CONFIG_APU2_PINMUX_UART_C=y --CONFIG_APU2_PINMUX_UART_D=y -+# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set -+# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -+# CONFIG_IPXE_SERIAL_CONSOLE is not set -+CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 -+CONFIG_BOTTOMIO_POSITION=0xD0000000 -+CONFIG_BUILD_IPXE=y -+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y -+CONFIG_HUDSON_SATA_MODE=2 -+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -+CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_LOCALVERSION="v24.05.00.01" -+CONFIG_MEMTEST86PLUS_V5=y -+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_POST_IO_PORT=0x80 - CONFIG_PXE=y --CONFIG_BUILD_IPXE=y - CONFIG_PXE_ROM_ID="8086,157b" --# CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -+CONFIG_SEABIOS_DEBUG_LEVEL=0 -+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 -+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -+CONFIG_TPM2=y -+CONFIG_VENDOR_PCENGINES=y -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index 17db794bcf92..ae119658be3e 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 -@@ -1,12 +1,25 @@ --# CONFIG_COLLECT_TIMESTAMPS is not set --CONFIG_VENDOR_PCENGINES=y -+# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set -+# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -+# CONFIG_IPXE_SERIAL_CONSOLE is not set -+CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 - CONFIG_BOARD_PCENGINES_APU4=y --CONFIG_APU2_PINMUX_UART_C=y --CONFIG_APU2_PINMUX_UART_D=y -+CONFIG_BOTTOMIO_POSITION=0xD0000000 -+CONFIG_BUILD_IPXE=y -+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y -+CONFIG_HUDSON_SATA_MODE=2 -+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -+CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_LOCALVERSION="v24.05.00.01" -+CONFIG_MEMTEST86PLUS_V5=y -+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_POST_IO_PORT=0x80 - CONFIG_PXE=y --CONFIG_BUILD_IPXE=y - CONFIG_PXE_ROM_ID="8086,1539" --# CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -+CONFIG_SEABIOS_DEBUG_LEVEL=0 -+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 -+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -+CONFIG_TPM2=y -+CONFIG_VENDOR_PCENGINES=y diff --git a/patches/0001-configs-sort-apu3-and-apu5-configs.patch b/patches/0001-configs-sort-apu3-and-apu5-configs.patch deleted file mode 100644 index 21766df..0000000 --- a/patches/0001-configs-sort-apu3-and-apu5-configs.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 40b88570275e3323687b7381a3b8efabf1492b6e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= -Date: Mon, 3 Jun 2024 16:01:18 +0200 -Subject: [PATCH] configs: sort apu3 and apu5 configs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -To keep consistency across PC Engines configs all config options are -always sorted in alphabetical order. - -Signed-off-by: Piotr Król ---- - configs/config.pcengines_apu3 | 12 ++++++------ - configs/config.pcengines_apu5 | 12 ++++++------ - 2 files changed, 12 insertions(+), 12 deletions(-) - -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index bf377158dfea..e4bc9914a1c7 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -1,12 +1,12 @@ - # CONFIG_COLLECT_TIMESTAMPS is not set --CONFIG_VENDOR_PCENGINES=y --CONFIG_BOARD_PCENGINES_APU3=y -+# CONFIG_IPXE_SERIAL_CONSOLE is not set - CONFIG_APU2_PINMUX_UART_C=y - CONFIG_APU2_PINMUX_UART_D=y -+CONFIG_BOARD_PCENGINES_APU3=y -+CONFIG_BUILD_IPXE=y -+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y - CONFIG_PXE=y --CONFIG_BUILD_IPXE=y - CONFIG_PXE_ROM_ID="8086,1539" --# CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -+CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_VENDOR_PCENGINES=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index b004e89c9103..7f405bc6900b 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -1,12 +1,12 @@ - # CONFIG_COLLECT_TIMESTAMPS is not set --CONFIG_VENDOR_PCENGINES=y --CONFIG_BOARD_PCENGINES_APU5=y -+# CONFIG_IPXE_SERIAL_CONSOLE is not set - CONFIG_APU2_PINMUX_UART_C=y - CONFIG_APU2_PINMUX_UART_D=y -+CONFIG_BOARD_PCENGINES_APU5=y -+CONFIG_BUILD_IPXE=y -+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y - CONFIG_PXE=y --CONFIG_BUILD_IPXE=y - CONFIG_PXE_ROM_ID="8086,1539" --# CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -+CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_VENDOR_PCENGINES=y --- -2.39.2 - diff --git a/patches/0001-mainboard-pcengines-add-apu3-variant.patch b/patches/0001-mainboard-pcengines-add-apu3-variant.patch new file mode 100644 index 0000000..fe74624 --- /dev/null +++ b/patches/0001-mainboard-pcengines-add-apu3-variant.patch @@ -0,0 +1,58 @@ +From 93e308dd57dd9d795f0eb0207e35a67119619c1a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=3D=3FUTF-8=3Fq=3FPiotr=3D20Kr=3DC3=3DB3l=3F=3D?= + +Date: Thu, 2 May 2024 23:09:19 +0200 +Subject: [PATCH] mainboard/pcengines: add apu3 variant +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Piotr Król +--- + src/mainboard/pcengines/apu2/mainboard.c | 9 +++++++++ + src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb | 2 +- + 2 files changed, 10 insertions(+), 1 deletion(-) + +diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c +index 8cff46bb0cd1..4f8d76539c8b 100644 +--- a/src/mainboard/pcengines/apu2/mainboard.c ++++ b/src/mainboard/pcengines/apu2/mainboard.c +@@ -26,6 +26,7 @@ + #include + #include "gpio_ftns.h" + #include "bios_knobs.h" ++#include "s1_button.h" + + #define SPD_SIZE 128 + #define PM_RTC_CONTROL 0x56 +@@ -299,6 +300,14 @@ static void mainboard_final(void *chip_info) + // + gpio_set(GPIO_58, 1); + gpio_set(GPIO_59, 1); ++ ++ if (!check_console()) { ++ /*The console is disabled, check if S1 is pressed and enable if so */ ++ if (!gpio_get(GPIO_32)) { ++ printk(BIOS_INFO, "S1 PRESSED\n"); ++ enable_console(); ++ } ++ } + } + + /* +diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb +index 5c169208b9cf..eb0777b489ce 100644 +--- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb ++++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb +@@ -3,7 +3,7 @@ + chip northbridge/amd/pi/00730F01 + device domain 0 on + subsystemid 0x1022 0x1410 inherit +- device ref iommu on end ++ device ref iommu off end + device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane) + device ref gpp_bridge_1 on end # LAN3 + device ref gpp_bridge_2 on end # LAN2 +-- +2.39.5 + diff --git a/patches/0001-payloads-ipxe-fix-compilation-issues-with-corebood-s.patch b/patches/0001-payloads-ipxe-bump-iPXE-to-2024.08.patch similarity index 63% rename from patches/0001-payloads-ipxe-fix-compilation-issues-with-corebood-s.patch rename to patches/0001-payloads-ipxe-bump-iPXE-to-2024.08.patch index 60314fb..d1e6c0f 100644 --- a/patches/0001-payloads-ipxe-fix-compilation-issues-with-corebood-s.patch +++ b/patches/0001-payloads-ipxe-bump-iPXE-to-2024.08.patch @@ -1,16 +1,13 @@ -From 7084a1a8bf5d914f953da6b1ffafd96b6572061f Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= +From 3758ad5293127f80ce535271b9c93a48d31e3398 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=3D=3FUTF-8=3Fq=3FPiotr=3D20Kr=3DC3=3DB3l=3F=3D?= + Date: Mon, 3 Jun 2024 14:51:03 +0200 -Subject: [PATCH] payloads/ipxe: fix compilation issues with corebood-sdk - 2024-03-30_cccada28f7 +Subject: [PATCH] payloads/ipxe: bump iPXE to 2024.08 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -This patch updates iPXE to last commit from May 2024 (2024.05). It -should be updated to support coreboot-sdk 2024-05-20_b4949d3de5, which -is most recent at this point, but iPXE fails with that SDK and that's -why previous SDK was used for building. +This patch updates iPXE to last commit from August 2024 (2024.08). Signed-off-by: Piotr Król --- @@ -19,7 +16,7 @@ Signed-off-by: Piotr Król 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/payloads/external/iPXE/Kconfig b/payloads/external/iPXE/Kconfig -index 2ad39a1a6b30..8cf19c3e47c4 100644 +index ff25d81957f8..19c7abdda98d 100644 --- a/payloads/external/iPXE/Kconfig +++ b/payloads/external/iPXE/Kconfig @@ -54,7 +54,7 @@ choice @@ -27,25 +24,25 @@ index 2ad39a1a6b30..8cf19c3e47c4 100644 config IPXE_STABLE - bool "2022.1" -+ bool "2024.5" ++ bool "2024.8" help iPXE uses a rolling release with no stable version, for reproducibility, use the last commit of a given month as the diff --git a/payloads/external/iPXE/Makefile b/payloads/external/iPXE/Makefile -index 6f5525bcd6d6..c1bd3e4474dc 100644 +index 7ec8126c977e..684f7b241c06 100644 --- a/payloads/external/iPXE/Makefile +++ b/payloads/external/iPXE/Makefile @@ -1,8 +1,8 @@ ## SPDX-License-Identifier: GPL-2.0-only -# 2022.1 - Last commit of January 2022 -+# 2024.5 - Last commit of May 2024 ++# 2024.8 - Last commit of August 2024 # When updating, change the name both here and in payloads/external/iPXE/Kconfig -STABLE_COMMIT_ID=6ba671acd922ee046b257c5119b8a0f64d275473 -+STABLE_COMMIT_ID=e965f179e1654103eca33feed7a9cc4c51d91be6 ++STABLE_COMMIT_ID=301644ab480ab9787c617e1a94e19ca5c2774072 TAG-$(CONFIG_IPXE_MASTER)=origin/master TAG-$(CONFIG_IPXE_STABLE)=$(STABLE_COMMIT_ID) -- -2.39.2 +2.39.5 diff --git a/patches/0002-build.sh-add-support-for-uefi-seabios-_apuX-builds.patch b/patches/0002-build.sh-add-support-for-uefi-seabios-_apuX-builds.patch new file mode 100644 index 0000000..4ccba9f --- /dev/null +++ b/patches/0002-build.sh-add-support-for-uefi-seabios-_apuX-builds.patch @@ -0,0 +1,107 @@ +From cc012c083e1af4f6b9e34642fabd4e0525aa4cac Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= +Date: Mon, 4 Nov 2024 23:38:57 +0100 +Subject: [PATCH 2/2] build.sh: add support for {uefi,seabios}_apuX builds +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Piotr Król +diff --git a/build.sh b/build.sh +old mode 100644 +new mode 100755 +index 7ceb2613b239..982ec8328514 +--- a/build.sh ++++ b/build.sh +@@ -21,12 +21,16 @@ usage() { + echo -e "\tapu3 - build Dasharo for PC Engines APU3" + echo -e "\tapu4 - build Dasharo for PC Engines APU4" + echo -e "\tapu6 - build Dasharo for PC Engines APU6" ++ echo -e "\tseabios_apu2 - build Dasharo(coreboot+SeaBIOS) for PC Engines APU2" ++ echo -e "\tseabios_apu3 - build Dasharo(coreboot+SeaBIOS) for PC Engines APU3" ++ echo -e "\tseabios_apu4 - build Dasharo(coreboot+SeaBIOS) for PC Engines APU4" ++ echo -e "\tseabios_apu6 - build Dasharo(coreboot+SeaBIOS) for PC Engines APU6" + echo -e "\toptiplex_9010 - build Dasharo compatible with Dell OptiPlex 7010/9010" + echo -e "\tqemu - build Dasharo for QEMU Q35" + echo -e "\tqemu_full - build Dasharo for QEMU Q35 with all menus available" + } + +-SDKVER="2023-11-24_2731fa619b" ++SDKVER="ghcr.io/dasharo/dasharo-sdk:v1.6.0-rc4" + + + function build_optiplex_9010 { +@@ -155,18 +159,22 @@ function build_v1x10 { + + function build_pcengines { + VARIANT=$1 +- DEFCONFIG="configs/config.pcengines_uefi_${VARIANT}" ++ DEFCONFIG="configs/config.pcengines_${VARIANT}" + FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') + +- # checkout several submodules needed by these boards (some others are checked +- # out by coreboot's Makefile) +- git submodule update --init --force --checkout \ +- 3rdparty/dasharo-blobs \ +- 3rdparty/vboot ++ if [[ ${VARIANT} == uefi_* ]]; then ++ # checkout several submodules needed by these boards (some others are checked ++ # out by coreboot's Makefile) ++ git submodule update --init --force --checkout \ ++ 3rdparty/dasharo-blobs \ ++ 3rdparty/vboot ++ elif [[ ${VARIANT} == seabios_* ]]; then ++ git submodule update --init --recursive --checkout ++ fi + + docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ + -v $HOME/.ssh:/home/coreboot/.ssh \ +- -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ -w /home/coreboot/coreboot $SDKVER \ + /bin/bash -c "make distclean" + + cp $DEFCONFIG .config +@@ -175,8 +183,8 @@ function build_pcengines { + + docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ + -v $HOME/.ssh:/home/coreboot/.ssh \ +- -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ +- /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ -w /home/coreboot/coreboot $SDKVER \ ++ /bin/bash -c "make olddefconfig && make BUILD_TIMELESS=1 -j$(nproc)" + + cp build/coreboot.rom pcengines_${VARIANT}_${FW_VERSION}.rom + if [ $? -eq 0 ]; then +@@ -273,16 +281,28 @@ case "$CMD" in + build_v1x10 "v1610" + ;; + "apu2" | "APU2" ) +- build_pcengines "apu2" ++ build_pcengines "uefi_apu2" + ;; + "apu3" | "APU3" ) +- build_pcengines "apu3" ++ build_pcengines "uefi_apu3" + ;; + "apu4" | "APU4" ) +- build_pcengines "apu4" ++ build_pcengines "uefi_apu4" + ;; + "apu6" | "APU6" ) +- build_pcengines "apu6" ++ build_pcengines "uefi_apu6" ++ ;; ++ "seabios_apu2" ) ++ build_pcengines "seabios_apu2" ++ ;; ++ "seabios_apu3" ) ++ build_pcengines "seabios_apu3" ++ ;; ++ "seabios_apu4" ) ++ build_pcengines "seabios_apu4" ++ ;; ++ "seabios_apu6" | "APU6" ) ++ build_pcengines "seabios_apu6" + ;; + "optiplex_9010" | "optiplex_7010" ) + BOARD=optiplex_9010 diff --git a/patches/0002-payloads-seabios-use-PC-Engines-repository.patch b/patches/0002-payloads-seabios-use-PC-Engines-repository.patch index 8ea42bc..daf8807 100644 --- a/patches/0002-payloads-seabios-use-PC-Engines-repository.patch +++ b/patches/0002-payloads-seabios-use-PC-Engines-repository.patch @@ -7,54 +7,45 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Piotr Król -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index 5157ec1194e5..f8e362fa5e34 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index 7058b2c7cc5e..27614f10dcd5 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 @@ -17,6 +17,8 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,157b" CONFIG_SEABIOS_DEBUG_LEVEL=0 +CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" ++CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 89e4d995bd71..0604bb39f83a 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -10,4 +10,6 @@ CONFIG_NO_GFX_INIT=y - CONFIG_PXE=y - CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" - CONFIG_VENDOR_PCENGINES=y -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index ae119658be3e..7548f07e5573 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index 91758066ac02..fc513d5c4321 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 @@ -18,6 +18,8 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,1539" CONFIG_SEABIOS_DEBUG_LEVEL=0 +CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" ++CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 7e7f6558f643..3ad06d2cfbd5 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -10,4 +10,6 @@ CONFIG_NO_GFX_INIT=y +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index c1ad2636f14e..b4610152ef2d 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 +@@ -18,6 +18,8 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y + CONFIG_SEABIOS_DEBUG_LEVEL=0 +CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" - CONFIG_VENDOR_PCENGINES=y ++CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" + CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 + CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 + CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 diff --git a/payloads/external/SeaBIOS/Makefile b/payloads/external/SeaBIOS/Makefile index 7926f3fb90ad..5bdd526296ae 100644 --- a/payloads/external/SeaBIOS/Makefile diff --git a/patches/0003-payloads-add-support-for-sortbootorder.patch b/patches/0003-payloads-add-support-for-sortbootorder.patch index 7d7e41a..2035c96 100644 --- a/patches/0003-payloads-add-support-for-sortbootorder.patch +++ b/patches/0003-payloads-add-support-for-sortbootorder.patch @@ -7,58 +7,48 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Piotr Król -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index f8e362fa5e34..430e97e9b24a 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index 27614f10dcd5..02b2bd907d29 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 @@ -20,6 +20,9 @@ CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" + CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 +CONFIG_SORTBOOTORDER_REVISION=y -+CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" ++CONFIG_SORTBOOTORDER_REVISION_ID="95692853947e0b36e4d7fb57bf6a951baa9f78c5" +CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_TPM2=y -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 0604bb39f83a..6892148d226b 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -12,4 +12,7 @@ CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index fc513d5c4321..55b9cb7d900f 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 +@@ -20,6 +20,9 @@ CONFIG_PXE_ROM_ID="8086,1539" + CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" + CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" +CONFIG_SORTBOOTORDER_REVISION=y -+CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" ++CONFIG_SORTBOOTORDER_REVISION_ID="95692853947e0b36e4d7fb57bf6a951baa9f78c5" +CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y - CONFIG_VENDOR_PCENGINES=y -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index 7548f07e5573..29e39103854d 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 + CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 + CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 + CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index b4610152ef2d..95e875e9d229 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 @@ -21,6 +21,9 @@ CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" + CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 +CONFIG_SORTBOOTORDER_REVISION=y -+CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" ++CONFIG_SORTBOOTORDER_REVISION_ID="95692853947e0b36e4d7fb57bf6a951baa9f78c5" +CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_TPM2=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 3ad06d2cfbd5..e2d8f4420c83 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -12,4 +12,7 @@ CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y - CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -+CONFIG_SORTBOOTORDER_REVISION=y -+CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" -+CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y - CONFIG_VENDOR_PCENGINES=y diff --git a/payloads/Kconfig b/payloads/Kconfig index ec1d40c99207..65e5e894dc30 100644 --- a/payloads/Kconfig @@ -79,7 +69,7 @@ index ec1d40c99207..65e5e894dc30 100644 bool "Load coreDOOM as a secondary payload" default n diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk -index a2336aa876a7..d31283957624 100644 +index 5f988dac1bbb..537eaf5cd4ba 100644 --- a/payloads/Makefile.mk +++ b/payloads/Makefile.mk @@ -24,6 +24,7 @@ payloads/external/U-Boot \ @@ -91,7 +81,7 @@ index a2336aa876a7..d31283957624 100644 payloads/external/GRUB2 \ payloads/external/LinuxBoot \ diff --git a/payloads/external/Makefile.mk b/payloads/external/Makefile.mk -index c227402ee5db..56be9b598c8e 100644 +index 53693f59174c..e5fad0684521 100644 --- a/payloads/external/Makefile.mk +++ b/payloads/external/Makefile.mk @@ -341,6 +341,22 @@ payloads/external/Memtest86Plus/$(memtest_dir)/memtest: $(DOTCONFIG) diff --git a/patches/0005-configs-add-support-for-bootorder-files-for-PC-Engin.patch b/patches/0005-configs-add-support-for-bootorder-files-for-PC-Engin.patch index bae51c8..d4ae6f3 100644 --- a/patches/0005-configs-add-support-for-bootorder-files-for-PC-Engin.patch +++ b/patches/0005-configs-add-support-for-bootorder-files-for-PC-Engin.patch @@ -7,35 +7,62 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Piotr Król ---- - configs/config.pcengines_apu2 | 1 + - configs/config.pcengines_apu4 | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index 9ab14bfb7b60..9befb0718c62 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 -@@ -14,6 +14,7 @@ CONFIG_POST_IO_PORT=0x80 +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index 1f7461d6080f..8ef64b02e93b 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 +@@ -16,6 +16,7 @@ CONFIG_NO_GFX_INIT=y + CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" CONFIG_PXE_ROM_ID="8086,157b" +CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index 4711a7e0bd32..d32ecaaf1314 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 -@@ -15,6 +15,7 @@ CONFIG_POST_IO_PORT=0x80 + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index da16cf86a77b..5e2e5df663ba 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 +@@ -17,6 +17,7 @@ CONFIG_NO_GFX_INIT=y + CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" CONFIG_PXE_ROM_ID="8086,1539" +CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" --- -2.39.2 + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index 64a8c2968c6a..835fa3e50efc 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 +@@ -17,6 +17,7 @@ CONFIG_NO_GFX_INIT=y + CONFIG_POST_IO_PORT=0x80 + CONFIG_PXE=y + CONFIG_PXE_ROM_ID="8086,1539" ++CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" + CONFIG_SEABIOS_DEBUG_LEVEL=0 + CONFIG_SEABIOS_REVISION=y + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/src/mainboard/pcengines/apu2/variants/apu3/bootorder b/src/mainboard/pcengines/apu2/variants/apu3/bootorder +new file mode 100644 +index 0000000000000000000000000000000000000000..51b0fea1741238d986b4b47ac678fb344312d04b +GIT binary patch +literal 4096 +zcmeH@OK!s;5Qek1h + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/pcengines/apu2/variants/apu4/bootorder b/src/mainboard/pcengines/apu2/variants/apu4/bootorder +index 2d8efc15d84d9efb9751835a7b3e64a20de2412b..51b0fea1741238d986b4b47ac678fb344312d04b 100644 +GIT binary patch +delta 20 +bcmZorXi(T-&$!v0F@ Signed-off-by: Piotr Król diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c -index ac5c92871f88..586f697a80d5 100644 +index 242ad9d932ed..1c3f80acb891 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c @@ -1,5 +1,9 @@ @@ -36,14 +36,12 @@ index ac5c92871f88..586f697a80d5 100644 #include #include #include -@@ -17,12 +21,17 @@ +@@ -17,12 +21,15 @@ #include #include - #include + #include -#include -+ +#include -+ #include "gpio_ftns.h" +#include "bios_knobs.h" @@ -55,7 +53,7 @@ index ac5c92871f88..586f697a80d5 100644 /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. -@@ -263,23 +272,21 @@ static void mainboard_final(void *chip_info) +@@ -263,23 +270,21 @@ static void mainboard_final(void *chip_info) * We will stuff a modified version of the first NICs (BDF 1:0.0) MAC address * into the smbios serial number location. */ @@ -85,7 +83,7 @@ index ac5c92871f88..586f697a80d5 100644 /* Read in the last 3 bytes of NIC's MAC address. */ bar10 = pci_read_config32(dev, PCI_BASE_ADDRESS_0); -@@ -293,7 +300,45 @@ const char *smbios_mainboard_serial_number(void) +@@ -293,7 +298,45 @@ const char *smbios_mainboard_serial_number(void) mac_addr /= 4; mac_addr -= 64; diff --git a/patches/0012-mainboard-pcengines-add-memory-configuration-and-sta.patch b/patches/0012-mainboard-pcengines-add-memory-configuration-and-sta.patch index 7274f9d..dbead59 100644 --- a/patches/0012-mainboard-pcengines-add-memory-configuration-and-sta.patch +++ b/patches/0012-mainboard-pcengines-add-memory-configuration-and-sta.patch @@ -17,10 +17,10 @@ systems and meets customer expectations. Signed-off-by: Piotr Król diff --git a/src/lib/Makefile.mk b/src/lib/Makefile.mk -index e22fd087238f..bb466820beb5 100644 +index 56d8b1afd57d..a983390b4ed3 100644 --- a/src/lib/Makefile.mk +++ b/src/lib/Makefile.mk -@@ -360,6 +360,7 @@ $(foreach stage,$(libhwbase-stages), \ +@@ -359,6 +359,7 @@ $(foreach stage,$(libhwbase-stages), \ endif # CONFIG_ROMSTAGE_LIBHWBASE || CONFIG_RAMSTAGE_LIBHWBASE romstage-y += spd_bin.c @@ -29,19 +29,19 @@ index e22fd087238f..bb466820beb5 100644 ifeq ($(CONFIG_HAVE_SPD_IN_CBFS),y) LIB_SPD_BIN = $(obj)/spd.bin diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c -index 586f697a80d5..92a0c7b72ba1 100644 +index 1c3f80acb891..9f5f53c2632c 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c -@@ -22,6 +22,8 @@ +@@ -21,6 +21,8 @@ + #include #include - #include - + #include +#include +#include #include - #include "gpio_ftns.h" -@@ -238,10 +240,34 @@ static int mainboard_smbios_data(struct device *dev, int *handle, + #include "bios_knobs.h" +@@ -236,10 +238,34 @@ static int mainboard_smbios_data(struct device *dev, int *handle, static void mainboard_enable(struct device *dev) { /* Maintain this text unchanged for manufacture process. */ @@ -77,7 +77,7 @@ index 586f697a80d5..92a0c7b72ba1 100644 // // Enable the RTC output // -@@ -252,6 +278,10 @@ static void mainboard_enable(struct device *dev) +@@ -250,6 +276,10 @@ static void mainboard_enable(struct device *dev) // pm_write16(PM_S_STATE_CONTROL, pm_read16(PM_S_STATE_CONTROL) | (1 << 14)); diff --git a/patches/0018-mainboard-pcengines-add-apu3-and-apu5-variants.patch b/patches/0018-mainboard-pcengines-add-apu3-and-apu5-variants.patch deleted file mode 100644 index eb65ae1..0000000 --- a/patches/0018-mainboard-pcengines-add-apu3-and-apu5-variants.patch +++ /dev/null @@ -1,253 +0,0 @@ -From aa66769361a226929a7c33469748e082013e1b5d Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Piotr=20Kr=C3=B3l?= -Date: Thu, 2 May 2024 23:09:19 +0200 -Subject: [PATCH 18/80] mainboard/pcengines: add apu3 and apu5 variants -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Piotr Król -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 6892148d226b..41d4551fa470 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -1,18 +1,31 @@ --# CONFIG_COLLECT_TIMESTAMPS is not set -+# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set -+# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set - # CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_APU2_PINMUX_UART_C=y --CONFIG_APU2_PINMUX_UART_D=y -+CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 - CONFIG_BOARD_PCENGINES_APU3=y -+CONFIG_BOTTOMIO_POSITION=0xD0000000 - CONFIG_BUILD_IPXE=y -+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y -+CONFIG_HUDSON_SATA_MODE=2 -+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -+CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_LOCALVERSION="v24.05.00.01" - CONFIG_MEMTEST86PLUS_V5=y - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y -+CONFIG_POST_IO_PORT=0x80 - CONFIG_PXE=y - CONFIG_PXE_ROM_ID="8086,1539" --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" -+CONFIG_SEABIOS_DEBUG_LEVEL=0 - CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 - CONFIG_SORTBOOTORDER_REVISION=y - CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" - CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y -+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -+CONFIG_TPM2=y - CONFIG_VENDOR_PCENGINES=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index e2d8f4420c83..dd3047f0a3a0 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -1,18 +1,31 @@ --# CONFIG_COLLECT_TIMESTAMPS is not set -+# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set -+# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set - # CONFIG_IPXE_SERIAL_CONSOLE is not set --CONFIG_APU2_PINMUX_UART_C=y --CONFIG_APU2_PINMUX_UART_D=y -+CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 - CONFIG_BOARD_PCENGINES_APU5=y -+CONFIG_BOTTOMIO_POSITION=0xD0000000 - CONFIG_BUILD_IPXE=y -+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y -+CONFIG_HUDSON_SATA_MODE=2 -+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -+CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_LOCALVERSION="v24.05.00.01" - CONFIG_MEMTEST86PLUS_V5=y - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y -+CONFIG_POST_IO_PORT=0x80 - CONFIG_PXE=y - CONFIG_PXE_ROM_ID="8086,1539" --CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y -+CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" -+CONFIG_SEABIOS_DEBUG_LEVEL=0 - CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 - CONFIG_SORTBOOTORDER_REVISION=y - CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" - CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y -+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -+CONFIG_TPM2=y - CONFIG_VENDOR_PCENGINES=y -diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig -index d676934dbaae..3a343fefab92 100644 ---- a/payloads/external/SeaBIOS/Kconfig -+++ b/payloads/external/SeaBIOS/Kconfig -@@ -111,12 +111,14 @@ config SEABIOS_BOOTORDER_FILE - - config SEABIOS_BOOTORDER_MAP_FILE - string "SeaBIOS bootorder_map file" -+ default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_map_apu5" if BOARD_PCENGINES_APU5 - default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_map" - help - TBD - - config SEABIOS_BOOTORDER_DEF_FILE - string "SeaBIOS bootorder_def file" -+ default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_def_apu5" if BOARD_PCENGINES_APU5 - default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_def" - help - TBD -diff --git a/src/mainboard/pcengines/apu2/bootorder_def_apu5 b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -new file mode 100644 -index 000000000000..5f562f2468ab ---- /dev/null -+++ b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -@@ -0,0 +1,30 @@ -+/pci@i0cf8/usb@10/usb-*@1 -+/pci@i0cf8/usb@10/usb-*@2 -+/pci@i0cf8/usb@10/usb-*@3 -+/pci@i0cf8/usb@10/usb-*@4 -+/pci@i0cf8/usb@12/usb-*@1 -+/pci@i0cf8/usb@12/usb-*@2 -+/pci@i0cf8/usb@12/usb-*@3 -+/pci@i0cf8/usb@12/usb-*@4 -+/pci@i0cf8/usb@13/usb-*@1 -+/pci@i0cf8/usb@13/usb-*@2 -+/pci@i0cf8/usb@13/usb-*@3 -+/pci@i0cf8/usb@13/usb-*@4 -+/pci@i0cf8/usb@12/hub@1/usb-*@1 -+/pci@i0cf8/*@11/drive@0/disk@0 -+/pci@i0cf8/*@11/drive@1/disk@0 -+/pci@i0cf8/pci-bridge@2,5/*@0/drive@0/disk@0 -+/pci@i0cf8/pci-bridge@2,5/*@0/drive@1/disk@0 -+/rom@genroms/pxe.rom -+pxen0 -+scon1 -+usben1 -+uartc1 -+uartd1 -+ehcien0 -+mpcie2_clk0 -+com2_en0 -+boosten1 -+sd3mode0 -+iommu0 -+watchdog0000 -diff --git a/src/mainboard/pcengines/apu2/bootorder_map_apu5 b/src/mainboard/pcengines/apu2/bootorder_map_apu5 -new file mode 100644 -index 000000000000..f5d47e4ee46c ---- /dev/null -+++ b/src/mainboard/pcengines/apu2/bootorder_map_apu5 -@@ -0,0 +1,18 @@ -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+a USB -+b SDCARD -+c mSATA -+d SATA -+e mPCIe1 SATA1 and SATA2 -+e mPCIe1 SATA1 and SATA2 -+f iPXE -diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c -index 79bbf8c3d9da..dc1ab76eeeeb 100644 ---- a/src/mainboard/pcengines/apu2/mainboard.c -+++ b/src/mainboard/pcengines/apu2/mainboard.c -@@ -28,6 +28,7 @@ - - #include "gpio_ftns.h" - #include "bios_knobs.h" -+#include "s1_button.h" - - #define SPD_SIZE 128 - #define PM_RTC_CONTROL 0x56 -@@ -301,6 +302,18 @@ static void mainboard_final(void *chip_info) - // - gpio_set(GPIO_58, 1); - gpio_set(GPIO_59, 1); -+ -+ if (!check_console()) { -+ /*The console is disabled, check if S1 is pressed and enable if so */ -+#if CONFIG(BOARD_PCENGINES_APU5) -+ if (!gpio_get(GPIO_22)) { -+#else -+ if (!gpio_get(GPIO_32)) { -+#endif -+ printk(BIOS_INFO, "S1 PRESSED\n"); -+ enable_console(); -+ } -+ } - } - - /* -diff --git a/src/mainboard/pcengines/apu2/variants/apu3/bootorder b/src/mainboard/pcengines/apu2/variants/apu3/bootorder -new file mode 100644 -index 0000000000000000000000000000000000000000..51b0fea1741238d986b4b47ac678fb344312d04b -GIT binary patch -literal 4096 -zcmeH@OK!s;5Qek1h - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb -index 5c169208b9cf..eb0777b489ce 100644 ---- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb -+++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb -@@ -3,7 +3,7 @@ - chip northbridge/amd/pi/00730F01 - device domain 0 on - subsystemid 0x1022 0x1410 inherit -- device ref iommu on end -+ device ref iommu off end - device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane) - device ref gpp_bridge_1 on end # LAN3 - device ref gpp_bridge_2 on end # LAN2 -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -new file mode 100644 -index 0000000000000000000000000000000000000000..29c163d69ebbf7f0ac2a8c7bf2c7edcb2293dbc0 -GIT binary patch -literal 4096 -zcmeH@O>V;=5Jt1M(GZi4VMK8{P!|Shg{+BbJ5tJf~u}GpFOk#nK&Ic@Xw* -z)?c`2Crb>70Wly3#DEwO17bi7hygJm2E@R>2FgMiCh`aY(PbzRMub7Xo?yHc%-~~~ -hfda(jFl`t^p@janRe9(juLP4n=LIs_64S12z5rPii1+{i - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb -index 75cc446e463f..85dcf4a343a8 100644 ---- a/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb -+++ b/src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb -@@ -41,7 +41,7 @@ chip northbridge/amd/pi/00730F01 - device pnp 2e.108 off end - device pnp 2e.f off end - device pnp 2e.007 off end -- device pnp 2e.107 off end -+ device pnp 2e.107 on end - device pnp 2e.607 off end - end # SIO NCT5104D - chip drivers/pc80/tpm diff --git a/patches/0023-payloads-SeaBIOS-provide-help-for-added-SeaBIOS-opti.patch b/patches/0023-payloads-SeaBIOS-provide-help-for-added-SeaBIOS-opti.patch index a22706a..ae6d384 100644 --- a/patches/0023-payloads-SeaBIOS-provide-help-for-added-SeaBIOS-opti.patch +++ b/patches/0023-payloads-SeaBIOS-provide-help-for-added-SeaBIOS-opti.patch @@ -8,17 +8,12 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Piotr Król ---- - payloads/external/SeaBIOS/Kconfig | 27 ++++++++++++++++++---- - src/mainboard/pcengines/apu2/bootorder_def | 7 ++++++ - 2 files changed, 29 insertions(+), 5 deletions(-) - diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig -index 37f01e92e929..5ffb01a747bd 100644 +index d676934dbaae..990923858e0c 100644 --- a/payloads/external/SeaBIOS/Kconfig +++ b/payloads/external/SeaBIOS/Kconfig -@@ -112,32 +112,49 @@ config SEABIOS_BOOTORDER_MAP_FILE - default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_map_apu5" if BOARD_PCENGINES_APU5 +@@ -113,31 +113,48 @@ config SEABIOS_BOOTORDER_MAP_FILE + string "SeaBIOS bootorder_map file" default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_map" help - TBD @@ -26,7 +21,6 @@ index 37f01e92e929..5ffb01a747bd 100644 config SEABIOS_BOOTORDER_DEF_FILE string "SeaBIOS bootorder_def file" - default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_def_apu5" if BOARD_PCENGINES_APU5 default "\$(top)/src/mainboard/\$(MAINBOARDDIR)/bootorder_def" help - TBD @@ -87,6 +81,3 @@ index bc27c4834981..a27bc92a0e8c 100644 +uartd1 +ehcien0 +mpcie2_clk0 --- -2.39.2 - diff --git a/patches/0025-mb-pcengines-apu2-mainboard.c-do-not-proceed-with-en.patch b/patches/0025-mb-pcengines-apu2-mainboard.c-do-not-proceed-with-en.patch index e087581..77d3448 100644 --- a/patches/0025-mb-pcengines-apu2-mainboard.c-do-not-proceed-with-en.patch +++ b/patches/0025-mb-pcengines-apu2-mainboard.c-do-not-proceed-with-en.patch @@ -10,19 +10,19 @@ Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski Signed-off-by: Piotr Król diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c -index ce55634db902..249614870fd5 100644 +index 23e3a5c82d2f..c2da3517ab3b 100644 --- a/src/mainboard/pcengines/apu2/mainboard.c +++ b/src/mainboard/pcengines/apu2/mainboard.c -@@ -22,6 +22,8 @@ +@@ -21,6 +21,8 @@ + #include #include - #include - + #include +#include +#include #include #include #include -@@ -39,8 +41,6 @@ +@@ -37,8 +39,6 @@ #define SEC_REG_SERIAL_ADDR 0x1000 #define MAX_SERIAL_LEN 10 @@ -31,7 +31,7 @@ index ce55634db902..249614870fd5 100644 /*********************************************************** * These arrays set up the FCH PCI_INTR registers 0xC00/0xC01. * This table is responsible for physically routing the PIC and -@@ -72,7 +72,7 @@ static const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = { +@@ -70,7 +70,7 @@ static const u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = { [0x48] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, [0x50] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, [0x58] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, @@ -40,7 +40,7 @@ index ce55634db902..249614870fd5 100644 }; static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = { -@@ -95,7 +95,7 @@ static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = { +@@ -93,7 +93,7 @@ static const u8 mainboard_intr_data[FCH_INT_TABLE_SIZE] = { [0x48] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, [0x50] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, [0x58] = 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, @@ -49,7 +49,7 @@ index ce55634db902..249614870fd5 100644 }; /* -@@ -193,6 +193,19 @@ static void config_gpio_mux(void) +@@ -191,6 +191,19 @@ static void config_gpio_mux(void) } } @@ -69,7 +69,7 @@ index ce55634db902..249614870fd5 100644 /********************************************** * enable the dedicated function in mainboard. **********************************************/ -@@ -217,6 +230,24 @@ static int mainboard_smbios_type16(DMI_INFO *agesa_dmi, int *handle, +@@ -215,6 +228,24 @@ static int mainboard_smbios_type16(DMI_INFO *agesa_dmi, int *handle, return len; } @@ -94,7 +94,7 @@ index ce55634db902..249614870fd5 100644 static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, unsigned long *current) { -@@ -236,7 +267,7 @@ static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, +@@ -234,7 +265,7 @@ static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, agesa_dmi->T17[0][0][0].BankLocator); t->memory_type = agesa_dmi->T17[0][0][0].MemoryType; t->type_detail = *(u16 *)&agesa_dmi->T17[0][0][0].TypeDetail; @@ -103,7 +103,7 @@ index ce55634db902..249614870fd5 100644 t->manufacturer = agesa_dmi->T17[0][0][0].ManufacturerIdCode; t->serial_number = smbios_add_string(t->eos, agesa_dmi->T17[0][0][0].SerialNumber); -@@ -244,7 +275,8 @@ static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, +@@ -242,7 +273,8 @@ static int mainboard_smbios_type17(DMI_INFO *agesa_dmi, int *handle, agesa_dmi->T17[0][0][0].PartNumber); t->attributes = agesa_dmi->T17[0][0][0].Attributes; t->extended_size = agesa_dmi->T17[0][0][0].ExtSize; @@ -113,7 +113,7 @@ index ce55634db902..249614870fd5 100644 t->minimum_voltage = 1500; /* From SPD: 1.5V */ t->maximum_voltage = 1500; -@@ -308,6 +340,12 @@ static void mainboard_enable(struct device *dev) +@@ -306,6 +338,12 @@ static void mainboard_enable(struct device *dev) // pm_write16(PM_RTC_CONTROL, pm_read16(PM_RTC_CONTROL) | (1 << 11)); @@ -126,7 +126,7 @@ index ce55634db902..249614870fd5 100644 // // Enable power on from WAKE# // -@@ -321,6 +359,17 @@ static void mainboard_enable(struct device *dev) +@@ -319,6 +357,17 @@ static void mainboard_enable(struct device *dev) /* Initialize the PIRQ data structures for consumption */ pirq_setup(); diff --git a/patches/0028-src-mb-pcengines-apu-add-custom-SeaBIOS-config.patch b/patches/0028-src-mb-pcengines-apu-add-custom-SeaBIOS-config.patch index 7a9deeb..70085cb 100644 --- a/patches/0028-src-mb-pcengines-apu-add-custom-SeaBIOS-config.patch +++ b/patches/0028-src-mb-pcengines-apu-add-custom-SeaBIOS-config.patch @@ -7,69 +7,47 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski ---- - configs/config.pcengines_apu2 | 1 + - configs/config.pcengines_apu3 | 1 + - configs/config.pcengines_apu4 | 1 + - configs/config.pcengines_apu5 | 1 + - src/mainboard/pcengines/apu2/Kconfig | 4 ++++ - src/mainboard/pcengines/apu2/seabios_config | 9 +++++++++ - 6 files changed, 17 insertions(+) - create mode 100644 src/mainboard/pcengines/apu2/seabios_config - -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index 9befb0718c62..0608270dd7e1 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 -@@ -10,6 +10,7 @@ CONFIG_MEMTEST_REVISION=y - CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2" +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index 530300db66f0..fad295788be7 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 +@@ -13,6 +13,7 @@ CONFIG_LOCALVERSION="v24.08.00.01" + CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_NO_GFX_INIT=y +CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config" CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index c892ac090160..8e73c961ec72 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -11,6 +11,7 @@ CONFIG_MEMTEST_REVISION=y - CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2" + CONFIG_PXE_ROM_ID="8086,157b" +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index d66de41cdbcd..bef7bead81f2 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 +@@ -14,6 +14,7 @@ CONFIG_LOCALVERSION="v24.08.00.01" + CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_NO_GFX_INIT=y +CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config" CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index d32ecaaf1314..58675eb6139a 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 -@@ -11,6 +11,7 @@ CONFIG_MEMTEST_REVISION=y - CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2" + CONFIG_PXE_ROM_ID="8086,1539" +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index 901246687eb3..f79aeb191cd7 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 +@@ -14,6 +14,7 @@ CONFIG_LOCALVERSION="v24.08.00.01" + CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_NO_GFX_INIT=y +CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config" CONFIG_POST_IO_PORT=0x80 CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 343729c73fc2..687ba8c8bd6c 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -11,6 +11,7 @@ CONFIG_MEMTEST_REVISION=y - CONFIG_MEMTEST_REVISION_ID="0b756257276729c1a12bc1d95e7a1f044894bda2" - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y -+CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config" - CONFIG_POST_IO_PORT=0x80 - CONFIG_PXE=y - CONFIG_PXE_CUSTOM_BUILD_ID="12345678" + CONFIG_PXE_ROM_ID="8086,1539" diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig -index f98fa1451d04..d375f45e1417 100644 +index a0100209bff3..613cff69cb8d 100644 --- a/src/mainboard/pcengines/apu2/Kconfig +++ b/src/mainboard/pcengines/apu2/Kconfig -@@ -39,6 +39,10 @@ config MAINBOARD_PART_NUMBER +@@ -40,6 +40,10 @@ config MAINBOARD_PART_NUMBER default "apu4" if BOARD_PCENGINES_APU4 default "apu5" if BOARD_PCENGINES_APU5 @@ -95,6 +73,3 @@ index 000000000000..42b3c6bf0389 +# CONFIG_USB_UHCI is not set +# CONFIG_USB_OHCI is not set +# CONFIG_LPT is not set --- -2.39.2 - diff --git a/patches/0030-payloads-external-iPXE-menu.ipxe-enable-autoboot-for.patch b/patches/0030-payloads-external-iPXE-menu.ipxe-enable-autoboot-for.patch index 5509e7d..d8912c7 100644 --- a/patches/0030-payloads-external-iPXE-menu.ipxe-enable-autoboot-for.patch +++ b/patches/0030-payloads-external-iPXE-menu.ipxe-enable-autoboot-for.patch @@ -8,52 +8,40 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index 4cf8467b3997..f0164569d263 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index fad295788be7..d82cb70de1ca 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 @@ -9,6 +9,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 91e3cb3d10e4..195edbbdd264 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index bef7bead81f2..bf4451e5864e 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 @@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index a393e27a8f7b..18de4b0f34e8 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index f79aeb191cd7..ffe489b9ec1f 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 @@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" - CONFIG_MEMTEST86PLUS_V5=y - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 6169e26cbbbd..b155e00bd810 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y - CONFIG_HUDSON_SATA_MODE=2 - CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 - CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y diff --git a/payloads/external/iPXE/menu.ipxe b/payloads/external/iPXE/menu.ipxe diff --git a/patches/0031-src-mb-pcengines-apux-bootorder-prepare-bootorder-fi.patch b/patches/0031-src-mb-pcengines-apux-bootorder-prepare-bootorder-fi.patch index b153a46..c083bac 100644 --- a/patches/0031-src-mb-pcengines-apux-bootorder-prepare-bootorder-fi.patch +++ b/patches/0031-src-mb-pcengines-apux-bootorder-prepare-bootorder-fi.patch @@ -8,12 +8,6 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski ---- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - 3 files changed, 1 insertion(+) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index a27bc92a0e8c..a314740bde97 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -33,14 +27,11 @@ delta 20 bcmZorXi(UY%ec9bQHyW#1V)j`tNB9#NCyU{ diff --git a/src/mainboard/pcengines/apu2/variants/apu4/bootorder b/src/mainboard/pcengines/apu2/variants/apu4/bootorder -index 2d8efc15d84d9efb9751835a7b3e64a20de2412b..e94b77210661cd7789f90fa4897272994fba86d5 100644 +index 51b0fea1741238d986b4b47ac678fb344312d04b..e94b77210661cd7789f90fa4897272994fba86d5 100644 GIT binary patch -delta 26 -hcmZorXi(Tt%E+0VpKFwwXTZg~xsg$eZ}JNM2mo(K2nqlI - -delta 20 -bcmZorXi(Tt%DB0aQHyW#1V*08tNB9#NLL1? +delta 35 +qcmZorXi(T-&&X1oo|rn>n$d_eIX~AZHP3*HcXJ`5F5l$U{GkB8W(sTo --- -2.39.2 +delta 24 +gcmZorXi(T-&p6qgQEzi2qZZ%f35+6>SM!Gg0AAk*fdBvi diff --git a/patches/0034-payloads-iPXE-option-for-reproducible-building.patch b/patches/0034-payloads-iPXE-option-for-reproducible-building.patch index b6af748..8f7681e 100644 --- a/patches/0034-payloads-iPXE-option-for-reproducible-building.patch +++ b/patches/0034-payloads-iPXE-option-for-reproducible-building.patch @@ -4,56 +4,44 @@ Date: Fri, 28 Dec 2018 16:54:40 +0100 Subject: [PATCH 34/80] payloads/iPXE: option for reproducible building Signed-off-by: Krystian Hebel -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index feb2b864d6bc..d6acb129de7c 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index d82cb70de1ca..c097cc39a55b 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 @@ -9,6 +9,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 8d77c74a63e1..754ceb47acf5 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index bf4451e5864e..2b6b3e84448a 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 @@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index 8ff97305edaf..3f3acd2aa6a6 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index ffe489b9ec1f..681018898c54 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 @@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y CONFIG_HUDSON_SATA_MODE=2 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_IPXE_ADD_SCRIPT=y +CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" - CONFIG_MEMTEST86PLUS_V5=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 9fa280cd752c..cb51d2e43cb0 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -10,6 +10,7 @@ CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y - CONFIG_HUDSON_SATA_MODE=2 - CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 - CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" - CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_LOCALVERSION="v24.05.00.01" + CONFIG_LOCALVERSION="v24.08.00.01" CONFIG_MEMTEST86PLUS_V5=y diff --git a/payloads/external/Makefile.mk b/payloads/external/Makefile.mk -index b4e9567321ad..89b4cd41f44d 100644 +index d2961e0fec5b..eb6c014d4684 100644 --- a/payloads/external/Makefile.mk +++ b/payloads/external/Makefile.mk @@ -431,6 +431,7 @@ payloads/external/iPXE/ipxe/ipxe.rom ipxe: $(DOTCONFIG) $(IPXE_CONFIG_SCRIPT) @@ -65,7 +53,7 @@ index b4e9567321ad..89b4cd41f44d 100644 CONFIG_HAS_SCRIPT=$(CONFIG_IPXE_ADD_SCRIPT) \ CONFIG_IPXE_NO_PROMPT=$(CONFIG_IPXE_NO_PROMPT) \ diff --git a/payloads/external/iPXE/Kconfig b/payloads/external/iPXE/Kconfig -index 23171630f058..d734bb688e11 100644 +index 3f0107374350..b8c30d6c0307 100644 --- a/payloads/external/iPXE/Kconfig +++ b/payloads/external/iPXE/Kconfig @@ -83,6 +83,13 @@ config IPXE_SERIAL_CONSOLE @@ -83,7 +71,7 @@ index 23171630f058..d734bb688e11 100644 bool "Do not show prompt to boot from PXE" default n diff --git a/payloads/external/iPXE/Makefile b/payloads/external/iPXE/Makefile -index dc28d87662f4..908b8cf10c67 100644 +index 83fa6b911b10..75aab39074b4 100644 --- a/payloads/external/iPXE/Makefile +++ b/payloads/external/iPXE/Makefile @@ -18,6 +18,10 @@ unexport KCONFIG_SPLITCONFIG @@ -97,7 +85,7 @@ index dc28d87662f4..908b8cf10c67 100644 all: build $(project_dir): -@@ -71,7 +75,7 @@ endif +@@ -74,7 +78,7 @@ endif build: config $(CONFIG_SCRIPT) ifeq ($(CONFIG_HAS_SCRIPT),y) echo " MAKE $(project_name) $(TAG-y) EMBED=$(CONFIG_SCRIPT)" diff --git a/patches/0037-src-mainboard-pcengines-apu2-bootorder-add-boost-kno.patch b/patches/0037-src-mainboard-pcengines-apu2-bootorder-add-boost-kno.patch index bd9cd78..e52090a 100644 --- a/patches/0037-src-mainboard-pcengines-apu2-bootorder-add-boost-kno.patch +++ b/patches/0037-src-mainboard-pcengines-apu2-bootorder-add-boost-kno.patch @@ -7,13 +7,6 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski ---- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4096 -> 4096 bytes - 4 files changed, 1 insertion(+) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index a314740bde97..2ff65ad42601 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -32,24 +25,3 @@ kcmZorXi(Tt!pOtRm6V@fT#}k+$ji04kx`3p@+$r?0EGz%+5i9m delta 23 ecmZorXi(Tt!pOwMySb53i*ND-M()Y0`9lFv;Rd|` -diff --git a/src/mainboard/pcengines/apu2/variants/apu4/bootorder b/src/mainboard/pcengines/apu2/variants/apu4/bootorder -index e94b77210661cd7789f90fa4897272994fba86d5..42e870d321980e78b9bc2891846b12d717a3d10f 100644 -GIT binary patch -delta 33 -ocmZorXi(T-&p6qg(UgamD=9y}xFj{tke6$7Bcm4IA(0HciwwEzGB - -delta 28 -jcmZorXi(T-&&X1oo|rn>n$ePpi+6J)qZZ%f75otZcTETd - -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -index 29c163d69ebbf7f0ac2a8c7bf2c7edcb2293dbc0..b60c6d827dcbc8dc0f7632d44c3f8fa093a971a7 100644 -GIT binary patch -delta 27 -icmZorXi(UY%gB|KpI=;(nrFz%wYiYdgm3a{{!jpYNC>n5 - -delta 20 -bcmZorXi(UY%ec9bQHyW#1V)j`tNB9#NCyU{ - --- -2.39.2 - diff --git a/patches/0041-src-mainboard-pcengines-apu2-bootorder-update-bootor.patch b/patches/0041-src-mainboard-pcengines-apu2-bootorder-update-bootor.patch index 9b2dea7..69fad9d 100644 --- a/patches/0041-src-mainboard-pcengines-apu2-bootorder-update-bootor.patch +++ b/patches/0041-src-mainboard-pcengines-apu2-bootorder-update-bootor.patch @@ -9,13 +9,6 @@ Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski Signed-off-by: Piotr Król ---- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4096 -> 4096 bytes - 4 files changed, 1 insertion(+) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index 2ff65ad42601..bfbe2fa7fd74 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -36,25 +29,11 @@ delta 20 ccmZorXi(VDz_@uLqZHrd1&o4|SM!Gg07<0=#sB~S diff --git a/src/mainboard/pcengines/apu2/variants/apu4/bootorder b/src/mainboard/pcengines/apu2/variants/apu4/bootorder -index 42e870d321980e78b9bc2891846b12d717a3d10f..9de0201c66ee7e08e8ede7317cebc6e3855b4192 100644 -GIT binary patch -delta 27 -icmZorXi(VDz{pjcVw{_wl4`)qwYiZ|k#F*9{!jpVKL~gL - -delta 20 -ccmZorXi(VDz_@uLqZHrd1&o4|SM!Gg07<0=#sB~S - -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -index b60c6d827dcbc8dc0f7632d44c3f8fa093a971a7..ba72627431ca32a0815ac195f1176a7f8d81a3e9 100644 +index e94b77210661cd7789f90fa4897272994fba86d5..9de0201c66ee7e08e8ede7317cebc6e3855b4192 100644 GIT binary patch -delta 195 -zcmZorXi%6?&Q@BS?0_pO^lH`n( -U{B#2#;N{xf$f(CVc{P7107Hg2?EnA( - -delta 31 -ncmZorXi%6?&ZgyHXrg02Ihpa-=0+wh-pv!3xELp|<_`q`ogxX) +delta 43 +ycmZorXi(T-&p6qg(Nv6=D=9y}xFj{tke91C#W*)VCDnkJYjY!`BH!fI{Gk99H4Ll( --- -2.39.2 +delta 32 +ocmZorXi(T-&&X1oo|rn>n$ePpi+A%xMk&6@3mAnbujUU00GeD0OaK4? diff --git a/patches/0042-src-mainboard-pcengines-apu2-bootorder-unify-bootord.patch b/patches/0042-src-mainboard-pcengines-apu2-bootorder-unify-bootord.patch index d7dc1f5..9a1f9c4 100644 --- a/patches/0042-src-mainboard-pcengines-apu2-bootorder-unify-bootord.patch +++ b/patches/0042-src-mainboard-pcengines-apu2-bootorder-unify-bootord.patch @@ -8,15 +8,6 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski ---- - src/mainboard/pcengines/apu2/bootorder_def | 10 +++++++++- - src/mainboard/pcengines/apu2/bootorder_map | 16 ++++++++++++---- - .../pcengines/apu2/variants/apu2/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4096 -> 4054 bytes - 6 files changed, 21 insertions(+), 5 deletions(-) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index bfbe2fa7fd74..37c4b8436e12 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -98,21 +89,3 @@ ZlrjeCHwNmLF~+Umcwz<%>~+>Y80QGlWoA2 -poS$n1(w3B;Ut9u`EKV`b%}+@+;M&~Cq{TaV0u#&R)%?MXTmXz4OUeKM - -delta 238 -zcmW-cKMsO06o=C~+2qB+n1~BHI2!rm0i0bO91XOM5QGv7>ZqOo({K_G!sa!+f{%9i -ze!us%9p2Y{%o~RSYo>$1GVDn=@P0bfN6v_?p(X0B7o9@`OVrr=*JHCIK)@V`i@aL4 -zWQDyY%b~v(sm`_@m>-!Wz{ml7E*jKji=b - --- -2.39.2 - diff --git a/patches/0043-src-mainboard-pcengines-apu2-bootorder-add-watchdog-.patch b/patches/0043-src-mainboard-pcengines-apu2-bootorder-add-watchdog-.patch index 49ef095..49d47b2 100644 --- a/patches/0043-src-mainboard-pcengines-apu2-bootorder-add-watchdog-.patch +++ b/patches/0043-src-mainboard-pcengines-apu2-bootorder-add-watchdog-.patch @@ -9,14 +9,6 @@ Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski Signed-off-by: Piotr Król ---- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/variants/apu2/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4054 -> 4067 bytes - 5 files changed, 1 insertion(+) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index 37c4b8436e12..210845d97c1d 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -53,15 +45,3 @@ jcmZorXi(UY#Kc{mSdyHPlAms1V6Zu!$&PpOYW`3Fh}H>0 delta 20 bcmZorXi(UY#I(7P$%=P!0~7z`)%>9VM$ZO_ -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -index 41643e044d19de2be7d1bd5d5a784829e2981732..e7e7fb6d0f9d4b55de772dab37a7d4fff8324e18 100644 -GIT binary patch -delta 34 -ocmca6|5$!Q2orC4Vo7pFN`ATl5O8fyWK!gvT)@OTxrsjn0MpM3^Z)<= - -delta 12 -TcmaDXe@%Wv2-D_7rY2qhBWeVr - --- -2.39.2 - diff --git a/patches/0050-mainboard-pcengines-add-IOMMU-status-to-bootorder_de.patch b/patches/0050-mainboard-pcengines-add-IOMMU-status-to-bootorder_de.patch index 7c2cbdf..e92721c 100644 --- a/patches/0050-mainboard-pcengines-add-IOMMU-status-to-bootorder_de.patch +++ b/patches/0050-mainboard-pcengines-add-IOMMU-status-to-bootorder_de.patch @@ -7,14 +7,6 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Witwicki ---- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/variants/apu2/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4067 -> 4074 bytes - 5 files changed, 1 insertion(+) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index 210845d97c1d..26686bea9cee 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -52,15 +44,3 @@ dcmZorXi(UY#KfAJpPO5{IiAUdck*ifPykm82Z#Uw delta 20 bcmZorXi(UY#I!k!$&q*R1SXEjtNB9#M-B#& -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -index e7e7fb6d0f9d4b55de772dab37a7d4fff8324e18..5718bbceec04846298ea90b63671a2d354416bea 100644 -GIT binary patch -delta 18 -ZcmaDX|4M#C2oq~&er|5*<{+ktyZ}ep2IBw# - -delta 12 -TcmaDQ|5$!Q2-D_hrhZ-kBtitf - --- -2.39.2 - diff --git a/patches/0055-mainboard-pcengines-add-pciepm-runtime-option.patch b/patches/0055-mainboard-pcengines-add-pciepm-runtime-option.patch index 7702ff3..7bb1aa5 100644 --- a/patches/0055-mainboard-pcengines-add-pciepm-runtime-option.patch +++ b/patches/0055-mainboard-pcengines-add-pciepm-runtime-option.patch @@ -7,16 +7,6 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Piotr Król ---- - src/mainboard/pcengines/apu2/OemCustomize.c | 77 +++++++++++++++++- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/bootorder_def_apu5 | 1 + - .../pcengines/apu2/variants/apu2/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4074 -> 4082 bytes - 7 files changed, 77 insertions(+), 2 deletions(-) - diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c index 2f837fd9d832..ad23370637af 100644 --- a/src/mainboard/pcengines/apu2/OemCustomize.c @@ -125,16 +115,6 @@ diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengine index 26686bea9cee..d7f6d7feef74 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def +++ b/src/mainboard/pcengines/apu2/bootorder_def -@@ -27,4 +27,5 @@ com2_en0 - boosten1 - sd3mode0 - iommu0 -+pciepm0 - watchdog0000 -diff --git a/src/mainboard/pcengines/apu2/bootorder_def_apu5 b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -index 5f562f2468ab..a32975687413 100644 ---- a/src/mainboard/pcengines/apu2/bootorder_def_apu5 -+++ b/src/mainboard/pcengines/apu2/bootorder_def_apu5 @@ -27,4 +27,5 @@ com2_en0 boosten1 sd3mode0 @@ -168,15 +148,3 @@ ecmZorXi(UY#l%*SoS9mXyE&c7ns@SQ{!jp4ZU^T8 delta 20 bcmZorXi(UY#k9GY$%1$C1SZbOtNB9#N1XA# - --- -2.39.2 - diff --git a/patches/0060-coreboot_table-include-DRTM-TPM-log-in-coreboot-tabl.patch b/patches/0060-coreboot_table-include-DRTM-TPM-log-in-coreboot-tabl.patch index f24bb75..b845217 100644 --- a/patches/0060-coreboot_table-include-DRTM-TPM-log-in-coreboot-tabl.patch +++ b/patches/0060-coreboot_table-include-DRTM-TPM-log-in-coreboot-tabl.patch @@ -7,28 +7,23 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski ---- - src/commonlib/include/commonlib/coreboot_tables.h | 1 + - src/lib/coreboot_table.c | 1 + - 2 files changed, 2 insertions(+) - diff --git a/src/commonlib/include/commonlib/coreboot_tables.h b/src/commonlib/include/commonlib/coreboot_tables.h -index 86bf5438b7ca..04c6ea603d03 100644 +index a9e14c7bffb4..9699139a76e4 100644 --- a/src/commonlib/include/commonlib/coreboot_tables.h +++ b/src/commonlib/include/commonlib/coreboot_tables.h -@@ -87,6 +87,7 @@ enum { - LB_TAG_TYPE_C_INFO = 0x0042, - LB_TAG_ACPI_RSDP = 0x0043, +@@ -88,6 +88,7 @@ enum { + LB_TAG_ACPI_RSDP = 0x0043, LB_TAG_PCIE = 0x0044, -+ LB_TAG_DRTM_LOG = 0x0045, + LB_TAG_EFI_FW_INFO = 0x0045, ++ LB_TAG_DRTM_LOG = 0x0046, /* The following options are CMOS-related */ LB_TAG_CMOS_OPTION_TABLE = 0x00c8, LB_TAG_OPTION = 0x00c9, diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c -index 0707fd3eca5e..15dbe8794d96 100644 +index 913588feb670..bb5d6498cc7e 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c -@@ -268,6 +268,7 @@ static void add_cbmem_pointers(struct lb_header *header) +@@ -270,6 +270,7 @@ static void add_cbmem_pointers(struct lb_header *header) {CBMEM_ID_VPD, LB_TAG_VPD}, {CBMEM_ID_WIFI_CALIBRATION, LB_TAG_WIFI_CALIBRATION}, {CBMEM_ID_TPM_CB_LOG, LB_TAG_TPM_CB_LOG}, @@ -36,6 +31,3 @@ index 0707fd3eca5e..15dbe8794d96 100644 {CBMEM_ID_FMAP, LB_TAG_FMAP}, {CBMEM_ID_VBOOT_WORKBUF, LB_TAG_VBOOT_WORKBUF}, {CBMEM_ID_TYPE_C_INFO, LB_TAG_TYPE_C_INFO}, --- -2.39.2 - diff --git a/patches/0063-mainboard-pcengines-apu2-Add-reversed-PCI-address-or.patch b/patches/0063-mainboard-pcengines-apu2-Add-reversed-PCI-address-or.patch index 044f0dd..857def9 100644 --- a/patches/0063-mainboard-pcengines-apu2-Add-reversed-PCI-address-or.patch +++ b/patches/0063-mainboard-pcengines-apu2-Add-reversed-PCI-address-or.patch @@ -5,16 +5,6 @@ Subject: [PATCH 63/80] mainboard/pcengines/apu2/: Add reversed PCI address order option Signed-off-by: Marek Kasiewicz ---- - src/mainboard/pcengines/apu2/OemCustomize.c | 155 +++++++++++++++++- - src/mainboard/pcengines/apu2/bootorder_def | 1 + - .../pcengines/apu2/bootorder_def_apu5 | 1 + - .../pcengines/apu2/variants/apu2/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu5/bootorder | Bin 4082 -> 4095 bytes - 7 files changed, 153 insertions(+), 4 deletions(-) - diff --git a/src/mainboard/pcengines/apu2/OemCustomize.c b/src/mainboard/pcengines/apu2/OemCustomize.c index ad23370637af..d868850ff90e 100644 --- a/src/mainboard/pcengines/apu2/OemCustomize.c @@ -194,16 +184,6 @@ diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengine index d7f6d7feef74..88da074dd189 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def +++ b/src/mainboard/pcengines/apu2/bootorder_def -@@ -28,4 +28,5 @@ boosten1 - sd3mode0 - iommu0 - pciepm0 -+pciereverse0 - watchdog0000 -diff --git a/src/mainboard/pcengines/apu2/bootorder_def_apu5 b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -index a32975687413..7885710c5476 100644 ---- a/src/mainboard/pcengines/apu2/bootorder_def_apu5 -+++ b/src/mainboard/pcengines/apu2/bootorder_def_apu5 @@ -28,4 +28,5 @@ boosten1 sd3mode0 iommu0 @@ -237,15 +217,3 @@ jcmZorXi(Tt%*0)goS9mbT9#T=oVvMyNtbu>YW`3Fl6MLZ delta 20 bcmZorXi(Tt%(S_YNsD*#0w%u6tNB9#NXZ7c -diff --git a/src/mainboard/pcengines/apu2/variants/apu5/bootorder b/src/mainboard/pcengines/apu2/variants/apu5/bootorder -index 1588e7c12710c5c0ba9df2af00c16783621f0807..dede5fc25b031f767dbd94e6f488bcdcc25e65e1 100644 -GIT binary patch -delta 24 -fcmew)|6hJXG81<}a%O5#YFTPgaq8worir`&fXxY^ - -delta 12 -Tcmew_|4DvBGSlV)rhZ-kCXodO - --- -2.39.2 - diff --git a/patches/0065-src-mainboard-pcengines-apu2-add-apu6-variant.patch b/patches/0065-src-mainboard-pcengines-apu2-add-apu6-variant.patch index ca50014..8a38ad5 100644 --- a/patches/0065-src-mainboard-pcengines-apu2-add-apu6-variant.patch +++ b/patches/0065-src-mainboard-pcengines-apu2-add-apu6-variant.patch @@ -7,12 +7,12 @@ Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Michał Żygowski -diff --git a/configs/config.pcengines_apu6 b/configs/config.pcengines_apu6 +diff --git a/configs/config.pcengines_seabios_apu6 b/configs/config.pcengines_seabios_apu6 new file mode 100644 -index 000000000000..7f9bf753accd +index 000000000000..bebf42a4119a --- /dev/null -+++ b/configs/config.pcengines_apu6 -@@ -0,0 +1,33 @@ ++++ b/configs/config.pcengines_seabios_apu6 +@@ -0,0 +1,34 @@ +# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set +# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set +# CONFIG_IPXE_SERIAL_CONSOLE is not set @@ -25,8 +25,9 @@ index 000000000000..7f9bf753accd +CONFIG_HUDSON_SATA_MODE=2 +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_IPXE_ADD_SCRIPT=y ++CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" +CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" -+CONFIG_LOCALVERSION="v24.05.00.01" ++CONFIG_LOCALVERSION="v24.08.00.01" +CONFIG_MEMTEST86PLUS_V5=y +CONFIG_MEMTEST_SECONDARY_PAYLOAD=y +CONFIG_NO_GFX_INIT=y @@ -37,10 +38,10 @@ index 000000000000..7f9bf753accd +CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" +CONFIG_SEABIOS_DEBUG_LEVEL=0 +CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" ++CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" +CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 +CONFIG_SORTBOOTORDER_REVISION=y -+CONFIG_SORTBOOTORDER_REVISION_ID="v24.05.00.01" ++CONFIG_SORTBOOTORDER_REVISION_ID="95692853947e0b36e4d7fb57bf6a951baa9f78c5" +CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 diff --git a/patches/0067-mainboard-pcengines-Update-GPIO-configuration-and-re.patch b/patches/0067-mainboard-pcengines-Update-GPIO-configuration-and-re.patch index 65fece5..57c7fff 100644 --- a/patches/0067-mainboard-pcengines-Update-GPIO-configuration-and-re.patch +++ b/patches/0067-mainboard-pcengines-Update-GPIO-configuration-and-re.patch @@ -11,12 +11,8 @@ This commit updates the GPIO configuration for apu3, apu4, and apu7 boards. It also removes unused macros for SIO_PORT and SERIAL_DEV. Signed-off-by: Piotr Król ---- - src/mainboard/pcengines/apu2/romstage.c | 8 +++++--- - 1 file changed, 5 insertions(+), 3 deletions(-) - diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c -index 5b9f9f7aa6c3..7329896fb14a 100644 +index 5b9f9f7aa6c3..96f9133c4f3d 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -27,6 +27,8 @@ void board_BeforeAgesa(struct sysinfo *cb) @@ -28,26 +24,3 @@ index 5b9f9f7aa6c3..7329896fb14a 100644 early_lpc_init(); /* Disable SVI2 controller to wait for command completion */ -@@ -57,7 +59,7 @@ const struct soc_amd_gpio gpio_apu2[] = { - PAD_GPI(GPIO_32, PULL_NONE), - }; - --const struct soc_amd_gpio gpio_apu34[] = { -+const struct soc_amd_gpio gpio_apu347[] = { - PAD_GPI(GPIO_32, PULL_NONE), - PAD_GPO(GPIO_33, LOW), - }; -@@ -75,8 +77,8 @@ static void early_lpc_init(void) - if (CONFIG(BOARD_PCENGINES_APU2)) - gpio_configure_pads(gpio_apu2, ARRAY_SIZE(gpio_apu2)); - -- if (CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) -- gpio_configure_pads(gpio_apu34, ARRAY_SIZE(gpio_apu34)); -+ if (CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4) || CONFIG(BOARD_PCENGINES_APU7)) -+ gpio_configure_pads(gpio_apu347, ARRAY_SIZE(gpio_apu347)); - - if (CONFIG(BOARD_PCENGINES_APU5)) - gpio_configure_pads(gpio_apu5, ARRAY_SIZE(gpio_apu5)); --- -2.39.2 - diff --git a/patches/0070-mainboard-pcengines-Use-FMAP-layout.patch b/patches/0070-mainboard-pcengines-Use-FMAP-layout.patch index 2670cc8..6692eab 100644 --- a/patches/0070-mainboard-pcengines-Use-FMAP-layout.patch +++ b/patches/0070-mainboard-pcengines-Use-FMAP-layout.patch @@ -13,82 +13,59 @@ pcengines_apu4, pcengines_apu5, and pcengines_apu6. A new file 'board.fmd' has also been added to 'src/mainboard/pcengines/apu2'. Signed-off-by: Michał Żygowski ---- - configs/config.pcengines_apu2 | 1 + - configs/config.pcengines_apu3 | 1 + - configs/config.pcengines_apu4 | 1 + - configs/config.pcengines_apu5 | 1 + - configs/config.pcengines_apu6 | 1 + - src/mainboard/pcengines/apu2/Kconfig | 5 +++-- - src/mainboard/pcengines/apu2/board.fmd | 18 ++++++++++++++++++ - 7 files changed, 26 insertions(+), 2 deletions(-) - create mode 100644 src/mainboard/pcengines/apu2/board.fmd - -diff --git a/configs/config.pcengines_apu2 b/configs/config.pcengines_apu2 -index 0e97a3d7d780..ddcea3688e7e 100644 ---- a/configs/config.pcengines_apu2 -+++ b/configs/config.pcengines_apu2 -@@ -18,6 +18,7 @@ CONFIG_PXE_CUSTOM_BUILD_ID="12345678" +diff --git a/configs/config.pcengines_seabios_apu2 b/configs/config.pcengines_seabios_apu2 +index fe3a9b3c2f6f..09bd18855197 100644 +--- a/configs/config.pcengines_seabios_apu2 ++++ b/configs/config.pcengines_seabios_apu2 +@@ -20,6 +20,7 @@ CONFIG_POST_IO_PORT=0x80 + CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,157b" - CONFIG_PXE_SCRIPT="payloads/external/iPXE/menu.ipxe" CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" +CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index 7296287d0cab..2d6035ba8c02 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -19,6 +19,7 @@ CONFIG_PXE_CUSTOM_BUILD_ID="12345678" + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/configs/config.pcengines_seabios_apu3 b/configs/config.pcengines_seabios_apu3 +index 8dc30fd9574c..0faaa445bb15 100644 +--- a/configs/config.pcengines_seabios_apu3 ++++ b/configs/config.pcengines_seabios_apu3 +@@ -21,6 +21,7 @@ CONFIG_POST_IO_PORT=0x80 + CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_PXE_SCRIPT="payloads/external/iPXE/menu.ipxe" CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" +CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -diff --git a/configs/config.pcengines_apu4 b/configs/config.pcengines_apu4 -index bd765c2f606c..725d823abbfa 100644 ---- a/configs/config.pcengines_apu4 -+++ b/configs/config.pcengines_apu4 -@@ -19,6 +19,7 @@ CONFIG_PXE_CUSTOM_BUILD_ID="12345678" + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/configs/config.pcengines_seabios_apu4 b/configs/config.pcengines_seabios_apu4 +index 5960e6416835..7ac364122d3d 100644 +--- a/configs/config.pcengines_seabios_apu4 ++++ b/configs/config.pcengines_seabios_apu4 +@@ -21,6 +21,7 @@ CONFIG_POST_IO_PORT=0x80 + CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_PXE_SCRIPT="payloads/external/iPXE/menu.ipxe" CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" +CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index b1b91846d394..7fc5be58711e 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -19,6 +19,7 @@ CONFIG_PXE_CUSTOM_BUILD_ID="12345678" + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" +diff --git a/configs/config.pcengines_seabios_apu6 b/configs/config.pcengines_seabios_apu6 +index 8796bebf4685..387b68b62d11 100644 +--- a/configs/config.pcengines_seabios_apu6 ++++ b/configs/config.pcengines_seabios_apu6 +@@ -21,6 +21,7 @@ CONFIG_POST_IO_PORT=0x80 + CONFIG_PXE=y CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_PXE_SCRIPT="payloads/external/iPXE/menu.ipxe" CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" +CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y CONFIG_SEABIOS_DEBUG_LEVEL=0 CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -diff --git a/configs/config.pcengines_apu6 b/configs/config.pcengines_apu6 -index 0cee4afcecdb..cdde0474b25a 100644 ---- a/configs/config.pcengines_apu6 -+++ b/configs/config.pcengines_apu6 -@@ -19,6 +19,7 @@ CONFIG_PXE_CUSTOM_BUILD_ID="12345678" - CONFIG_PXE_ROM_ID="8086,1539" - CONFIG_PXE_SCRIPT="payloads/external/iPXE/menu.ipxe" - CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" -+CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y - CONFIG_SEABIOS_DEBUG_LEVEL=0 - CONFIG_SEABIOS_REVISION=y - CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" + CONFIG_SEABIOS_REVISION_ID="8217fc68664a04ff4a86745ab0e9aa50aea06341" diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig -index 66424e3ca995..152e23352196 100644 +index fbf29a452d8f..0561dcdfa90c 100644 --- a/src/mainboard/pcengines/apu2/Kconfig +++ b/src/mainboard/pcengines/apu2/Kconfig -@@ -75,7 +75,7 @@ config APU2_PINMUX_OFF_C +@@ -72,7 +72,7 @@ config APU2_PINMUX_OFF_C config APU2_PINMUX_GPIO0 bool "GPIO" depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \ @@ -97,7 +74,7 @@ index 66424e3ca995..152e23352196 100644 config APU2_PINMUX_UART_C bool "UART 0x3e8" -@@ -92,7 +92,7 @@ config APU2_PINMUX_OFF_D +@@ -89,7 +89,7 @@ config APU2_PINMUX_OFF_D config APU2_PINMUX_GPIO1 bool "GPIO" depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \ @@ -106,7 +83,7 @@ index 66424e3ca995..152e23352196 100644 config APU2_PINMUX_UART_D bool "UART 0x2e8" -@@ -111,6 +111,7 @@ config FORCE_MPCIE2_CLK +@@ -108,6 +108,7 @@ config FORCE_MPCIE2_CLK config FMDFILE string default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rw-ab.fmd" if VBOOT @@ -138,6 +115,3 @@ index 000000000000..0f344e580caa + } + } +} --- -2.39.2 - diff --git a/patches/0073-pcengines-apu2-enable-EHCI-controller-by-default.patch b/patches/0073-pcengines-apu2-enable-EHCI-controller-by-default.patch index c0fbf2c..c47400e 100644 --- a/patches/0073-pcengines-apu2-enable-EHCI-controller-by-default.patch +++ b/patches/0073-pcengines-apu2-enable-EHCI-controller-by-default.patch @@ -9,14 +9,6 @@ Content-Transfer-Encoding: 8bit on apu3,4,5 and 6 Signed-off-by: Michał Kopeć ---- - src/mainboard/pcengines/apu2/bootorder_def | 2 +- - .../pcengines/apu2/bootorder_def_apu5 | 2 +- - .../pcengines/apu2/variants/apu3/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu4/bootorder | Bin 4096 -> 4096 bytes - .../pcengines/apu2/variants/apu6/bootorder | Bin 4096 -> 4096 bytes - 5 files changed, 2 insertions(+), 2 deletions(-) - diff --git a/src/mainboard/pcengines/apu2/bootorder_def b/src/mainboard/pcengines/apu2/bootorder_def index 88da074dd189..774434f980f8 100644 --- a/src/mainboard/pcengines/apu2/bootorder_def @@ -26,19 +18,6 @@ index 88da074dd189..774434f980f8 100644 uartc1 uartd1 -ehcien0 -+ehcien1 - mpcie2_clk0 - com2_en0 - boosten1 -diff --git a/src/mainboard/pcengines/apu2/bootorder_def_apu5 b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -index 7885710c5476..0a00cc00b309 100644 ---- a/src/mainboard/pcengines/apu2/bootorder_def_apu5 -+++ b/src/mainboard/pcengines/apu2/bootorder_def_apu5 -@@ -21,7 +21,7 @@ scon1 - usben1 - uartc1 - uartd1 --ehcien0 +ehcien1 mpcie2_clk0 com2_en0 @@ -70,6 +49,3 @@ VcmZorXi(T-%EV~6*^KEFF90A01RMYW delta 14 VcmZorXi(T-%EV}}*^KEFF909_1RDSV --- -2.39.2 - diff --git a/patches/0077-mb-pcengines-apu2-add-variant-apu7.patch b/patches/0077-mb-pcengines-apu2-add-variant-apu7.patch deleted file mode 100644 index d1d1779..0000000 --- a/patches/0077-mb-pcengines-apu2-add-variant-apu7.patch +++ /dev/null @@ -1,204 +0,0 @@ -From d55f700035eba51312308523c150e469d667168e Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= -Date: Thu, 2 Jun 2022 17:48:42 +0200 -Subject: [PATCH 77/80] mb/pcengines/apu2: add variant apu7 -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -apu7 is an apu3 with different NICs (Intel i225). - -For now, it doesn't support iPXE network booting. - -Change-Id: I495879f1527643b217f9facb07dace5d70175a3e -Signed-off-by: Michał Kopeć -diff --git a/configs/config.pcengines_apu7 b/configs/config.pcengines_apu7 -new file mode 100644 -index 000000000000..a416468b44fb ---- /dev/null -+++ b/configs/config.pcengines_apu7 -@@ -0,0 +1,29 @@ -+# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set -+# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set -+# CONFIG_IPXE_SERIAL_CONSOLE is not set -+CONFIG_AGESA_BINARY_PI_LOCATION=0xFFE00000 -+CONFIG_BOARD_PCENGINES_APU7=y -+CONFIG_BOTTOMIO_POSITION=0xD0000000 -+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1=y -+CONFIG_HUDSON_SATA_MODE=2 -+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -+CONFIG_IPXE_ADD_SCRIPT=y -+CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" -+CONFIG_LOCALVERSION="v24.05.00.01" -+CONFIG_MEMTEST86PLUS_V5=y -+CONFIG_MEMTEST_SECONDARY_PAYLOAD=y -+CONFIG_NO_GFX_INIT=y -+CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(MAINBOARDDIR)/seabios_config" -+CONFIG_POST_IO_PORT=0x80 -+CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/bootorder" -+CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y -+CONFIG_SEABIOS_DEBUG_LEVEL=0 -+CONFIG_SEABIOS_NO_OPROMS=y -+CONFIG_SEABIOS_REVISION=y -+CONFIG_SEABIOS_REVISION_ID="rel-1.16.0.1" -+CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 -+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -+CONFIG_TPM2=y -+CONFIG_VENDOR_PCENGINES=y -diff --git a/src/mainboard/pcengines/apu2/Kconfig b/src/mainboard/pcengines/apu2/Kconfig -index 0de22561a2a0..6271f6430382 100644 ---- a/src/mainboard/pcengines/apu2/Kconfig -+++ b/src/mainboard/pcengines/apu2/Kconfig -@@ -1,7 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0-only - - if BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || BOARD_PCENGINES_APU4 || \ -- BOARD_PCENGINES_APU5 || BOARD_PCENGINES_APU6 -+ BOARD_PCENGINES_APU5 || BOARD_PCENGINES_APU6 || BOARD_PCENGINES_APU7 - - config BOARD_SPECIFIC_OPTIONS - def_bool y -@@ -31,6 +31,7 @@ config VARIANT_DIR - default "apu4" if BOARD_PCENGINES_APU4 - default "apu5" if BOARD_PCENGINES_APU5 - default "apu6" if BOARD_PCENGINES_APU6 -+ default "apu7" if BOARD_PCENGINES_APU7 - - config DEVICETREE - default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" -@@ -41,10 +42,7 @@ config MAINBOARD_PART_NUMBER - default "apu4" if BOARD_PCENGINES_APU4 - default "apu5" if BOARD_PCENGINES_APU5 - default "apu6" if BOARD_PCENGINES_APU6 -- --config DEFAULT_CONSOLE_LOGLEVEL -- int -- default 1 -+ default "apu7" if BOARD_PCENGINES_APU7 - - config MAX_CPUS - int -@@ -72,7 +70,7 @@ config APU2_PINMUX_OFF_C - config APU2_PINMUX_GPIO0 - bool "GPIO" - depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \ -- BOARD_PCENGINES_APU4 || BOARD_PCENGINES_APU6 -+ BOARD_PCENGINES_APU4 || BOARD_PCENGINES_APU6 || BOARD_PCENGINES_APU7 - - config APU2_PINMUX_UART_C - bool "UART 0x3e8" -@@ -89,7 +87,7 @@ config APU2_PINMUX_OFF_D - config APU2_PINMUX_GPIO1 - bool "GPIO" - depends on BOARD_PCENGINES_APU2 || BOARD_PCENGINES_APU3 || \ -- BOARD_PCENGINES_APU4 || BOARD_PCENGINES_APU6 -+ BOARD_PCENGINES_APU4 || BOARD_PCENGINES_APU6 || BOARD_PCENGINES_APU7 - - config APU2_PINMUX_UART_D - bool "UART 0x2e8" -diff --git a/src/mainboard/pcengines/apu2/Kconfig.name b/src/mainboard/pcengines/apu2/Kconfig.name -index 8ee55dbe6057..c65a5131e121 100644 ---- a/src/mainboard/pcengines/apu2/Kconfig.name -+++ b/src/mainboard/pcengines/apu2/Kconfig.name -@@ -14,3 +14,6 @@ config BOARD_PCENGINES_APU5 - - config BOARD_PCENGINES_APU6 - bool "APU6" -+ -+config BOARD_PCENGINES_APU7 -+ bool "APU7" -diff --git a/src/mainboard/pcengines/apu2/dsdt.asl b/src/mainboard/pcengines/apu2/dsdt.asl -index 0a91feec580e..4c11ca2ab67b 100644 ---- a/src/mainboard/pcengines/apu2/dsdt.asl -+++ b/src/mainboard/pcengines/apu2/dsdt.asl -@@ -12,6 +12,8 @@ - #define DEVICE_NAME "apu5 - #elif CONFIG(BOARD_PCENGINES_APU6) - #define DEVICE_NAME "apu6 -+#elif CONFIG(BOARD_PCENGINES_APU7) -+#define DEVICE_NAME "apu7 - #endif - - #include -diff --git a/src/mainboard/pcengines/apu2/variants/apu7/bootorder b/src/mainboard/pcengines/apu2/variants/apu7/bootorder -new file mode 100644 -index 0000000000000000000000000000000000000000..f2dc50a9717e36e2211eb381ef66ae185d5b37da -GIT binary patch -literal 4096 -zcmeH_OK!s;5Qek1sOHLPRlFl?scjp|2g`;YXQ$SEVW3E(V -z!)*R09&X?<;_q{iqjEz - -diff --git a/configs/config.pcengines_apu3 b/configs/config.pcengines_apu3 -index e4bc9914a1c7..89e4d995bd71 100644 ---- a/configs/config.pcengines_apu3 -+++ b/configs/config.pcengines_apu3 -@@ -4,6 +4,7 @@ CONFIG_APU2_PINMUX_UART_C=y - CONFIG_APU2_PINMUX_UART_D=y - CONFIG_BOARD_PCENGINES_APU3=y - CONFIG_BUILD_IPXE=y -+CONFIG_MEMTEST86PLUS_V5=y - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y - CONFIG_PXE=y -diff --git a/configs/config.pcengines_apu5 b/configs/config.pcengines_apu5 -index 7f405bc6900b..7e7f6558f643 100644 ---- a/configs/config.pcengines_apu5 -+++ b/configs/config.pcengines_apu5 -@@ -4,6 +4,7 @@ CONFIG_APU2_PINMUX_UART_C=y - CONFIG_APU2_PINMUX_UART_D=y - CONFIG_BOARD_PCENGINES_APU5=y - CONFIG_BUILD_IPXE=y -+CONFIG_MEMTEST86PLUS_V5=y - CONFIG_MEMTEST_SECONDARY_PAYLOAD=y - CONFIG_NO_GFX_INIT=y - CONFIG_PXE=y diff --git a/patches/add_support_for_dasharo(coreboot+seabios)_for_qemu_q35.patch b/patches/add_support_for_dasharo(coreboot+seabios)_for_qemu_q35.patch new file mode 100644 index 0000000..f12b15b --- /dev/null +++ b/patches/add_support_for_dasharo(coreboot+seabios)_for_qemu_q35.patch @@ -0,0 +1,292 @@ +add support for Dasharo(coreboot+SeaBIOS) for QEMU Q35 + +From: Piotr Król + +Signed-off-by: Piotr Król + +diff --git a/build.sh b/build.sh +index cf30f35eb8f3..60deeb44e74d 100755 +--- a/build.sh ++++ b/build.sh +@@ -28,6 +28,7 @@ usage() { + echo -e "\toptiplex_9010 - build Dasharo compatible with Dell OptiPlex 7010/9010" + echo -e "\tqemu - build Dasharo for QEMU Q35" + echo -e "\tqemu_full - build Dasharo for QEMU Q35 with all menus available" ++ echo -e "\tqemu_seabios - build Dasharo(coreboot+SeaBIOS) for QEMU Q35" + } + + SDKVER="ghcr.io/dasharo/dasharo-sdk:v1.6.0-rc4" +@@ -197,17 +198,22 @@ function build_pcengines { + } + + function build_qemu { +- DEFCONFIG="configs/config.emulation_qemu_x86_q35_uefi${1:-}" ++ DEFCONFIG="configs/config.emulation_qemu_x86_q35_${1:-}" + FW_VERSION=$(cat ${DEFCONFIG} | grep CONFIG_LOCALVERSION | cut -d '=' -f 2 | tr -d '"') + +- # checkout several submodules needed by these boards (some others are checked +- # out by coreboot's Makefile) +- git submodule update --init --force --checkout \ +- 3rdparty/dasharo-blobs ++ if [[ ${DEFCONFIG} == *_seabios ]]; then ++ git submodule update --init --recursive --checkout ++ else ++ # checkout several submodules needed by these boards (some others are checked ++ # out by coreboot's Makefile) ++ git submodule update --init --force --checkout \ ++ 3rdparty/dasharo-blobs \ ++ 3rdparty/vboot ++ fi + + docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ + -v $HOME/.ssh:/home/coreboot/.ssh \ +- -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ ++ -w /home/coreboot/coreboot $SDKVER \ + /bin/bash -c "make distclean" + + cp $DEFCONFIG .config +@@ -216,8 +222,8 @@ function build_qemu { + + docker run --rm -t -u $UID -v $PWD:/home/coreboot/coreboot \ + -v $HOME/.ssh:/home/coreboot/.ssh \ +- -w /home/coreboot/coreboot coreboot/coreboot-sdk:$SDKVER \ +- /bin/bash -c "make olddefconfig && make -j$(nproc)" ++ -w /home/coreboot/coreboot $SDKVER \ ++ /bin/bash -c "make olddefconfig && make BUILD_TIMELESS=1 -j$(nproc)" + + cp build/coreboot.rom qemu_q35_${FW_VERSION}.rom + if [ $? -eq 0 ]; then +@@ -309,10 +315,13 @@ case "$CMD" in + build_optiplex_9010 + ;; + "qemu" | "QEMU" | "q35" | "Q35" ) +- build_qemu ++ build_qemu "uefi" + ;; + "qemu_full" | "QEMU_full" | "q35_full" | "Q35_full" ) +- build_qemu "_all_menus" ++ build_qemu "uefi_all_menus" ++ ;; ++ "qemu_seabios" ) ++ build_qemu "smm_tseg_seabios" + ;; + *) + echo "Invalid command: \"$CMD\"" +diff --git a/configs/config.emulation_qemu_x86_q35_smm_tseg_seabios b/configs/config.emulation_qemu_x86_q35_smm_tseg_seabios +new file mode 100644 +index 000000000000..37e4156d545e +--- /dev/null ++++ b/configs/config.emulation_qemu_x86_q35_smm_tseg_seabios +@@ -0,0 +1,30 @@ ++# CONFIG_CONSOLE_USE_ANSI_ESCAPES is not set ++# CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX is not set ++# CONFIG_IPXE_SERIAL_CONSOLE is not set ++CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y ++CONFIG_BUILD_IPXE=y ++CONFIG_CPU_QEMU_X86_TSEG_SMM=y ++CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y ++CONFIG_IPXE_ADD_SCRIPT=y ++CONFIG_IPXE_CUSTOM_BUILD_ID="12345678" ++CONFIG_IPXE_SCRIPT="payloads/external/iPXE/menu.ipxe" ++CONFIG_LOCALVERSION="v24.08.00.01" ++CONFIG_MEMTEST86PLUS_V5=y ++CONFIG_MEMTEST_SECONDARY_PAYLOAD=y ++CONFIG_OPTION_BACKEND_NONE=y ++CONFIG_FMDFILE="$(top)/src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" ++CONFIG_PAYLOAD_CONFIGFILE="$(top)/src/mainboard/$(CONFIG_MAINBOARD_DIR)/seabios_config" ++CONFIG_PXE=y ++CONFIG_PXE_ROM_ID="8086,157b" ++CONFIG_SEABIOS_BOOTORDER_FILE="$(top)/src/mainboard/$(CONFIG_MAINBOARD_DIR)/bootorder" ++CONFIG_SEABIOS_BOOTORDER_IN_FMAP=y ++CONFIG_SEABIOS_DEBUG_LEVEL=0 ++CONFIG_SEABIOS_REVISION=y ++CONFIG_SEABIOS_REVISION_ID="ac9eb800566194692fa094375703359dc66b1491" ++CONFIG_SEABIOS_ADD_SERCON_PORT_FILE=y ++CONFIG_SEABIOS_SERCON_PORT_ADDR=0x3f8 ++CONFIG_SORTBOOTORDER_REVISION=y ++CONFIG_SORTBOOTORDER_REVISION_ID="95692853947e0b36e4d7fb57bf6a951baa9f78c5" ++CONFIG_SORTBOOTORDER_SECONDARY_PAYLOAD=y ++CONFIG_TPM2=y ++CONFIG_VENDOR_EMULATION=y +diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c +index 885240f8b1df..b973f3d9b368 100644 +--- a/src/device/pciexp_device.c ++++ b/src/device/pciexp_device.c +@@ -700,7 +700,7 @@ static void pciexp_tune_dev(struct device *dev) + if (!root_cap) + return; + +- if (check_pciepm()) { ++ if (CONFIG(VENDOR_PCENGINES) && check_pciepm()) { + /* Check for and enable Common Clock */ + if (CONFIG(PCIEXP_COMMON_CLOCK)) + pciexp_enable_common_clock(root, root_cap, dev, cap); +diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c +index 1f33a612cdc2..51faeb65fee4 100644 +--- a/src/drivers/uart/uart8250io.c ++++ b/src/drivers/uart/uart8250io.c +@@ -94,7 +94,7 @@ void uart_init(unsigned int idx) + unsigned int div; + div = uart_baudrate_divisor(get_uart_baudrate(), + uart_platform_refclk(), uart_input_clock_divider()); +- if (check_com2()) ++ if (CONFIG(VENDOR_PCENGINES) && check_com2()) + port_index = 1; + else + port_index = idx; +diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig +index 2fb180b7ec51..424375e3afa0 100644 +--- a/src/mainboard/emulation/qemu-q35/Kconfig ++++ b/src/mainboard/emulation/qemu-q35/Kconfig +@@ -10,7 +10,7 @@ config BOARD_SPECIFIC_OPTIONS + select HAVE_OPTION_TABLE + # select HAVE_PIRQ_TABLE + select HAVE_ACPI_TABLES +- select BOARD_ROMSIZE_KB_16384 ++ select BOARD_ROMSIZE_KB_8192 + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_FORCE_NATIVE_VGA_INIT if !CHROMEOS + select MEMORY_MAPPED_TPM +diff --git a/src/mainboard/emulation/qemu-q35/board.fmd b/src/mainboard/emulation/qemu-q35/board.fmd +new file mode 100644 +index 000000000000..0f344e580caa +--- /dev/null ++++ b/src/mainboard/emulation/qemu-q35/board.fmd +@@ -0,0 +1,18 @@ ++FLASH 8M { ++ SI_BIOS@0x0 0x800000 { ++ BOOTORDER(PRESERVE)@0x0 0x1000 ++ RW_VPD(PRESERVE)@0x1000 0x4000 ++ SMMSTORE(PRESERVE)@0x5000 0x20000 ++ RW_UNUSED@0x25000 0x1db000 ++ WP_RO@0x200000 0x600000{ ++ RO_VPD(PRESERVE)@0x0 0x4000 ++ RO_SECTION@0x4000 0x5fc000{ ++ FMAP@0x0 0x800 ++ RO_FRID@0x800 0x40 ++ RO_FRID_PAD@0x840 0x7c0 ++ GBB@0x1000 0x40000 ++ COREBOOT(CBFS)@0x41000 0x5bb000 ++ } ++ } ++ } ++} +diff --git a/src/mainboard/emulation/qemu-q35/boot-menu-key b/src/mainboard/emulation/qemu-q35/boot-menu-key +new file mode 100644 +index 0000000000000000000000000000000000000000..0ddf4f28e385d304edf8c8f82b4b59687420ba14 +GIT binary patch +literal 8 +KcmZ=^fB*mjC;&wO + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/emulation/qemu-q35/boot-menu-message b/src/mainboard/emulation/qemu-q35/boot-menu-message +new file mode 100644 +index 000000000000..2b61487904a4 +--- /dev/null ++++ b/src/mainboard/emulation/qemu-q35/boot-menu-message +@@ -0,0 +1 @@ ++Press F10 key now for boot menu, N for PXE boot +diff --git a/src/mainboard/emulation/qemu-q35/boot-menu-wait b/src/mainboard/emulation/qemu-q35/boot-menu-wait +new file mode 100644 +index 0000000000000000000000000000000000000000..b1dea8d7af3241677efd07b78cb866e0825e5291 +GIT binary patch +literal 8 +LcmXRAX8;2L1StTB + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/emulation/qemu-q35/bootorder b/src/mainboard/emulation/qemu-q35/bootorder +new file mode 100644 +index 0000000000000000000000000000000000000000..7e7e1b1a227ebaedc09bb74c05f3bc051d3b7b8f +GIT binary patch +literal 4096 +zcmeH_OK!s;5Qek1v +zf+m(;45hPl_w*CMQqMlf_)Jw%g;DBdpP?XVzT|YFCh1JGtai>}SQ=5a#wj4EoiSIc +zv0*lU6Aw4=81eTx$WghWqEQyRJhFjoAREXAvVm+M8^{K-fovcf$Od*{)W~{00kZ%K +xS#YcacB($#Sa%PAY;tyB+A`-A_=v#