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SramTest.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 32-bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 07:15:49 September 13, 2013
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# SramTest_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name DEVICE EP3C25F324C6
set_global_assignment -name TOP_LEVEL_ENTITY SramTest
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "07:15:49 SEPTEMBER 13, 2013"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 324
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name PARTITION_NETLIST_TYPE POST_FIT -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_location_assignment PIN_B9 -to RootClk
set_location_assignment PIN_N2 -to ARst_N
set_location_assignment PIN_A16 -to flash_sram_a2
set_location_assignment PIN_B16 -to flash_sram_a3
set_location_assignment PIN_A15 -to flash_sram_a4
set_location_assignment PIN_B15 -to flash_sram_a5
set_location_assignment PIN_A14 -to flash_sram_a6
set_location_assignment PIN_B14 -to flash_sram_a7
set_location_assignment PIN_A13 -to flash_sram_a8
set_location_assignment PIN_B13 -to flash_sram_a9
set_location_assignment PIN_A12 -to flash_sram_a10
set_location_assignment PIN_B12 -to flash_sram_a11
set_location_assignment PIN_A11 -to flash_sram_a12
set_location_assignment PIN_B11 -to flash_sram_a13
set_location_assignment PIN_C10 -to flash_sram_a14
set_location_assignment PIN_D10 -to flash_sram_a15
set_location_assignment PIN_E10 -to flash_sram_a16
set_location_assignment PIN_C9 -to flash_sram_a17
set_location_assignment PIN_D9 -to flash_sram_a18
set_location_assignment PIN_A7 -to flash_sram_a19
set_location_assignment PIN_A6 -to flash_sram_a20
set_location_assignment PIN_H3 -to flash_sram_dq0
set_location_assignment PIN_D1 -to flash_sram_dq1
set_location_assignment PIN_A8 -to flash_sram_dq2
set_location_assignment PIN_B8 -to flash_sram_dq3
set_location_assignment PIN_B7 -to flash_sram_dq4
set_location_assignment PIN_C5 -to flash_sram_dq5
set_location_assignment PIN_E8 -to flash_sram_dq6
set_location_assignment PIN_A4 -to flash_sram_dq7
set_location_assignment PIN_B4 -to flash_sram_dq8
set_location_assignment PIN_E7 -to flash_sram_dq9
set_location_assignment PIN_A3 -to flash_sram_dq10
set_location_assignment PIN_B3 -to flash_sram_dq11
set_location_assignment PIN_D5 -to flash_sram_dq12
set_location_assignment PIN_B5 -to flash_sram_dq13
set_location_assignment PIN_A5 -to flash_sram_dq14
set_location_assignment PIN_B6 -to flash_sram_dq15
set_location_assignment PIN_C16 -to flash_sram_dq16
set_location_assignment PIN_D12 -to flash_sram_dq17
set_location_assignment PIN_E11 -to flash_sram_dq18
set_location_assignment PIN_D2 -to flash_sram_dq19
set_location_assignment PIN_E13 -to flash_sram_dq20
set_location_assignment PIN_E14 -to flash_sram_dq21
set_location_assignment PIN_A17 -to flash_sram_dq22
set_location_assignment PIN_D16 -to flash_sram_dq23
set_location_assignment PIN_C12 -to flash_sram_dq24
set_location_assignment PIN_A18 -to flash_sram_dq25
set_location_assignment PIN_F8 -to flash_sram_dq26
set_location_assignment PIN_D7 -to flash_sram_dq27
set_location_assignment PIN_F6 -to flash_sram_dq28
set_location_assignment PIN_E6 -to flash_sram_dq29
set_location_assignment PIN_G6 -to flash_sram_dq30
set_location_assignment PIN_C7 -to flash_sram_dq31
set_location_assignment PIN_E9 -to sram_oe_n
set_location_assignment PIN_F9 -to sram_ce1_n
set_location_assignment PIN_G13 -to sram_we
set_location_assignment PIN_F10 -to sram_be_n0
set_location_assignment PIN_F11 -to sram_be_n1
set_location_assignment PIN_F12 -to sram_be_n2
set_location_assignment PIN_F13 -to sram_be_n3
set_location_assignment PIN_F7 -to sram_adsc
set_location_assignment PIN_A2 -to sram_clk
set_location_assignment PIN_F1 -to Btn0
set_location_assignment PIN_F2 -to Btn1
set_location_assignment PIN_A10 -to Btn2
set_location_assignment PIN_B10 -to Btn3
set_location_assignment PIN_P13 -to Led0
set_location_assignment PIN_P12 -to Led1
set_location_assignment PIN_N12 -to Led2
set_location_assignment PIN_N9 -to Led3
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VHDL_FILE ../Lib/Types.vhd
set_global_assignment -name VHDL_FILE ../Lib/ResetSync.vhd
set_global_assignment -name VHDL_FILE SramTestGen.vhd
set_global_assignment -name VHDL_FILE SramController.vhd
set_global_assignment -name QIP_FILE ClkPll.qip
set_global_assignment -name VHDL_FILE SramTest.vhd
set_global_assignment -name VHDL_FILE tb.vhd
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_global_assignment -name SLD_FILE /home/erik/Development/FPGA/SramTest/stp1_auto_stripped.stp
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top