diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json
index 2b9b8b1185..8d4974144b 100644
--- a/unittests/InstructionCountCI/FlagM/x87.json
+++ b/unittests/InstructionCountCI/FlagM/x87.json
@@ -4797,7 +4797,7 @@
       ]
     },
     "fxtract": {
-      "ExpectedInstructionCount": 71,
+      "ExpectedInstructionCount": 85,
       "Comment": [
         "0xd9 11b 0xf4 /6"
       ],
@@ -4805,6 +4805,14 @@
         "ldrb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
+        "ldrb w21, [x28, #1298]",
+        "mov w22, #0x1",
+        "lsl w23, w22, w20",
+        "bic w21, w21, w23",
+        "strb w21, [x28, #1298]",
+        "add w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -4861,17 +4869,23 @@
         "eor v2.16b, v2.16b, v2.16b",
         "mov v2.d[0], x0",
         "mov v2.h[4], w1",
+        "sub w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q3, [x0, #1040]",
-        "mov w21, #0x1",
+        "ldrb w21, [x28, #1298]",
+        "lsl w23, w22, w20",
+        "orr w21, w21, w23",
+        "strb w21, [x28, #1298]",
         "sub w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
-        "ldrb w22, [x28, #1298]",
-        "lsl w20, w21, w20",
-        "orr w20, w22, w20",
+        "ldrb w21, [x28, #1298]",
+        "lsl w20, w22, w20",
+        "orr w20, w21, w20",
         "strb w20, [x28, #1298]"
       ]
     },
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json
index 77a203b7ce..ce770240e9 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64.json
@@ -2536,7 +2536,7 @@
       ]
     },
     "fxtract": {
-      "ExpectedInstructionCount": 23,
+      "ExpectedInstructionCount": 45,
       "Comment": [
         "0xd9 11b 0xf4 /6"
       ],
@@ -2545,25 +2545,47 @@
         "add x0, x28, x20, lsl #4",
         "ldr d2, [x0, #1040]",
         "mov x21, v2.d[0]",
-        "and x22, x21, #0x7ff0000000000000",
-        "lsr x22, x22, #52",
-        "sub x22, x22, #0x3ff (1023)",
-        "scvtf d2, x22",
+        "and x22, x21, #0x7fffffffffffffff",
+        "mov x23, #0xfff0000000000000",
+        "fmov d3, x23",
+        "and x23, x21, #0x7ff0000000000000",
+        "lsr x23, x23, #52",
+        "sub x23, x23, #0x3ff (1023)",
+        "scvtf d4, x23",
         "and x21, x21, #0x800fffffffffffff",
         "orr x21, x21, #0x3ff0000000000000",
-        "fmov d3, x21",
-        "add x0, x28, x20, lsl #4",
-        "str d2, [x0, #1040]",
-        "mov w21, #0x1",
+        "fmov d5, x21",
+        "mrs x21, nzcv",
+        "cmp x22, #0x0 (0)",
+        "fcsel d2, d2, d5, eq",
+        "fcsel d3, d3, d4, eq",
+        "ldrb w22, [x28, #1298]",
+        "mov w23, #0x1",
+        "lsl w24, w23, w20",
+        "bic w22, w22, w24",
+        "strb w22, [x28, #1298]",
+        "add w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "sub w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str d3, [x0, #1040]",
         "ldrb w22, [x28, #1298]",
-        "lsl w20, w21, w20",
+        "lsl w24, w23, w20",
+        "orr w22, w22, w24",
+        "strb w22, [x28, #1298]",
+        "sub w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
+        "add x0, x28, x20, lsl #4",
+        "str d2, [x0, #1040]",
+        "ldrb w22, [x28, #1298]",
+        "lsl w20, w23, w20",
         "orr w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "strb w20, [x28, #1298]",
+        "msr nzcv, x21"
       ]
     },
     "fprem1": {
diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json
index f6f1067a8f..665ec21db4 100644
--- a/unittests/InstructionCountCI/x87.json
+++ b/unittests/InstructionCountCI/x87.json
@@ -4796,7 +4796,7 @@
       ]
     },
     "fxtract": {
-      "ExpectedInstructionCount": 71,
+      "ExpectedInstructionCount": 85,
       "Comment": [
         "0xd9 11b 0xf4 /6"
       ],
@@ -4804,6 +4804,14 @@
         "ldrb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
+        "ldrb w21, [x28, #1298]",
+        "mov w22, #0x1",
+        "lsl w23, w22, w20",
+        "bic w21, w21, w23",
+        "strb w21, [x28, #1298]",
+        "add w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
         "stp x4, x7, [x28, #280]",
@@ -4860,17 +4868,23 @@
         "eor v2.16b, v2.16b, v2.16b",
         "mov v2.d[0], x0",
         "mov v2.h[4], w1",
+        "sub w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q3, [x0, #1040]",
-        "mov w21, #0x1",
+        "ldrb w21, [x28, #1298]",
+        "lsl w23, w22, w20",
+        "orr w21, w21, w23",
+        "strb w21, [x28, #1298]",
         "sub w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
-        "ldrb w22, [x28, #1298]",
-        "lsl w20, w21, w20",
-        "orr w20, w22, w20",
+        "ldrb w21, [x28, #1298]",
+        "lsl w20, w22, w20",
+        "orr w20, w21, w20",
         "strb w20, [x28, #1298]"
       ]
     },
diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json
index b91037d209..d285d37411 100644
--- a/unittests/InstructionCountCI/x87_f64.json
+++ b/unittests/InstructionCountCI/x87_f64.json
@@ -2554,7 +2554,7 @@
       ]
     },
     "fxtract": {
-      "ExpectedInstructionCount": 23,
+      "ExpectedInstructionCount": 45,
       "Comment": [
         "0xd9 11b 0xf4 /6"
       ],
@@ -2563,25 +2563,47 @@
         "add x0, x28, x20, lsl #4",
         "ldr d2, [x0, #1040]",
         "mov x21, v2.d[0]",
-        "and x22, x21, #0x7ff0000000000000",
-        "lsr x22, x22, #52",
-        "sub x22, x22, #0x3ff (1023)",
-        "scvtf d2, x22",
+        "and x22, x21, #0x7fffffffffffffff",
+        "mov x23, #0xfff0000000000000",
+        "fmov d3, x23",
+        "and x23, x21, #0x7ff0000000000000",
+        "lsr x23, x23, #52",
+        "sub x23, x23, #0x3ff (1023)",
+        "scvtf d4, x23",
         "and x21, x21, #0x800fffffffffffff",
         "orr x21, x21, #0x3ff0000000000000",
-        "fmov d3, x21",
-        "add x0, x28, x20, lsl #4",
-        "str d2, [x0, #1040]",
-        "mov w21, #0x1",
+        "fmov d5, x21",
+        "mrs x21, nzcv",
+        "cmp x22, #0x0 (0)",
+        "fcsel d2, d2, d5, eq",
+        "fcsel d3, d3, d4, eq",
+        "ldrb w22, [x28, #1298]",
+        "mov w23, #0x1",
+        "lsl w24, w23, w20",
+        "bic w22, w22, w24",
+        "strb w22, [x28, #1298]",
+        "add w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
         "sub w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str d3, [x0, #1040]",
         "ldrb w22, [x28, #1298]",
-        "lsl w20, w21, w20",
+        "lsl w24, w23, w20",
+        "orr w22, w22, w24",
+        "strb w22, [x28, #1298]",
+        "sub w20, w20, #0x1 (1)",
+        "and w20, w20, #0x7",
+        "strb w20, [x28, #1019]",
+        "add x0, x28, x20, lsl #4",
+        "str d2, [x0, #1040]",
+        "ldrb w22, [x28, #1298]",
+        "lsl w20, w23, w20",
         "orr w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "strb w20, [x28, #1298]",
+        "msr nzcv, x21"
       ]
     },
     "fprem1": {