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sbl_serdes_fn.c
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// SPDX-License-Identifier: GPL-2.0
/* Copyright 2019-2024 Hewlett Packard Enterprise Development LP */
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/slab.h>
#include <sbl/sbl_pml.h>
#include "uapi/sbl_iface_constants.h"
#include "uapi/sbl_serdes_defaults.h"
#include "sbl_constants.h"
#include "sbl_kconfig.h"
#include "sbl.h"
#include "sbl_serdes_map.h"
#include "sbl_serdes.h"
#include "sbl_sbm_serdes_iface.h"
#include "sbl_serdes_fn.h"
#include "sbl_internal.h"
#include "sbl_config_list.h"
#include "sbl_pml.h"
#include "sbl_test.h"
static u64 sbl_get_tp_hash0(struct sbl_inst *sbl, int port_num);
static u64 sbl_get_tp_hash1(struct sbl_inst *sbl, int port_num);
static int sbl_get_serdes_config_values(struct sbl_inst *sbl, int port_num,
int serdes, struct sbl_sc_values *vals);
static bool sbl_is_retune(struct sbl_inst *sbl, int port_num);
static int sbl_parse_version_string(struct sbl_inst *sbl, char *fw_fname,
int *fw_rev, int *fw_build);
static void sbl_send_serdes_fw_corruption_alert(struct sbl_inst *sbl, int port,
int serdes);
static u8 get_serdes_tx_mask(struct sbl_inst *sbl, int port_num);
static u8 get_serdes_rx_mask(struct sbl_inst *sbl, int port_num);
static bool get_serdes_precoding(struct sbl_inst *sbl, int port_num);
/**
* @brief dummy function used when DEV_TRACE2 or DEV_TRACE3 are not defined
*
* @param dev device pointer
* @param format printk-like format and varargs
*
* @return none
*/
void dev_ignore(struct device *dev, const char *format, ...)
{
}
/**
* @brief Creates a u64 hash key based on the currently requested serdes state
*
* @param sbl sbl_inst pointer containing target config and state
* @param port_num target port number
*
* @return u64 hash of lp, tp, lm, lm, and cable info
*/
/* NOTE: enums need to be bitwise values to use this hashing */
static u64 sbl_get_tp_hash0(struct sbl_inst *sbl, int port_num)
{
int media;
switch (sbl->link[port_num].mattr.media) {
case SBL_LINK_MEDIA_ELECTRICAL:
if (sbl->link[port_num].mattr.info & SBL_MEDIA_INFO_DIGITAL)
media = SBL_EXT_LINK_MEDIA_ELECTRICAL_ACT;
else
media = SBL_EXT_LINK_MEDIA_ELECTRICAL;
break;
case SBL_LINK_MEDIA_OPTICAL:
if (sbl->link[port_num].mattr.info & SBL_MEDIA_INFO_DIGITAL)
media = SBL_EXT_LINK_MEDIA_OPTICAL_DIGITAL;
else
media = SBL_EXT_LINK_MEDIA_OPTICAL_ANALOG;
break;
default:
media = SBL_EXT_LINK_MEDIA_ELECTRICAL;
break;
}
return sbl_create_tp_hash0(sbl->link[port_num].blattr.link_partner,
sbl->link[port_num].loopback_mode,
sbl->link[port_num].blattr.tuning_pattern,
sbl->link[port_num].link_mode,
media,
sbl->link[port_num].mattr.vendor);
}
static u64 sbl_get_tp_hash1(struct sbl_inst *sbl, int port_num)
{
return sbl_create_tp_hash1(sbl->link[port_num].mattr.len);
}
void sbl_serdes_get_fw_vers(struct sbl_inst *sbl, int port_num, int serdes,
uint *fw_rev, uint *fw_build)
{
if (sbl_serdes_spico_int(sbl, port_num, serdes, SPICO_INT_CM4_REV_ID,
SPICO_INT_DATA_NONE, (uint16_t *)fw_rev,
SPICO_INT_RETURN_RESULT)) {
// Failure expected when Spico is in reset
dev_dbg(sbl->dev, "p%ds%d: Failed to read firmware rev!", port_num, serdes);
*fw_rev = 0x0;
}
if (sbl_serdes_spico_int(sbl, port_num, serdes, SPICO_INT_CM4_BUILD_ID,
SPICO_INT_DATA_NONE, (uint16_t *)fw_build,
SPICO_INT_RETURN_RESULT)) {
// Failure expected when Spico is in reset
dev_dbg(sbl->dev, "p%ds%d: Failed to read firmware build!", port_num, serdes);
*fw_build = 0x0;
}
}
/**
* @brief Get mask of serdes used for target link mode
*
* @param port_num target port number
*
* @return serdes bit mask
*/
static u8 get_serdes_tx_mask(struct sbl_inst *sbl, int port_num)
{
int serdes;
u8 serdes_mask = 0;
switch (sbl->link[port_num].link_mode) {
case SBL_LINK_MODE_CD_50G:
for (serdes = 0; serdes < sbl->switch_info->num_serdes; ++serdes) {
if (sbl->switch_info->ports[port_num].serdes[serdes].tx_lane_source == 0) {
serdes_mask |= 1 << serdes;
break;
}
}
break;
case SBL_LINK_MODE_CD_100G:
for (serdes = 0; serdes < sbl->switch_info->num_serdes; ++serdes) {
if ((sbl->switch_info->ports[port_num].serdes[serdes].tx_lane_source == 0) ||
(sbl->switch_info->ports[port_num].serdes[serdes].tx_lane_source == 1)) {
serdes_mask |= 1 << serdes;
}
}
break;
case SBL_LINK_MODE_BS_200G:
case SBL_LINK_MODE_BJ_100G:
serdes_mask = 0xf;
break;
default:
sbl_dev_warn(sbl->dev, "%d: Unsupported link mode (%d)",
port_num, sbl->link[port_num].link_mode);
serdes_mask = 0x0;
break;
}
return serdes_mask;
}
/**
* @brief Get mask of serdes used for target link mode
*
* @param port_num target port number
*
* @return serdes bit mask
*/
static u8 get_serdes_rx_mask(struct sbl_inst *sbl, int port_num)
{
int serdes;
u8 serdes_mask = 0;
/* if we are looped back then rx serdes are the same as the tx ones */
if (sbl->link[port_num].loopback_mode == SBL_LOOPBACK_MODE_LOCAL)
return get_serdes_tx_mask(sbl, port_num);
/* otherwise look them up */
switch (sbl->link[port_num].link_mode) {
case SBL_LINK_MODE_CD_50G:
for (serdes = 0; serdes < sbl->switch_info->num_serdes; ++serdes) {
if (sbl->switch_info->ports[port_num].serdes[serdes].rx_lane_source == 0) {
serdes_mask |= 1 << serdes;
break;
}
}
break;
case SBL_LINK_MODE_CD_100G:
for (serdes = 0; serdes < sbl->switch_info->num_serdes; ++serdes) {
if ((sbl->switch_info->ports[port_num].serdes[serdes].rx_lane_source == 0) ||
(sbl->switch_info->ports[port_num].serdes[serdes].rx_lane_source == 1)) {
serdes_mask |= 1 << serdes;
}
}
break;
case SBL_LINK_MODE_BS_200G:
case SBL_LINK_MODE_BJ_100G:
serdes_mask = 0xf;
break;
default:
sbl_dev_warn(sbl->dev, "%d: Unsupported link mode (%d)",
port_num, sbl->link[port_num].link_mode);
serdes_mask = 0x0;
break;
}
return serdes_mask;
}
/**
* @brief Utility function to skip over irrelevant serdes lanes
*
* @param port_num target port number
* @param serdes target serdes lane
*
* @return true if serdes required for link mode
*/
static bool tx_serdes_required_for_link_mode(struct sbl_inst *sbl, int port_num,
int serdes)
{
u8 serdes_mask = get_serdes_tx_mask(sbl, port_num);
// Enable physical lane 0 - this has the clock for all serdes and is
// always required.
if ((serdes == 0) || (serdes_mask & (1<<serdes)))
return true;
else
return false;
}
/**
* @brief Utility function to skip over irrelevant serdes lanes
*
* @param port_num target port number
* @param serdes target serdes lane
*
* @return true if serdes required for link mode
*/
static bool rx_serdes_required_for_link_mode(struct sbl_inst *sbl, int port_num,
int serdes)
{
u8 serdes_mask = get_serdes_rx_mask(sbl, port_num);
if (serdes_mask & (1<<serdes))
return true;
else
return false;
}
/**
* @brief Returns a count of the number of bits set in input val
*
* @param val value to count number of bits set
*
* @return number of bits set to 1 in val
*/
static int sbl_num_bits_set(u64 val)
{
int bits_set = 0;
int i;
for (i = 0; i < 64; ++i) {
if (val & (1ULL << i))
bits_set++;
}
return bits_set;
}
/**
* @brief Looks up sbl_sc_val struct for the given port, serdes, and hash
*
* @param sbl sbl_inst pointer containing target config and state
* @param port_num target port number
* @param serdes target serdes lane
* @param vals pointer to sbl_sc_values struct to populate
*
* @return 0 on success, or negative errno on failure
*/
static int sbl_get_serdes_config_values(struct sbl_inst *sbl, int port_num,
int serdes, struct sbl_sc_values *vals)
{
u64 hash0 = sbl_get_tp_hash0(sbl, port_num);
u64 hash1 = sbl_get_tp_hash1(sbl, port_num);
struct sbl_serdes_config *sc;
int num_ports_bits, num_serdes_bits, num_mask_bits;
int least_port_bits = 64;
int least_serdes_bits = 64;
int most_mask_bits = 0;
bool curr_best;
int rc = -1;
spin_lock(&sbl->serdes_config_lock);
list_for_each_entry(sc, &sbl->serdes_config_list, list) {
if ((sc->port_mask & (1ULL << port_num)) &&
(sc->serdes_mask & (1ULL << serdes)) &&
// Ensure no bits are set in hash that are not set
// in tp_state_match for all bits included in the mask
(((sc->tp_state_mask0 & hash0) &
~(sc->tp_state_mask0 & sc->tp_state_match0)) == 0) &&
(((sc->tp_state_mask1 & hash1) &
~(sc->tp_state_mask1 & sc->tp_state_match1)) == 0)) {
// This is A match, but there may be >1. We want to
// choose the match that's most specific to this
// config. To determine this, we choose a match which:
// * [1] Has the least number of bits set in its
// port_mask
// * [2] If tie, has the least number of bits set in
// its serdes_mask
// * [3] If tie, has the most number bits set it its
// tp_state_mask0 and tp_state_mask1.
// * [4] If tie, pick the one with the lowest index
sbl_dev_dbg(sbl->dev,
"p%d: get values: hash0 0x%llx hash1 0x%llx matched 0x%llx 0x%llx, tag %d\n",
port_num, hash0, hash1, sc->tp_state_match0, sc->tp_state_match1, sc->tag);
curr_best = false;
num_ports_bits = sbl_num_bits_set(sc->port_mask);
num_serdes_bits = sbl_num_bits_set(sc->serdes_mask);
num_mask_bits = sbl_num_bits_set(sc->tp_state_mask0);
num_mask_bits += sbl_num_bits_set(sc->tp_state_mask1);
if (num_ports_bits < least_port_bits) {
// [1]
curr_best = true;
} else if (num_ports_bits == least_port_bits) {
if (num_serdes_bits < least_serdes_bits) {
// [2]
curr_best = true;
} else if (num_serdes_bits == least_serdes_bits) {
if (num_mask_bits > most_mask_bits) {
// [3]
curr_best = true;
}
}
}
if (curr_best) {
sbl_dev_dbg(sbl->dev, "p%d: tag %d is current best match\n", port_num, sc->tag);
*vals = sc->vals;
least_port_bits = num_ports_bits;
least_serdes_bits = num_serdes_bits;
most_mask_bits = num_mask_bits;
rc = 0;
}
}
}
spin_unlock(&sbl->serdes_config_lock);
if (rc == 0)
return 0;
sbl_dev_err(sbl->dev, "%d: get values: no match for hash0 0x%llx hash1 0x%llx\n",
port_num, hash0, hash1);
return -ENOENT;
}
/**
* @brief Checks if there are valid tuning params in the sbl struct which can
* be used for this serdes tune
*
* @param sbl sbl_inst pointer containing target config and state
* @param port_num target port number
*
* @return true if there are valid, non-zero params, else false
*/
static bool sbl_is_retune(struct sbl_inst *sbl, int port_num)
{
int serdes, i;
u64 tp_state_hash0, tp_state_hash1;
struct sbl_link *link = sbl->link + port_num;
DEV_TRACE2(sbl->dev, "p%d", port_num);
/* Reuse of cached tuning params are disabled until AOC sync is implemented */
if (link->mattr.media == SBL_LINK_MEDIA_OPTICAL)
return false;
// Check tuning params are for this target configuration
tp_state_hash0 = sbl_get_tp_hash0(sbl, port_num);
tp_state_hash1 = sbl_get_tp_hash1(sbl, port_num);
if ((sbl->link[port_num].tuning_params.tp_state_hash0 != tp_state_hash0) ||
(sbl->link[port_num].tuning_params.tp_state_hash1 != tp_state_hash1)) {
sbl_dev_dbg(sbl->dev,
"p%d: tuning param mismatch (saved: 0x%llx 0x%llx curr:0x%llx 0x%llx) - not retune\n",
port_num, sbl->link[port_num].tuning_params.tp_state_hash0,
sbl->link[port_num].tuning_params.tp_state_hash1, tp_state_hash0, tp_state_hash1);
return false;
}
// Check that we actually have tuning params to apply
for (serdes = 0; serdes < sbl->switch_info->num_serdes; ++serdes) {
if (!(rx_serdes_required_for_link_mode(sbl, port_num, serdes) ||
tx_serdes_required_for_link_mode(sbl, port_num, serdes)))
continue;
for (i = 0; i < NUM_CTLE_PARAMS; ++i) {
if (sbl->link[port_num].tuning_params.params[serdes].ctle[i]) {
sbl_dev_dbg(sbl->dev, "p%d: tuning params OK - retune\n", port_num);
return true;
}
}
for (i = 0; i < NUM_FFE_PARAMS; ++i) {
if (sbl->link[port_num].tuning_params.params[serdes].ffe[i]) {
sbl_dev_dbg(sbl->dev, "p%d: tuning params OK - retune\n", port_num);
return true;
}
}
for (i = 0; i < NUM_DFE_PARAMS; ++i) {
if (sbl->link[port_num].tuning_params.params[serdes].dfe[i]) {
sbl_dev_dbg(sbl->dev, "p%d: tuning params OK - retune\n", port_num);
return true;
}
}
// Could continue on to check vernier, etc., but if all the above are 0,
// we've got other problems.
}
sbl_dev_warn(sbl->dev, "p%d: Saved tuning parameters but all 0-forcing retune", port_num);
return false;
}
/**
* @brief Parse the vers string into rev and build
*
* vers 0xbeef_feed parses into rev: 0xbeef and build: 0xfeed
*
* @param vers input version string
* @param fw_fname pointer firmware filename
* @param rev pointer to rev int to populate
* @param build pointer to build int to populate
*
* @return 0 on success or a negative number on failure.
*/
static int sbl_parse_version_string(struct sbl_inst *sbl, char *fw_fname,
int *fw_rev, int *fw_build)
{
char rev_str[SBL_MAX_STR_LEN];
char build_str[SBL_MAX_STR_LEN];
char *p;
int err;
p = strstr(fw_fname, ".");
if (p == NULL) {
sbl_dev_err(sbl->dev, "Bad firmware file name: %s", fw_fname);
return -EINVAL;
}
if (strlen(p) < strlen(".0x0000_0000")) {
sbl_dev_err(sbl->dev, "Bad firmware file name: %s", fw_fname);
return -EINVAL;
}
strncpy(rev_str, &(p[3]), SBL_FW_REV_LEN);
rev_str[SBL_FW_REV_LEN] = '\n';
rev_str[SBL_FW_REV_LEN+1] = '\0';
strncpy(build_str, &(p[8]), SBL_FW_BUILD_LEN);
build_str[SBL_FW_BUILD_LEN] = '\n';
build_str[SBL_FW_BUILD_LEN+1] = '\0';
err = kstrtou32(rev_str, 16, fw_rev);
if (err) {
sbl_dev_err(sbl->dev, "Failed to convert %s to an integer [%d]", rev_str, err);
return err;
}
err = kstrtou32(build_str, 16, fw_build);
if (err) {
sbl_dev_err(sbl->dev, "Failed to convert %s to an integer [%d]", build_str, err);
return err;
}
return 0;
}
void sbl_sbm_get_fw_vers(struct sbl_inst *sbl, int sbus_ring, uint *fw_rev, uint *fw_build)
{
uint sbus_addr = SBUS_ADDR(sbus_ring, SBUS_BCAST_SBM_SPICO);
// SBUS Critical Section
mutex_lock(&sbl->sbus_ring_mtx[sbus_ring]);
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_REV_ID,
SPICO_INT_DATA_NONE, fw_rev)) {
// Failure expected when Spico is in reset
dev_dbg(sbl->dev, "sbm%d: Failed to read firmware rev from 0x%x", sbus_ring, sbus_addr);
*fw_rev = 0x0;
}
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_BUILD_ID,
SPICO_INT_DATA_NONE, fw_build)) {
// Failure expected when Spico is in reset
dev_dbg(sbl->dev, "sbm%d: Failed to read firmware build from 0x%x", sbus_ring, sbus_addr);
*fw_build = 0x0;
}
mutex_unlock(&sbl->sbus_ring_mtx[sbus_ring]);
}
int sbl_sbm_firmware_flash(struct sbl_inst *sbl)
{
int err;
err = sbl_sbm_firmware_flash_ring(sbl, 0,
sbl->switch_info->num_sbus_rings - 1, false);
if (err)
/* sending port 0 in event as this event doesn't apply to any specific port */
sbl_async_alert(sbl, 0, SBL_ASYNC_ALERT_SBM_FW_LOAD_FAILURE, NULL, 0);
return err;
}
int sbl_sbm_firmware_flash_ring(struct sbl_inst *sbl, int first_ring,
int last_ring, bool force)
{
bool flash_needed, fw_requested = false;
int sbus_ring;
int err;
int fw_rev, fw_build;
const struct firmware *fw = NULL;
if ((last_ring < first_ring) || (first_ring < 0) ||
(last_ring > sbl->switch_info->num_sbus_rings - 1)) {
sbl_dev_err(sbl->dev, "Invalid rings specified first:%d last:%d",
first_ring, last_ring);
return -EINVAL;
}
err = sbl_parse_version_string(sbl, sbl->iattr.sbm_fw_fname,
&fw_rev, &fw_build);
if (err) {
sbl_dev_err(sbl->dev, "Failed to parse version string %s [%d]",
sbl->iattr.sbm_fw_fname, err);
return err;
}
// Check SBus Master firmware versions
for (sbus_ring = first_ring; sbus_ring <= last_ring; ++sbus_ring) {
flash_needed = false;
if (sbl_validate_sbm_fw_vers(sbl, sbus_ring, fw_rev,
fw_build)) {
flash_needed = true;
}
if (flash_needed || force) {
if (!fw_requested) {
err = request_firmware(&fw, sbl->iattr.sbm_fw_fname,
sbl->dev);
if (err) {
sbl_dev_err(sbl->dev, "firmware request failed [%d]", err);
return err;
}
sbl_dev_dbg(sbl->dev, "loaded fw (size %zd)", fw->size);
fw_requested = true;
}
sbl_dev_dbg(sbl->dev, "ring %d sbus_master firmware out of date! Flashing...", sbus_ring);
err = sbl_sbm_firm_upload(sbl, sbus_ring, fw->size, fw->data);
if (err) {
sbl_dev_err(sbl->dev, "Failed to upload ring %d firmware!", sbus_ring);
goto out_release;
} else {
sbl_dev_info(sbl->dev, "Ring %d Sbus Master firmware flashed successfully.", sbus_ring);
}
}
}
out_release:
release_firmware(fw);
return err;
}
#if defined(CONFIG_SBL_PLATFORM_ROS_HW) || defined(CONFIG_SBL_PLATFORM_CAS_HW)
static void sbl_serdes_firmware_validation(struct sbl_inst *sbl, const struct firmware *fw,
u32 sbus_addr, u32 result, u32 sbus_ring)
{
int rc, i;
u8 data;
bool corruption_found = false;
for (i = 0; i < fw->size; ++i) {
if (i % 2 == 0) {
rc = sbl_sbus_wr(sbl, sbus_addr,
SPICO_SBR_ADDR_IMEM, i/2);
if (rc)
break;
rc = sbl_sbus_rd(sbl, sbus_addr,
SPICO_SBR_ADDR_RDATA,
&result);
if (rc)
break;
data = (result & 0xff00) >> 8;
} else {
data = result & 0xff;
}
if (data != fw->data[i]) {
corruption_found = true;
sbl_dev_warn(sbl->dev, "0x%x: Act 0x%4.4x Exp 0x%4.4x", i, data, fw->data[i]);
}
}
rc = sbl_sbus_wr(sbl, sbus_addr, SPICO_SBR_ADDR_CTL,
SPICO_SBR_DATA_IMEM_CNTL_DIS);
if (rc)
sbl_dev_err(sbl->dev, "SBM Imem rd disable failed [%d]", rc);
if (corruption_found)
sbl_dev_err(sbl->dev, "r%d: SBM FW corruption found", sbus_ring);
else
sbl_dev_info(sbl->dev, "r%d: No SBM FW corruption found", sbus_ring);
}
#endif
#if defined(CONFIG_SBL_PLATFORM_ROS_HW) || defined(CONFIG_SBL_PLATFORM_CAS_HW)
int sbl_serdes_firmware_flash_safe(struct sbl_inst *sbl, int port_num,
bool force)
{
int rc;
u32 sbus_addr, crc_result, sbus_ring;
u32 curr_fw_rev = 0, curr_fw_build = 0;
u32 result;
const struct firmware *fw = NULL;
int fw_rev, fw_build;
int serdes = 0;
if (port_num == SBL_ALL_PORTS)
return -ENOTSUPP;
sbus_ring = sbl->switch_info->ports[port_num].serdes[serdes].sbus_ring;
/* First, try the FW flash */
if (sbl_serdes_firmware_flash(sbl, port_num, force))
goto sbm_fw_reload;
/* Now, validate the SerDes FW - this also validates
* SPICO interrupts are working correctly.
*/
rc = sbl_parse_version_string(sbl, sbl->iattr.serdes_fw_fname,
&fw_rev, &fw_build);
if (rc) {
sbl_dev_err(sbl->dev,
"Failed to parse version string %s [%d]",
sbl->iattr.sbm_fw_fname, rc);
return rc;
}
if (sbl_validate_serdes_fw_vers(sbl, port_num, serdes,
fw_rev, fw_build)) {
goto sbm_fw_reload;
}
/* Finally, validate the SBM FW - this also validates
* Sbus reads/writes are working correctly.
*/
rc = sbl_parse_version_string(sbl, sbl->iattr.sbm_fw_fname,
&fw_rev, &fw_build);
if (rc) {
sbl_dev_err(sbl->dev,
"Failed to parse version string %s [%d]",
sbl->iattr.sbm_fw_fname, rc);
return rc;
}
if (sbl_validate_sbm_fw_vers(sbl, sbus_ring, fw_rev,
fw_build)) {
goto sbm_fw_reload;
}
/* If all the above succeed, we're done unless we force SBM FW reload */
if (sbl_debug_option(sbl, port_num,
SBL_DEBUG_FORCE_RELOAD_SBM_FW)) {
sbl_dev_info(sbl->dev, "p%d: SBus Master FW reload forced", port_num);
goto sbm_fw_reload;
}
return 0;
sbm_fw_reload:
if (sbl_debug_option(sbl, port_num, SBL_DEBUG_INHIBIT_RELOAD_SBM_FW)) {
sbl_dev_warn(sbl->dev, "p%d: SBus Master FW reload inhibited", port_num);
return rc;
}
/* We may trigger a sbus master FW reload from multiple ports at the
* same time. Ensure we only actually reload the firmware once per
* sbus ring
*/
sbl->reload_sbm_fw[sbus_ring] = true;
mutex_lock(SBM_FW_MTX(sbl, sbus_ring));
if (!sbl->reload_sbm_fw[sbus_ring]) {
sbl_dev_info(sbl->dev, "r%d: Sbus master FW reload no longer needed", sbus_ring);
} else {
if (mutex_is_locked(SBUS_RING_MTX(sbl, sbus_ring)))
sbl_dev_dbg(sbl->dev,
"%s: Sbus contention detected, sbus_ring_mtx[%d] locked", __func__, sbus_ring);
// SBUS Critical Section
mutex_lock(SBUS_RING_MTX(sbl, sbus_ring));
/* First, dump the SBM FW info for debug */
sbus_addr = SBUS_ADDR(sbus_ring, SBUS_BCAST_SBM_SPICO);
/* Version info: Rev.Build */
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_REV_ID,
SPICO_INT_DATA_NONE, &curr_fw_rev)) {
sbl_dev_warn(sbl->dev,
"r%d: Failed to read firmware rev from 0x%x",
sbus_ring, sbus_addr);
} else {
sbl_dev_info(sbl->dev, "r%d: firmware rev 0x%x", sbus_ring, curr_fw_rev);
}
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_BUILD_ID,
SPICO_INT_DATA_NONE, &curr_fw_build)) {
sbl_dev_warn(sbl->dev,
"r%d: Failed to read firmware build from 0x%x",
sbus_ring, sbus_addr);
} else {
sbl_dev_info(sbl->dev, "r%d: firmware build 0x%x",
sbus_ring, curr_fw_build);
}
/* CRC */
rc = sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_DO_CRC,
SPICO_INT_DATA_NONE, &crc_result);
if (rc) {
sbl_dev_err(sbl->dev,
"p%d(0x%x): CRC check interrupt failed (%d)!",
port_num, sbus_addr, rc);
} else {
if (crc_result != SPICO_RESULT_SBR_CRC_PASS) {
sbl_dev_err(sbl->dev,
"p%d(0x%x): CRC check fail (result: 0x%x exp: 0x%x)!",
port_num, sbus_addr, crc_result, SPICO_RESULT_SBR_CRC_PASS);
} else {
sbl_dev_info(sbl->dev,
"p%d(0x%x): CRC check passed",
port_num, sbus_addr);
}
}
/* FW Status */
rc = sbl_sbus_rd(sbl, sbus_addr, SPICO_INT_SBMS_FW_STS,
&result);
if (rc) {
sbl_dev_err(sbl->dev,
"p%d(0x%x): FW status read failed (%d)!",
port_num, sbus_addr, rc);
} else {
sbl_dev_info(sbl->dev, "p%d(0x%x): FW status: 0x%x",
port_num, sbus_addr, result);
}
rc = request_firmware(&fw, sbl->iattr.sbm_fw_fname, sbl->dev);
if (rc != 0) {
sbl_dev_err(sbl->dev, "firmware request failed [%d]", rc);
} else {
sbl_dev_info(sbl->dev,
"p%d(0x%x): Checking SBM FW for corruption...",
port_num, sbus_addr);
rc = sbl_sbus_wr(sbl, sbus_addr, SPICO_SBR_ADDR_CTL,
SPICO_SBR_DATA_IMEM_CNTL_EN_RD);
if (rc)
sbl_dev_err(sbl->dev, "SBM Imem rd enable failed [%d]", rc);
else
sbl_serdes_firmware_validation(sbl, fw, sbus_addr, result, sbus_ring);
release_firmware(fw);
}
mutex_unlock(SBUS_RING_MTX(sbl, sbus_ring));
/* Now, try reloading the sbus master FW */
rc = sbl_sbm_firmware_flash_ring(sbl, sbus_ring, sbus_ring, true);
if (rc)
sbl_dev_err(sbl->dev, "r%d: SBM FW flash failed (%d)!", sbus_ring, rc);
else
sbl_dev_info(sbl->dev, "r%d: SBM FW flash succeeded", sbus_ring);
sbl->reload_sbm_fw[sbus_ring] = false;
}
mutex_unlock(SBM_FW_MTX(sbl, sbus_ring));
/* Finally, retry the SerDes FW reload */
rc = sbl_serdes_firmware_flash(sbl, port_num, true);
if (rc != 0)
sbl_dev_err(sbl->dev,
"p%d: SerDes FW flash failed (%d) despite SBM reload!",
port_num, rc);
else
sbl_dev_info(sbl->dev, "p%d: SerDes FW flash succeeded", port_num);
/* Regardless of the success/failure of the initial flash and recovery
* attempt, we return the status of the final serdes firmware flash,
* which is the true metric of if this function was successful.
*/
return rc;
}
#else
int sbl_serdes_firmware_flash_safe(struct sbl_inst *sbl, int port_num,
bool force)
{
return 0;
}
#endif /* defined(CONFIG_SBL_PLATFORM_ROS_HW) || defined(CONFIG_SBL_PLATFORM_CAS_HW) */
int sbl_serdes_firmware_flash(struct sbl_inst *sbl, int port_num, bool force)
{
bool flash_needed;
int serdes = 0;
int sr, err = 0;
int fw_rev, fw_build;
int port = port_num;
int first_port, last_port;
const struct firmware *fw = NULL;
/* Lock sbm_fw_mtx to ensure we don't reload the sbus master FW
* while reloading the SerDes FW
*/
if (port_num == SBL_ALL_PORTS) {
for (sr = 0; sr < sbl->switch_info->num_sbus_rings; ++sr)
mutex_lock(SBM_FW_MTX(sbl, sr));
} else {
sr = sbl->switch_info->ports[port_num].serdes[0].sbus_ring;
mutex_lock(SBM_FW_MTX(sbl, sr));
}
if (!force) {
err = sbl_parse_version_string(sbl, sbl->iattr.serdes_fw_fname,
&fw_rev, &fw_build);
if (err) {
sbl_dev_err(sbl->dev,
"Failed to parse version string %s [%d]",
sbl->iattr.serdes_fw_fname, err);
goto out;
}
// Check SerDes firmware versions
flash_needed = false;
if (port_num == SBL_ALL_PORTS) {
first_port = 0;
last_port = sbl->switch_info->num_ports - 1;
} else {
first_port = port_num;
last_port = port_num;
}
for (port = first_port; port <= last_port; ++port) {
for (serdes = 0; serdes < sbl->switch_info->num_serdes;
++serdes) {
if (sbl_validate_serdes_fw_vers(sbl, port,
serdes, fw_rev,
fw_build)) {
sbl_dev_info(sbl->dev, "port %d serdes: %d firmware out of date! Flash required",
port, serdes);
flash_needed = true;
break;
}
}
if (flash_needed)
break;
}
} else {
flash_needed = true;
}
if (flash_needed) {
err = request_firmware(&fw, sbl->iattr.serdes_fw_fname, sbl->dev);
if (err) {
sbl_dev_err(sbl->dev, "firmware request failed [%d]",
err);
goto out;
}
err = sbl_serdes_firm_upload(sbl, port_num, fw->size, fw->data);
if (err) {
sbl_dev_err(sbl->dev, "%d: serdes firmware upload failed [%d]", port_num, err);
if (port_num == SBL_ALL_PORTS)
sbl_send_serdes_fw_corruption_alert(sbl, 0, 0);
else
sbl_send_serdes_fw_corruption_alert(sbl, port, serdes);
goto out;
} else {
if (port_num == SBL_ALL_PORTS)
sbl_dev_dbg(sbl->dev, "All SerDes firmware flashed successfully.");
else
sbl_dev_dbg(sbl->dev, "p%d SerDes firmware flashed successfully.", port_num);
}
} else {
// Serdes firmware reload skipped as the firmware validation succeeded
for (port = first_port; port <= last_port; ++port)
sbl_link_counters_incr(sbl, port, serdes_fw_reload_skip);
}
out:
release_firmware(fw);
if (port_num == SBL_ALL_PORTS) {
for (sr = 0; sr < sbl->switch_info->num_sbus_rings; ++sr)
mutex_unlock(SBM_FW_MTX(sbl, sr));
} else {
mutex_unlock(SBM_FW_MTX(sbl, sr));
}
return err;
}
int sbl_validate_sbm_fw_vers(struct sbl_inst *sbl, u32 sbus_ring,
int fw_rev, int fw_build)
{
u32 curr_fw_rev = 0, curr_fw_build = 0;
u32 sbus_addr = SBUS_ADDR(sbus_ring, SBUS_BCAST_SBM_SPICO);
DEV_TRACE2(sbl->dev,
"sbus_addr: 0x%x, desired rev: 0x%x, desired build: 0x%x",
sbus_ring, fw_rev, fw_build);
// SBUS Critical Section
mutex_lock(SBUS_RING_MTX(sbl, sbus_ring));
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_REV_ID,
SPICO_INT_DATA_NONE, &curr_fw_rev)) {
// Failure expected when Spico is in reset
sbl_dev_warn(sbl->dev, "r%d: Failed to read SBM firmware rev from 0x%x",
sbus_ring, sbus_addr);
}
if (sbl_sbm_spico_int(sbl, sbus_addr, SPICO_INT_SBMS_BUILD_ID,
SPICO_INT_DATA_NONE, &curr_fw_build)) {
// Failure expected when Spico is in reset
sbl_dev_warn(sbl->dev, "r%d: Failed to read SBM firmware build from 0x%x",
sbus_ring, sbus_addr);
}
mutex_unlock(SBUS_RING_MTX(sbl, sbus_ring));
if (((int)curr_fw_rev == fw_rev) && ((int)curr_fw_build == fw_build)) {
sbl_dev_dbg(sbl->dev, "r%d: Found expected SBM rev: 0x%x_%x",
sbus_ring, curr_fw_rev, curr_fw_build);
return 0;
}
sbl_dev_warn(sbl->dev,
"r%d: Expected rev: 0x%x_%x Current SBM rev: 0x%x_%x",
sbus_ring, fw_rev, fw_build, curr_fw_rev, curr_fw_build);
return -1;
}
static void sbl_send_serdes_fw_corruption_alert(struct sbl_inst *sbl, int port, int serdes)
{
u32 alert_data;
struct serdes_info *serdes_info;
serdes_info = &sbl->switch_info->ports[port].serdes[serdes];
alert_data = ((serdes_info->sbus_ring & 0xffff) << 16) |
(serdes_info->rx_addr & 0xffff);
sbl_async_alert(sbl, port,
SBL_ASYNC_ALERT_SERDES_FW_CORRUPTION,
(void *)(uintptr_t)alert_data, 0);
/* Delay to allow userspace to get a serdes state dump */
msleep(SBL_SERDES_STATE_DUMP_DELAY);
}
int sbl_validate_serdes_fw_crc(struct sbl_inst *sbl, int port, int serdes)
{
u16 crc_result;
int err;
err = sbl_serdes_spico_int(sbl, port, serdes, SPICO_INT_CM4_CRC,
SPICO_INT_DATA_NONE, &crc_result,
SPICO_INT_RETURN_RESULT);
if (err)
return err;
/* CRC failure can be injected for test purposes */
sbl_test_manipulate_serdes_fw_crc_result(&crc_result);
if (crc_result != SPICO_RESULT_SERDES_CRC_PASS) {
sbl_dev_dbg(sbl->dev,
"p%ds%d: CRC check fail (result 0x%x, expected 0x%x)!",
port, serdes, crc_result, SPICO_RESULT_SERDES_CRC_PASS);
return -EBADE;
}
return 0;
}
int sbl_validate_serdes_fw_vers(struct sbl_inst *sbl, int port_num, int serdes,
int fw_rev, int fw_build)
{
u16 curr_fw_rev = 0, curr_fw_build = 0;
int err;
DEV_TRACE2(sbl->dev, "p%ds%d: desired rev: 0x%x, desired build: 0x%x",
port_num, serdes, fw_rev, fw_build);
if (sbl_serdes_spico_int(sbl, port_num, serdes, SPICO_INT_CM4_REV_ID,
SPICO_INT_DATA_NONE, &curr_fw_rev,
SPICO_INT_RETURN_RESULT)) {
// Failure expected when Spico is in reset
sbl_dev_dbg(sbl->dev, "p%ds%d: Failed to read firmware rev!",
port_num, serdes);
}
if (sbl_serdes_spico_int(sbl, port_num, serdes, SPICO_INT_CM4_BUILD_ID,
SPICO_INT_DATA_NONE, &curr_fw_build,
SPICO_INT_RETURN_RESULT)) {
// Failure expected when Spico is in reset
sbl_dev_dbg(sbl->dev, "p%ds%d: Failed to read firmware build!",
port_num, serdes);
}
err = sbl_validate_serdes_fw_crc(sbl, port_num, serdes);