diff --git a/Integrated_Library.LibPkg b/Integrated_Library.LibPkg index 3e7e84e..c32b0b0 100644 --- a/Integrated_Library.LibPkg +++ b/Integrated_Library.LibPkg @@ -3,8 +3,6 @@ Version=1.0 HierarchyMode=0 ChannelRoomNamingStyle=0 ReleasesFolder= -ReleaseVaultGUID= -ReleaseVaultName= ChannelDesignatorFormatString=$Component_$RoomName ChannelRoomLevelSeperator=_ OpenOutputs=1 @@ -33,6 +31,7 @@ FSMEncodingStyle=eFMSDropDownList_OneHot OutputPath= LogFolderPath= ManagedProjectGUID= +LinkedManagedProjectGUID= [Preferences] PrefsVaultGUID= @@ -558,116 +557,106 @@ OutputName1=PCAD Netlist OutputDocumentPath1= OutputVariantName1= OutputDefault1=0 -OutputType2=Verilog -OutputName2=Verilog File +OutputType2=XSpiceNetlist +OutputName2=XSpice Netlist OutputDocumentPath2= OutputVariantName2= OutputDefault2=0 -OutputType3=VHDL -OutputName3=VHDL File +OutputType3=CadnetixNetlist +OutputName3=Cadnetix Netlist OutputDocumentPath3= OutputVariantName3= OutputDefault3=0 -OutputType4=XSpiceNetlist -OutputName4=XSpice Netlist +OutputType4=CalayNetlist +OutputName4=Calay Netlist OutputDocumentPath4= OutputVariantName4= OutputDefault4=0 -OutputType5=CadnetixNetlist -OutputName5=Cadnetix Netlist +OutputType5=EDIF +OutputName5=EDIF for PCB OutputDocumentPath5= OutputVariantName5= OutputDefault5=0 -OutputType6=CalayNetlist -OutputName6=Calay Netlist +OutputType6=EESofNetlist +OutputName6=EESof Netlist OutputDocumentPath6= OutputVariantName6= OutputDefault6=0 -OutputType7=EDIF -OutputName7=EDIF for PCB +OutputType7=IntergraphNetlist +OutputName7=Intergraph Netlist OutputDocumentPath7= OutputVariantName7= OutputDefault7=0 -OutputType8=EESofNetlist -OutputName8=EESof Netlist +OutputType8=MentorBoardStationNetlist +OutputName8=Mentor BoardStation Netlist OutputDocumentPath8= OutputVariantName8= OutputDefault8=0 -OutputType9=IntergraphNetlist -OutputName9=Intergraph Netlist +OutputType9=MultiWire +OutputName9=MultiWire OutputDocumentPath9= OutputVariantName9= OutputDefault9=0 -OutputType10=MentorBoardStationNetlist -OutputName10=Mentor BoardStation Netlist +OutputType10=OrCadPCB2Netlist +OutputName10=Orcad/PCB2 Netlist OutputDocumentPath10= OutputVariantName10= OutputDefault10=0 -OutputType11=MultiWire -OutputName11=MultiWire +OutputType11=PADSNetlist +OutputName11=PADS ASCII Netlist OutputDocumentPath11= OutputVariantName11= OutputDefault11=0 -OutputType12=OrCadPCB2Netlist -OutputName12=Orcad/PCB2 Netlist +OutputType12=Pcad +OutputName12=Pcad for PCB OutputDocumentPath12= OutputVariantName12= OutputDefault12=0 -OutputType13=PADSNetlist -OutputName13=PADS ASCII Netlist +OutputType13=PCADnltNetlist +OutputName13=PCADnlt Netlist OutputDocumentPath13= OutputVariantName13= OutputDefault13=0 -OutputType14=Pcad -OutputName14=Pcad for PCB +OutputType14=Protel2Netlist +OutputName14=Protel2 Netlist OutputDocumentPath14= OutputVariantName14= OutputDefault14=0 -OutputType15=PCADnltNetlist -OutputName15=PCADnlt Netlist +OutputType15=ProtelNetlist +OutputName15=Protel OutputDocumentPath15= OutputVariantName15= OutputDefault15=0 -OutputType16=Protel2Netlist -OutputName16=Protel2 Netlist +OutputType16=RacalNetlist +OutputName16=Racal Netlist OutputDocumentPath16= OutputVariantName16= OutputDefault16=0 -OutputType17=ProtelNetlist -OutputName17=Protel +OutputType17=RINFNetlist +OutputName17=RINF Netlist OutputDocumentPath17= OutputVariantName17= OutputDefault17=0 -OutputType18=RacalNetlist -OutputName18=Racal Netlist +OutputType18=SciCardsNetlist +OutputName18=SciCards Netlist OutputDocumentPath18= OutputVariantName18= OutputDefault18=0 -OutputType19=RINFNetlist -OutputName19=RINF Netlist +OutputType19=TangoNetlist +OutputName19=Tango Netlist OutputDocumentPath19= OutputVariantName19= OutputDefault19=0 -OutputType20=SciCardsNetlist -OutputName20=SciCards Netlist +OutputType20=TelesisNetlist +OutputName20=Telesis Netlist OutputDocumentPath20= OutputVariantName20= OutputDefault20=0 -OutputType21=TangoNetlist -OutputName21=Tango Netlist +OutputType21=WireListNetlist +OutputName21=WireList Netlist OutputDocumentPath21= OutputVariantName21= OutputDefault21=0 -OutputType22=TelesisNetlist -OutputName22=Telesis Netlist -OutputDocumentPath22= -OutputVariantName22= -OutputDefault22=0 -OutputType23=WireListNetlist -OutputName23=WireList Netlist -OutputDocumentPath23= -OutputVariantName23= -OutputDefault23=0 [OutputGroup2] Name=Simulator Outputs @@ -685,128 +674,86 @@ Name=Documentation Outputs Description= TargetPrinter=Virtual Printer PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 -OutputType1=Assembler Source Print -OutputName1=Assembler Source Prints +OutputType1=Composite +OutputName1=Composite Drawing OutputDocumentPath1= OutputVariantName1= OutputDefault1=0 PageOptions1=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType2=C Source Print -OutputName2=C Source Prints +OutputType2=PCB 3D Print +OutputName2=PCB 3D Print OutputDocumentPath2= -OutputVariantName2= +OutputVariantName2=[No Variations] OutputDefault2=0 PageOptions2=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType3=C/C++ Header Print -OutputName3=C/C++ Header Prints +OutputType3=PCB 3D Video +OutputName3=PCB 3D Video OutputDocumentPath3= -OutputVariantName3= +OutputVariantName3=[No Variations] OutputDefault3=0 PageOptions3=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType4=C++ Source Print -OutputName4=C++ Source Prints +OutputType4=PCB Print +OutputName4=PCB Prints OutputDocumentPath4= OutputVariantName4= OutputDefault4=0 PageOptions4=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType5=Composite -OutputName5=Composite Drawing +OutputType5=Report Print +OutputName5=Report Prints OutputDocumentPath5= OutputVariantName5= OutputDefault5=0 PageOptions5=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType6=OpenBus Print -OutputName6=OpenBus Prints +OutputType6=Schematic Print +OutputName6=Schematic Prints OutputDocumentPath6= OutputVariantName6= OutputDefault6=0 PageOptions6=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType7=PCB 3D Print -OutputName7=PCB 3D Print +OutputType7=SimView Print +OutputName7=SimView Prints OutputDocumentPath7= -OutputVariantName7=[No Variations] +OutputVariantName7= OutputDefault7=0 PageOptions7=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType8=PCB 3D Video -OutputName8=PCB 3D Video +OutputType8=Wave Print +OutputName8=Wave Prints OutputDocumentPath8= -OutputVariantName8=[No Variations] +OutputVariantName8= OutputDefault8=0 PageOptions8=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType9=PCB Print -OutputName9=PCB Prints +OutputType9=WaveSim Print +OutputName9=WaveSim Prints OutputDocumentPath9= OutputVariantName9= OutputDefault9=0 PageOptions9=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType10=Report Print -OutputName10=Report Prints -OutputDocumentPath10= +OutputType10=PCBLIB Print +OutputName10=PCBLIB Prints +OutputDocumentPath10=D:\My_Research\My_LibraryPCB\_LibraryAD\PCB_Module.PcbLib OutputVariantName10= OutputDefault10=0 -PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType11=Schematic Print -OutputName11=Schematic Prints +PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=0|PaperKind=A4|PaperIndex=9 +Configuration10_Name1=OutputConfigurationParameter1 +Configuration10_Item1=DesignatorDisplayMode=Physical|PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView +Configuration10_Name2=OutputConfigurationParameter2 +Configuration10_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False +Configuration10_Name3=OutputConfigurationParameter3 +Configuration10_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer +Configuration10_Name4=OutputConfigurationParameter4 +Configuration10_Item4=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer +OutputType11=PDF3D +OutputName11=PDF3D OutputDocumentPath11= -OutputVariantName11= +OutputVariantName11=[No Variations] OutputDefault11=0 -PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType12=SimView Print -OutputName12=SimView Prints +PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +OutputType12=PCBDrawing +OutputName12=Draftsman OutputDocumentPath12= OutputVariantName12= OutputDefault12=0 -PageOptions12=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType13=VHDL Print -OutputName13=VHDL Prints -OutputDocumentPath13= -OutputVariantName13= -OutputDefault13=0 -PageOptions13=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType14=Wave Print -OutputName14=Wave Prints -OutputDocumentPath14= -OutputVariantName14= -OutputDefault14=0 -PageOptions14=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType15=WaveSim Print -OutputName15=WaveSim Prints -OutputDocumentPath15= -OutputVariantName15= -OutputDefault15=0 -PageOptions15=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-4|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4 -OutputType16=PCBLIB Print -OutputName16=PCBLIB Prints -OutputDocumentPath16=D:\My_Research\My_LibraryPCB\_LibraryAD\PCB_Module.PcbLib -OutputVariantName16= -OutputDefault16=0 -PageOptions16=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=0|PaperKind=A4|PaperIndex=9 -Configuration16_Name1=OutputConfigurationParameter1 -Configuration16_Item1=DesignatorDisplayMode=Physical|PrintArea=DesignExtent|PrintAreaLowerLeftCornerX=0|PrintAreaLowerLeftCornerY=0|PrintAreaUpperRightCornerX=0|PrintAreaUpperRightCornerY=0|Record=PcbPrintView -Configuration16_Name2=OutputConfigurationParameter2 -Configuration16_Item2=IncludeBottomLayerComponents=True|IncludeMultiLayerComponents=True|IncludeTopLayerComponents=True|IncludeViewports=True|Index=0|Mirror=False|Name=Multilayer Composite Print|PadNumberFontSize=14|Record=PcbPrintOut|ShowHoles=False|ShowPadNets=False|ShowPadNumbers=False|SubstituteFonts=False -Configuration16_Name3=OutputConfigurationParameter3 -Configuration16_Item3=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=TopLayer|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer -Configuration16_Name4=OutputConfigurationParameter4 -Configuration16_Item4=CArc=Full|CFill=Full|Comment=Full|Coordinate=Full|CPad=Full|CRegion=Full|CText=Full|CTrack=Full|CVia=Full|DDSymbolKind=0|DDSymbolSize=500000|DDSymbolSortKind=0|Designator=Full|Dimension=Full|DLayer1=TopLayer|DLayer2=BottomLayer|FArc=Full|FFill=Full|FPad=Full|FRegion=Full|FText=Full|FTrack=Full|FVia=Full|Layer=Mechanical13|Polygon=Full|PrintOutIndex=0|Record=PcbPrintLayer -OutputType17=FSM Print -OutputName17=FSM Prints -OutputDocumentPath17= -OutputVariantName17= -OutputDefault17=0 -PageOptions17=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 -OutputType18=PDF3D -OutputName18=PDF3D -OutputDocumentPath18= -OutputVariantName18=[No Variations] -OutputDefault18=0 -PageOptions18=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 -OutputType19=PCBDrawing -OutputName19=Draftsman -OutputDocumentPath19= -OutputVariantName19= -OutputDefault19=0 -PageOptions19=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 +PageOptions12=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9 [OutputGroup4] Name=Assembly Outputs @@ -1185,11 +1132,42 @@ OutputName4=AutoCAD dwg/dxf File Schematic OutputDocumentPath4= OutputVariantName4= OutputDefault4=0 -OutputType5=NetList Sch -OutputName5=NetList Sch +OutputType5=ExportPARASOLID +OutputName5=Export PARASOLID OutputDocumentPath5= -OutputVariantName5= +OutputVariantName5=[No Variations] OutputDefault5=0 +OutputType6=ExportVRML +OutputName6=Export VRML +OutputDocumentPath6= +OutputVariantName6=[No Variations] +OutputDefault6=0 +OutputType7=Save As/Export PCB +OutputName7=Save As/Export PCB +OutputDocumentPath7= +OutputVariantName7= +OutputDefault7=0 +OutputType8=Save As/Export Schematic +OutputName8=Save As/Export Schematic +OutputDocumentPath8= +OutputVariantName8= +OutputDefault8=0 +OutputType9=Specctra Design PCB +OutputName9=Specctra Design PCB +OutputDocumentPath9= +OutputVariantName9= +OutputDefault9=0 + +[OutputGroup10] +Name=PostProcess Outputs +Description= +TargetPrinter=Adobe PDF +PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1 +OutputType1=Copy Files +OutputName1=Copy Files +OutputDocumentPath1= +OutputVariantName1= +OutputDefault1=0 [Modification Levels] Type1=1 @@ -1272,6 +1250,16 @@ Type77=1 Type78=1 Type79=1 Type80=1 +Type81=1 +Type82=1 +Type83=1 +Type84=1 +Type85=1 +Type86=1 +Type87=1 +Type88=1 +Type89=1 +Type90=1 [Difference Levels] Type1=1 @@ -1319,6 +1307,10 @@ Type42=1 Type43=1 Type44=0 Type45=1 +Type46=1 +Type47=1 +Type48=1 +Type49=1 [Electrical Rules Check] Type1=1 @@ -1432,6 +1424,8 @@ Type108=2 Type109=1 Type110=0 Type111=1 +Type112=1 +Type113=1 [ERC Connection Matrix] L1=NNNNNNNNNNNWNNNWW diff --git a/PCB_Connector.PcbLib b/PCB_Connector.PcbLib index 02c5873..9309be6 100644 Binary files a/PCB_Connector.PcbLib and b/PCB_Connector.PcbLib differ diff --git a/PCB_ConnectorHDR.PcbLib b/PCB_ConnectorHDR.PcbLib index 0586f1b..6e62b66 100644 Binary files a/PCB_ConnectorHDR.PcbLib and b/PCB_ConnectorHDR.PcbLib differ diff --git a/PCB_IntegratedCircuit.PcbLib b/PCB_IntegratedCircuit.PcbLib index 2fb1dbc..9d09b56 100644 Binary files a/PCB_IntegratedCircuit.PcbLib and b/PCB_IntegratedCircuit.PcbLib differ diff --git a/PCB_Module.PcbLib b/PCB_Module.PcbLib index 6c0a772..0644b8c 100644 Binary files a/PCB_Module.PcbLib and b/PCB_Module.PcbLib differ diff --git a/SCH_Active.SchLib b/SCH_Active.SchLib index 7a55eb7..7e2e488 100644 Binary files a/SCH_Active.SchLib and b/SCH_Active.SchLib differ diff --git a/SCH_Connector.SchLib b/SCH_Connector.SchLib index ce47f61..6fb04e9 100644 Binary files a/SCH_Connector.SchLib and b/SCH_Connector.SchLib differ diff --git a/SCH_ConnectorHDR.SchLib b/SCH_ConnectorHDR.SchLib index a8698f6..1243458 100644 Binary files a/SCH_ConnectorHDR.SchLib and b/SCH_ConnectorHDR.SchLib differ diff --git a/SCH_IntegratedCircuit.SchLib b/SCH_IntegratedCircuit.SchLib index 0c5cc74..703b5b2 100644 Binary files a/SCH_IntegratedCircuit.SchLib and b/SCH_IntegratedCircuit.SchLib differ diff --git a/SCH_Module.SchLib b/SCH_Module.SchLib index eff7f1f..b26fad5 100644 Binary files a/SCH_Module.SchLib and b/SCH_Module.SchLib differ diff --git a/Template_Pcb.PcbDoc b/Template_Pcb.PcbDoc index 42caf96..5379f5d 100644 Binary files a/Template_Pcb.PcbDoc and b/Template_Pcb.PcbDoc differ