You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
The complete SPI transaction in SX1272WriteBuffer and SX1272ReadBuffer in sx1272.c is not protected by a critical section. SpiInOut in spi-board.c does protect the SPI transfer by a critical section, but the critical section does not include the writing of the NSS signal. Consider the following situation:
SX1272WriteBuffer is called.
The NSS signal is set to 0.
In between GpioWrite( &SX1272.Spi.Nss, 0 ); and SpiInOut( &SX1272.Spi, addr | 0x80 );, a radio interrupt happens and the interrupt handler also calls SX1272WriteBuffer or SX1272ReadBuffer. At the end of SX1272WriteBuffer or SX1272ReadBuffer, the NSS signal is set to 1.
The interrupt handler returns
The SPI transfer SpiInOut( &SX1272.Spi, addr | 0x80 ); fails because the NSS pin was set to 1 in the interrupt handler.
The complete SPI transaction in SX1272WriteBuffer and SX1272ReadBuffer in sx1272.c is not protected by a critical section. SpiInOut in spi-board.c does protect the SPI transfer by a critical section, but the critical section does not include the writing of the NSS signal. Consider the following situation:
GpioWrite( &SX1272.Spi.Nss, 0 );
andSpiInOut( &SX1272.Spi, addr | 0x80 );
, a radio interrupt happens and the interrupt handler also calls SX1272WriteBuffer or SX1272ReadBuffer. At the end of SX1272WriteBuffer or SX1272ReadBuffer, the NSS signal is set to 1.SpiInOut( &SX1272.Spi, addr | 0x80 );
fails because the NSS pin was set to 1 in the interrupt handler.Fix:
The text was updated successfully, but these errors were encountered: