mlabgen-module-make-production

#!/usr/bin/env python
# -*- coding: utf-8 -*-
import sys

import os
import subprocess
import pcbnew
from pcbnew import FromMM, wxPoint
from pcbnew import PLOT_FORMAT_GERBER, PLOT_FORMAT_SVG, PLOT_FORMAT_PDF, PLOT_CONTROLLER, EXCELLON_WRITER
from pcbnew import F_Cu, B_Cu, B_SilkS, F_SilkS, B_Mask, F_Mask, Edge_Cuts, B_Paste, F_Paste

import mlabgen

import kicad_netlist_reader
import csv
import sys

import sqlite3
import numpy as np
import csv, json

## Pouze pro vyvoj!!!!!
#os.chdir("/home/roman/repos/Modules/sensors/LIGHTNING01A/")

localpath = os.getcwd()
rootpath, project = os.path.split(localpath)

if not os.path.exists('doc/src/'):  # create the build directory if not existing
    os.makedirs('doc/src')

filename= os.path.join(localpath, 'hw', 'sch_pcb', project+'.kicad_pcb')

print("soucastna cesta:", localpath)
print("Soubor projektu:", filename)
plotDir = "../cam_profi/"

board = pcbnew.LoadBoard(filename)
pctl = pcbnew.PLOT_CONTROLLER(board)

popt = pctl.GetPlotOptions()
popt.SetOutputDirectory(plotDir)
popt.SetPlotFrameRef(False)
popt.SetLineWidth(FromMM(0.35))

popt.SetAutoScale(False)
popt.SetScale(1)
popt.SetMirror(False)
popt.SetUseGerberAttributes(True)
popt.SetUseGerberProtelExtensions(False)
popt.SetExcludeEdgeLayer(True);
popt.SetScale(1)
popt.SetUseAuxOrigin(True)

popt.SetSubtractMaskFromSilk(False)



plot_plan = [
    ( "F.Cu", F_Cu, "Top layer" ),
    ( "B.Cu", B_Cu, "Bottom layer" ),
    ( "F.SilkS", F_SilkS, "Silk top" ),
    ( "B.Mask", B_Mask, "Mask bottom" ),
    ( "F.Mask", F_Mask, "Mask top" ),
    ( "Edge.Cuts", Edge_Cuts, "Edges" ),
]

print("zacatek generovani")

for layer_info in plot_plan:
    pctl.SetLayer(layer_info[1])
    pctl.OpenPlotfile(layer_info[0], PLOT_FORMAT_GERBER, layer_info[2])
    pctl.PlotLayer()


drlwriter = EXCELLON_WRITER( board )
drlwriter.SetMapFileFormat( PLOT_FORMAT_GERBER )

mirror = False
minimalHeader = False
offset = wxPoint(0,0)

mergeNPTH = False
drlwriter.SetOptions( mirror, minimalHeader, offset, mergeNPTH)

metricFmt = True
drlwriter.SetFormat( metricFmt )

genDrl = True
genMap = False
drlwriter.CreateDrillandMapFilesSet( pctl.GetPlotDirName(), genDrl, genMap );



popt = pctl.GetPlotOptions()
popt.SetOutputDirectory("../../doc/src/")

popt.SetPlotFrameRef(False)
popt.SetLineWidth(FromMM(0.2))

popt.SetAutoScale(False)
popt.SetScale(1)
popt.SetMirror(False)
popt.SetUseGerberAttributes(True)
popt.SetExcludeEdgeLayer(False);
popt.SetUseAuxOrigin(False)

popt.SetSubtractMaskFromSilk(False)


pctl.OpenPlotfile("top", PLOT_FORMAT_PDF, "MLAB A")
pctl.SetLayer(F_SilkS)
pctl.PlotLayer()
#pctl.SetLayer(F_Mask)
#pctl.PlotLayer()


popt.SetMirror(True)
pctl.OpenPlotfile("bottom", PLOT_FORMAT_PDF, "MLAB A")
pctl.SetLayer(B_SilkS)
pctl.PlotLayer()

pctl.ClosePlot()






'''
filename= os.path.join(localpath, 'hw', 'sch_pcb', project+'.sch')
sch = open(filename, 'r').read()
sch_parts = sch.split("$")
comp = {}

for area in sch_parts:
    #print(area)
    if area[:4] == 'Comp':
        lines = area.split('\n')
        print(lines)
        compo=lines[1].split(" ")[1]
        label=lines[1].split(" ")[2]
        value=lines[5].split('"')[1]
        packa=lines[6].split('"')[1]

        if '#' not in label:
            print(label)
            try:
                packa = packa.split(":")[1]
            except Exception as e:
                pass
            if not compo in comp:
                comp[compo] = {}
            if not packa in comp[compo]:
                comp[compo][packa] = {}
            if not value in comp[compo][packa]:
                comp[compo][packa][value] = []

            comp[compo][packa][value] += [label]

import csv
with open('hw/bom_base.csv', "wb") as csv_file:
        writer = csv.writer(csv_file, delimiter=';')
        for c in comp:
            for p in comp[c]:
                for v in comp[c][p]:
                    print(c, p, v, comp[c][p][v])
                    writer.writerow([c, p, v, comp[c][p][v]])
'''


filename= os.path.join(localpath, 'hw', 'sch_pcb', project+'.sch')
filenout= os.path.join(localpath, 'hw', 'sch_pcb', project+'.bom_ust')
bom = mlabgen.BOM_ust(filename, filenout)