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mshahbaz edited this page Jul 18, 2012 · 30 revisions
Name Description Target Release
SRAM Output Queues AXI stream to SRAM for queuing 23 July '12
OpenFlow 1.0 running at 10G 23 July '12
Register System EDK based automated system for generating header/code files 23 July '12
DRAM streaming interface AXI stream to DRAM for queuing N/A
1G to 10G wrapper Converts 1G modules to 10G AXI interface 8 May '12 - Released
DMA v2.0 Small and quick DMA 8 May '12 - Released
Fast Flash IO High speed flash read(s)/write(s) using DMA v2.0 8 May '12 - Released
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