Reference Nic Simulation

The NetFPGA 10G Simulations can verify Tx and Rx data paths simultaneously as well as register writing process. This page shows how run newly added simulations for verifying Tx, Rx, and TX-RX data paths, respectively. This simulations are limited to only Reference Nic project.

Scripts for running the simulations have been added inside the Makefile in ~/NetFPGA-10G-live/projects/referece_nic/hw/. For running simulation, go inside the ~/NetFPGA-10G-live/tools/bin and run the nf_test.py script, only for sim_tx_dma, sim_rx_dma or sim_txrx_dma tests:

cd ~/NetFPGA-10G-live/tools/bin
./nf_test.py sim --major tx --minor dma --isim --tx --packet_length {size} --packet_no {number}
or
./nf_test.py sim --major rx --minor dma --isim --rx --packet_length {size} --packet_no {number}
or
./nf_test.py sim --major txrx --minor dma --isim --txrx --packet_length {size} --packet_no {number}

To run the simulation, length and/ or number of packets should be specified. If they are not specified, it will run with default values, --packet_length = 16 (in a number of byte) and --packet_no = 2.

e.g.

Tx simulation,

./nf_test.py sim --major tx --minor dma --isim --tx --packet_length 20 --packet_no 5

or

./nf_test.py sim --major tx --minor dma --isim --tx --gui --packet_length 20 --packet_no 5

Rx simulation,

./nf_test.py sim --major rx --minor dma --isim --rx --packet_length 20 --packet_no 5

or

./nf_test.py sim --major rx --minor dma --isim --rx --gui --packet_length 20 --packet_no 5

TX-RX simulation,

./nf_test.py sim --major txrx --minor dma --isim --txrx --packet_length 20 --packet_no 5

or

./nf_test.py sim --major txrx --minor dma --isim --txrx --gui --packet_length 20 --packet_no 5