From ca86f09e505a45078d3b8cca976836c6fad3661b Mon Sep 17 00:00:00 2001 From: Tyrone Ting Date: Wed, 25 Sep 2024 11:19:57 +0800 Subject: [PATCH] drivers: espi: enable VW GPIO MS/SM NPCM supports 16 sets of VW GPIO Master to Slave and 16 sets of VW GPIO Slave to Master. Signed-off-by: Tyrone Ting --- drivers/espi/espi_npcm4xx.c | 8 ++++++ include/dt-bindings/espi/npcm4xx_espi.h | 36 +++++++++++++++++++++++++ soc/arm/npcm4xx/common/reg/reg_def.h | 16 +++++++++-- 3 files changed, 58 insertions(+), 2 deletions(-) diff --git a/drivers/espi/espi_npcm4xx.c b/drivers/espi/espi_npcm4xx.c index f1ffa65e154c3f..3772d7306928e3 100644 --- a/drivers/espi/espi_npcm4xx.c +++ b/drivers/espi/espi_npcm4xx.c @@ -913,6 +913,14 @@ static int espi_npcm4xx_init(const struct device *dev) espi_init_wui_callback(dev, &espi_rst_callback, &config->espi_rst_wui, espi_vw_espi_rst_isr); + for (i = 0; i < ARRAY_SIZE(inst->VWGPMS); i++) { + inst->VWGPMS[i] |= (BIT(NPCM4XX_VWGPMS_INDEX_EN) | BIT(NPCM4XX_VWGPMS_IE)); + } + + for (i = 0; i < ARRAY_SIZE(inst->VWGPSM); i++) { + inst->VWGPSM[i] |= (BIT(NPCM4XX_VWGPSM_INDEX_EN) | BIT(NPCM4XX_VWGPSM_IE)); + } + espi_npcm4xx_configure(dev, &cfg); /* Configure host sub-modules which HW blocks belong to core domain */ npcm4xx_host_init_subs_core_domain(dev, &data->callbacks); diff --git a/include/dt-bindings/espi/npcm4xx_espi.h b/include/dt-bindings/espi/npcm4xx_espi.h index 894822b65cfbcc..4168d831e4fea3 100644 --- a/include/dt-bindings/espi/npcm4xx_espi.h +++ b/include/dt-bindings/espi/npcm4xx_espi.h @@ -32,4 +32,40 @@ #define NPCM4XX_VWEVSM10 10 #define NPCM4XX_VWEVSM11 11 +/* eSPI VW GPIO Master to Slave Register Index */ +#define NPCM4XX_VWGPMS0 0 +#define NPCM4XX_VWGPMS1 1 +#define NPCM4XX_VWGPMS2 2 +#define NPCM4XX_VWGPMS3 3 +#define NPCM4XX_VWGPMS4 4 +#define NPCM4XX_VWGPMS5 5 +#define NPCM4XX_VWGPMS6 6 +#define NPCM4XX_VWGPMS7 7 +#define NPCM4XX_VWGPMS8 8 +#define NPCM4XX_VWGPMS9 9 +#define NPCM4XX_VWGPMS10 10 +#define NPCM4XX_VWGPMS11 11 +#define NPCM4XX_VWGPMS12 12 +#define NPCM4XX_VWGPMS13 13 +#define NPCM4XX_VWGPMS14 14 +#define NPCM4XX_VWGPMS15 15 + +/* eSPI VW GPIO Slave to Master Register Index */ +#define NPCM4XX_VWGPSM0 0 +#define NPCM4XX_VWGPSM1 1 +#define NPCM4XX_VWGPSM2 2 +#define NPCM4XX_VWGPSM3 3 +#define NPCM4XX_VWGPSM4 4 +#define NPCM4XX_VWGPSM5 5 +#define NPCM4XX_VWGPSM6 6 +#define NPCM4XX_VWGPSM7 7 +#define NPCM4XX_VWGPSM8 8 +#define NPCM4XX_VWGPSM9 9 +#define NPCM4XX_VWGPSM10 10 +#define NPCM4XX_VWGPSM11 11 +#define NPCM4XX_VWGPSM12 12 +#define NPCM4XX_VWGPSM13 13 +#define NPCM4XX_VWGPSM14 14 +#define NPCM4XX_VWGPSM15 15 + #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCM4XX_ESPI_H_ */ diff --git a/soc/arm/npcm4xx/common/reg/reg_def.h b/soc/arm/npcm4xx/common/reg/reg_def.h index aef7894b758963..7d87b93ed966f6 100644 --- a/soc/arm/npcm4xx/common/reg/reg_def.h +++ b/soc/arm/npcm4xx/common/reg/reg_def.h @@ -984,8 +984,12 @@ struct espi_reg { volatile uint8_t reserved4[24]; /* 0x0140 Virtual Wire Event Master-to-Slave 0-11 */ volatile uint32_t VWEVMS[12]; - volatile uint8_t reserved5[144]; - /* 0x0200 Virtual Wire Event Master-toSlave Status */ + volatile uint8_t reserved5[16]; + /* 0x0180 Virtual Wire GPIO Slave-to-Master 0-15 */ + volatile uint32_t VWGPSM[16]; + /* 0x01C0 Virtual Wire GPIO Master-to-Slave 0-15 */ + volatile uint32_t VWGPMS[16]; + /* 0x0200 Virtual Wire Event Master-to-Slave Status */ volatile uint32_t VWEVMS_STS; volatile uint8_t reserved6[4]; /* 0x0208 Virtual Wire Event Slave-to-Master Type */ @@ -1104,6 +1108,14 @@ struct espi_reg { #define NPCM4XX_VWEVSM_VALID FIELD(4, 4) #define NPCM4XX_VWEVSM_BIT_VALID(n) (4+n) #define NPCM4XX_VWEVSM_HW_WIRE FIELD(24, 4) +#define NPCM4XX_VWGPSM_WIRE FIELD(0, 4) +#define NPCM4XX_VWGPSM_VALID FIELD(4, 4) +#define NPCM4XX_VWGPSM_INDEX_EN 15 +#define NPCM4XX_VWGPSM_IE 18 +#define NPCM4XX_VWGPMS_WIRE FIELD(0, 4) +#define NPCM4XX_VWGPMS_VALID FIELD(4, 4) +#define NPCM4XX_VWGPMS_INDEX_EN 15 +#define NPCM4XX_VWGPMS_IE 18 #define NPCM4XX_OOBCTL_OOB_FREE 0 #define NPCM4XX_OOBCTL_OOB_AVAIL 1 #define NPCM4XX_OOBCTL_RSTBUFHEADS 2