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Develop a suite of RVV-optimized code that can be applied to various vector lengths (VLENs). #5028

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tingboliao opened this issue Dec 23, 2024 · 3 comments

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@tingboliao
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Is there a plan to develop a suite of RVV-optimized code that can be applied to various vector lengths (VLENs), rather than developing RVV-optimized code specific to certain VLENs for each processor with built-in vectors, , such as C910, X280, etc., shown as below in the Makefile.riscv64 file?

image

@martin-frbg
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see #4050 - RVV length specificity was a necessary evil while the standards were maturing and individual physical implementations were key

@tingboliao
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see #4050 - RVV length specificity was a necessary evil while the standards were maturing and individual physical implementations were key

Thanks

@martin-frbg
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(C910V will have to remain a separate target as it only supports RVV 0.7.1)

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