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assembler-guide.txt
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DECSYSTEM-20 Assembly Language Guide
Edited by:
Frank da Cruz
Chris Ryland
Columbia University Center for Computing Activities
New York, New York 10027
3 July 1980
Assembly Language Guide Page 1
Preface
This document is intended to be a comprehensive introduction to assembly
language programming on the DECSYSTEM-20. It consists of excerpts from
various DEC manuals and other documents, with the addition of programming
examples and some original material. Appropriate credit is given in each
chapter or section in which the material is not original.
Chapter 8 attempts to present a programming standard for Macro programs; in a
sense it is the most important chapter because unless a program is clear and
understandable, it will not be adaptable to new circumstances, and its
usefulness and lifetime will be limited.
This is a draft. Various sections still need to be filled in or
refined, and more material added. This will be done from time to
time. Comments are welcome.
Introduction Page 2
1. Introduction
Assembly language is a tool for writing computer programs consisting, at the
source (program text) level, of actual machine instructions. It is sometimes
desirable or necessary to use assembly language for two reasons:
1. Only in assembly language can you write a program that can take
advantage of all the features of a given machine. Higher-level
languages purposely conceal the machine from programmers so that
programs may be transported from one machine to another.
2. You have maximum control over every aspect of the operation of your
program, especially storage allocation and efficiency.
In order to use an assembler, you must first be familiar with the machine's
instruction set. This is described in Chapter 2. You will notice that this
chapter actually describes three different machines: the KA10, the KI10, and
the KL10. You should be aware that DEC-20's are KL10's (2020's are KS10's,
but these are identical to KL10's for all practical purposes).
There are several assemblers suitable for use on the DEC-20. These include
Macro-20 (the standard DEC assembler), Midas (an alternative from MIT), and
Fail (a fast 1-pass block structured assembler from Stanford). Only Macro-20
is supported by DEC, but the other two have certain distinct advantages.
Macro-20 is described in Chapter 3.
Another thing that assembly-language programmers need to know about is monitor
calls. On a timesharing system, such as the DECSYSTEM-20, there are many
things that you cannot do even in assembly language, such as issue
input/output instructions; only the monitor can do such things. You can ask
the monitor to perform services for you by issuing a monitor call (a DEC-20
monitor call is called a 'JSYS' (Jump to SYStem)), which amounts to calling a
subroutine in the monitor. Information about DEC-20 monitor calls is given in
Chapters 4 and 5
There are various aids available to assembly language programmers; these
include libraries of helpful macros and routines (Chapters 6, 7), and
interactive, symbolic debugging facilities (Chapter 10). In addition, there
are chapters on how to write, run, and debug programs on the DECSYSTEM-20 (9),
and some sample programs (11). And, as pointed out in the Preface, a very
important Chapter on programming style and standards (8).
The major intent of this guide is to provide a consolidated resource for those
who wish to write assembly language programs, not assembly language
subroutines to be called from higher-level languages; such subroutines can
only be written with detailed knowledge of the calling conventions and
internal data representations of the given language.
The reader should have some knowledge of programming and some familiarity with
DECSYSTEM-20 commands and procedures.
Introduction Page 3
1.1. Basic Concepts
Before we can proceed with descriptions of the instruction set, assembler, and
monitor calls, some terminology and a few basic concepts of machine
organization must be introduced.
1.1.1. Terminology
Timesharing One way of running a computer. Timesharing allows many users
to use the computer at once, seated at terminals, and to
converse via the terminal with various programs on the
computer.
DECSYSTEM-20 A timesharing computer system, the subject of this manual.
DEC Digital Equipment Corporation. The manufacturer of the
DECSYSTEM-20, and of its predecessors, the PDP-10 and PDP-6.
Operating System A program, or set of programs, that controls the operation of
the computer. On a timesharing computer, the operating system
functions include scheduling among users, allocating resources
to users, controlling devices, and performing various other
services for users that could not be done by the users
themselves.
Tops-20 Timesharing OPerating System-20. This is the name of the
DECSYSTEM-20's operating system.
Monitor One component of Tops-20. It is a program that is always
running, and that performs most operating system functions.
Exec Another component of Tops-20. It is the program by which
users communicate their desires to the monitor, and through
which the monitor communicates to the user.
1.1.2. Machine Organization
The computer consists of various entities. You must be aware of what some of
them are in order to program in assembly language:
Memory This is a device that allows the computer to store and
retrieve a limited amount of data very quickly. It is not
permanent storage. It is often referred to as "core" memory
(it is sometimes made from magnetic cores), to differentiate
it from registers, disks, and other kinds of memory. Whether
it's made from cores or not, it is solid-state memory, i.e. it
has no moving parts.
Register (Also called an Accumulator) This is a special kind of solid-
state memory that is much faster than ordinary memory, and
that allows operations such as arithmetic to be performed on
data that is stored there. The DECSYSTEM-20 has 16 registers.
Disk A kind of mechanical memory that is much slower than registers
Introduction Page 4
or core memory, but which allows long-term storage of data in
files whose names are kept in directories. Disks can hold
much more data than core memory.
CPU Central Processing Unit. This is the part of the computer
that does most of the work, and where the major "intelligence"
is to be found. It consists of the registers and the logic to
move data to and from the registers, as well as logic to
operate on the data in the registers (e.g. to do arithmetic).
Instruction An instruction is a code to activate some function of the CPU.
Typically, it specifies what operation to perform, what data
to operate on, and where to put the result. Typical
operations include arithmetic (add, subtract, etc.), transfer
of control, comparison of numbers, etc. Assembly language
programs consist of a sequence of instructions. When the
program is being executed, the instructions are kept in
memory.
Address An address is a number that expresses the location of a
quantity (instruction or data) in memory. Used as a verb,
"address" means to "refer to".
Bit (BInary Digit) The smallest unit of storage in memory. A bit
is a quantity whose value can be 0 or 1.
Word The major unit of storage in memory. In the DECSYSTEM-20,
each word consists of 36 bits, and has its own address. You
can address 262144 words of memory on the DECSYSTEM-20.
Byte An intermediate unit of storage; any sequence of bits within a
word. A byte is often the unit of storage for a character.
Input/Output This is the act of transferring data between memory and some
device, typically a disk or a terminal.
1.1.3. Instructions and Addressing Modes
[ this is mostly taken care of in Ch. 2 ]
1.1.4. Internal Representation of Numbers
1.1.4.1. Binary Numbers
[ to be filled in ]
Introduction Page 5
1.1.4.2. Two's Complement Representation
[ to be filled in ]
1.1.4.3. Integers
[ to be filed in ]
1.1.4.4. Floating Point Numbers
[ to be filled in ]
1.1.5. Arithmetic
[ to be filled in ]
1.1.5.1. Integer Arithmetic
[ to be filled in ]
1.1.5.2. Floating Point Arithmetic
[ to be filled in ]
1.1.6. Logical Operations
[ to be filled in ]
1.1.7. Character String Manipulation
[ to be filled in ]
1.1.8. Elementary Data Structures
1.1.8.1. Tables (Arrays) and Indexing
[ to be filled in ]
Introduction Page 6
1.1.8.2. Stacks
[ to be filled in ]
Instruction Set Page 7
2. The PDP-10/DECSYSTEM-20 Instruction Set
2.1. Introduction
This chapter was written by Ralph E. Gorin at Stanford University
and modified slightly at Columbia.
The PDP-10 is a general purpose stored program computer. There are four
different processors (computers) in the PDP-10 family: the PDP-6, the KA10,
the KI10 and the KL10. The newest of these is the KL10 which is the central
processor in various DECsystem-10 and DECSYSTEM-20 configurations. (The KS10,
found only in the DECSYSTEM-2020, is nearly identical to the KL10.) In
general, we shall discuss the KL10 processor.
There are three principal aspects of assembly language programming: the
machine instructions, the assembler, and the operating system. The machine
instructions are the primitive operations with which we write programs.
Learning the instruction set means learning what operations are performed by
each instruction. Programming is the art or science of combining these
operations to accomplish some particular task.
The machine instructions, like everything else in a computer, are in binary.
The assembler is a program that translates the mnemonic names by which we
refer to instructons into the binary form that the computer recognizes. The
assembler also does a variety of other chores that are essentially
bookkeeping.
The operating system, or "monitor", is a special program that handles all
input and output and which schedules among user programs. For its own
protection and the protection of other users the operating system places
various restrictions on user programs. User mode programs are resticted to
memory assigned to them by the operating system; they may not perform any
machine input-output instructions, nor can they perform several other
restricted operations (e.g., HALT instruction). To facilitate user
input-output and core allocation the operating system provides various monitor
calls ( or JSYS operations) by which a user program can communicate its wishes
to the system. Essentially all programs except the operating system itself
are run as user mode programs. Editors, assemblers, compilers, utilities, and
programs that you write yourself are all user mode programs.
The PDP-10 is a word oriented machine. Words contain 36 data bits, numbered
(left to right) 0 to 35. Every machine instruction is one word. There are
two formats for machine instructions.
Most instructions have the format:
Bit 000000000 0111 1 1111 112222222222333333
Position 012345678 9012 3 4567 890123456789012345
________________________________________
| | | | | |
| OP | AC |I| X | Y |
|_________|____|_|____|__________________|
In the diagram the field names are:
Instruction Set Page 8
- OP = operation code
- AC = accumulator field
- I = indirect bit
- X = index field
- Y = address field
Some example intructions are:
move 1, @100 ; MOVE is the OP. AC is 1.
; @ sets the I bit.
; X is zero, Y is 100.
hrrz 17, 1(3) ; HRRZ is the OP. AC is 17,
; Y = 1, X = 3, I = 0
sos foo ; SOS is OP, FOO is symbolic
; for the Y field. AC, X, I
; are 0.
All instructions without exception calculate an "effective address". The
effective address may itself be used as data or it may be used to address the
data or result word for a particular instruction. The effective address
computation is described by the following program. MA means memory address.
means program counter. C(MA) means contents of the word addressed by MA.
Effective Address Calculation:
IFETCH: MA := PC
OP := Bits 0:8 of C(MA);
AC := Bits 9:12 of C(MA);
EACOMP: I := Bit 13 of C(MA);
X := Bits 14:17 of C(MA);
Y := Bits 18:35 of C(MA);
E := Y;
IF X <> 0 then E := Bits 18:35 of E+C(X);
IF I=0 then go to DONE;
MA := E;
go to EACOMP
DONE:
The effective address is an 18 bit quantity. If the I and X fields of the
instruction are zero then the effective address is simply the address (Y)
field of the instruction. If X isn't zero, then the contents of the word
addressed by X (i.e., the contents a register serving as the index register
for this instruction) are added to the contents of the Y field (the sum is
truncated to 18 bits). This sum serves as the effective address, unless the
indirect (I) bit is set. If the I bit is set, a word is read from the address
specified by X and Y, and the I, X, and Y fields of that new word are used for
repeating the effective address calculation. Note that this calculation will
loop until a word is read in which the I field is zero.
Instruction Set Page 9
The result of the effective address calculation may be thought of as an
instruction word where bits 0:12 are copied from the original instruction,
bits 13:17 are zero, and 18:35 contain the effective address.
In programming the PDP-10 it is convenient to imagine that your program
occupies contiguous virtual memory locations from 0 to some maximum address.
All memory locations are equivalent for most purposes (but some operating
systems reserve some of your space for their own purposes).
Sixteen memory locations (addresses 0 to 17 - note that addresses will appear
in octal) are distinguished by their use as general purpose registers (also
called accumulators or index registers). Most PDP-10 instructions address one
memory operand and one accumulator (so-called "one and a half address"
architecture). This means that nearly all instructions affect some
accumulator. These registers are actually implemented in high speed solid
state memory rather than in slower main memory. For any purpose where it is
convenient to do so, a user may reference an accumulator as memory.
Instruction classes are formed by a mnemonic class name and one or more
modifier letters. The modifiers usually signify some transformation on the
data or the direction of data movement or the skip or jump condition. Some
functional duplications and some no-ops result from this scheme. However,
despite these drawbacks, this notion of instruction classes and modifiers
makes the instruction set easy to learn.
2.2. Full Word Instructions
These are the instructions whose basic purpose is to move one or more full
words of data from one location to another, usualy from an accumulator to a
memory location or vice versa. In some cases, minor arithmetic operations are
performed, such as taking the magnitude or negative of a word.
2.2.1. MOVE
The MOVE class of instructions perform full word data transmission between an
accumulator and a memory location. There are sixteen instructions in the MOVE
class. All mnemonics begin with MOV. The first modifier specifies a data
transformation operation; the second modifier specifies the source of data and
the destination of the result.
|E no modification | from memory to AC
MOV |N negate source |I Immediate. Source is 0,,E to AC
|M magnitude |M from AC to memory
|S swap source |S to self. If AC<>0 to AC also
C(E) signifies contents of E (effective address) prior to the execution of the
instruction. C(AC) signifies contents of the AC specified. CS(E) and CS(AC)
signify the contents of E or AC with left and right halves swapped. CR(AC)
and CL(AC) signify the 18 bit right and left contents of the AC. PC signifies
the 18 bit contents of the program counter.
Instruction Set Page 10
MOVE C(AC) := C(E)
MOVEI C(AC) := 0,,E
MOVEM C(E) := C(AC)
MOVES C(E) := C(E); if AC<>0 then C(AC) := C(E)
MOVN C(AC) := -C(E)
MOVNI C(AC) := -E
MOVNM C(E) := -C(AC)
MOVNS C(E) := -C(E); if AC<>0 then C(AC) := -C(E)
MOVM C(AC) := |C(E)|
MOVMI C(AC) := 0,,E
MOVMM C(E) := |C(AC)|
MOVMS C(E) := |C(E)|; if AC<>0 then C(AC) := |C(E)|
MOVS C(AC) := CS(E)
MOVSI C(AC) := E,,0
MOVSM C(E) := CS(AC)
MOVSS C(E) := CS(E); if AC<>0 then C(AC) := CS(E)
2.2.2. EXCH - Exchange
EXCH exchanges the contents of the selected ac with the contents of the
effective address.
EXCH C(AC):=:C(E)
2.2.3. BLT - Block Transfer
The instruction copies words from memory to memory. The left half of the
selected AC specifies the first source address. The right half of the AC
specifies the first destination address. The effective address specifies the
last destination address. Words are copied, one by one, from the source to
the destination, until a word is stored in an address greater than or equal to
the effective address of the BLT.
Caution: BLT clobbers the specified AC. Don't use the BLT AC in
address calculation for the BLT, results will be random. If source
and destination overlap, remember that BLT moves the lowest source
word first. If the destination of the BLT includes the BLT AC, then
the BLT AC better be the last destination address.
2.2.4. Programming Examples Using Fullword Instructions
In these examples, several standard PDP-10 assembly languange notations are
used:
[] Square brackets enclose a "literal". The contents of the
brackets are assembled in another place, and the bracketed
expression is replaced by the address of that place.
Instruction Set Page 11
<> Angle brackets enclose an expression.
,, Separates left- and right-half quantities in a word. In
<a,,b>, a is right-adjusted in bits 0:17, and b is right-
adjusted in bits 18:35. If either quantity is too big, it is
truncated on the left.
() Parentheses enclose an expression which denotes an index
register.
. (pronounced "dot") Denotes the current location.
; Save all the accumulators:
movem 17, savac+17
movei 17, savac ; Source is 0, destination
blt 17, savac+16 ; is SAVAC.
; Restore all the accumulators:
movsi 17, savac ; Source is SAVAC,
blt 17, 17 ; destination is 0.
; Zero 100 words starting at TABLE.
setzm table
move t1, [table,,table+1] ; Source and
blt t1, table+77 ; destination overlap
; Move 77 words from TABLE thru TABLE+76 to TABLE+1 thru
; table+77: BLT can't be done here because the source and
; destination overlap. (See the description of POP.)
move t1, [400076,,table+76]
pop t1, 1(t1) ; Store TABLE+76 into
jumpl t1, .-1 ; table+77, etc.
2.3. Stack Instructions
These two instructions insert and remove full words in a pushdown list. The
address of the top of the list is kept in the right half of the AC referenced
by these instructions. The program may keep a control count in the left half
of the AC. There are also two subroutine calling instructions (PUSHJ and
POPJ) that use this same format pushdown list.
2.3.1. PUSH - Push on Stack
PUSH C(AC):=C(AC)+<1,,1>; C(CR(AC)):=C(E)
The specified accumulator is incremented by adding 1 to each half (in the KI10
and KL10 carry out of the right half is suppressed). If, as result of the
addition, the left half of the AC becomes positive, a pushdown overflow
condition results (but the instruction procedes to completion). The word
Instruction Set Page 12
addressed by the effective address is fetched and stored on the top of the
stack which is addressed by the right half of the (incremented) accumulator.
2.3.2. POP - Pop Stack
POP C(E):=C(CR(AC)); C(AC):=C(AC)-<1,,1>
POP undoes PUSH as follows: the word at the top of the stack (addressed by the
right half of the selected AC) is fetched and stored at the effective address.
Then the AC is decremented by subtracting 1 from both halves (in the KI10 and
KL10 carry out of bit 18 is suppressed). If the AC becomes negative as a
result of the subtraction a pushdown overflow results.
Often the accumulator used as the pushdown pointer is given the symbolic name
P. To initialize a pushdown pointer (e.g., for N words starting at PDLIST),
one might do the following:
move p, [iowd n, pdList]
where the IOWD pseudo op assembles -N,,PDLIST-1. Elsewhere in the program
should appear:
pdList: block n
which defines the symbolic label PDLIST and reserves N words following it for
the stack.
2.3.3. ADJSP - Adjust Stack Pointer
ADJSP CL(AC) := CL(AC)+E; CR(AC) := CR(AC)+E
E is added algebraically, with bit 18 acting as the sign bit, to both halves
of AC. If a negative E changes the count in AC left from positive or zero to
negative, or a positive E changes the count from negative to positive or zero,
set trap 2.
2.4. Halfword Instructions
The halfword class of instructions perform data transmission between one half
of an accumulator and one half of a memory location. There are sixty-four
halfword instructions. Each mnemonic begins with H and has four modifiers.
The first modifier specifies which half of the source word; the second
specifies which half of the destination. The third modifier specifies what to
do to the other half of the destination. The fourth modifier specifies the
source of data and the destination of the result.
Instruction Set Page 13
H halfword from |R right of source
|L left
|R right of destination
|L left
| no modification of other half
|Z zero other half
|O set other half to ones
|E sign extend source to other half
| from memory to AC
|I Immediate
|M from AC to memory
|S to self. If AC<>0 to AC also.
2.4.1. HR - Halfword Right
HRR CR(AC) := CR(E)
HRRI CR(AC) := E
HRRM CR(E) := CR(AC)
HRRS CR(E) := CR(E); if AC<>0 then CR(AC) := CR(E)
HRRZ C(AC) := 0,,CR(E)
HRRZI C(AC) := 0,,E
HRRZM C(E) := 0,,CR(AC)
HRRZS C(E) := 0,,CR(E); if AC<>0 then C(AC) := 0,,CR(E)
HRRO C(AC) := 777777,,CR(E)
HRROI C(AC) := 777777,,E
HRROM C(E) := 777777,,CR(AC)
HRROS C(E) := 777777,,CR(E);
if AC<>0 then C(AC) := 777777,,CR(E)
HRRE C(AC) := 777777*C18(E),,CR(E)
HRREI C(AC) := 777777*E18,,E
HRREM C(E) := 777777*C18(AC),,CR(AC)
HRRES C(E) := 777777*C18(E),,CR(E);
if AC<>0 then C(AC) := 777777*C18(E),,CR(E)
HRL CL(AC) := CR(E)
HRLI CL(AC) := E
HRLM CL(E) := CR(AC)
HRLS CL(E) := CR(E); if AC<>0 then CL(AC) := CR(E)
HRLZ C(AC) := CR(E),,0
HRLZI C(AC) := E,,0
HRLZM C(E) := CR(AC),,0
HRLZS C(E) := CR(E),,0;
if AC<>0 then C(AC) := CR(E),,0
Instruction Set Page 14
HRLO C(AC) := CR(E),,777777
HRLOI C(AC) := E,,777777
HRLOM C(E) := CR(E),,777777
HRLOS C(E) := CR(E),,777777;
if AC<>0 then C(AC) := CR(E),,777777
HRLE C(AC) := CR(E),,777777*C18(E)
HRLEI C(AC) := E,,777777*E18
HRLEM C(E) := CR(AC),,777777*C18(AC)
HRLES C(E) := CR(E),,777777*C18(E);
if AC<>0 then C(AC) := CR(E),,777777*C18(E)
2.4.2. HL Halfword Left
HLR CR(AC) := CL(E)
HLRI CR(AC) := 0
HLRM CR(E) := CL(AC)
HLRS CR(E) := CL(E); if AC<>0 then CR(AC) := CL(E)
HLRZ C(AC) := 0,,CL(E)
HLRZI C(AC) := 0
HLRZM C(E) := 0,,CL(AC)
HLRZS C(E) := 0,,CL(E);
if AC<>0 then C(AC) := 0,,CL(E)
HLRO C(AC) := 777777,,CL(E)
HLROI C(AC) := 777777,,0
HLROM C(E) := 777777,,CL(AC)
HLROS C(E) := 777777,,CL(E);
if AC<>0 then C(AC) := 777777,,CL(E)
HLRE C(AC) := 777777*C0(E),,CL(E)
HLREI C(AC) := 0
HRREM C(E) := 777777*C0(AC),,CL(AC)
HRRES C(E) := 777777*C0(E),,CL(E);
if AC<>0 then C(AC) := 777777*C0(E),,CR(E)
HLL CL(AC) := CL(E)
HLLI CL(AC) := 0
HLLM CL(E) := CL(AC)
HLLS CL(E) := CL(E); if AC<>0 then CL(AC) := CL(E)
HLLZ C(AC) := CL(E),,0
HLLZI C(AC) := 0
HLLZM C(E) := CL(AC),,0
HLLZS C(E) := CL(E),,0;
if AC<>0 then C(AC) := CL(E),,0
HLLO C(AC) := CL(E),,777777
HLLOI C(AC) := 0,,777777
HLLOM C(E) := CL(E),,777777
HLLOS C(E) := CL(E),,777777;
if AC<>0 then C(AC) := CL(E),,777777
Instruction Set Page 15
HLLE C(AC) := CL(E),,777777*C0(E)
HLLEI C(AC) := 0
HLLEM C(E) := CL(AC),,777777*C0(AC)
HLLES C(E) := CL(E),,777777*C0(E);
if AC<>0 then C(AC) := CL(E),,777777*C0(E)
2.5. Arithmetic Testing
2.5.1. AOBJ - Add One to Both Halves and Jump
The AOBJx (Add One to Both halves of AC and Jump) instructions allow forward
indexing through an array while maintaining a control count in the left half
of an accumulator. Use of AOBJN and AOBJP can reduce loop control to one
instruction.
AOBJN C(AC):=C(AC)+<1,,1>; if C(AC)<0 then PC:=E
AOBJP C(AC):=C(AC)+<1,,1>; if C(AC)>=0 then PC:=E
Example. Add 3 to N words starting at location TAB:
movsi 1, -N ; Initialize register 1 to -N,,0.
movei 2, 3 ; Register 2 gets the constant 3.
addm 2, tab(1) ; Add 3 to one array element.
aobjn 1, .-1 ; Increment both the index and the
; control. Loop until the ADDM has
; been done N times.
By the way, for the sake of consistency, AOBJN should have been called AOBJL
and AOBJP should have been called AOBJGE. However, they weren't.
2.5.2. JUMP
The JUMP instructions compare the selected accumulator to zero and jump (to
the effective address of the instruction) if the specified relation is true.
JUMP Jump never.
JUMPL if C(AC) < 0 then PC:=E
JUMPLE if C(AC) <= 0 then PC:=E
JUMPE if C(AC) = 0 then PC:=E
JUMPN if C(AC) <> 0 then PC:=E
JUMPGE if C(AC) >= 0 then PC:=E
JUMPG if C(AC) > 0 then PC:=E
JUMPA PC:=E
Instruction Set Page 16
2.5.3. SKIP
The SKIP instructions compare the contents of the effective address to zero
and skip the next instruction if the specified relation is true. If a
non-zero AC field appears, the selected AC is loaded from memory.
SKIP if AC<>0 then C(AC):=C(E); don't skip
SKIPL if AC<>0 then C(AC):=C(E);
if C(E) < 0 then skip
SKIPLE if AC<>0 then C(AC):=C(E);
if C(E) <= 0 then skip
SKIPE if AC<>0 then C(AC):=C(E);
if C(E) = 0 then skip
SKIPN if AC<>0 then C(AC):=C(E);
if C(E) <> 0 then skip
SKIPGE if AC<>0 then C(AC):=C(E);
if C(E) >= 0 then skip
SKIPG if AC<>0 then C(AC):=C(E);
if C(E) > 0 then skip
SKIPA if AC<>0 then C(AC):=C(E); skip
2.5.4. AOS - Add One and Skip
The AOS (Add One to memory and Skip) instructions increment a memory location,
compare the result to zero to determine the skip condition, If a non-zero AC
field appears then the AC selected will be loaded (with the incremented data).
AOS C(E) := C(E)+1; if AC<>0 then C(AC):=C(E)
AOSL C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) < 0 then skip
AOSLE C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) <= 0 then skip
AOSE C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) = 0 then skip
AOSN C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) <> 0 then skip
AOSGE C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) >= 0 then skip
AOSG C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
if C(E) > 0 then skip
AOSA C(E) := C(E)+1; if AC<>0 then C(AC):=C(E);
skip
2.5.5. SOS - Subtract One and Skip
The SOS (Subtract One from memory and Skip) instructions decrement a memory
location, compare the result to zero to determine the skip condition, If a
non-zero AC field appears then the AC selected will be loaded (with the
decremented data).
Instruction Set Page 17
SOS C(E) := C(E)-1; if AC<>0 then C(AC):=C(E)
SOSL C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
if C(E) < 0 then skip
SOSLE C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
if C(E) <= 0 then skip
SOSE C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
if C(E) = 0 then skip
SOSN C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
C(E) <> 0 then skip
SOSGE C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
if C(E) >= 0 then skip
SOSG C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
if C(E) > 0 then skip
SOSA C(E) := C(E)-1; if AC<>0 then C(AC):=C(E);
skip
2.5.6. AOJ - Add One and Jump
The AOJ (Add One to AC and Jump) instructions increment the contents of the
selected accumulator. If the result bears the indicated relation to zero then
the instruction will jump to the effective address.
AOJ C(AC) := C(AC)+1;
AOJL C(AC) := C(AC)+1; if C(AC) < 0 then PC:=E
AOJLE C(AC) := C(AC)+1; if C(AC) <= 0 then PC:=E
AOJE C(AC) := C(AC)+1; if C(AC) = 0 then PC:=E
AOJN C(AC) := C(AC)+1; if C(AC) <> 0 then PC:=E
AOJGE C(AC) := C(AC)+1; if C(AC) >= 0 then PC:=E
AOJG C(AC) := C(AC)+1; if C(AC) > 0 then PC:=E
AOJA C(AC) := C(AC)+1; PC:=E
2.5.7. SOJ - Subtract One and Jump
The SOJ (Subtract One from AC and Jump) instructions decrement the contents of
the selected accumulator. If the result bears the indicated relation to zero
then the instruction will jump to the effective address.
SOJ C(AC) := C(AC)-1
SOJL C(AC) := C(AC)-1; if C(AC) < 0 then PC:=E
SOJLE C(AC) := C(AC)-1; if C(AC) <= 0 then PC:=E
SOJE C(AC) := C(AC)-1; if C(AC) = 0 then PC:=E
SOJN C(AC) := C(AC)-1; if C(AC) <> 0 then PC:=E
SOJGE C(AC) := C(AC)-1; if C(AC) >= 0 then PC:=E
SOJG C(AC) := C(AC)-1; if C(AC) > 0 then PC:=E
SOJA C(AC) := C(AC)-1; PC:=E
Instruction Set Page 18
2.5.8. CAM - Compare Accumulator to Memory
The CAM (Compare Accumulator to Memory) class compare the contents of the
selected accumulator to the contents of the effective address. If the
indicated condition is true, the instruction will skip. The CAM instruction
is suitable for arithmetic comparision of either fixed point quantities or
normalized floating point quantities. Needless to say, for the comparison to
be meaningful both C(AC) and C(E) should be in the same format (i.e., either
both fixed or both floating).
CAM no op (references memory)
CAML if C(AC) < C(E) then skip
CAMLE if C(AC) <= C(E) then skip
CAME if C(AC) = C(E) then skip
CAMN if C(AC) <> C(E) then skip
CAMGE if C(AC) >= C(E) then skip
CAMG if C(AC) > C(E) then skip
CAMA skip
2.5.9. CAI - Compare Accumulator Immediate
The CAI (Compare Accumulator Immediate) class compare the contents of the
selected accumulator to the effective address. If the indicated condition is
true, the instruction will skip. Note than an effective address is an 18 bit
quantity that is always considered to be positive.
CAI no op
CAIL if C(AC) < E then skip
CAILE if C(AC) <= E then skip
CAIE if C(AC) = E then skip
CAIN if C(AC) <> E then skip
CAIGE if C(AC) >= E then skip
CAIG if C(AC) > E then skip
CAIA skip
Skipping instructions can be combined to achieve ANDing or ORing of logical
expressions, e.g. the sequence
cail t1, 1
caile t1, 1000
jrst bad
is equivalent to
if C(t1) < 1 or C(t1) > 1000 then go to BAD
Instruction Set Page 19
2.6. Fixed Point Arithmetic
In positive numbers bit 0 is zero. Bit 1 is most significant; bit 35 is least
significant. Negative numbers are the two's complement of positive numbers.
Results (of ADD, SUB or IMUL) outside the range -2^35 to 2^35-1 will set
overflow ( PC bit 0).
2.6.1. ADD
ADD C(AC) := C(AC) + C(E)
ADDI C(AC) := C(AC) + E
ADDM C(E) := C(AC) + C(E)
ADDB C(AC) := C(AC) + C(E); C(E) := C(AC)
2.6.2. SUB - Subtract
SUB C(AC) := C(AC) - C(E)
SUBI C(AC) := C(AC) - E
SUBM C(E) := C(AC) - C(E)
SUBB C(AC) := C(AC) - C(E); C(E) := C(AC)
2.6.3. IMUL - Single-Word Multiply
The IMUL instructions are for multiplying numbers where the product is
expected to be representable as one word.