diff --git a/CHANGELOG.md b/CHANGELOG.md
index 4452c3a..d1ea3c8 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,5 +1,9 @@
 # Change Log
 
+## v1.2.1
+
+- Fixed compatibility with non-semantics extension instructions. (#138)
+
 ## v1.2.0
 
 - Separated `spirq-` family of subcrates to [`spq`](https://github.com/PENGUINLIONG/spq-rs)
diff --git a/assets/issue138.frag.spv b/assets/issue138.frag.spv
new file mode 100644
index 0000000..6a561dd
Binary files /dev/null and b/assets/issue138.frag.spv differ
diff --git a/assets/issue138.json b/assets/issue138.json
new file mode 100644
index 0000000..acfe18b
--- /dev/null
+++ b/assets/issue138.json
@@ -0,0 +1,57 @@
+{
+  "EntryPoint": "main",
+  "ExecutionModel": "Fragment",
+  "ExecutionModes": [
+    {
+      "ExecutionMode": "OriginUpperLeft",
+      "Operands": []
+    }
+  ],
+  "Variables": {
+    "Inputs": [
+      {
+        "Name": "v_position",
+        "Location": 0,
+        "Component": 0,
+        "Type": "vec2<f32>"
+      }
+    ],
+    "Outputs": [
+      {
+        "Name": "outDepth",
+        "Location": 0,
+        "Component": 0,
+        "Type": "vec4<f32>"
+      }
+    ],
+    "Descriptors": [
+      {
+        "Name": "u_depthBufferTex",
+        "Set": 0,
+        "Binding": 1,
+        "DescriptorType": "CombinedImageSampler",
+        "Type": "CombinedImageSampler<SampledImage2D<f32,Color>>",
+        "Count": 1
+      },
+      {
+        "Name": null,
+        "Set": 0,
+        "Binding": 0,
+        "DescriptorType": "UniformBuffer",
+        "Type": {
+          "Kind": "Struct",
+          "Members": [
+            {
+              "Name": "u_stuff",
+              "Offset": 0,
+              "MemberType": "vec4<f32>"
+            }
+          ]
+        },
+        "Count": 1
+      }
+    ],
+    "PushConstants": [],
+    "SpecConstants": []
+  }
+}
diff --git a/spirq/examples/inspect/main.log b/spirq/examples/inspect/main.log
index 06a109e..471fea8 100644
--- a/spirq/examples/inspect/main.log
+++ b/spirq/examples/inspect/main.log
@@ -1,4 +1,4 @@
-collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"]
+collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"]
 entered function main
 found a store instruction
 found a load instruction
diff --git a/spirq/examples/walk/main.log b/spirq/examples/walk/main.log
index e200c29..256756f 100644
--- a/spirq/examples/walk/main.log
+++ b/spirq/examples/walk/main.log
@@ -1,4 +1,4 @@
-collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"]
+collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"]
 [main { exec_model: Fragment, name: "main", vars: [Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 }, Output { name: Some("color"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color1"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color2"), location: (loc=2, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("multiplier"), location: (loc=1, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }], exec_modes: [ExecutionMode { exec_mode: OriginUpperLeft, operands: [] }] }]
 Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 }
 - MemberVariableRouting { sym: [s, b], offset: 0, ty: Scalar(Integer { bits: 32, is_signed: false }) }
diff --git a/spirq/src/reflect.rs b/spirq/src/reflect.rs
index 1b0403c..2303e3b 100644
--- a/spirq/src/reflect.rs
+++ b/spirq/src/reflect.rs
@@ -1023,7 +1023,7 @@ impl<'a> ReflectIntermediate<'a> {
         //   b. Non-semantic instructions with OpExtInst.
         while let Some(instr) = instrs.peek() {
             let opcode = instr.op();
-            if let Op::Line | Op::NoLine = opcode {
+            if let Op::Line | Op::NoLine | Op::ExtInst | Op::Undef = opcode {
                 instrs.next()?;
                 continue;
             }