From 19b40e7c7f9a175f9d64ca8fc65ce401e3587d1c Mon Sep 17 00:00:00 2001 From: PENGUINLIONG Date: Mon, 8 Apr 2024 20:04:05 +0800 Subject: [PATCH] Ensure the non-semantic instructions and undefs are properly ignored (#139) * Ensure the non-semantic instructions and undefs are properly ignroed * Update change log * Added the shader as test case --- CHANGELOG.md | 4 +++ assets/issue138.frag.spv | Bin 0 -> 3340 bytes assets/issue138.json | 57 ++++++++++++++++++++++++++++++++ spirq/examples/inspect/main.log | 2 +- spirq/examples/walk/main.log | 2 +- spirq/src/reflect.rs | 2 +- 6 files changed, 64 insertions(+), 3 deletions(-) create mode 100644 assets/issue138.frag.spv create mode 100644 assets/issue138.json diff --git a/CHANGELOG.md b/CHANGELOG.md index 4452c3a..d1ea3c8 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,5 +1,9 @@ # Change Log +## v1.2.1 + +- Fixed compatibility with non-semantics extension instructions. (#138) + ## v1.2.0 - Separated `spirq-` family of subcrates to [`spq`](https://github.com/PENGUINLIONG/spq-rs) diff --git a/assets/issue138.frag.spv b/assets/issue138.frag.spv new file mode 100644 index 0000000000000000000000000000000000000000..6a561ddf97a3ff69d9014320c01e9873e49dfdc8 GIT binary patch literal 3340 zcmaKueRC646vi)ww2(&1i-3sYEk$jhO=)=%tw1T&f-O)eFN!#s(AJ zhf!FMUAGY?!A?C0Tao;e`WX{{5QW>htG4~R(RBUVntL^9-&0s^@zN!#PMUGEUwnOY zd$SfN&Dxc#sr_(j1%WYBX2Kj0KP>7tf>6wSBU%+5Q5<%G6&*_B8*%KCc%i#nkF&0= zexqG$cj68)2NY$@AP5t&RG$*}btlYU=9u(_1^cjfKWYv-ZmS>dIF)Q#7bgAP`Cg=4 zOG0_isGUxrKsy|Ces6@@=H5|Bqu+MPybFguvi5<<_qxt>g3#H;^32fn;~)yHW>%(4 zw(*yHY`olQ>_&rR_EiuzgRpIH*h^Jg9)v+F>UZsWCwkTB+=;?g(0-cPRtK$?>)Sud z)(+jy6+5WMiA>AoKbOnz7h9~ptra)Ay^iZIttqAHddcgo(i8Vai9WLv?KBdQr#OO; z9!qvu??rKdeR=Od?I1%VVU60997aJiJ&oCF3RiO&#Lnh>i)}Nq$?Ha9ccN}D5HcBD zY{MwAebf=%>nA0X>#-frb?T5yJoSmI=mwE{L_`k$DG}I+ z0Y5|y?BFc!=}hiBshxc$*{1$%CY&2JA--c~;`6P#ej%ONlULCXIHpC!e=0gBq6RqV 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"Binding": 1, + "DescriptorType": "CombinedImageSampler", + "Type": "CombinedImageSampler>", + "Count": 1 + }, + { + "Name": null, + "Set": 0, + "Binding": 0, + "DescriptorType": "UniformBuffer", + "Type": { + "Kind": "Struct", + "Members": [ + { + "Name": "u_stuff", + "Offset": 0, + "MemberType": "vec4" + } + ] + }, + "Count": 1 + } + ], + "PushConstants": [], + "SpecConstants": [] + } +} diff --git a/spirq/examples/inspect/main.log b/spirq/examples/inspect/main.log index 06a109e..471fea8 100644 --- a/spirq/examples/inspect/main.log +++ b/spirq/examples/inspect/main.log @@ -1,4 +1,4 @@ -collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"] +collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"] entered function main found a store instruction found a load instruction diff --git a/spirq/examples/walk/main.log b/spirq/examples/walk/main.log index e200c29..256756f 100644 --- a/spirq/examples/walk/main.log +++ b/spirq/examples/walk/main.log @@ -1,4 +1,4 @@ -collected spirvs: ["gallery.frag", "mesh-shader", "moon", "spirv-spec.frag"] +collected spirvs: ["gallery.frag", "mesh-shader", "moon", "my_shader.frag", "spirv-spec.frag"] [main { exec_model: Fragment, name: "main", vars: [Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 }, Output { name: Some("color"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color1"), location: (loc=0, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("color2"), location: (loc=2, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }, Input { name: Some("multiplier"), location: (loc=1, comp=0), ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }) }], exec_modes: [ExecutionMode { exec_mode: OriginUpperLeft, operands: [] }] }] Descriptor { name: None, desc_bind: (set=0, bind=0), desc_ty: UniformBuffer, ty: Struct(StructType { name: Some("blockName"), members: [StructMember { name: Some("s"), offset: Some(0), ty: Struct(StructType { name: Some("S"), members: [StructMember { name: Some("b"), offset: Some(0), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }, StructMember { name: Some("v"), offset: Some(16), ty: Array(ArrayType { element_ty: Vector(VectorType { scalar_ty: Float { bits: 32 }, nscalar: 4 }), nelement: Some(5), stride: Some(16) }), access_ty: ReadWrite }, StructMember { name: Some("i"), offset: Some(96), ty: Scalar(Integer { bits: 32, is_signed: true }), access_ty: ReadWrite }] }), access_ty: ReadWrite }, StructMember { name: Some("cond"), offset: Some(112), ty: Scalar(Integer { bits: 32, is_signed: false }), access_ty: ReadWrite }] }), nbind: 1 } - MemberVariableRouting { sym: [s, b], offset: 0, ty: Scalar(Integer { bits: 32, is_signed: false }) } diff --git a/spirq/src/reflect.rs b/spirq/src/reflect.rs index 1b0403c..2303e3b 100644 --- a/spirq/src/reflect.rs +++ b/spirq/src/reflect.rs @@ -1023,7 +1023,7 @@ impl<'a> ReflectIntermediate<'a> { // b. Non-semantic instructions with OpExtInst. while let Some(instr) = instrs.peek() { let opcode = instr.op(); - if let Op::Line | Op::NoLine = opcode { + if let Op::Line | Op::NoLine | Op::ExtInst | Op::Undef = opcode { instrs.next()?; continue; }