RaspberryPi + SPI driver #42
Replies: 22 comments 44 replies
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Funny you should mention this. I don't know if you are aware but Linuxcnc-RIO does what you are suggesting, https://github.com/multigcs/LinuxCNC-RIO Concerning the TSX0108s....I'd be hestiant to use them unless they are not driving a signal via a cable. From the Data sheets the capacitance of a cable can have an affect on the signal. I would tend to go with something like SN74CB3T3245, which is basically an 8 bit version of what mesa uses of there boards, they use a big 56 pin device that has 2 independent 12 bit ports. |
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Thank you for pointing out the The big IC on the 7C81 board are |
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Actually that may not have been the best advice. |
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Capabilities:
Either the RPi is powered by USB3 and the 5A-75B is powered from the GPIO header, or the 5A-75B is powered with 5V and the RPi is recieving power from the card. The card and RPi should never be powered simultaneously, as this will result in damage. |
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The board layout has finished 🎆 The final capabilities are:
Also started on making a manual on how to hook this up. ❓ Question, before ordering the board, should I add these components or not:
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Looks great Last 2 options I'd say yes. |
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I have a question about the E-STOP. |
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Work on the driver has been started in #48 . The boilerplate for the code is ready and it opens a connection to the SPI on the RPi. |
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i would prefer boards like the 'Colorlight i5', you don't have to re-solder anything, but a nice board ! where to get the bridges for the output drivers ? I would also like to build the board when it is ready and adapt it to the LinuxCNC-RIO project. |
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thanks for you great work |
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You can also connect the JTAG pins to the raspberry GPIO's for FPGA bitfile programming:
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New update:
Todo before I send teh board for first proto-type:
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First response from the card! Was very happy to see the magic number (
The maximum speed is 8 MHz (over jumper wires). Higher frequencies give bogus values. Possibly the FPGA cannot keep up, because the SPI_Bone is running on stock 35 MHz. This will be increased to 125 MHz as soon as I figure out setting the timing constraints on a clock domain. Another thing I'm working on is reading / writing multiple addresses at once. This will significantly reduce data overhead and allow for twice as fast data-transfers. |
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Also implemented the read and write function, feel free to test the branch #48 . What I noticed is that the communication does work, however the used library |
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Would you say this is more data per time than over ethernet? |
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Nice work! |
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Finished with documenting the various options for connecting to the FPGA: https://litex-cnc.readthedocs.io/en/48-support-spi/connections/index.html |
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Hi Pete, |
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I added three more board types to Litex-CNC to support the HUB75HAT:
The version number in these strings indicate the version of the underlying 5a-75b board. In these boards the IO of the HUB75 ports is mapped to the three I/O connectors on the HAT. In this way you don't have to know how the HAT is wired, you can reference directly to the ports on the HAT. For example:
These greatly simplifies the configuration of these boards, as one can use default config which belongs to the BOB. For example, when using the BOB4AXIS: {
"board_name": "EMCO5_SPI",
"board_type": "HUB75HAT v8.0",
"clock_frequency": 50000000,
"connections": {
"connection_type": "spi",
"mosi": "spi:0",
"miso": "spi:1",
"clk": "spi:2",
"cs_n": "spi:3"
},
"modules": [
{
"module_type": "gpio",
"instances": [
{"direction": "out", "pin":"j1:1", "name":"stepgen-enable"},
{"direction": "in", "pin":"j1:17", "name":"home-x"},
{"direction": "in", "pin":"j1:16", "name":"home-x-slave"},
{"direction": "in", "pin":"j1:15", "name":"home-y"},
{"direction": "in", "pin":"j1:14", "name":"home-z"},
{"direction": "in", "pin":"j1:10", "name":"drive-alarm-x"},
{"direction": "in", "pin":"j1:11", "name":"drive-alarm-x-slave"},
{"direction": "in", "pin":"j1:12", "name":"drive-alarm-y"},
{"direction": "in", "pin":"j1:13", "name":"drive-alarm-z"}
]
}, {
"module_type": "stepgen",
"instances": [
{
"name" : "x",
"pins" : {
"stepgen_type": "step_dir",
"step_pin": "j1:2",
"dir_pin" : "j1:6"
},
"soft_stop": true
}, {
"name" : "x-slave",
"pins" : {
"stepgen_type": "step_dir",
"step_pin": "j1:3",
"dir_pin" : "j1:7"
},
"soft_stop": true
}, {
"name" : "y",
"pins" : {
"stepgen_type": "step_dir",
"step_pin": "j1:4",
"dir_pin" : "j1:8"
},
"soft_stop": true
}, {
"name" : "z",
"pins" : {
"stepgen_type": "step_dir",
"step_pin": "j1:5",
"dir_pin" : "j1:9"
},
"soft_stop": true
}
]
}
]
}
When changing the BOB4AXIS to a different pin, only |
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Today the mailman had a present 😄; all the parts have arrived. The headers for the HUB75 port, JTAG, power have been soldered to test fit the HAT. And it fits! Also connected some wire for JTAG to the 40-pin connector to test whether the card would boot and whether the JTAG programming would work. Apparently the jumper wires do heavily affect the flashing of the board. With the HAT I can have higher frequencies and less errors while programming. Previously the board would fail to program even when you dared to look angry at it. Tomorrow I'm going to finish soldering the buffers and headers to the board and do some testing! When everything is put together, I'll post some pictures. Too bad my soldering skills look much less fancy then the renders.... |
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Now the protoype has been build and tested, the branch #48 will be closing this week (after adding the documentation) and version In the coming version I also will streamline the commands of
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The branch #48 has been merged. Thanks for the support in pulling this off! |
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Playing around to create a board driver which sends the commands over SPI from the RPi to the FPGA. Frees up the ethernet card and also possibly get some tighter timings.
Together with this I would like to develop an open-source version of the 7C81. Requirements for the board:
NOTE: the 5A-75B only has 48 + 6 available IO, of which 4 are used by the SPI interface (CS, MISO, MOSI and CLCK). To have all 17 pins free and non-shared, the SPI has to loose wires, which has an impact on the speed of the protocol
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