diff --git a/max78000_hal/src/committed_array.rs b/max78000_hal/src/committed_array.rs
index 2efb68b..5e13aea 100644
--- a/max78000_hal/src/committed_array.rs
+++ b/max78000_hal/src/committed_array.rs
@@ -68,6 +68,7 @@ impl CommittedArray {
         inner.data_len = data.len();
         inner.data[..data.len()].copy_from_slice(data);
 
+        // release synchronizes with the compare exchange acquire
         self.status.store(FULL, Ordering::Release);
 
         Ok(())
@@ -93,33 +94,11 @@ impl CommittedArray {
         out.copy_from_slice(&inner.data[..inner.data_len]);
         inner.data_len = 0;
 
+        // release synchronizes with the compare exchange acquire
         self.status.store(EMPTY, Ordering::Release);
 
         Ok(out)
     }
-
-    pub fn is_full(&self) -> bool {
-        self.status.load(Ordering::Relaxed) == FULL
-    }
-
-    pub fn is_empty(&self) -> bool {
-        self.status.load(Ordering::Relaxed) == EMPTY
-    }
-
-    pub fn peek_len(&self) -> Option<usize> {
-        self.status.compare_exchange(
-            FULL,
-            BUSY,
-            Ordering::Acquire,
-            Ordering::Relaxed
-        ).ok()?;
-
-        let len = unsafe { self.inner().data_len };
-
-        self.status.store(FULL, Ordering::Relaxed);
-
-        Some(len)
-    }
 }
 
 // safety: atomics synchronize access to unsafe cell
diff --git a/max78000_hal/src/uart.rs b/max78000_hal/src/uart.rs
index c0ca04c..b804a9b 100644
--- a/max78000_hal/src/uart.rs
+++ b/max78000_hal/src/uart.rs
@@ -191,7 +191,7 @@ impl Write for UartWriter {
     }
 }
 
-// Safety: having multiple shared references to uart is fine
+// FIXME: the uart is not actually sync
 unsafe impl Send for Uart {}
 unsafe impl Sync for Uart {}