From f280c480d8276b10595bc4736d440422a8510b68 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Mon, 18 Nov 2024 18:46:08 -0800 Subject: [PATCH 1/6] Filter to fix ports only, add safety nets too --- passes/cmds/reconstructbusses.cc | 89 ++++++++++++++++++++++++++++---- 1 file changed, 78 insertions(+), 11 deletions(-) diff --git a/passes/cmds/reconstructbusses.cc b/passes/cmds/reconstructbusses.cc index 637e80238ee..bc7af232037 100644 --- a/passes/cmds/reconstructbusses.cc +++ b/passes/cmds/reconstructbusses.cc @@ -54,6 +54,9 @@ struct ReconstructBusses : public ScriptPass { for (auto wire : module->wires()) { if (wire->name[0] == '$') // Skip internal wires continue; + if ((!wire->port_input) && (!wire->port_output)) { + continue; + } std::string prefix = wire->name.str(); if (prefix.empty()) @@ -100,6 +103,10 @@ struct ReconstructBusses : public ScriptPass { } } log("Found %ld groups\n", wire_groups.size()); + if (wire_groups.size() == 0) { + std::cout << "No busses to reconstruct. Done." << std::endl; + return; + } log("Creating busses\n"); log_flush(); std::map wirenames_to_remove; @@ -154,9 +161,22 @@ struct ReconstructBusses : public ScriptPass { if (lhsIndex >= 0) { // Create a new connection sigspec that matches the previous // bit index - RTLIL::SigSpec bit = RTLIL::SigSpec(itr_lhs->second, lhsIndex, 1); - new_sig.append(bit); - modified = true; + if (lhsIndex < itr_lhs->second->width) { + RTLIL::SigSpec bit = RTLIL::SigSpec(itr_lhs->second, lhsIndex, 1); + new_sig.append(bit); + modified = true; + } else { + log_warning("Attempting to reconnect cell %s, port: %s of size %d with out-of-bound index %d\n", + cell->name.c_str(), + conn.first.c_str(), + itr_lhs->second->width, lhsIndex); + for (RTLIL::Wire *w : wires_to_remove) { + if (strcmp(w->name.c_str(), itr_lhs->second->name.c_str()) == 0) { + wires_to_remove.erase(w); + break; + } + } + } } else { new_sig.append(chunk); modified = true; @@ -203,19 +223,61 @@ struct ReconstructBusses : public ScriptPass { std::map::iterator itr_rhs = wirenames_to_remove.find(conn_rhs_s); if (itr_lhs != wirenames_to_remove.end() || itr_rhs != wirenames_to_remove.end()) { if (lhsIndex >= 0) { + RTLIL::SigSpec lbit; // Create the LHS sigspec of the desired bit - RTLIL::SigSpec lbit = RTLIL::SigSpec(itr_lhs->second, lhsIndex, 1); + if (lhsIndex < itr_lhs->second->width) { + lbit = RTLIL::SigSpec(itr_lhs->second, lhsIndex, 1); + } else { + lbit = itr_lhs->second; + log_warning("Attempting to reconnect signal %s, of " + "size %d with out-of-bound index %d\n", + conn_lhs_s.c_str(), + itr_lhs->second->width, lhsIndex); + for (RTLIL::Wire *w : wires_to_remove) { + if (strcmp(w->name.c_str(),conn_lhs_s.c_str()) == 0) { + wires_to_remove.erase(w); + break; + } + } + } if (sub_rhs.size() > 1) { // If RHS has width > 1, replace with the bitblasted RHS // corresponding to the connected bit - RTLIL::SigSpec rhs_bit = RTLIL::SigSpec(sub_rhs.wire, lhsIndex, 1); - // And connect it - module->connect(lbit, rhs_bit); + if (lhsIndex < sub_rhs.wire->width) { + RTLIL::SigSpec rhs_bit = RTLIL::SigSpec(sub_rhs.wire, lhsIndex, 1); + // And connect it + module->connect(lbit, rhs_bit); + } else { + log_warning("Attempting to reconnect signal %s, of " + "size %d with out-of-bound index %d\n", + conn_rhs_s.c_str(), + sub_rhs.wire->width, lhsIndex); + for (RTLIL::Wire *w : wires_to_remove) { + if (strcmp(w->name.c_str(), conn_rhs_s.c_str()) == 0) { + wires_to_remove.erase(w); + break; + } + } + } } else { // Else, directly connect if (rhsIndex >= 0) { - RTLIL::SigSpec rbit = RTLIL::SigSpec(itr_rhs->second, rhsIndex, 1); - module->connect(lbit, rbit); + if (rhsIndex < itr_rhs->second->width) { + RTLIL::SigSpec rbit = + RTLIL::SigSpec(itr_rhs->second, rhsIndex, 1); + module->connect(lbit, rbit); + } else { + log_warning("Attempting to reconnect signal %s, of " + "size %d with out-of-bound index %d\n", + conn_lhs_s.c_str(), + itr_lhs->second->width, rhsIndex); + for (RTLIL::Wire *w : wires_to_remove) { + if (strcmp(w->name.c_str(), conn_lhs_s.c_str()) == 0) { + wires_to_remove.erase(w); + break; + } + } + } } else { module->connect(lbit, sub_rhs); } @@ -234,10 +296,15 @@ struct ReconstructBusses : public ScriptPass { } if (debug) run_pass("write_rtlil post_reconnect_top.rtlil"); - // Remove old wires + // Remove old bit blasted wires // Cleans the dangling connections too - log("Removing old wires\n"); + log("Removing bit blasted wires\n"); log_flush(); + if (debug) { + for (RTLIL::Wire* w : wires_to_remove) { + std::cout << " " << w->name.c_str() << std::endl; + } + } module->remove(wires_to_remove); // Update module port list log("Re-creating ports\n"); From b69145e959366644f4a6df466d026279f36e81be Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Mon, 18 Nov 2024 18:47:09 -0800 Subject: [PATCH 2/6] Indentation --- passes/cmds/stat.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/cmds/stat.cc b/passes/cmds/stat.cc index affd65e5fac..6e2f162de51 100644 --- a/passes/cmds/stat.cc +++ b/passes/cmds/stat.cc @@ -507,7 +507,7 @@ void read_libjson_cellarea(dict &cell_area, string libert if (f == NULL) log_cmd_error("Can't open input file `%s' for reading: %s\n", liberty_file.c_str(), strerror(errno)); - nlohmann::json data = nlohmann::json::parse(*f); + nlohmann::json data = nlohmann::json::parse(*f); nlohmann::json library = data["library"]; if (library.contains("groups")) { nlohmann::json groups = library["groups"]; From 501898df00413f8ee0341e8be931c2a08e1e1141 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Mon, 18 Nov 2024 18:55:26 -0800 Subject: [PATCH 3/6] Indentation --- passes/cmds/reconstructbusses.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/passes/cmds/reconstructbusses.cc b/passes/cmds/reconstructbusses.cc index bc7af232037..14fea761a23 100644 --- a/passes/cmds/reconstructbusses.cc +++ b/passes/cmds/reconstructbusses.cc @@ -302,8 +302,8 @@ struct ReconstructBusses : public ScriptPass { log_flush(); if (debug) { for (RTLIL::Wire* w : wires_to_remove) { - std::cout << " " << w->name.c_str() << std::endl; - } + std::cout << " " << w->name.c_str() << std::endl; + } } module->remove(wires_to_remove); // Update module port list From b2d18cb85d5827e8b797248d41f839a3c35dd960 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Mon, 18 Nov 2024 22:21:28 -0800 Subject: [PATCH 4/6] Fix for partially unconnected busses --- passes/cmds/reconstructbusses.cc | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/passes/cmds/reconstructbusses.cc b/passes/cmds/reconstructbusses.cc index 14fea761a23..3285fca4185 100644 --- a/passes/cmds/reconstructbusses.cc +++ b/passes/cmds/reconstructbusses.cc @@ -105,7 +105,7 @@ struct ReconstructBusses : public ScriptPass { log("Found %ld groups\n", wire_groups.size()); if (wire_groups.size() == 0) { std::cout << "No busses to reconstruct. Done." << std::endl; - return; + continue; } log("Creating busses\n"); log_flush(); @@ -166,10 +166,10 @@ struct ReconstructBusses : public ScriptPass { new_sig.append(bit); modified = true; } else { - log_warning("Attempting to reconnect cell %s, port: %s of size %d with out-of-bound index %d\n", - cell->name.c_str(), - conn.first.c_str(), - itr_lhs->second->width, lhsIndex); + log_warning("Attempting to reconnect cell %s, port: %s of size %d with " + "out-of-bound index %d\n", + cell->name.c_str(), conn.first.c_str(), itr_lhs->second->width, + lhsIndex); for (RTLIL::Wire *w : wires_to_remove) { if (strcmp(w->name.c_str(), itr_lhs->second->name.c_str()) == 0) { wires_to_remove.erase(w); @@ -269,10 +269,10 @@ struct ReconstructBusses : public ScriptPass { } else { log_warning("Attempting to reconnect signal %s, of " "size %d with out-of-bound index %d\n", - conn_lhs_s.c_str(), - itr_lhs->second->width, rhsIndex); + conn_rhs_s.c_str(), + itr_rhs->second->width, rhsIndex); for (RTLIL::Wire *w : wires_to_remove) { - if (strcmp(w->name.c_str(), conn_lhs_s.c_str()) == 0) { + if (strcmp(w->name.c_str(), conn_rhs_s.c_str()) == 0) { wires_to_remove.erase(w); break; } @@ -283,9 +283,13 @@ struct ReconstructBusses : public ScriptPass { } } } else { - // Else, directly connect - RTLIL::SigSpec bit = RTLIL::SigSpec(itr_lhs->second, 0, 1); - module->connect(bit, sub_rhs); + // LHS is not a bus + if (itr_rhs->second->width > 1) { + RTLIL::SigSpec rhs_bit = RTLIL::SigSpec(itr_rhs->second, 0, 1); + module->connect(sub_lhs, rhs_bit); + } else { + module->connect(sub_lhs, sub_rhs); + } } } } @@ -301,7 +305,7 @@ struct ReconstructBusses : public ScriptPass { log("Removing bit blasted wires\n"); log_flush(); if (debug) { - for (RTLIL::Wire* w : wires_to_remove) { + for (RTLIL::Wire *w : wires_to_remove) { std::cout << " " << w->name.c_str() << std::endl; } } From 123e038198e72becbc42e0a39d33aca978cc2ebd Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Tue, 19 Nov 2024 09:28:52 -0800 Subject: [PATCH 5/6] Print area always --- passes/cmds/stat.cc | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/passes/cmds/stat.cc b/passes/cmds/stat.cc index 6e2f162de51..cc73312cc86 100644 --- a/passes/cmds/stat.cc +++ b/passes/cmds/stat.cc @@ -355,9 +355,7 @@ struct statdata_t log(" \"num_memory_bits\": %u,\n", num_memory_bits); log(" \"num_processes\": %u,\n", num_processes); log(" \"num_cells\": %u,\n", num_cells); - if (area != 0) { - log(" \"area\": %f,\n", area); - } + log(" \"area\": %f,\n", area); log(" \"num_cells_by_type\": {\n"); bool first_line = true; for (auto &it : num_cells_by_type) From 93df7e095ffa6d340ecb22749e218fb18ac92c67 Mon Sep 17 00:00:00 2001 From: Alain Dargelas Date: Tue, 19 Nov 2024 09:35:07 -0800 Subject: [PATCH 6/6] Remove copy in submod --- passes/cmds/splitnetlist.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/passes/cmds/splitnetlist.cc b/passes/cmds/splitnetlist.cc index ef183605e40..312834d40f6 100644 --- a/passes/cmds/splitnetlist.cc +++ b/passes/cmds/splitnetlist.cc @@ -266,7 +266,7 @@ struct SplitNetlist : public ScriptPass { } // Execute the submod command - Pass::call(design, "submod -copy"); + Pass::call(design, "submod"); // Remove buffers introduced by bufnorm Pass::call(design, "techmap -D SIMLIB_NOCHECKS -map +/simlib.v t:$buf");