From ff4632b83eab1be9587f5b07df9f8e5a531ea510 Mon Sep 17 00:00:00 2001 From: Dolu1990 Date: Thu, 14 Nov 2024 11:20:59 +0100 Subject: [PATCH] Fix typo --- source/VexiiRiscv/Performance/index.rst | 46 ++++++++++++------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/source/VexiiRiscv/Performance/index.rst b/source/VexiiRiscv/Performance/index.rst index 8bf85fb..c090209 100644 --- a/source/VexiiRiscv/Performance/index.rst +++ b/source/VexiiRiscv/Performance/index.rst @@ -143,26 +143,26 @@ That particular path is the one going through the RS1 -> SrcPlugin -> IntAluPlug .. code-block:: -- Node((toplevel/execute_ctrl1_down_integer_RS1_lane0 : Bits[32 bits])) - - Node((toplevel/_zz_execute_ctrl1_down_integer_RS1_lane0_1 : Bits[32 bits])) - - Node((toplevel/execute_ctrl2_down_lane0_integer_WriteBackPlugin_logic_DATA_lane0 : Bits[32 bits])) - - Node((toplevel/execute_ctrl2_lane0_integer_WriteBackPlugin_logic_DATA_lane0_bypass : Bits[32 bits])) - - Node((toplevel/lane0_integer_WriteBackPlugin_logic_stages_0_muxed : Bits[32 bits])) - - Node((Bits | Bits)[32 bits]) - - Node((Bool ? Bits | Bits)[32 bits]) - - Node((toplevel/lane0_IntFormatPlugin_logic_stages_0_wb_payload : Bits[32 bits])) - - Node((toplevel/lane0_IntFormatPlugin_logic_stages_0_raw : Bits[32 bits])) - - Node((Bits | Bits)[32 bits]) - - Node((Bool ? Bits | Bits)[32 bits]) - - Node((toplevel/early0_IntAluPlugin_logic_wb_payload : Bits[32 bits])) - - Node((toplevel/execute_ctrl2_down_early0_IntAluPlugin_ALU_RESULT_lane0 : Bits[32 bits])) - - Node((SInt -> Bits of 32 bits)) - - Node((toplevel/early0_IntAluPlugin_logic_alu_result : SInt[32 bits])) - - Node((SInt | SInt)[32 bits]) - - Node((SInt | SInt)[32 bits]) - - Node((toplevel/early0_IntAluPlugin_logic_alu_bitwise : SInt[32 bits])) - - Node((SInt & SInt)[32 bits]) - - Node((toplevel/execute_ctrl2_down_early0_SrcPlugin_SRC1_lane0 : SInt[32 bits])) - - Node((toplevel/_zz_execute_ctrl2_down_early0_SrcPlugin_SRC1_lane0 : SInt[32 bits])) - - Node((Bits -> SInt of 32 bits)) - - Node((toplevel/execute_ctrl2_up_integer_RS1_lane0 : Bits[32 bits])) \ No newline at end of file + - Node((toplevel/execute_ctrl1_down_integer_RS1_lane0 : Bits[32 bits])) + - Node((toplevel/_zz_execute_ctrl1_down_integer_RS1_lane0_1 : Bits[32 bits])) + - Node((toplevel/execute_ctrl2_down_lane0_integer_WriteBackPlugin_logic_DATA_lane0 : Bits[32 bits])) + - Node((toplevel/execute_ctrl2_lane0_integer_WriteBackPlugin_logic_DATA_lane0_bypass : Bits[32 bits])) + - Node((toplevel/lane0_integer_WriteBackPlugin_logic_stages_0_muxed : Bits[32 bits])) + - Node((Bits | Bits)[32 bits]) + - Node((Bool ? Bits | Bits)[32 bits]) + - Node((toplevel/lane0_IntFormatPlugin_logic_stages_0_wb_payload : Bits[32 bits])) + - Node((toplevel/lane0_IntFormatPlugin_logic_stages_0_raw : Bits[32 bits])) + - Node((Bits | Bits)[32 bits]) + - Node((Bool ? Bits | Bits)[32 bits]) + - Node((toplevel/early0_IntAluPlugin_logic_wb_payload : Bits[32 bits])) + - Node((toplevel/execute_ctrl2_down_early0_IntAluPlugin_ALU_RESULT_lane0 : Bits[32 bits])) + - Node((SInt -> Bits of 32 bits)) + - Node((toplevel/early0_IntAluPlugin_logic_alu_result : SInt[32 bits])) + - Node((SInt | SInt)[32 bits]) + - Node((SInt | SInt)[32 bits]) + - Node((toplevel/early0_IntAluPlugin_logic_alu_bitwise : SInt[32 bits])) + - Node((SInt & SInt)[32 bits]) + - Node((toplevel/execute_ctrl2_down_early0_SrcPlugin_SRC1_lane0 : SInt[32 bits])) + - Node((toplevel/_zz_execute_ctrl2_down_early0_SrcPlugin_SRC1_lane0 : SInt[32 bits])) + - Node((Bits -> SInt of 32 bits)) + - Node((toplevel/execute_ctrl2_up_integer_RS1_lane0 : Bits[32 bits])) \ No newline at end of file