From 76aa1daf173ba40e0d13b3373c23ad187e9569b3 Mon Sep 17 00:00:00 2001 From: TinyTapeoutBot <139130078+TinyTapeoutBot@users.noreply.github.com> Date: Mon, 26 Feb 2024 13:18:23 +0200 Subject: [PATCH] feat: update project tt_um_faramire_gate_guesser from faramire/tt06-gate-guesser Commit: d190bd6f7714877805fd3ec5e17d947ec1a4452c Workflow: https://github.com/faramire/tt06-gate-guesser/actions/runs/8047696503 --- .../commit_id.json | 6 +++--- .../tt_um_faramire_gate_guesser/docs/info.md | 4 ++-- .../stats/metrics.csv | 2 +- .../tt_um_faramire_gate_guesser.gds | Bin 473506 -> 473506 bytes 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/projects/tt_um_faramire_gate_guesser/commit_id.json b/projects/tt_um_faramire_gate_guesser/commit_id.json index c6f4cde3..cb638142 100644 --- a/projects/tt_um_faramire_gate_guesser/commit_id.json +++ b/projects/tt_um_faramire_gate_guesser/commit_id.json @@ -1,8 +1,8 @@ { - "app": "Tiny Tapeout tt06 f6fae279", + "app": "Tiny Tapeout tt06 18c67d9a", "repo": "https://github.com/faramire/tt06-gate-guesser", - "commit": "1c9d0ae40909c091103d04937a6f48944b86d2c7", - "workflow_url": "https://github.com/faramire/tt06-gate-guesser/actions/runs/8005135170", + "commit": "d190bd6f7714877805fd3ec5e17d947ec1a4452c", + "workflow_url": "https://github.com/faramire/tt06-gate-guesser/actions/runs/8047696503", "sort_id": 1708608240391, "openlane_version": "OpenLane f691c8c0712ca6c6645e3fd548985b3cbcf08c78", "pdk_version": "open_pdks e0f692f46654d6c7c99fc70a0c94a080dab53571" diff --git a/projects/tt_um_faramire_gate_guesser/docs/info.md b/projects/tt_um_faramire_gate_guesser/docs/info.md index c53d3bfa..a9bcc7ca 100644 --- a/projects/tt_um_faramire_gate_guesser/docs/info.md +++ b/projects/tt_um_faramire_gate_guesser/docs/info.md @@ -9,12 +9,12 @@ You can also include images in this folder and reference them in the markdown. E ## How it works -The input pins are connected to a set of different logic gates, which lead to the outputs. Only one logic layer of combinatoric logic. +The input and inout (used as inpputs) pins are connected to 8 different logic gates, which lead to the outputs. Only one logic layer of combinatoric logic. Each input is hooked up to only one gate. ## How to test -No clock, enable or reset is used. As this is just one layer of combinatoric logic, you can simply check against a precalculated truth table. +No clock, enable or reset is used. As this is just one layer of combinatoric logic, you can simply check against a precalculated truth table. To play, flip the inputs and observe the output until you recognise what it must be. ## External hardware diff --git a/projects/tt_um_faramire_gate_guesser/stats/metrics.csv b/projects/tt_um_faramire_gate_guesser/stats/metrics.csv index 01b472ce..8986be6b 100644 --- a/projects/tt_um_faramire_gate_guesser/stats/metrics.csv +++ b/projects/tt_um_faramire_gate_guesser/stats/metrics.csv @@ -1,2 +1,2 @@ design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Final_Util,Peak_Memory_Usage_MB,synth_cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,pin_antenna_violations,net_antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,DecapCells,WelltapCells,DiodeCells,FillCells,NonPhysCells,TotalCells,CoreArea_um^2,power_slowest_internal_uW,power_slowest_switching_uW,power_slowest_leakage_uW,power_typical_internal_uW,power_typical_switching_uW,power_typical_leakage_uW,power_fastest_internal_uW,power_fastest_switching_uW,power_fastest_leakage_uW,critical_path_ns,suggested_clock_period,suggested_clock_frequency,CLOCK_PERIOD,FP_ASPECT_RATIO,FP_CORE_UTIL,FP_PDN_HPITCH,FP_PDN_VPITCH,GRT_ADJUSTMENT,GRT_REPAIR_ANTENNAS,MAX_FANOUT_CONSTRAINT,PL_TARGET_DENSITY,RUN_HEURISTIC_DIODE_INSERTION,STD_CELL_LIBRARY,SYNTH_STRATEGY -/work/src,tt_um_faramire_gate_guesser,wokwi,flow completed,0h1m9s0ms,0h0m54s0ms,4789.826853328818,0.01795472,2394.913426664409,0.89,86.2312,482.13,27,0,0,0,0,0,0,0,0,0,0,-1,-1,761,211,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,639107.0,0.0,1.05,0.32,1.35,1.5,-1,9,44,8,43,0,0,0,9,1,0,2,1,1,1,1,0,16,8,2,1226,225,0,243,43,1737,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0 +/work/src,tt_um_faramire_gate_guesser,wokwi,flow completed,0h1m9s0ms,0h0m54s0ms,4789.826853328818,0.01795472,2394.913426664409,0.89,86.2312,482.26,27,0,0,0,0,0,0,0,0,0,0,-1,-1,761,211,0.0,-1,-1,-1,-1,0.0,-1,-1,-1,-1,639107.0,0.0,1.05,0.32,1.35,1.5,-1,9,44,8,43,0,0,0,9,1,0,2,1,1,1,1,0,16,8,2,1226,225,0,243,43,1737,16493.3184,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,21.0,47.61904761904762,20,1,50,26.520,38.870,0.3,1,10,0.6,0,sky130_fd_sc_hd,AREA 0 diff --git a/projects/tt_um_faramire_gate_guesser/tt_um_faramire_gate_guesser.gds b/projects/tt_um_faramire_gate_guesser/tt_um_faramire_gate_guesser.gds index d211607e10c59da2ab0819ff7701b6296c9fa825..ee7d17b3e86976a6488aa6c4ea34779ac23344e1 100644 GIT binary patch delta 487 zcmZ4VS!U5^nF-QdQVd)SmJGTK3QW@*H!#agbku?i$+1l@oXse+apEFAcBrz+3nWE1 z`}2Eo!2~uhko?O6*P+BVed8QPh0Vw1GT2}$Kw75rOE7V44puz`*9Q?j#K^JP(m;s^ zNv+i88k=NRxQReF9Gu21vzgWDnjnhcaiAb$$SxF@P4?$!+k7`^2`^lw6x;OqOPD1# zFD{7SN3uk8`v0ZO9Gm4E-k2dPwOs~Os=GZ(07dEfwLqn-kN<(Ya`U