diff --git a/mag/dacswitch.mag b/mag/dacswitch.mag
new file mode 100644
index 0000000..da9a8ad
--- /dev/null
+++ b/mag/dacswitch.mag
@@ -0,0 +1,84 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1731192507
+<< error_s >>
+rect 7054 905 7064 3499
+rect 7454 931 7464 3525
+rect 2572 -973 2924 -652
+rect 1656 -1417 2008 -1096
+rect 2678 -1187 2730 -1057
+rect 2760 -1187 2812 -1057
+rect 3832 -1185 4184 -864
+rect 4832 -1261 5184 -940
+rect 3938 -1399 3990 -1269
+rect 4020 -1399 4072 -1269
+rect 4938 -1475 4990 -1345
+rect 5020 -1475 5072 -1345
+rect 1762 -1631 1814 -1501
+rect 1844 -1631 1896 -1501
+rect 2378 -2103 2730 -1782
+rect 2934 -1899 3286 -1578
+rect 2999 -2113 3051 -1983
+rect 3081 -2113 3135 -1983
+rect 3165 -2113 3217 -1983
+rect 4026 -2011 4378 -1690
+rect 2484 -2317 2536 -2187
+rect 2566 -2317 2618 -2187
+rect 4091 -2225 4143 -2095
+rect 4173 -2225 4227 -2095
+rect 4257 -2225 4309 -2095
+<< metal1 >>
+rect 0 0 200 200
+rect 0 -400 200 -200
+rect 0 -800 200 -600
+rect 0 -1200 200 -1000
+rect 0 -1600 200 -1400
+use tt_asw_3v3 x1
+timestamp 1731192507
+transform 1 0 3572 0 1 855
+box 0 -757 10957 4352
+use tt_asw_3v3 x2
+timestamp 1731192507
+transform 1 0 7264 0 1 881
+box 0 -757 10957 4352
+use sky130_fd_sc_hd__inv_1 x3 ~/pdk/sky130A/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1704896540
+transform 1 0 1694 0 1 -1678
+box -38 -48 314 592
+use sky130_fd_sc_hd__nor2_1 x4 ~/pdk/sky130A/libs.ref/sky130_fd_sc_hd/mag
+timestamp 1704896540
+transform 1 0 2972 0 1 -2160
+box -38 -48 314 592
+use sky130_fd_sc_hd__inv_1 x5
+timestamp 1704896540
+transform 1 0 3870 0 1 -1446
+box -38 -48 314 592
+use sky130_fd_sc_hd__nor2_1 x6
+timestamp 1704896540
+transform 1 0 4064 0 1 -2272
+box -38 -48 314 592
+use sky130_fd_sc_hd__inv_1 x7
+timestamp 1704896540
+transform 1 0 4870 0 1 -1522
+box -38 -48 314 592
+use sky130_fd_sc_hd__inv_1 x8
+timestamp 1704896540
+transform 1 0 2610 0 1 -1234
+box -38 -48 314 592
+use sky130_fd_sc_hd__inv_1 x9
+timestamp 1704896540
+transform 1 0 2416 0 1 -2364
+box -38 -48 314 592
+<< labels >>
+flabel metal1 0 0 200 200 0 FreeSans 256 0 0 0 GND
+port 0 nsew
+flabel metal1 0 -1200 200 -1000 0 FreeSans 256 0 0 0 VDD
+port 3 nsew
+flabel metal1 0 -1600 200 -1400 0 FreeSans 256 0 0 0 VOUT
+port 4 nsew
+flabel metal1 0 -400 200 -200 0 FreeSans 256 0 0 0 VDDA
+port 1 nsew
+flabel metal1 0 -800 200 -600 0 FreeSans 256 0 0 0 Cin
+port 2 nsew
+<< end >>
diff --git a/mag/magic.desktop b/mag/magic.desktop
new file mode 100755
index 0000000..b6eafe5
--- /dev/null
+++ b/mag/magic.desktop
@@ -0,0 +1,7 @@
+[Desktop Entry]
+Type=Application
+Name=Magic (Sky130A)
+Icon=magic
+Exec=magic -rcfile /home/ttuser/pdk/sky130A/libs.tech/magic/sky130A.magicrc
+Comment=Magic
+Categories=Development;
diff --git a/mag/magicx b/mag/magicx
new file mode 100755
index 0000000..340b27c
--- /dev/null
+++ b/mag/magicx
@@ -0,0 +1,2 @@
+#!/bin/bash
+magic -rcfile /home/ttuser/pdk/sky130A/libs.tech/magic/sky130A.magicrc
diff --git a/mag/sky130_fd_pr__nfet_g5v0d10v5_SFRJCA.mag b/mag/sky130_fd_pr__nfet_g5v0d10v5_SFRJCA.mag
new file mode 100644
index 0000000..65944b5
--- /dev/null
+++ b/mag/sky130_fd_pr__nfet_g5v0d10v5_SFRJCA.mag
@@ -0,0 +1,506 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1716235358
+<< pwell >>
+rect -1147 -758 1147 758
+<< mvnmos >>
+rect -919 -500 -819 500
+rect -761 -500 -661 500
+rect -603 -500 -503 500
+rect -445 -500 -345 500
+rect -287 -500 -187 500
+rect -129 -500 -29 500
+rect 29 -500 129 500
+rect 187 -500 287 500
+rect 345 -500 445 500
+rect 503 -500 603 500
+rect 661 -500 761 500
+rect 819 -500 919 500
+<< mvndiff >>
+rect -977 488 -919 500
+rect -977 -488 -965 488
+rect -931 -488 -919 488
+rect -977 -500 -919 -488
+rect -819 488 -761 500
+rect -819 -488 -807 488
+rect -773 -488 -761 488
+rect -819 -500 -761 -488
+rect -661 488 -603 500
+rect -661 -488 -649 488
+rect -615 -488 -603 488
+rect -661 -500 -603 -488
+rect -503 488 -445 500
+rect -503 -488 -491 488
+rect -457 -488 -445 488
+rect -503 -500 -445 -488
+rect -345 488 -287 500
+rect -345 -488 -333 488
+rect -299 -488 -287 488
+rect -345 -500 -287 -488
+rect -187 488 -129 500
+rect -187 -488 -175 488
+rect -141 -488 -129 488
+rect -187 -500 -129 -488
+rect -29 488 29 500
+rect -29 -488 -17 488
+rect 17 -488 29 488
+rect -29 -500 29 -488
+rect 129 488 187 500
+rect 129 -488 141 488
+rect 175 -488 187 488
+rect 129 -500 187 -488
+rect 287 488 345 500
+rect 287 -488 299 488
+rect 333 -488 345 488
+rect 287 -500 345 -488
+rect 445 488 503 500
+rect 445 -488 457 488
+rect 491 -488 503 488
+rect 445 -500 503 -488
+rect 603 488 661 500
+rect 603 -488 615 488
+rect 649 -488 661 488
+rect 603 -500 661 -488
+rect 761 488 819 500
+rect 761 -488 773 488
+rect 807 -488 819 488
+rect 761 -500 819 -488
+rect 919 488 977 500
+rect 919 -488 931 488
+rect 965 -488 977 488
+rect 919 -500 977 -488
+<< mvndiffc >>
+rect -965 -488 -931 488
+rect -807 -488 -773 488
+rect -649 -488 -615 488
+rect -491 -488 -457 488
+rect -333 -488 -299 488
+rect -175 -488 -141 488
+rect -17 -488 17 488
+rect 141 -488 175 488
+rect 299 -488 333 488
+rect 457 -488 491 488
+rect 615 -488 649 488
+rect 773 -488 807 488
+rect 931 -488 965 488
+<< mvpsubdiff >>
+rect -1111 710 1111 722
+rect -1111 676 -1003 710
+rect 1003 676 1111 710
+rect -1111 664 1111 676
+rect -1111 614 -1053 664
+rect -1111 -614 -1099 614
+rect -1065 -614 -1053 614
+rect 1053 614 1111 664
+rect -1111 -664 -1053 -614
+rect 1053 -614 1065 614
+rect 1099 -614 1111 614
+rect 1053 -664 1111 -614
+rect -1111 -676 1111 -664
+rect -1111 -710 -1003 -676
+rect 1003 -710 1111 -676
+rect -1111 -722 1111 -710
+<< mvpsubdiffcont >>
+rect -1003 676 1003 710
+rect -1099 -614 -1065 614
+rect 1065 -614 1099 614
+rect -1003 -710 1003 -676
+<< poly >>
+rect -919 572 -819 588
+rect -919 538 -903 572
+rect -835 538 -819 572
+rect -919 500 -819 538
+rect -761 572 -661 588
+rect -761 538 -745 572
+rect -677 538 -661 572
+rect -761 500 -661 538
+rect -603 572 -503 588
+rect -603 538 -587 572
+rect -519 538 -503 572
+rect -603 500 -503 538
+rect -445 572 -345 588
+rect -445 538 -429 572
+rect -361 538 -345 572
+rect -445 500 -345 538
+rect -287 572 -187 588
+rect -287 538 -271 572
+rect -203 538 -187 572
+rect -287 500 -187 538
+rect -129 572 -29 588
+rect -129 538 -113 572
+rect -45 538 -29 572
+rect -129 500 -29 538
+rect 29 572 129 588
+rect 29 538 45 572
+rect 113 538 129 572
+rect 29 500 129 538
+rect 187 572 287 588
+rect 187 538 203 572
+rect 271 538 287 572
+rect 187 500 287 538
+rect 345 572 445 588
+rect 345 538 361 572
+rect 429 538 445 572
+rect 345 500 445 538
+rect 503 572 603 588
+rect 503 538 519 572
+rect 587 538 603 572
+rect 503 500 603 538
+rect 661 572 761 588
+rect 661 538 677 572
+rect 745 538 761 572
+rect 661 500 761 538
+rect 819 572 919 588
+rect 819 538 835 572
+rect 903 538 919 572
+rect 819 500 919 538
+rect -919 -538 -819 -500
+rect -919 -572 -903 -538
+rect -835 -572 -819 -538
+rect -919 -588 -819 -572
+rect -761 -538 -661 -500
+rect -761 -572 -745 -538
+rect -677 -572 -661 -538
+rect -761 -588 -661 -572
+rect -603 -538 -503 -500
+rect -603 -572 -587 -538
+rect -519 -572 -503 -538
+rect -603 -588 -503 -572
+rect -445 -538 -345 -500
+rect -445 -572 -429 -538
+rect -361 -572 -345 -538
+rect -445 -588 -345 -572
+rect -287 -538 -187 -500
+rect -287 -572 -271 -538
+rect -203 -572 -187 -538
+rect -287 -588 -187 -572
+rect -129 -538 -29 -500
+rect -129 -572 -113 -538
+rect -45 -572 -29 -538
+rect -129 -588 -29 -572
+rect 29 -538 129 -500
+rect 29 -572 45 -538
+rect 113 -572 129 -538
+rect 29 -588 129 -572
+rect 187 -538 287 -500
+rect 187 -572 203 -538
+rect 271 -572 287 -538
+rect 187 -588 287 -572
+rect 345 -538 445 -500
+rect 345 -572 361 -538
+rect 429 -572 445 -538
+rect 345 -588 445 -572
+rect 503 -538 603 -500
+rect 503 -572 519 -538
+rect 587 -572 603 -538
+rect 503 -588 603 -572
+rect 661 -538 761 -500
+rect 661 -572 677 -538
+rect 745 -572 761 -538
+rect 661 -588 761 -572
+rect 819 -538 919 -500
+rect 819 -572 835 -538
+rect 903 -572 919 -538
+rect 819 -588 919 -572
+<< polycont >>
+rect -903 538 -835 572
+rect -745 538 -677 572
+rect -587 538 -519 572
+rect -429 538 -361 572
+rect -271 538 -203 572
+rect -113 538 -45 572
+rect 45 538 113 572
+rect 203 538 271 572
+rect 361 538 429 572
+rect 519 538 587 572
+rect 677 538 745 572
+rect 835 538 903 572
+rect -903 -572 -835 -538
+rect -745 -572 -677 -538
+rect -587 -572 -519 -538
+rect -429 -572 -361 -538
+rect -271 -572 -203 -538
+rect -113 -572 -45 -538
+rect 45 -572 113 -538
+rect 203 -572 271 -538
+rect 361 -572 429 -538
+rect 519 -572 587 -538
+rect 677 -572 745 -538
+rect 835 -572 903 -538
+<< locali >>
+rect -1099 676 -1003 710
+rect 1003 676 1099 710
+rect -1099 614 -1065 676
+rect 1065 614 1099 676
+rect -919 538 -903 572
+rect -835 538 -819 572
+rect -761 538 -745 572
+rect -677 538 -661 572
+rect -603 538 -587 572
+rect -519 538 -503 572
+rect -445 538 -429 572
+rect -361 538 -345 572
+rect -287 538 -271 572
+rect -203 538 -187 572
+rect -129 538 -113 572
+rect -45 538 -29 572
+rect 29 538 45 572
+rect 113 538 129 572
+rect 187 538 203 572
+rect 271 538 287 572
+rect 345 538 361 572
+rect 429 538 445 572
+rect 503 538 519 572
+rect 587 538 603 572
+rect 661 538 677 572
+rect 745 538 761 572
+rect 819 538 835 572
+rect 903 538 919 572
+rect -965 488 -931 504
+rect -965 -504 -931 -488
+rect -807 488 -773 504
+rect -807 -504 -773 -488
+rect -649 488 -615 504
+rect -649 -504 -615 -488
+rect -491 488 -457 504
+rect -491 -504 -457 -488
+rect -333 488 -299 504
+rect -333 -504 -299 -488
+rect -175 488 -141 504
+rect -175 -504 -141 -488
+rect -17 488 17 504
+rect -17 -504 17 -488
+rect 141 488 175 504
+rect 141 -504 175 -488
+rect 299 488 333 504
+rect 299 -504 333 -488
+rect 457 488 491 504
+rect 457 -504 491 -488
+rect 615 488 649 504
+rect 615 -504 649 -488
+rect 773 488 807 504
+rect 773 -504 807 -488
+rect 931 488 965 504
+rect 931 -504 965 -488
+rect -919 -572 -903 -538
+rect -835 -572 -819 -538
+rect -761 -572 -745 -538
+rect -677 -572 -661 -538
+rect -603 -572 -587 -538
+rect -519 -572 -503 -538
+rect -445 -572 -429 -538
+rect -361 -572 -345 -538
+rect -287 -572 -271 -538
+rect -203 -572 -187 -538
+rect -129 -572 -113 -538
+rect -45 -572 -29 -538
+rect 29 -572 45 -538
+rect 113 -572 129 -538
+rect 187 -572 203 -538
+rect 271 -572 287 -538
+rect 345 -572 361 -538
+rect 429 -572 445 -538
+rect 503 -572 519 -538
+rect 587 -572 603 -538
+rect 661 -572 677 -538
+rect 745 -572 761 -538
+rect 819 -572 835 -538
+rect 903 -572 919 -538
+rect -1099 -676 -1065 -614
+rect 1065 -676 1099 -614
+rect -1099 -710 -1003 -676
+rect 1003 -710 1099 -676
+<< viali >>
+rect -903 538 -835 572
+rect -745 538 -677 572
+rect -587 538 -519 572
+rect -429 538 -361 572
+rect -271 538 -203 572
+rect -113 538 -45 572
+rect 45 538 113 572
+rect 203 538 271 572
+rect 361 538 429 572
+rect 519 538 587 572
+rect 677 538 745 572
+rect 835 538 903 572
+rect -965 -488 -931 488
+rect -807 -488 -773 488
+rect -649 -488 -615 488
+rect -491 -488 -457 488
+rect -333 -488 -299 488
+rect -175 -488 -141 488
+rect -17 -488 17 488
+rect 141 -488 175 488
+rect 299 -488 333 488
+rect 457 -488 491 488
+rect 615 -488 649 488
+rect 773 -488 807 488
+rect 931 -488 965 488
+rect -903 -572 -835 -538
+rect -745 -572 -677 -538
+rect -587 -572 -519 -538
+rect -429 -572 -361 -538
+rect -271 -572 -203 -538
+rect -113 -572 -45 -538
+rect 45 -572 113 -538
+rect 203 -572 271 -538
+rect 361 -572 429 -538
+rect 519 -572 587 -538
+rect 677 -572 745 -538
+rect 835 -572 903 -538
+<< metal1 >>
+rect -915 572 -823 578
+rect -915 538 -903 572
+rect -835 538 -823 572
+rect -915 532 -823 538
+rect -757 572 -665 578
+rect -757 538 -745 572
+rect -677 538 -665 572
+rect -757 532 -665 538
+rect -599 572 -507 578
+rect -599 538 -587 572
+rect -519 538 -507 572
+rect -599 532 -507 538
+rect -441 572 -349 578
+rect -441 538 -429 572
+rect -361 538 -349 572
+rect -441 532 -349 538
+rect -283 572 -191 578
+rect -283 538 -271 572
+rect -203 538 -191 572
+rect -283 532 -191 538
+rect -125 572 -33 578
+rect -125 538 -113 572
+rect -45 538 -33 572
+rect -125 532 -33 538
+rect 33 572 125 578
+rect 33 538 45 572
+rect 113 538 125 572
+rect 33 532 125 538
+rect 191 572 283 578
+rect 191 538 203 572
+rect 271 538 283 572
+rect 191 532 283 538
+rect 349 572 441 578
+rect 349 538 361 572
+rect 429 538 441 572
+rect 349 532 441 538
+rect 507 572 599 578
+rect 507 538 519 572
+rect 587 538 599 572
+rect 507 532 599 538
+rect 665 572 757 578
+rect 665 538 677 572
+rect 745 538 757 572
+rect 665 532 757 538
+rect 823 572 915 578
+rect 823 538 835 572
+rect 903 538 915 572
+rect 823 532 915 538
+rect -971 488 -925 500
+rect -971 -488 -965 488
+rect -931 -488 -925 488
+rect -971 -500 -925 -488
+rect -813 488 -767 500
+rect -813 -488 -807 488
+rect -773 -488 -767 488
+rect -813 -500 -767 -488
+rect -655 488 -609 500
+rect -655 -488 -649 488
+rect -615 -488 -609 488
+rect -655 -500 -609 -488
+rect -497 488 -451 500
+rect -497 -488 -491 488
+rect -457 -488 -451 488
+rect -497 -500 -451 -488
+rect -339 488 -293 500
+rect -339 -488 -333 488
+rect -299 -488 -293 488
+rect -339 -500 -293 -488
+rect -181 488 -135 500
+rect -181 -488 -175 488
+rect -141 -488 -135 488
+rect -181 -500 -135 -488
+rect -23 488 23 500
+rect -23 -488 -17 488
+rect 17 -488 23 488
+rect -23 -500 23 -488
+rect 135 488 181 500
+rect 135 -488 141 488
+rect 175 -488 181 488
+rect 135 -500 181 -488
+rect 293 488 339 500
+rect 293 -488 299 488
+rect 333 -488 339 488
+rect 293 -500 339 -488
+rect 451 488 497 500
+rect 451 -488 457 488
+rect 491 -488 497 488
+rect 451 -500 497 -488
+rect 609 488 655 500
+rect 609 -488 615 488
+rect 649 -488 655 488
+rect 609 -500 655 -488
+rect 767 488 813 500
+rect 767 -488 773 488
+rect 807 -488 813 488
+rect 767 -500 813 -488
+rect 925 488 971 500
+rect 925 -488 931 488
+rect 965 -488 971 488
+rect 925 -500 971 -488
+rect -915 -538 -823 -532
+rect -915 -572 -903 -538
+rect -835 -572 -823 -538
+rect -915 -578 -823 -572
+rect -757 -538 -665 -532
+rect -757 -572 -745 -538
+rect -677 -572 -665 -538
+rect -757 -578 -665 -572
+rect -599 -538 -507 -532
+rect -599 -572 -587 -538
+rect -519 -572 -507 -538
+rect -599 -578 -507 -572
+rect -441 -538 -349 -532
+rect -441 -572 -429 -538
+rect -361 -572 -349 -538
+rect -441 -578 -349 -572
+rect -283 -538 -191 -532
+rect -283 -572 -271 -538
+rect -203 -572 -191 -538
+rect -283 -578 -191 -572
+rect -125 -538 -33 -532
+rect -125 -572 -113 -538
+rect -45 -572 -33 -538
+rect -125 -578 -33 -572
+rect 33 -538 125 -532
+rect 33 -572 45 -538
+rect 113 -572 125 -538
+rect 33 -578 125 -572
+rect 191 -538 283 -532
+rect 191 -572 203 -538
+rect 271 -572 283 -538
+rect 191 -578 283 -572
+rect 349 -538 441 -532
+rect 349 -572 361 -538
+rect 429 -572 441 -538
+rect 349 -578 441 -572
+rect 507 -538 599 -532
+rect 507 -572 519 -538
+rect 587 -572 599 -538
+rect 507 -578 599 -572
+rect 665 -538 757 -532
+rect 665 -572 677 -538
+rect 745 -572 757 -538
+rect 665 -578 757 -572
+rect 823 -538 915 -532
+rect 823 -572 835 -538
+rect 903 -572 915 -538
+rect 823 -578 915 -572
+<< properties >>
+string FIXED_BBOX -1082 -693 1082 693
+string gencell sky130_fd_pr__nfet_g5v0d10v5
+string library sky130
+string parameters w 5 l 0.5 m 1 nf 12 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__nfet_01v8 sky130_fd_pr__nfet_01v8_lvt sky130_fd_bs_flash__special_sonosfet_star sky130_fd_pr__nfet_g5v0d10v5 sky130_fd_pr__nfet_05v0_nvt sky130_fd_pr__nfet_03v3_nvt} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+<< end >>
diff --git a/mag/sky130_fd_pr__pfet_g5v0d10v5_CYUY46.mag b/mag/sky130_fd_pr__pfet_g5v0d10v5_CYUY46.mag
new file mode 100644
index 0000000..bc508cc
--- /dev/null
+++ b/mag/sky130_fd_pr__pfet_g5v0d10v5_CYUY46.mag
@@ -0,0 +1,728 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1716240358
+<< nwell >>
+rect -1651 -1297 1651 1297
+<< mvpmos >>
+rect -1393 -1000 -1293 1000
+rect -1235 -1000 -1135 1000
+rect -1077 -1000 -977 1000
+rect -919 -1000 -819 1000
+rect -761 -1000 -661 1000
+rect -603 -1000 -503 1000
+rect -445 -1000 -345 1000
+rect -287 -1000 -187 1000
+rect -129 -1000 -29 1000
+rect 29 -1000 129 1000
+rect 187 -1000 287 1000
+rect 345 -1000 445 1000
+rect 503 -1000 603 1000
+rect 661 -1000 761 1000
+rect 819 -1000 919 1000
+rect 977 -1000 1077 1000
+rect 1135 -1000 1235 1000
+rect 1293 -1000 1393 1000
+<< mvpdiff >>
+rect -1451 988 -1393 1000
+rect -1451 -988 -1439 988
+rect -1405 -988 -1393 988
+rect -1451 -1000 -1393 -988
+rect -1293 988 -1235 1000
+rect -1293 -988 -1281 988
+rect -1247 -988 -1235 988
+rect -1293 -1000 -1235 -988
+rect -1135 988 -1077 1000
+rect -1135 -988 -1123 988
+rect -1089 -988 -1077 988
+rect -1135 -1000 -1077 -988
+rect -977 988 -919 1000
+rect -977 -988 -965 988
+rect -931 -988 -919 988
+rect -977 -1000 -919 -988
+rect -819 988 -761 1000
+rect -819 -988 -807 988
+rect -773 -988 -761 988
+rect -819 -1000 -761 -988
+rect -661 988 -603 1000
+rect -661 -988 -649 988
+rect -615 -988 -603 988
+rect -661 -1000 -603 -988
+rect -503 988 -445 1000
+rect -503 -988 -491 988
+rect -457 -988 -445 988
+rect -503 -1000 -445 -988
+rect -345 988 -287 1000
+rect -345 -988 -333 988
+rect -299 -988 -287 988
+rect -345 -1000 -287 -988
+rect -187 988 -129 1000
+rect -187 -988 -175 988
+rect -141 -988 -129 988
+rect -187 -1000 -129 -988
+rect -29 988 29 1000
+rect -29 -988 -17 988
+rect 17 -988 29 988
+rect -29 -1000 29 -988
+rect 129 988 187 1000
+rect 129 -988 141 988
+rect 175 -988 187 988
+rect 129 -1000 187 -988
+rect 287 988 345 1000
+rect 287 -988 299 988
+rect 333 -988 345 988
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+<< properties >>
+string FIXED_BBOX -1556 -1202 1556 1202
+string gencell sky130_fd_pr__pfet_g5v0d10v5
+string library sky130
+string parameters w 10 l 0.5 m 1 nf 18 diffcov 100 polycov 100 guard 1 glc 1 grc 1 gtc 1 gbc 1 tbcov 100 rlcov 100 topc 1 botc 1 poverlap 0 doverlap 1 lmin 0.50 wmin 0.42 compatible {sky130_fd_pr__pfet_01v8 sky130_fd_pr__pfet_01v8_lvt sky130_fd_pr__pfet_01v8_hvt sky130_fd_pr__pfet_g5v0d10v5} full_metal 1 viasrc 100 viadrn 100 viagate 100 viagb 0 viagr 0 viagl 0 viagt 0
+<< end >>
diff --git a/mag/tt_analog_1x2_3v3.def b/mag/tt_analog_1x2_3v3.def
deleted file mode 100644
index 439eafa..0000000
--- a/mag/tt_analog_1x2_3v3.def
+++ /dev/null
@@ -1,365 +0,0 @@
-VERSION 5.8 ;
-DIVIDERCHAR "/" ;
-BUSBITCHARS "[]" ;
-DESIGN tt_um_template ;
-UNITS DISTANCE MICRONS 1000 ;
-DIEAREA ( 0 0 ) ( 145360 225760 ) ;
-ROW ROW_0 unithd 2760 2720 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_1 unithd 2760 5440 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_2 unithd 2760 8160 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_3 unithd 2760 10880 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_4 unithd 2760 13600 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_5 unithd 2760 16320 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_6 unithd 2760 19040 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_7 unithd 2760 21760 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_8 unithd 2760 24480 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_9 unithd 2760 27200 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_10 unithd 2760 29920 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_11 unithd 2760 32640 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_12 unithd 2760 35360 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_13 unithd 2760 38080 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_14 unithd 2760 40800 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_15 unithd 2760 43520 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_16 unithd 2760 46240 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_17 unithd 2760 48960 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_18 unithd 2760 51680 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_19 unithd 2760 54400 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_20 unithd 2760 57120 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_21 unithd 2760 59840 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_22 unithd 2760 62560 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_23 unithd 2760 65280 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_24 unithd 2760 68000 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_25 unithd 2760 70720 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_26 unithd 2760 73440 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_27 unithd 2760 76160 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_28 unithd 2760 78880 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_29 unithd 2760 81600 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_30 unithd 2760 84320 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_31 unithd 2760 87040 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_32 unithd 2760 89760 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_33 unithd 2760 92480 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_34 unithd 2760 95200 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_35 unithd 2760 97920 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_36 unithd 2760 100640 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_37 unithd 2760 103360 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_38 unithd 2760 106080 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_39 unithd 2760 108800 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_40 unithd 2760 111520 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_41 unithd 2760 114240 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_42 unithd 2760 116960 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_43 unithd 2760 119680 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_44 unithd 2760 122400 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_45 unithd 2760 125120 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_46 unithd 2760 127840 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_47 unithd 2760 130560 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_48 unithd 2760 133280 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_49 unithd 2760 136000 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_50 unithd 2760 138720 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_51 unithd 2760 141440 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_52 unithd 2760 144160 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_53 unithd 2760 146880 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_54 unithd 2760 149600 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_55 unithd 2760 152320 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_56 unithd 2760 155040 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_57 unithd 2760 157760 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_58 unithd 2760 160480 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_59 unithd 2760 163200 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_60 unithd 2760 165920 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_61 unithd 2760 168640 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_62 unithd 2760 171360 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_63 unithd 2760 174080 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_64 unithd 2760 176800 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_65 unithd 2760 179520 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_66 unithd 2760 182240 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_67 unithd 2760 184960 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_68 unithd 2760 187680 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_69 unithd 2760 190400 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_70 unithd 2760 193120 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_71 unithd 2760 195840 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_72 unithd 2760 198560 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_73 unithd 2760 201280 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_74 unithd 2760 204000 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_75 unithd 2760 206720 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_76 unithd 2760 209440 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_77 unithd 2760 212160 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_78 unithd 2760 214880 N DO 304 BY 1 STEP 460 0 ;
-ROW ROW_79 unithd 2760 217600 FS DO 304 BY 1 STEP 460 0 ;
-ROW ROW_80 unithd 2760 220320 N DO 304 BY 1 STEP 460 0 ;
-TRACKS X 230 DO 316 STEP 460 LAYER li1 ;
-TRACKS Y 170 DO 664 STEP 340 LAYER li1 ;
-TRACKS X 170 DO 427 STEP 340 LAYER met1 ;
-TRACKS Y 170 DO 664 STEP 340 LAYER met1 ;
-TRACKS X 230 DO 316 STEP 460 LAYER met2 ;
-TRACKS Y 230 DO 491 STEP 460 LAYER met2 ;
-TRACKS X 340 DO 214 STEP 680 LAYER met3 ;
-TRACKS Y 340 DO 332 STEP 680 LAYER met3 ;
-TRACKS X 460 DO 158 STEP 920 LAYER met4 ;
-TRACKS Y 460 DO 245 STEP 920 LAYER met4 ;
-TRACKS X 1700 DO 43 STEP 3400 LAYER met5 ;
-TRACKS Y 1700 DO 66 STEP 3400 LAYER met5 ;
-COMPONENTS 0 ;
-END COMPONENTS
-PINS 51 ;
- - clk + NET clk + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 128340 225260 ) N ;
- - ena + NET ena + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 131100 225260 ) N ;
- - rst_n + NET rst_n + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 125580 225260 ) N ;
- - ua[0] + NET ua[0] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 136620 500 ) N ;
- - ua[1] + NET ua[1] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 117300 500 ) N ;
- - ua[2] + NET ua[2] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 97980 500 ) N ;
- - ua[3] + NET ua[3] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 78660 500 ) N ;
- - ua[4] + NET ua[4] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 59340 500 ) N ;
- - ua[5] + NET ua[5] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 40020 500 ) N ;
- - ua[6] + NET ua[6] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 20700 500 ) N ;
- - ua[7] + NET ua[7] + DIRECTION INOUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -450 -500 ) ( 450 500 )
- + PLACED ( 1380 500 ) N ;
- - ui_in[0] + NET ui_in[0] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 122820 225260 ) N ;
- - ui_in[1] + NET ui_in[1] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 120060 225260 ) N ;
- - ui_in[2] + NET ui_in[2] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 117300 225260 ) N ;
- - ui_in[3] + NET ui_in[3] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 114540 225260 ) N ;
- - ui_in[4] + NET ui_in[4] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 111780 225260 ) N ;
- - ui_in[5] + NET ui_in[5] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 109020 225260 ) N ;
- - ui_in[6] + NET ui_in[6] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 106260 225260 ) N ;
- - ui_in[7] + NET ui_in[7] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 103500 225260 ) N ;
- - uio_in[0] + NET uio_in[0] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 100740 225260 ) N ;
- - uio_in[1] + NET uio_in[1] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 97980 225260 ) N ;
- - uio_in[2] + NET uio_in[2] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 95220 225260 ) N ;
- - uio_in[3] + NET uio_in[3] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 92460 225260 ) N ;
- - uio_in[4] + NET uio_in[4] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 89700 225260 ) N ;
- - uio_in[5] + NET uio_in[5] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 86940 225260 ) N ;
- - uio_in[6] + NET uio_in[6] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 84180 225260 ) N ;
- - uio_in[7] + NET uio_in[7] + DIRECTION INPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 81420 225260 ) N ;
- - uio_oe[0] + NET uio_oe[0] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 34500 225260 ) N ;
- - uio_oe[1] + NET uio_oe[1] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 31740 225260 ) N ;
- - uio_oe[2] + NET uio_oe[2] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 28980 225260 ) N ;
- - uio_oe[3] + NET uio_oe[3] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 26220 225260 ) N ;
- - uio_oe[4] + NET uio_oe[4] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 23460 225260 ) N ;
- - uio_oe[5] + NET uio_oe[5] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 20700 225260 ) N ;
- - uio_oe[6] + NET uio_oe[6] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 17940 225260 ) N ;
- - uio_oe[7] + NET uio_oe[7] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 15180 225260 ) N ;
- - uio_out[0] + NET uio_out[0] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 56580 225260 ) N ;
- - uio_out[1] + NET uio_out[1] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 53820 225260 ) N ;
- - uio_out[2] + NET uio_out[2] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 51060 225260 ) N ;
- - uio_out[3] + NET uio_out[3] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 48300 225260 ) N ;
- - uio_out[4] + NET uio_out[4] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 45540 225260 ) N ;
- - uio_out[5] + NET uio_out[5] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 42780 225260 ) N ;
- - uio_out[6] + NET uio_out[6] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 40020 225260 ) N ;
- - uio_out[7] + NET uio_out[7] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 37260 225260 ) N ;
- - uo_out[0] + NET uo_out[0] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 78660 225260 ) N ;
- - uo_out[1] + NET uo_out[1] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 75900 225260 ) N ;
- - uo_out[2] + NET uo_out[2] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 73140 225260 ) N ;
- - uo_out[3] + NET uo_out[3] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 70380 225260 ) N ;
- - uo_out[4] + NET uo_out[4] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 67620 225260 ) N ;
- - uo_out[5] + NET uo_out[5] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 64860 225260 ) N ;
- - uo_out[6] + NET uo_out[6] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 62100 225260 ) N ;
- - uo_out[7] + NET uo_out[7] + DIRECTION OUTPUT + USE SIGNAL
- + PORT
- + LAYER met4 ( -150 -500 ) ( 150 500 )
- + PLACED ( 59340 225260 ) N ;
-END PINS
-SPECIALNETS 2 ;
- - VGND + USE GROUND ;
- - VPWR + USE POWER ;
-END SPECIALNETS
-NETS 51 ;
- - clk ( PIN clk ) + USE SIGNAL ;
- - ena ( PIN ena ) + USE SIGNAL ;
- - rst_n ( PIN rst_n ) + USE SIGNAL ;
- - ua[0] ( PIN ua[0] ) + USE SIGNAL ;
- - ua[1] ( PIN ua[1] ) + USE SIGNAL ;
- - ua[2] ( PIN ua[2] ) + USE SIGNAL ;
- - ua[3] ( PIN ua[3] ) + USE SIGNAL ;
- - ua[4] ( PIN ua[4] ) + USE SIGNAL ;
- - ua[5] ( PIN ua[5] ) + USE SIGNAL ;
- - ua[6] ( PIN ua[6] ) + USE SIGNAL ;
- - ua[7] ( PIN ua[7] ) + USE SIGNAL ;
- - ui_in[0] ( PIN ui_in[0] ) + USE SIGNAL ;
- - ui_in[1] ( PIN ui_in[1] ) + USE SIGNAL ;
- - ui_in[2] ( PIN ui_in[2] ) + USE SIGNAL ;
- - ui_in[3] ( PIN ui_in[3] ) + USE SIGNAL ;
- - ui_in[4] ( PIN ui_in[4] ) + USE SIGNAL ;
- - ui_in[5] ( PIN ui_in[5] ) + USE SIGNAL ;
- - ui_in[6] ( PIN ui_in[6] ) + USE SIGNAL ;
- - ui_in[7] ( PIN ui_in[7] ) + USE SIGNAL ;
- - uio_in[0] ( PIN uio_in[0] ) + USE SIGNAL ;
- - uio_in[1] ( PIN uio_in[1] ) + USE SIGNAL ;
- - uio_in[2] ( PIN uio_in[2] ) + USE SIGNAL ;
- - uio_in[3] ( PIN uio_in[3] ) + USE SIGNAL ;
- - uio_in[4] ( PIN uio_in[4] ) + USE SIGNAL ;
- - uio_in[5] ( PIN uio_in[5] ) + USE SIGNAL ;
- - uio_in[6] ( PIN uio_in[6] ) + USE SIGNAL ;
- - uio_in[7] ( PIN uio_in[7] ) + USE SIGNAL ;
- - uio_oe[0] ( PIN uio_oe[0] ) + USE SIGNAL ;
- - uio_oe[1] ( PIN uio_oe[1] ) + USE SIGNAL ;
- - uio_oe[2] ( PIN uio_oe[2] ) + USE SIGNAL ;
- - uio_oe[3] ( PIN uio_oe[3] ) + USE SIGNAL ;
- - uio_oe[4] ( PIN uio_oe[4] ) + USE SIGNAL ;
- - uio_oe[5] ( PIN uio_oe[5] ) + USE SIGNAL ;
- - uio_oe[6] ( PIN uio_oe[6] ) + USE SIGNAL ;
- - uio_oe[7] ( PIN uio_oe[7] ) + USE SIGNAL ;
- - uio_out[0] ( PIN uio_out[0] ) + USE SIGNAL ;
- - uio_out[1] ( PIN uio_out[1] ) + USE SIGNAL ;
- - uio_out[2] ( PIN uio_out[2] ) + USE SIGNAL ;
- - uio_out[3] ( PIN uio_out[3] ) + USE SIGNAL ;
- - uio_out[4] ( PIN uio_out[4] ) + USE SIGNAL ;
- - uio_out[5] ( PIN uio_out[5] ) + USE SIGNAL ;
- - uio_out[6] ( PIN uio_out[6] ) + USE SIGNAL ;
- - uio_out[7] ( PIN uio_out[7] ) + USE SIGNAL ;
- - uo_out[0] ( PIN uo_out[0] ) + USE SIGNAL ;
- - uo_out[1] ( PIN uo_out[1] ) + USE SIGNAL ;
- - uo_out[2] ( PIN uo_out[2] ) + USE SIGNAL ;
- - uo_out[3] ( PIN uo_out[3] ) + USE SIGNAL ;
- - uo_out[4] ( PIN uo_out[4] ) + USE SIGNAL ;
- - uo_out[5] ( PIN uo_out[5] ) + USE SIGNAL ;
- - uo_out[6] ( PIN uo_out[6] ) + USE SIGNAL ;
- - uo_out[7] ( PIN uo_out[7] ) + USE SIGNAL ;
-END NETS
-END DESIGN
diff --git a/mag/tt_asw_3v3.mag b/mag/tt_asw_3v3.mag
new file mode 100644
index 0000000..1e24be1
--- /dev/null
+++ b/mag/tt_asw_3v3.mag
@@ -0,0 +1,865 @@
+magic
+tech sky130A
+magscale 1 2
+timestamp 1731191699
+<< checkpaint >>
+rect 7825 1032 10961 1127
+rect 7825 937 11482 1032
+rect 7825 842 12003 937
+rect 7825 -2071 12524 842
+rect 8346 -2166 12524 -2071
+rect 8867 -2261 12524 -2166
+rect 9388 -2356 12524 -2261
+<< error_s >>
+rect 268 589 302 2470
+rect 1995 2101 3292 2113
+rect 3380 2101 3414 2470
+rect 1995 2067 5057 2101
+rect 1995 2055 3292 2067
+rect 79 555 347 589
+rect 268 489 302 555
+rect 390 543 455 601
+rect 256 451 302 489
+rect 234 417 302 451
+rect 256 392 263 417
+rect 268 392 302 417
+rect 241 370 302 392
+rect 241 358 314 370
+rect 256 224 336 358
+rect 397 347 455 543
+rect 983 440 1467 441
+rect 409 338 443 347
+rect 448 338 455 347
+rect 409 300 455 338
+rect 456 396 1467 440
+rect 1995 396 2053 2055
+rect 2140 1997 2174 2055
+rect 2298 2010 2332 2055
+rect 2456 2010 2490 2055
+rect 2614 2010 2648 2055
+rect 2772 2010 2806 2055
+rect 2930 2010 2964 2055
+rect 3088 2010 3122 2055
+rect 3246 2010 3280 2055
+rect 2271 1997 2332 2010
+rect 2429 1997 2490 2010
+rect 2587 1997 2648 2010
+rect 2745 1997 2806 2010
+rect 2903 1997 2964 2010
+rect 3061 1997 3122 2010
+rect 2140 1895 2184 1997
+rect 2271 1969 2342 1997
+rect 2429 1969 2500 1997
+rect 2587 1969 2658 1997
+rect 2745 1969 2816 1997
+rect 2903 1969 2974 1997
+rect 3061 1969 3132 1997
+rect 3219 1969 3292 2010
+rect 3380 2001 3414 2067
+rect 3377 1990 3415 2001
+rect 2191 1963 2212 1969
+rect 2260 1963 2342 1969
+rect 2349 1963 2370 1969
+rect 2418 1963 2500 1969
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+timestamp 1716235358
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+timestamp 1716240358
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+timestamp 0
+transform 1 0 3580 0 1 882
+box -1651 -1297 1651 1297
+use sky130_fd_pr__nfet_g5v0d10v5_9A5DGK XM6
+timestamp 0
+transform 1 0 6313 0 1 278
+box -1147 -758 1147 758
+use sky130_fd_pr__nfet_01v8_L7T3GD XM7
+timestamp 0
+transform 1 0 7618 0 1 -281
+box -211 -252 211 252
+use sky130_fd_pr__pfet_01v8_hvt_XGS3BL XM8
+timestamp 0
+transform 1 0 7987 0 1 -267
+box -211 -319 211 319
+use sky130_fd_pr__nfet_g5v0d10v5_6XHUDR XM9
+timestamp 0
+transform 1 0 8411 0 1 -351
+box -278 -300 278 300
+use sky130_fd_pr__nfet_g5v0d10v5_6XHUDR XM10
+timestamp 0
+transform 1 0 8902 0 1 -416
+box -278 -300 278 300
+use sky130_fd_pr__pfet_g5v0d10v5_6ELFTH XM11
+timestamp 0
+transform 1 0 9393 0 1 -472
+box -308 -339 308 339
+use sky130_fd_pr__pfet_g5v0d10v5_6ELFTH XM12
+timestamp 0
+transform 1 0 9914 0 1 -567
+box -308 -339 308 339
+use sky130_fd_pr__pfet_g5v0d10v5_6ELFTH XM13
+timestamp 0
+transform 1 0 10435 0 1 -662
+box -308 -339 308 339
+use sky130_fd_pr__pfet_g5v0d10v5_6ELFTH XM14
+timestamp 0
+transform 1 0 10956 0 1 -757
+box -308 -339 308 339
+<< labels >>
+rlabel metal4 20 0 260 4352 1 VDPWR
+port 2 n power input
+rlabel metal3 890 4172 950 4352 1 ctrl
+port 4 n signal input
+rlabel metal4 1750 3952 1930 4352 1 mod
+port 5 n analog bidirectional
+rlabel metal4 1750 2352 1930 2752 1 bus
+port 6 n analog bidirectional
+rlabel metal4 660 0 900 4352 1 VAPWR
+port 3 n power input
+rlabel metal4 340 0 580 4352 1 VGND
+port 1 n ground input
+<< properties >>
+string FIXED_BBOX 0 0 3680 4352
+<< end >>
diff --git a/mag/tt_asw_3v3/LICENSE b/mag/tt_asw_3v3/LICENSE
new file mode 100644
index 0000000..261eeb9
--- /dev/null
+++ b/mag/tt_asw_3v3/LICENSE
@@ -0,0 +1,201 @@
+ Apache License
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+
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diff --git a/mag/tt_asw_3v3/README.md b/mag/tt_asw_3v3/README.md
new file mode 100644
index 0000000..600d6da
--- /dev/null
+++ b/mag/tt_asw_3v3/README.md
@@ -0,0 +1,19 @@
+![](../../workflows/lvs/badge.svg)
+
+# 3V3/5V tolerant analog switch for TT07+
+
+[schematic](https://xschem-viewer.com/?file=https://github.com/TinyTapeout/tt-multiplexer/blob/main/asw/tt_asw_3v3/xschem/tt_asw_3v3.sch)
+
+# Layout
+
+![layout](docs/layout.png)
+
+# Simulations
+
+## Rds\_on (Schematic vs Layout)
+
+![sim](docs/rdson.svg)
+
+## Level converter dynamic behavior
+
+![sim](docs/lvl_shift.svg)
diff --git a/mag/tt_asw_3v3/docs/layout.png b/mag/tt_asw_3v3/docs/layout.png
new file mode 100644
index 0000000..6b938b6
Binary files /dev/null and b/mag/tt_asw_3v3/docs/layout.png differ
diff --git a/mag/tt_asw_3v3/docs/lvl_shift.svg b/mag/tt_asw_3v3/docs/lvl_shift.svg
new file mode 100644
index 0000000..2716956
--- /dev/null
+++ b/mag/tt_asw_3v3/docs/lvl_shift.svg
@@ -0,0 +1,207 @@
+
+
+
diff --git a/mag/tt_asw_3v3/docs/rdson.svg b/mag/tt_asw_3v3/docs/rdson.svg
new file mode 100644
index 0000000..2d583f1
--- /dev/null
+++ b/mag/tt_asw_3v3/docs/rdson.svg
@@ -0,0 +1,120 @@
+
+
+
diff --git a/mag/tt_asw_3v3/gds/tt_asw_3v3.gds b/mag/tt_asw_3v3/gds/tt_asw_3v3.gds
new file mode 100644
index 0000000..033bb93
Binary files /dev/null and b/mag/tt_asw_3v3/gds/tt_asw_3v3.gds differ
diff --git a/mag/tt_asw_3v3/lef/tt_asw_3v3.lef b/mag/tt_asw_3v3/lef/tt_asw_3v3.lef
new file mode 100644
index 0000000..d1c78cb
--- /dev/null
+++ b/mag/tt_asw_3v3/lef/tt_asw_3v3.lef
@@ -0,0 +1,79 @@
+VERSION 5.7 ;
+ NOWIREEXTENSIONATPIN ON ;
+ DIVIDERCHAR "/" ;
+ BUSBITCHARS "[]" ;
+MACRO tt_asw_3v3
+ CLASS BLOCK ;
+ FOREIGN tt_asw_3v3 ;
+ ORIGIN 0.000 0.000 ;
+ SIZE 18.400 BY 21.760 ;
+ PIN VGND
+ DIRECTION INPUT ;
+ USE GROUND ;
+ PORT
+ LAYER met4 ;
+ RECT 1.700 0.000 2.900 21.760 ;
+ END
+ END VGND
+ PIN VDPWR
+ DIRECTION INPUT ;
+ USE POWER ;
+ PORT
+ LAYER met4 ;
+ RECT 0.100 0.000 1.300 21.760 ;
+ END
+ END VDPWR
+ PIN VAPWR
+ DIRECTION INPUT ;
+ USE POWER ;
+ PORT
+ LAYER met4 ;
+ RECT 3.300 0.000 4.500 21.760 ;
+ END
+ END VAPWR
+ PIN ctrl
+ DIRECTION INPUT ;
+ USE SIGNAL ;
+ ANTENNAGATEAREA 0.423000 ;
+ PORT
+ LAYER met3 ;
+ RECT 4.450 20.860 4.750 21.760 ;
+ END
+ END ctrl
+ PIN mod
+ DIRECTION INOUT ;
+ USE ANALOG ;
+ ANTENNADIFFAREA 39.149998 ;
+ PORT
+ LAYER met4 ;
+ RECT 8.750 19.760 9.650 21.760 ;
+ END
+ END mod
+ PIN bus
+ DIRECTION INOUT ;
+ USE ANALOG ;
+ ANTENNADIFFAREA 34.799999 ;
+ PORT
+ LAYER met4 ;
+ RECT 8.750 11.760 9.650 13.760 ;
+ END
+ END bus
+ OBS
+ LAYER nwell ;
+ RECT 0.190 0.250 17.460 21.550 ;
+ LAYER li1 ;
+ RECT 0.410 0.640 17.220 21.310 ;
+ LAYER met1 ;
+ RECT 0.240 0.610 17.280 21.700 ;
+ LAYER met2 ;
+ RECT 0.000 1.730 18.060 21.710 ;
+ LAYER met3 ;
+ RECT 0.000 20.460 4.050 21.760 ;
+ RECT 5.150 20.460 18.060 21.760 ;
+ RECT 0.000 9.070 18.060 20.460 ;
+ LAYER met4 ;
+ RECT 8.750 18.260 9.650 19.360 ;
+ END
+END tt_asw_3v3
+END LIBRARY
+
diff --git a/mag/tt_asw_3v3/src/tt_asw_3v3.v b/mag/tt_asw_3v3/src/tt_asw_3v3.v
new file mode 100644
index 0000000..dc8a1ab
--- /dev/null
+++ b/mag/tt_asw_3v3/src/tt_asw_3v3.v
@@ -0,0 +1,22 @@
+/*
+ * tt_asw_3v3.v
+ *
+ * Blackbox for the analog switches
+ *
+ * Copyright (c) 2024 Sylvain Munaut
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+(* blackbox *)
+module tt_asw_3v3 (
+`ifdef USE_POWER_PINS
+ input wire VGND,
+ input wire VDPWR,
+ input wire VAPWR,
+`endif
+ inout wire mod,
+ inout wire bus,
+ input wire ctrl
+);
+
+endmodule
diff --git a/mag/tt_asw_3v3/xschem/simulation/.spiceinit b/mag/tt_asw_3v3/xschem/simulation/.spiceinit
new file mode 100644
index 0000000..d078263
--- /dev/null
+++ b/mag/tt_asw_3v3/xschem/simulation/.spiceinit
@@ -0,0 +1,2 @@
+set ngbehavior=hsa
+set ng_nomodcheck
diff --git a/mag/tt_asw_3v3/xschem/simulation/tt_asw_3v3.spice b/mag/tt_asw_3v3/xschem/simulation/tt_asw_3v3.spice
new file mode 100644
index 0000000..cbc4d3c
--- /dev/null
+++ b/mag/tt_asw_3v3/xschem/simulation/tt_asw_3v3.spice
@@ -0,0 +1,38 @@
+** sch_path: /home/tnt/consult/tinytapeout/tt_asw_3v3/xschem/tt_asw_3v3.sch
+.subckt tt_asw_3v3 VGND VDPWR VAPWR ctrl mod bus
+*.iopin mod
+*.iopin bus
+*.ipin ctrl
+*.iopin VGND
+*.iopin VDPWR
+*.iopin VAPWR
+XM1 tgon_n net2 VAPWR VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.84 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM2 tgon_n net2 VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM3 tgon net1 VAPWR VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.84 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM4 tgon net1 VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM5 bus tgon_n mod VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=180 nf=18 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM6 bus tgon mod VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=60 nf=12 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM7 ctrl_n ctrl VGND VGND sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM8 ctrl_n ctrl VDPWR VDPWR sky130_fd_pr__pfet_01v8_hvt L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM9 net1 ctrl VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM10 net2 ctrl_n VGND VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM11 net1 net2 net3 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM12 net2 net1 net4 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM13 net3 net1 VAPWR VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+XM14 net4 net2 VAPWR VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
++ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
+.ends
+.end
diff --git a/mag/tt_asw_3v3/xschem/tb_rdson.sch b/mag/tt_asw_3v3/xschem/tb_rdson.sch
new file mode 100644
index 0000000..ec64d69
--- /dev/null
+++ b/mag/tt_asw_3v3/xschem/tb_rdson.sch
@@ -0,0 +1,133 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+N 160 -260 230 -260 {
+lab=bus}
+N -100 -560 -100 -550 {
+lab=vcc}
+N -100 -490 -100 -480 {
+lab=GND}
+N 160 -300 170 -300 {
+lab=vdd}
+N 320 -180 320 -160 {
+lab=GND}
+N -150 -320 -140 -320 {
+lab=ctrl}
+N 240 -180 240 -160 {
+lab=GND}
+N 10 -490 10 -480 {
+lab=GND}
+N 10 -560 10 -550 {
+lab=ctrl}
+N 160 -320 170 -320 {
+lab=vcc}
+N -190 -560 -190 -550 {
+lab=vdd}
+N -190 -490 -190 -480 {
+lab=GND}
+N 160 -240 180 -240 {
+lab=GND}
+N 180 -240 180 -220 {
+lab=GND}
+N 180 -220 180 -160 {
+lab=GND}
+N 230 -260 240 -260 {
+lab=bus}
+N 240 -260 240 -240 {
+lab=bus}
+N 160 -280 320 -280 {
+lab=mod}
+N 320 -280 320 -240 {
+lab=mod}
+N 160 -10 230 -10 {
+lab=bus_pex}
+N 160 -50 170 -50 {
+lab=vdd}
+N -150 -70 -140 -70 {
+lab=ctrl}
+N 240 70 240 90 {
+lab=GND}
+N 160 -70 170 -70 {
+lab=vcc}
+N 160 10 180 10 {
+lab=GND}
+N 180 10 180 30 {
+lab=GND}
+N 180 30 180 90 {
+lab=GND}
+N 230 -10 240 -10 {
+lab=bus_pex}
+N 240 -10 240 10 {
+lab=bus_pex}
+N 160 -30 320 -30 {
+lab=mod}
+C {tt_asw_3v3.sym} 10 -280 0 0 {name=x1}
+C {devices/code.sym} 350 -560 0 0 {name=TT_MODELS
+only_toplevel=true
+format="tcleval( @value )"
+value="
+** opencircuitdesign pdks install
+.lib $::SKYWATER_MODELS/sky130.lib.spice tt
+.include $::SKYWATER_STDCELLS/sky130_fd_sc_hd.spice
+
+
+"
+spice_ignore=false}
+C {devices/code.sym} 190 -560 0 0 {name=SIMULATION
+only_toplevel=false
+value="
+.param mc_mm_switch=0
+.control
+tran 10p 100n
+plot ctrl x1.tgon x1.tgon_n
+dc Vcm 0 3.3 0.01
+plot ((v(mod) - v(bus)) / 100u) ((v(mod) - v(bus_pex)) / 100u)
+write tb_rdson.raw
+*quit 0
+.endc
+.end
+"}
+C {devices/vsource.sym} -100 -520 0 0 {name=V2 value=3.3 savecurrent=false}
+C {devices/gnd.sym} -100 -480 0 0 {name=l2 lab=GND}
+C {devices/lab_pin.sym} -100 -560 2 1 {name=p5 sig_type=std_logic lab=vcc
+}
+C {devices/lab_pin.sym} 170 -300 2 0 {name=p6 sig_type=std_logic lab=vdd
+}
+C {devices/gnd.sym} 180 -160 0 0 {name=l3 lab=GND}
+C {devices/vsource.sym} 320 -210 0 0 {name=Vcm value="1V" savecurrent=false}
+C {devices/gnd.sym} 320 -160 0 0 {name=l10 lab=GND}
+C {devices/isource.sym} 240 -210 0 0 {name=I0 value=100u savecurrent=true}
+C {devices/gnd.sym} 240 -160 0 0 {name=l1 lab=GND}
+C {devices/lab_pin.sym} -150 -320 2 1 {name=p2 sig_type=std_logic lab=ctrl
+}
+C {devices/lab_wire.sym} 240 -260 0 1 {name=p4 sig_type=std_logic lab=bus}
+C {devices/vsource.sym} 10 -520 0 0 {name=V3 value="PULSE(1.8 0 5n 0 0 10n 20n)" savecurrent=false}
+C {devices/gnd.sym} 10 -480 0 0 {name=l4 lab=GND}
+C {devices/lab_pin.sym} 10 -560 2 1 {name=p3 sig_type=std_logic lab=ctrl
+}
+C {devices/lab_pin.sym} 170 -320 2 0 {name=p7 sig_type=std_logic lab=vcc
+}
+C {devices/vsource.sym} -190 -520 0 0 {name=V1 value=1.8 savecurrent=false}
+C {devices/gnd.sym} -190 -480 0 0 {name=l5 lab=GND}
+C {devices/lab_pin.sym} -190 -560 2 1 {name=p8 sig_type=std_logic lab=vdd
+}
+C {devices/lab_wire.sym} 320 -280 0 1 {name=p1 sig_type=std_logic lab=mod}
+C {tt_asw_3v3.sym} 10 -30 0 0 {name=x2
+schematic=tt_asw_3v3_pex.sim
+spice_sym_def="tcleval(.include [file normalize ../mag/tt_asw_3v3.pex.spice])"
+tclcommand="textwindow [file normalize ../mag/tt_asw_3v3.pex.spice]"}
+C {devices/lab_pin.sym} 170 -50 2 0 {name=p9 sig_type=std_logic lab=vdd
+}
+C {devices/gnd.sym} 180 90 0 0 {name=l6 lab=GND}
+C {devices/isource.sym} 240 40 0 0 {name=I1 value=100u savecurrent=true}
+C {devices/gnd.sym} 240 90 0 0 {name=l8 lab=GND}
+C {devices/lab_pin.sym} -150 -70 2 1 {name=p10 sig_type=std_logic lab=ctrl
+}
+C {devices/lab_wire.sym} 240 -10 0 1 {name=p11 sig_type=std_logic lab=bus_pex}
+C {devices/lab_pin.sym} 170 -70 2 0 {name=p12 sig_type=std_logic lab=vcc
+}
+C {devices/lab_wire.sym} 320 -30 0 1 {name=p13 sig_type=std_logic lab=mod}
diff --git a/mag/tt_asw_3v3/xschem/tt_asw_3v3.sch b/mag/tt_asw_3v3/xschem/tt_asw_3v3.sch
new file mode 100644
index 0000000..6acbdc4
--- /dev/null
+++ b/mag/tt_asw_3v3/xschem/tt_asw_3v3.sch
@@ -0,0 +1,372 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+T {Transmission gate (incl. level shifting)} 380 -190 0 0 0.4 0.4 {}
+N 1210 -520 1240 -520 {
+lab=bus}
+N 1210 -420 1210 -340 {
+lab=bus}
+N 1210 -340 1240 -340 {
+lab=bus}
+N 1300 -520 1330 -520 {
+lab=mod}
+N 1330 -420 1330 -340 {
+lab=mod}
+N 1300 -340 1330 -340 {
+lab=mod}
+N 1210 -520 1210 -420 {
+lab=bus}
+N 1330 -520 1330 -420 {
+lab=mod}
+N 1270 -580 1270 -560 {
+lab=tgon_n}
+N 1270 -300 1270 -280 {
+lab=tgon}
+N 1170 -430 1210 -430 {
+lab=bus}
+N 1330 -430 1370 -430 {
+lab=mod}
+N -190 -480 -170 -480 {
+lab=ctrl}
+N -190 -480 -190 -380 {
+lab=ctrl}
+N -190 -380 -170 -380 {
+lab=ctrl}
+N -230 -430 -190 -430 {
+lab=ctrl}
+N -130 -350 -130 -330 {
+lab=VGND}
+N -130 -530 -130 -510 {
+lab=VDPWR}
+N -130 -450 -130 -410 {
+lab=ctrl_n}
+N -130 -430 -50 -430 {
+lab=ctrl_n}
+N 460 -400 460 -360 {
+lab=#net1}
+N 680 -400 680 -360 {
+lab=#net2}
+N 460 -380 520 -380 {
+lab=#net1}
+N 520 -380 600 -430 {
+lab=#net1}
+N 600 -430 640 -430 {
+lab=#net1}
+N 500 -430 540 -430 {
+lab=#net2}
+N 540 -430 620 -380 {
+lab=#net2}
+N 620 -380 680 -380 {
+lab=#net2}
+N 400 -260 680 -260 {
+lab=VGND}
+N 680 -300 680 -260 {
+lab=VGND}
+N 460 -300 460 -260 {
+lab=VGND}
+N 380 -330 420 -330 {
+lab=ctrl}
+N 720 -330 760 -330 {
+lab=ctrl_n}
+N 460 -500 460 -460 {
+lab=#net3}
+N 680 -500 680 -460 {
+lab=#net4}
+N 680 -380 720 -380 {
+lab=#net2}
+N 720 -380 740 -380 {
+lab=#net2}
+N 740 -530 740 -380 {
+lab=#net2}
+N 720 -530 740 -530 {
+lab=#net2}
+N 400 -380 460 -380 {
+lab=#net1}
+N 400 -530 400 -380 {
+lab=#net1}
+N 400 -530 420 -530 {
+lab=#net1}
+N 460 -600 460 -560 {
+lab=VAPWR}
+N 460 -600 680 -600 {
+lab=VAPWR}
+N 680 -600 680 -560 {
+lab=VAPWR}
+N 400 -600 460 -600 {
+lab=VAPWR}
+N 840 -530 860 -530 {
+lab=#net2}
+N 840 -530 840 -330 {
+lab=#net2}
+N 840 -330 860 -330 {
+lab=#net2}
+N 740 -430 840 -430 {
+lab=#net2}
+N 680 -600 900 -600 {
+lab=VAPWR}
+N 900 -600 900 -560 {
+lab=VAPWR}
+N 680 -260 900 -260 {
+lab=VGND}
+N 900 -300 900 -260 {
+lab=VGND}
+N 900 -500 900 -360 {
+lab=tgon_n}
+N 900 -430 940 -430 {
+lab=tgon_n}
+N 300 -430 400 -430 {
+lab=#net1}
+N 280 -530 300 -530 {
+lab=#net1}
+N 280 -330 300 -330 {
+lab=#net1}
+N 300 -530 300 -330 {
+lab=#net1}
+N 240 -500 240 -360 {
+lab=tgon}
+N 120 -260 400 -260 {
+lab=VGND}
+N 240 -300 240 -260 {
+lab=VGND}
+N 120 -600 400 -600 {
+lab=VAPWR}
+N 240 -600 240 -560 {
+lab=VAPWR}
+N 200 -430 240 -430 {
+lab=tgon}
+N -230 -260 120 -260 {
+lab=VGND}
+N -130 -330 -130 -260 {
+lab=VGND}
+N -230 -600 -130 -600 {
+lab=VDPWR}
+N -130 -600 -130 -530 {
+lab=VDPWR}
+C {devices/title.sym} 160 -30 0 0 {name=l1 author="Sylvain Munaut"}
+C {devices/iopin.sym} 1370 -430 0 0 {name=p6 lab=mod sim_pinnumber=5}
+C {devices/iopin.sym} 1170 -430 0 1 {name=p7 lab=bus sim_pinnumber=6}
+C {devices/lab_wire.sym} 1270 -580 0 1 {name=p3 sig_type=std_logic lab=tgon_n}
+C {devices/lab_wire.sym} 1270 -280 2 0 {name=p4 sig_type=std_logic lab=tgon}
+C {devices/ipin.sym} -230 -430 2 1 {name=p5 lab=ctrl sim_pinnumber=4}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 880 -530 0 0 {name=M1
+W=0.84
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 880 -330 0 0 {name=M2
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 260 -530 0 1 {name=M3
+W=0.84
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 260 -330 0 1 {name=M4
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 1270 -540 1 0 {name=M5
+W=180
+L=0.5
+body=VAPWR
+nf=18
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 1270 -320 3 0 {name=M6
+W=60
+L=0.5
+body=VGND
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {devices/iopin.sym} -230 -260 2 0 {name=p8 lab=VGND sim_pinnumber=1}
+C {devices/iopin.sym} -230 -600 2 0 {name=p9 lab=VDPWR sim_pinnumber=2}
+C {sky130_fd_pr/nfet3_01v8.sym} -150 -380 0 0 {name=M7
+W=0.42
+L=0.15
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_01v8_hvt.sym} -150 -480 0 0 {name=M8
+W=1
+L=0.15
+body=VDPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8_hvt
+spiceprefix=X
+}
+C {devices/lab_wire.sym} -50 -430 0 1 {name=p10 sig_type=std_logic lab=ctrl_n}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 440 -330 0 0 {name=M9
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 700 -330 0 1 {name=M10
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 480 -430 0 1 {name=M11
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 660 -430 0 0 {name=M12
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 440 -530 0 0 {name=M13
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 700 -530 0 1 {name=M14
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {devices/lab_wire.sym} 760 -330 0 1 {name=p12 sig_type=std_logic lab=ctrl_n}
+C {devices/lab_wire.sym} 380 -330 0 0 {name=p13 sig_type=std_logic lab=ctrl}
+C {devices/iopin.sym} 120 -600 2 0 {name=p14 lab=VAPWR sim_pinnumber=3}
+C {devices/lab_wire.sym} 940 -430 0 1 {name=p1 sig_type=std_logic lab=tgon_n}
+C {devices/lab_wire.sym} 200 -430 0 0 {name=p2 sig_type=std_logic lab=tgon}
diff --git a/mag/tt_asw_3v3/xschem/tt_asw_3v3.sym b/mag/tt_asw_3v3/xschem/tt_asw_3v3.sym
new file mode 100644
index 0000000..82b3641
--- /dev/null
+++ b/mag/tt_asw_3v3/xschem/tt_asw_3v3.sym
@@ -0,0 +1,34 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -50 130 -50 {}
+L 4 -130 50 130 50 {}
+L 4 -150 -40 -130 -40 {}
+L 4 -130 -50 -130 50 {}
+L 4 130 -50 130 50 {}
+L 7 130 -40 150 -40 {}
+L 7 130 0 150 0 {}
+L 7 130 20 150 20 {}
+L 7 130 -20 150 -20 {}
+L 7 130 40 150 40 {}
+B 5 147.5 -42.5 152.5 -37.5 {name=VAPWR dir=inout sim_pinnumber=3}
+B 5 -152.5 -42.5 -147.5 -37.5 {name=ctrl dir=in sim_pinnumber=4}
+B 5 147.5 -2.5 152.5 2.5 {name=mod dir=inout sim_pinnumber=5}
+B 5 147.5 17.5 152.5 22.5 {name=bus dir=inout sim_pinnumber=6}
+B 5 147.5 -22.5 152.5 -17.5 {name=VDPWR dir=inout sim_pinnumber=2}
+B 5 147.5 37.5 152.5 42.5 {name=VGND dir=inout sim_pinnumber=1}
+T {@symname} -63 -6 0 0 0.3 0.3 {}
+T {@name} 135 -62 0 0 0.2 0.2 {}
+T {VAPWR} 125 -44 0 1 0.2 0.2 {}
+T {ctrl} -125 -44 0 0 0.2 0.2 {}
+T {mod} 125 -4 0 1 0.2 0.2 {}
+T {bus} 125 16 0 1 0.2 0.2 {}
+T {VDPWR} 125 -24 0 1 0.2 0.2 {}
+T {VGND} 125 36 0 1 0.2 0.2 {}
diff --git a/mag/tt_lvl_shift.mag b/mag/tt_lvl_shift.mag
new file mode 100644
index 0000000..1d4df89
--- /dev/null
+++ b/mag/tt_lvl_shift.mag
@@ -0,0 +1,351 @@
+magic
+tech sky130A
+timestamp 1716279736
+<< nwell >>
+rect -1 -139 402 139
+<< pwell >>
+rect -1 139 402 266
+rect -1 -266 402 -139
+<< mvnmos >>
+rect 140 173 190 215
+rect 290 173 340 215
+rect 140 -215 190 -173
+rect 290 -215 340 -173
+<< mvpmos >>
+rect 61 64 111 106
+rect 140 64 190 106
+rect 219 64 269 106
+rect 290 64 340 106
+rect 61 -106 111 -64
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+rect 219 -106 269 -64
+rect 290 -106 340 -64
+<< mvndiff >>
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+rect 284 -211 290 -177
+rect 190 -215 290 -211
+rect 340 -177 369 -173
+rect 340 -211 346 -177
+rect 363 -211 369 -177
+rect 340 -215 369 -211
+<< mvpdiff >>
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+rect 32 68 38 102
+rect 55 68 61 102
+rect 32 64 61 68
+rect 111 102 140 106
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+rect 190 -106 219 -102
+rect 269 -106 290 -64
+rect 340 -68 369 -64
+rect 340 -102 346 -68
+rect 363 -102 369 -68
+rect 340 -106 369 -102
+<< mvndiffc >>
+rect 117 177 134 211
+rect 196 177 284 211
+rect 346 177 363 211
+rect 117 -211 134 -177
+rect 196 -211 284 -177
+rect 346 -211 363 -177
+<< mvpdiffc >>
+rect 38 68 55 102
+rect 117 68 134 102
+rect 196 68 213 102
+rect 346 68 363 102
+rect 38 -102 55 -68
+rect 117 -102 134 -68
+rect 196 -102 213 -68
+rect 346 -102 363 -68
+<< mvpsubdiff >>
+rect 52 214 71 226
+rect 52 197 53 214
+rect 70 197 71 214
+rect 52 185 71 197
+rect 52 -197 71 -185
+rect 52 -214 53 -197
+rect 70 -214 71 -197
+rect 52 -226 71 -214
+<< mvnsubdiff >>
+rect 32 -33 44 33
+rect 252 -33 264 33
+<< mvpsubdiffcont >>
+rect 53 197 70 214
+rect 53 -214 70 -197
+<< mvnsubdiffcont >>
+rect 44 -33 252 33
+<< poly >>
+rect 290 251 340 259
+rect 290 234 295 251
+rect 335 234 340 251
+rect 140 215 190 228
+rect 290 215 340 234
+rect 140 165 190 173
+rect 61 149 269 165
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+<< polycont >>
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+rect 159 130 261 149
+rect 295 23 335 40
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+rect 295 -251 335 -234
+<< locali >>
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+rect 188 177 196 180
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+<< viali >>
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+rect 284 -208 286 -180
+rect 117 -213 134 -211
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+rect 335 -251 346 -234
+<< metal1 >>
+rect 50 236 240 257
+rect 50 183 53 236
+rect 70 234 240 236
+rect 70 183 73 234
+rect 50 177 73 183
+rect 114 213 137 219
+rect 35 104 58 110
+rect 35 51 38 104
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+rect 35 44 58 51
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+rect 193 44 216 51
+rect 35 10 216 44
+rect 35 -10 41 10
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+rect 35 -51 58 -44
+rect 35 -104 38 -51
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+rect 193 -51 216 -44
+rect 35 -110 58 -104
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+rect 193 -104 196 -51
+rect 213 -104 216 -51
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+rect 252 40 341 43
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+rect 252 20 341 23
+rect 252 -128 275 20
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+rect 289 -23 379 -20
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+rect 348 -40 379 -23
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+rect 252 -131 348 -128
+rect 252 -148 288 -131
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+rect 252 -151 348 -148
+rect 114 -219 137 -213
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+rect 188 -211 292 -208
+rect 188 -234 240 -211
+rect 70 -236 240 -234
+rect 50 -257 240 -236
+rect 287 -234 352 -231
+rect 287 -251 293 -234
+rect 346 -251 352 -234
+rect 287 -254 352 -251
+<< end >>
diff --git a/mag/tt_small_inv.mag b/mag/tt_small_inv.mag
new file mode 100644
index 0000000..da746b6
--- /dev/null
+++ b/mag/tt_small_inv.mag
@@ -0,0 +1,116 @@
+magic
+tech sky130A
+timestamp 1718441111
+<< nwell >>
+rect 334 2422 470 2558
+<< pwell >>
+rect 334 2558 470 2664
+<< nmos >>
+rect 410 2604 425 2646
+<< pmoshvt >>
+rect 410 2440 425 2540
+<< ndiff >>
+rect 380 2642 410 2646
+rect 380 2608 387 2642
+rect 404 2608 410 2642
+rect 380 2604 410 2608
+rect 425 2634 452 2646
+rect 425 2616 431 2634
+rect 448 2616 452 2634
+rect 425 2604 452 2616
+<< pdiff >>
+rect 381 2536 410 2540
+rect 381 2444 387 2536
+rect 404 2444 410 2536
+rect 381 2440 410 2444
+rect 425 2528 452 2540
+rect 425 2452 431 2528
+rect 448 2452 452 2528
+rect 425 2440 452 2452
+<< ndiffc >>
+rect 387 2608 404 2642
+rect 431 2616 448 2634
+<< pdiffc >>
+rect 387 2444 404 2536
+rect 431 2452 448 2528
+<< psubdiff >>
+rect 351 2634 380 2646
+rect 351 2616 353 2634
+rect 370 2616 380 2634
+rect 351 2604 380 2616
+<< nsubdiff >>
+rect 352 2528 381 2540
+rect 352 2452 353 2528
+rect 370 2452 381 2528
+rect 352 2440 381 2452
+<< psubdiffcont >>
+rect 353 2616 370 2634
+<< nsubdiffcont >>
+rect 353 2452 370 2528
+<< poly >>
+rect 410 2646 425 2659
+rect 410 2586 425 2604
+rect 392 2581 425 2586
+rect 392 2564 400 2581
+rect 417 2564 425 2581
+rect 392 2559 425 2564
+rect 410 2540 425 2559
+rect 410 2427 425 2440
+<< polycont >>
+rect 400 2564 417 2581
+<< locali >>
+rect 345 2636 387 2642
+rect 345 2614 348 2636
+rect 345 2608 387 2614
+rect 404 2608 412 2642
+rect 431 2639 448 2642
+rect 431 2608 448 2611
+rect 417 2564 425 2581
+rect 345 2530 387 2536
+rect 345 2450 348 2530
+rect 345 2444 387 2450
+rect 404 2444 412 2536
+rect 431 2533 448 2536
+rect 431 2444 448 2447
+<< viali >>
+rect 348 2634 387 2636
+rect 348 2616 353 2634
+rect 353 2616 370 2634
+rect 370 2616 387 2634
+rect 348 2614 387 2616
+rect 387 2614 402 2636
+rect 431 2634 448 2639
+rect 431 2616 448 2634
+rect 431 2611 448 2616
+rect 388 2564 400 2581
+rect 400 2564 405 2581
+rect 348 2528 387 2530
+rect 348 2452 353 2528
+rect 353 2452 370 2528
+rect 370 2452 387 2528
+rect 348 2450 387 2452
+rect 387 2450 402 2530
+rect 431 2528 448 2533
+rect 431 2452 448 2528
+rect 431 2447 448 2452
+<< metal1 >>
+rect 345 2636 405 2642
+rect 345 2614 348 2636
+rect 402 2614 405 2636
+rect 345 2608 405 2614
+rect 425 2639 454 2642
+rect 425 2611 431 2639
+rect 448 2611 454 2639
+rect 382 2581 411 2584
+rect 366 2564 388 2581
+rect 405 2564 411 2581
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+rect 345 2530 405 2536
+rect 345 2450 348 2530
+rect 402 2450 405 2530
+rect 345 2444 405 2450
+rect 425 2533 454 2611
+rect 425 2447 431 2533
+rect 448 2447 454 2533
+rect 425 2444 454 2447
+<< end >>
diff --git a/untitled-1.sch b/untitled-1.sch
new file mode 100644
index 0000000..052601f
--- /dev/null
+++ b/untitled-1.sch
@@ -0,0 +1,8 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+N -50 -20 20 10 {}
diff --git a/xschem/dacswitch.sch b/xschem/dacswitch.sch
new file mode 100644
index 0000000..3f3722e
--- /dev/null
+++ b/xschem/dacswitch.sch
@@ -0,0 +1,95 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+T {clock aligner (from cwulff video)} -250 10 0 0 0.4 0.4 {}
+N 420 -40 420 -20 {
+lab=GND}
+N 430 140 455 142.5 {
+lab=#net1}
+N -140 150 -140 180 {
+lab=Cin}
+N -140 260 -140 340 {
+lab=#net2}
+N -140 340 -70 340 {
+lab=#net2}
+N 50 320 110 240 {
+lab=#net3}
+N -175 112.5 -140 110 {
+lab=Cin}
+N -140 110 -90 110 {
+lab=Cin}
+N -140 110 -140 150 {
+lab=Cin}
+N -90 150 -50 240 {
+lab=#net4}
+N -70 300 -50 190 {
+lab=#net5}
+N 30 130 110 190 {
+lab=#net6}
+N 30 130 120 -100 {
+lab=#net6}
+N 110 240 140 190 {
+lab=#net3}
+N 130 80 140 190 {
+lab=#net3}
+N 139.5 409 150 420 {
+lab=VDDA}
+N 150 420 160 420 {
+lab=VDDA}
+N 160 420 165 412.5 {
+lab=VDDA}
+N 580 70 589.5 61 {
+lab=VOUT}
+N 580 70 600.5 79 {
+lab=VOUT}
+N 420 -60 430.5 -61 {
+lab=VOUT}
+N 555 2.5 560 30 {
+lab=GND}
+N 420 -20 450.5 -9 {
+lab=GND}
+N 420 -100 450.5 -109 {
+lab=VDDA}
+N 420 -80 450.5 -89 {
+lab=VDD}
+N 590 -70 595 -97.5 {
+lab=VDD}
+N 430 80 460.5 71 {
+lab=VDDA}
+N 430 100 460.5 91 {
+lab=VDD}
+N 430 120 440.5 119 {
+lab=VOUT}
+N 430 160 440.5 171 {
+lab=GND}
+C {devices/iopin.sym} 555 2.5 2 1 {name=l2 lab=GND}
+C {devices/iopin.sym} 165 412.5 2 1 {name=l3 lab=VDDA}
+C {devices/ipin.sym} -175 112.5 2 1 {name=l4 lab=Cin}
+C {/home/ttuser/Desktop/tt09-sar-adc-dac-combo/xschem/tt_asw_3v3.sym} 270 -60 0 0 {name=x1}
+C {devices/iopin.sym} 595 -97.5 2 1 {name=l5 lab=VDD}
+C {devices/opin.sym} 589.5 61 2 1 {name=l8 sig_type=std_logic lab=VOUT}
+C {/home/ttuser/Desktop/tt09-sar-adc-dac-combo/xschem/tt_asw_3v3.sym} 280 120 0 0 {name=x2}
+C {sky130_stdcells/inv_1.sym} -10 190 2 0 {name=x3 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/nor2_1.sym} -30 130 0 0 {name=x4 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/inv_1.sym} -140 220 1 0 {name=x5 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/nor2_1.sym} -10 320 0 0 {name=x6 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/inv_1.sym} 70 190 2 0 {name=x7 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/inv_1.sym} -10 240 2 0 {name=x8 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {sky130_stdcells/inv_1.sym} 70 240 2 0 {name=x9 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ }
+C {devices/lab_pin.sym} 139.5 409 0 0 {name=l11 sig_type=std_logic lab=VDDA}
+C {devices/lab_pin.sym} 450.5 -109 2 0 {name=l12 sig_type=std_logic lab=VDDA}
+C {devices/lab_pin.sym} 450.5 -89 2 0 {name=l7 sig_type=std_logic lab=VDD}
+C {devices/lab_pin.sym} 560.5 31 2 0 {name=l1 sig_type=std_logic lab=GND}
+C {devices/lab_pin.sym} 600.5 81 2 0 {name=l6 sig_type=std_logic lab=VOUT}
+C {devices/lab_pin.sym} 430.5 -61 0 1 {name=l9 sig_type=std_logic lab=VOUT}
+C {devices/lab_pin.sym} 460.5 141 2 0 {name=l10 sig_type=std_logic lab=VDDA}
+C {devices/lab_pin.sym} 450.5 -9 2 0 {name=l13 sig_type=std_logic lab=GND}
+C {devices/lab_pin.sym} 590.5 -69 2 0 {name=l14 sig_type=std_logic lab=VDD}
+C {devices/lab_pin.sym} 460.5 71 2 0 {name=l15 sig_type=std_logic lab=VDDA}
+C {devices/lab_pin.sym} 460.5 91 2 0 {name=l16 sig_type=std_logic lab=VDD}
+C {devices/lab_pin.sym} 440.5 119 0 1 {name=l17 sig_type=std_logic lab=VOUT}
+C {devices/lab_pin.sym} 440.5 171 2 0 {name=l18 sig_type=std_logic lab=GND}
diff --git a/xschem/lthinverter (copy).sch b/xschem/lthinverter (copy).sch
new file mode 100644
index 0000000..65b1dcf
--- /dev/null
+++ b/xschem/lthinverter (copy).sch
@@ -0,0 +1,157 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+T {level shifter (one way, inverting)} 205 392.5 0 0 0.4 0.4 {}
+N 140 200 145 192.5 {
+lab=VDDA}
+N 95 302.5 100 310 {
+lab=VIN}
+N 140 260 140 280 {
+lab=#net1}
+N 100 230 100 310 {
+lab=VIN}
+N 140 230 160 230 {
+lab=VDDA}
+N 160 190 160 230 {
+lab=VDDA}
+N 140 200 160 190 {
+lab=VDDA}
+N 140 310 140 340 {
+lab=GND}
+N 135 345 140 340 {
+lab=GND}
+N 135 345 135 350 {
+lab=GND}
+N 140 270 180 270 {
+lab=#net1}
+N 300 215 305 207.5 {
+lab=VDDA}
+N 300 275 300 295 {
+lab=#net2}
+N 260 245 260 325 {
+lab=#net1}
+N 300 245 320 245 {
+lab=VDDA}
+N 320 205 320 245 {
+lab=VDDA}
+N 300 215 320 205 {
+lab=VDDA}
+N 300 325 300 355 {
+lab=GND}
+N 295 360 300 355 {
+lab=GND}
+N 295 360 295 365 {
+lab=GND}
+N 300 285 340 285 {
+lab=#net2}
+N 180 270 260 280 {
+lab=#net1}
+N 460 230 465 222.5 {
+lab=VDDA}
+N 460 290 460 310 {
+lab=VOUT}
+N 420 260 420 340 {
+lab=#net2}
+N 460 260 480 260 {
+lab=VDDA}
+N 480 220 480 260 {
+lab=VDDA}
+N 460 230 480 220 {
+lab=VDDA}
+N 460 340 460 370 {
+lab=GND}
+N 455 375 460 370 {
+lab=GND}
+N 455 375 455 380 {
+lab=GND}
+N 460 300 500 300 {
+lab=VOUT}
+N 340 285 420 295 {
+lab=#net2}
+N 500 300 609 299.5 {
+lab=VOUT}
+C {devices/vsource.sym} -265 277.5 0 0 {name=VDD value=1.8 net_name=true}
+C {devices/gnd.sym} -265 307.5 0 0 {name=l1 lab=GND}
+C {devices/vdd.sym} -265 247.5 0 0 {name=l2 lab=VDD}
+C {devices/vsource.sym} -305 470 0 0 {name=VIN only_toplevel=true value=0 net_name=true}
+C {devices/gnd.sym} -305 500 0 0 {name=l5 lab=GND}
+C {devices/lab_pin.sym} 609 299.5 3 1 {name=l6 sig_type=std_logic lab=VOUT}
+C {devices/vsource.sym} -45 270 0 0 {name=VDDA value=3.3 net_name=true}
+C {devices/gnd.sym} -45 300 0 0 {name=l19 lab=GND}
+C {devices/vdd.sym} -45 240 0 0 {name=l20 lab=VDDA}
+C {devices/vdd.sym} 145 192.5 0 0 {name=l22 lab=VDDA}
+C {devices/lab_pin.sym} -305 440 3 1 {name=l25 sig_type=std_logic lab=VIN}
+C {devices/lab_pin.sym} 95 302.5 2 1 {name=l26 lab=VIN}
+C {devices/code.sym} -27.5 435 0 0 {name=TT_MODELS
+only_toplevel=true
+format="tcleval( @value )"
+value="
+** opencircuitdesign pdks install
+.lib $::SKYWATER_MODELS/sky130.lib.spice tt
+
+"
+spice_ignore=false}
+C {devices/code_shown.sym} 290 495 0 0 {name=NGSPICE only_toplevel=true value="
+.option savecurrents
+.option wnflag=1
+*VIN VIN 0 dc 0 PULSE(0 1.8 0.0 1u 1u 1u 1u)
+.control
+save all
+* dc VIN 1.8 0 -0.01
+tran 1u 50u
+write test2.raw
+plot v(VIN) v(VOUT)
+.endc
+"}
+C {devices/gnd.sym} 135 347.5 0 0 {name=l23 lab=GND}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 120 230 0 0 {name=M9
+L=0.5
+W=2
+nf=1 mult=1
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {devices/vdd.sym} 305 207.5 0 0 {name=l3 lab=VDDA}
+C {devices/gnd.sym} 295 362.5 0 0 {name=l7 lab=GND}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 280 245 0 0 {name=M1
+L=0.5
+W=2
+nf=1 mult=1
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet_05v0_nvt.sym} 280 325 0 0 {name=M2
+L=0.9
+W=1
+nf=1 mult=1
+model=nfet_05v0_nvt
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet_03v3_nvt.sym} 120 310 0 0 {name=M3
+L=0.5
+W=1
+nf=1 mult=1
+model=nfet_03v3_nvt
+spiceprefix=X
+}
+C {devices/vdd.sym} 465 222.5 0 0 {name=l4 lab=VDDA}
+C {devices/gnd.sym} 455 377.5 0 0 {name=l8 lab=GND}
+C {sky130_fd_pr/pfet_g5v0d10v5.sym} 440 260 0 0 {name=M4
+L=0.5
+W=2
+nf=1 mult=1
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 440 340 0 0 {name=M21
+L=0.5
+W=1
+body=GND
+nf=1 mult=1
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
diff --git a/xschem/lthinverter.sch b/xschem/lthinverter.sch
index 8cae014..4f636b9 100644
--- a/xschem/lthinverter.sch
+++ b/xschem/lthinverter.sch
@@ -11,7 +11,7 @@ lab=VDDA}
N 95 302.5 100 310 {
lab=VIN}
N 140 260 140 280 {
-lab=#net1}
+lab=VOUT}
N 100 230 100 310 {
lab=VIN}
N 140 230 160 230 {
@@ -27,87 +27,13 @@ lab=GND}
N 135 345 135 350 {
lab=GND}
N 140 270 180 270 {
-lab=#net1}
-N 300 215 305 207.5 {
-lab=VDDA}
-N 300 275 300 295 {
-lab=#net2}
-N 260 245 260 325 {
-lab=#net1}
-N 300 245 320 245 {
-lab=VDDA}
-N 320 205 320 245 {
-lab=VDDA}
-N 300 215 320 205 {
-lab=VDDA}
-N 300 325 300 355 {
-lab=GND}
-N 295 360 300 355 {
-lab=GND}
-N 295 360 295 365 {
-lab=GND}
-N 300 285 340 285 {
-lab=#net2}
-N 180 270 260 280 {
-lab=#net1}
-N 460 230 465 222.5 {
-lab=VDDA}
-N 460 290 460 310 {
-lab=VOUT}
-N 420 260 420 340 {
-lab=#net2}
-N 460 260 480 260 {
-lab=VDDA}
-N 480 220 480 260 {
-lab=VDDA}
-N 460 230 480 220 {
-lab=VDDA}
-N 460 340 460 370 {
-lab=GND}
-N 455 375 460 370 {
-lab=GND}
-N 455 375 455 380 {
-lab=GND}
-N 460 300 500 300 {
lab=VOUT}
-N 340 285 420 295 {
-lab=#net2}
-N 500 300 609 299.5 {
+N 180 270 269 279.5 {
lab=VOUT}
-C {devices/vsource.sym} -265 277.5 0 0 {name=VDD value=1.8 net_name=true}
-C {devices/gnd.sym} -265 307.5 0 0 {name=l1 lab=GND}
-C {devices/vdd.sym} -265 247.5 0 0 {name=l2 lab=VDD}
-C {devices/vsource.sym} -305 470 0 0 {name=VIN only_toplevel=true value="dc 0 PULSE(0 1.8 0.0 0.1u 0.1u 1u 0)" net_name=true}
-C {devices/gnd.sym} -305 500 0 0 {name=l5 lab=GND}
-C {devices/lab_pin.sym} 609 299.5 3 1 {name=l6 sig_type=std_logic lab=VOUT}
-C {devices/vsource.sym} -45 270 0 0 {name=VDDA value=3.3 net_name=true}
-C {devices/gnd.sym} -45 300 0 0 {name=l19 lab=GND}
-C {devices/vdd.sym} -45 240 0 0 {name=l20 lab=VDDA}
-C {devices/vdd.sym} 145 192.5 0 0 {name=l22 lab=VDDA}
-C {devices/lab_pin.sym} -305 440 3 1 {name=l25 sig_type=std_logic lab=VIN}
-C {devices/lab_pin.sym} 95 302.5 2 1 {name=l26 lab=VIN}
-C {devices/code.sym} -27.5 435 0 0 {name=TT_MODELS
-only_toplevel=true
-format="tcleval( @value )"
-value="
-** opencircuitdesign pdks install
-.lib $::SKYWATER_MODELS/sky130.lib.spice tt
-
-"
-spice_ignore=false}
-C {devices/code_shown.sym} 290 495 0 0 {name=NGSPICE only_toplevel=true value="
-.option savecurrents
-.option wnflag=1
-*VIN VIN 0 dc 0 PULSE(0 1.8 0.0 1u 1u 1u 1u)
-.control
-save all
-* dc VIN 1.8 0 -0.01
-tran 1u 50u
-write test2.raw
-plot v(VIN) v(VOUT)
-.endc
-"}
-C {devices/gnd.sym} 135 347.5 0 0 {name=l23 lab=GND}
+C {devices/opin.sym} 269 279.5 3 1 {name=l6 sig_type=std_logic lab=VOUT}
+C {devices/iopin.sym} -45 242.5 2 1 {name=l2 lab=GND}
+C {devices/ipin.sym} 95 302.5 2 1 {name=l26 lab=VIN}
+C {devices/iopin.sym} -55 192.5 2 1 {name=l1 lab=VDDA}
C {sky130_fd_pr/pfet_g5v0d10v5.sym} 120 230 0 0 {name=M9
L=0.5
W=2
@@ -115,42 +41,13 @@ nf=1 mult=1
model=pfet_g5v0d10v5
spiceprefix=X
}
-C {devices/vdd.sym} 305 207.5 0 0 {name=l3 lab=VDDA}
-C {devices/gnd.sym} 295 362.5 0 0 {name=l7 lab=GND}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 280 245 0 0 {name=M1
-L=0.5
-W=2
-nf=1 mult=1
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_05v0_nvt.sym} 280 325 0 0 {name=M2
-L=0.9
-W=1
-nf=1 mult=1
-model=nfet_05v0_nvt
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_03v3_nvt.sym} 120 310 0 0 {name=M3
-L=0.5
-W=1
-nf=1 mult=1
-model=nfet_03v3_nvt
-spiceprefix=X
-}
-C {devices/vdd.sym} 465 222.5 0 0 {name=l4 lab=VDDA}
-C {devices/gnd.sym} 455 377.5 0 0 {name=l8 lab=GND}
-C {sky130_fd_pr/pfet_g5v0d10v5.sym} 440 260 0 0 {name=M4
+C {devices/gnd.sym} 135 347.5 0 0 {name=l23 lab=GND}
+C {devices/vdd.sym} 145 192.5 0 0 {name=l22 lab=VDDA}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 120 310 0 0 {name=M3
L=0.5
-W=2
-nf=1 mult=1
-model=pfet_g5v0d10v5
-spiceprefix=X
-}
-C {sky130_fd_pr/nfet_05v0_nvt.sym} 440 340 0 0 {name=M5
-L=0.9
W=1
+body=GND
nf=1 mult=1
-model=nfet_05v0_nvt
+model=nfet_g5v0d10v5
spiceprefix=X
}
diff --git a/xschem/lthinverter.sym b/xschem/lthinverter.sym
new file mode 100644
index 0000000..999434c
--- /dev/null
+++ b/xschem/lthinverter.sym
@@ -0,0 +1,28 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -30 130 -30 {}
+L 4 -130 30 130 30 {}
+L 4 -130 -30 -130 30 {}
+L 4 130 -30 130 30 {}
+L 4 130 20 150 20 {}
+L 4 -150 -20 -130 -20 {}
+L 7 130 -20 150 -20 {}
+L 7 130 0 150 0 {}
+B 5 147.5 -22.5 152.5 -17.5 {name=VDDA dir=inout}
+B 5 147.5 -2.5 152.5 2.5 {name=GND dir=inout}
+B 5 147.5 17.5 152.5 22.5 {name=VOUT sig_type=std_logic dir=out}
+B 5 -152.5 -22.5 -147.5 -17.5 {name=VIN dir=in}
+T {@symname} -67.5 -6 0 0 0.3 0.3 {}
+T {@name} 135 -42 0 0 0.2 0.2 {}
+T {VDDA} 125 -24 0 1 0.2 0.2 {}
+T {GND} 125 -4 0 1 0.2 0.2 {}
+T {VOUT} 125 16 0 1 0.2 0.2 {}
+T {VIN} -125 -24 0 0 0.2 0.2 {}
diff --git a/xschem/simulation/comp.out b/xschem/simulation/comp.out
new file mode 100644
index 0000000..ba2f020
--- /dev/null
+++ b/xschem/simulation/comp.out
@@ -0,0 +1,58 @@
+
+Circuit 1 cell sky130_fd_pr__nfet_g5v0d10v5 and Circuit 2 cell sky130_fd_pr__nfet_g5v0d10v5 are black boxes.
+Equate elements: no current cell.
+Device classes sky130_fd_pr__nfet_g5v0d10v5 and sky130_fd_pr__nfet_g5v0d10v5 are equivalent.
+
+Circuit 1 cell sky130_fd_pr__pfet_g5v0d10v5 and Circuit 2 cell sky130_fd_pr__pfet_g5v0d10v5 are black boxes.
+Equate elements: no current cell.
+Device classes sky130_fd_pr__pfet_g5v0d10v5 and sky130_fd_pr__pfet_g5v0d10v5 are equivalent.
+Flattening unmatched subcell sky130_fd_pr__nfet_g5v0d10v5_UNEQ2N in circuit lthinverter (0)(1 instance)
+Flattening unmatched subcell sky130_fd_pr__pfet_g5v0d10v5_KLD8Y6 in circuit lthinverter (0)(1 instance)
+
+Subcircuit summary:
+Circuit 1: lthinverter |Circuit 2: lthinverter
+-------------------------------------------|-------------------------------------------
+sky130_fd_pr__nfet_g5v0d10v5 (1) |sky130_fd_pr__nfet_g5v0d10v5 (1)
+sky130_fd_pr__pfet_g5v0d10v5 (1) |sky130_fd_pr__pfet_g5v0d10v5 (1)
+Number of devices: 2 |Number of devices: 2
+Number of nets: 4 |Number of nets: 4
+---------------------------------------------------------------------------------------
+NET mismatches: Class fragments follow (with fanout counts):
+Circuit 1: lthinverter |Circuit 2: lthinverter
+
+---------------------------------------------------------------------------------------
+Net: VOUT |Net: VOUT
+ sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 1 | sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 1
+ sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 1 | sky130_fd_pr__pfet_g5v0d10v5/(1|3) = 1
+ |
+Net: VIN |Net: VIN
+ sky130_fd_pr__nfet_g5v0d10v5/2 = 1 | sky130_fd_pr__nfet_g5v0d10v5/2 = 1
+ sky130_fd_pr__pfet_g5v0d10v5/2 = 1 | sky130_fd_pr__pfet_g5v0d10v5/2 = 1
+ |
+Net: GND |Net: GND
+ sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 1 | sky130_fd_pr__nfet_g5v0d10v5/(1|3) = 1
+ sky130_fd_pr__nfet_g5v0d10v5/4 = 1 |
+---------------------------------------------------------------------------------------
+DEVICE mismatches: Class fragments follow (with node fanout counts):
+Circuit 1: lthinverter |Circuit 2: lthinverter
+
+---------------------------------------------------------------------------------------
+Instance: sky130_fd_pr__nfet_g5v0d10v5_UNE |Instance: sky130_fd_pr__nfet_g5v0d10v5:M3
+ (1,3) = (2,2) | (1,3) = (2,1)
+ 2 = 2 | 2 = 2
+ 4 = 2 |
+---------------------------------------------------------------------------------------
+Netlists do not match.
+
+Subcircuit pins:
+Circuit 1: lthinverter |Circuit 2: lthinverter
+-------------------------------------------|-------------------------------------------
+VOUT |VOUT
+GND |VIN **Mismatch**
+VIN |GND **Mismatch**
+VDDA |VDDA
+---------------------------------------------------------------------------------------
+Cell pin lists for lthinverter and lthinverter altered to match.
+Device classes lthinverter and lthinverter are equivalent.
+
+Final result: Top level cell failed pin matching.
diff --git a/xschem/simulation/dacswitch.spice b/xschem/simulation/dacswitch.spice
new file mode 100644
index 0000000..6ace27f
--- /dev/null
+++ b/xschem/simulation/dacswitch.spice
@@ -0,0 +1,12 @@
+** sch_path: /home/ttuser/Desktop/tt09-sar-adc-dac-combo/xschem/dacswitch.sch
+.subckt dacswitch GND VDDA Cin VDD VOUT
+*.PININFO GND:B VDDA:B Cin:I VDD:B VOUT:O
+x3 net5 VGND VNB VPB VPWR net4 sky130_fd_sc_hd__inv_1
+x4 Cin net3 VGND VNB VPB VPWR VOUT sky130_fd_sc_hd__nor2_1
+x5 Cin VGND VNB VPB VPWR net1 sky130_fd_sc_hd__inv_1
+x6 net4 net1 VGND VNB VPB VPWR net2 sky130_fd_sc_hd__nor2_1
+x7 VOUT VGND VNB VPB VPWR net5 sky130_fd_sc_hd__inv_1
+x8 net6 VGND VNB VPB VPWR net3 sky130_fd_sc_hd__inv_1
+x9 net2 VGND VNB VPB VPWR net6 sky130_fd_sc_hd__inv_1
+.ends
+.end
diff --git a/xschem/simulation/lthinverter.spice b/xschem/simulation/lthinverter.spice
new file mode 100644
index 0000000..f52549b
--- /dev/null
+++ b/xschem/simulation/lthinverter.spice
@@ -0,0 +1,9 @@
+** sch_path: /home/ttuser/Desktop/tt09-sar-adc-dac-combo/xschem/lthinverter.sch
+.subckt lthinverter VDDA GND VOUT VIN
+*.PININFO VOUT:O GND:B VIN:I VDDA:B
+XM9 VOUT VIN VDDA VDDA sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=2 nf=1 m=1
+XM3 VOUT VIN GND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=1 nf=1 m=1
+.ends
+.GLOBAL GND
+.GLOBAL VDDA
+.end
diff --git a/xschem/simulation/tt_asw_3v3.spice b/xschem/simulation/tt_asw_3v3.spice
new file mode 100644
index 0000000..b25261a
--- /dev/null
+++ b/xschem/simulation/tt_asw_3v3.spice
@@ -0,0 +1,19 @@
+** sch_path: /home/ttuser/Desktop/tt09-sar-adc-dac-combo/xschem/tt_asw_3v3.sch
+.subckt tt_asw_3v3 VGND VDPWR VAPWR ctrl mod bus
+*.PININFO mod:B bus:B ctrl:I VGND:B VDPWR:B VAPWR:B
+XM1 tgon_n net2 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.84 nf=1 m=1
+XM2 tgon_n net2 VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM3 tgon net1 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.84 nf=1 m=1
+XM4 tgon net1 VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM5 bus tgon_n mod sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=180 nf=18 m=1
+XM6 bus tgon mod sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=60 nf=12 m=1
+XM7 ctrl_n ctrl VGND sky130_fd_pr__nfet_01v8 L=0.15 W=0.42 nf=1 m=1
+XM8 ctrl_n ctrl VDPWR sky130_fd_pr__pfet_01v8_hvt L=0.15 W=1 nf=1 m=1
+XM9 net1 ctrl VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM10 net2 ctrl_n VGND sky130_fd_pr__nfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM11 net1 net2 net3 sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM12 net2 net1 net4 sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM13 net3 net1 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+XM14 net4 net2 VAPWR sky130_fd_pr__pfet_g5v0d10v5 L=0.5 W=0.42 nf=1 m=1
+.ends
+.end
diff --git a/xschem/tt_asw_3v3.sch b/xschem/tt_asw_3v3.sch
new file mode 100644
index 0000000..6acbdc4
--- /dev/null
+++ b/xschem/tt_asw_3v3.sch
@@ -0,0 +1,372 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {}
+V {}
+S {}
+E {}
+T {Transmission gate (incl. level shifting)} 380 -190 0 0 0.4 0.4 {}
+N 1210 -520 1240 -520 {
+lab=bus}
+N 1210 -420 1210 -340 {
+lab=bus}
+N 1210 -340 1240 -340 {
+lab=bus}
+N 1300 -520 1330 -520 {
+lab=mod}
+N 1330 -420 1330 -340 {
+lab=mod}
+N 1300 -340 1330 -340 {
+lab=mod}
+N 1210 -520 1210 -420 {
+lab=bus}
+N 1330 -520 1330 -420 {
+lab=mod}
+N 1270 -580 1270 -560 {
+lab=tgon_n}
+N 1270 -300 1270 -280 {
+lab=tgon}
+N 1170 -430 1210 -430 {
+lab=bus}
+N 1330 -430 1370 -430 {
+lab=mod}
+N -190 -480 -170 -480 {
+lab=ctrl}
+N -190 -480 -190 -380 {
+lab=ctrl}
+N -190 -380 -170 -380 {
+lab=ctrl}
+N -230 -430 -190 -430 {
+lab=ctrl}
+N -130 -350 -130 -330 {
+lab=VGND}
+N -130 -530 -130 -510 {
+lab=VDPWR}
+N -130 -450 -130 -410 {
+lab=ctrl_n}
+N -130 -430 -50 -430 {
+lab=ctrl_n}
+N 460 -400 460 -360 {
+lab=#net1}
+N 680 -400 680 -360 {
+lab=#net2}
+N 460 -380 520 -380 {
+lab=#net1}
+N 520 -380 600 -430 {
+lab=#net1}
+N 600 -430 640 -430 {
+lab=#net1}
+N 500 -430 540 -430 {
+lab=#net2}
+N 540 -430 620 -380 {
+lab=#net2}
+N 620 -380 680 -380 {
+lab=#net2}
+N 400 -260 680 -260 {
+lab=VGND}
+N 680 -300 680 -260 {
+lab=VGND}
+N 460 -300 460 -260 {
+lab=VGND}
+N 380 -330 420 -330 {
+lab=ctrl}
+N 720 -330 760 -330 {
+lab=ctrl_n}
+N 460 -500 460 -460 {
+lab=#net3}
+N 680 -500 680 -460 {
+lab=#net4}
+N 680 -380 720 -380 {
+lab=#net2}
+N 720 -380 740 -380 {
+lab=#net2}
+N 740 -530 740 -380 {
+lab=#net2}
+N 720 -530 740 -530 {
+lab=#net2}
+N 400 -380 460 -380 {
+lab=#net1}
+N 400 -530 400 -380 {
+lab=#net1}
+N 400 -530 420 -530 {
+lab=#net1}
+N 460 -600 460 -560 {
+lab=VAPWR}
+N 460 -600 680 -600 {
+lab=VAPWR}
+N 680 -600 680 -560 {
+lab=VAPWR}
+N 400 -600 460 -600 {
+lab=VAPWR}
+N 840 -530 860 -530 {
+lab=#net2}
+N 840 -530 840 -330 {
+lab=#net2}
+N 840 -330 860 -330 {
+lab=#net2}
+N 740 -430 840 -430 {
+lab=#net2}
+N 680 -600 900 -600 {
+lab=VAPWR}
+N 900 -600 900 -560 {
+lab=VAPWR}
+N 680 -260 900 -260 {
+lab=VGND}
+N 900 -300 900 -260 {
+lab=VGND}
+N 900 -500 900 -360 {
+lab=tgon_n}
+N 900 -430 940 -430 {
+lab=tgon_n}
+N 300 -430 400 -430 {
+lab=#net1}
+N 280 -530 300 -530 {
+lab=#net1}
+N 280 -330 300 -330 {
+lab=#net1}
+N 300 -530 300 -330 {
+lab=#net1}
+N 240 -500 240 -360 {
+lab=tgon}
+N 120 -260 400 -260 {
+lab=VGND}
+N 240 -300 240 -260 {
+lab=VGND}
+N 120 -600 400 -600 {
+lab=VAPWR}
+N 240 -600 240 -560 {
+lab=VAPWR}
+N 200 -430 240 -430 {
+lab=tgon}
+N -230 -260 120 -260 {
+lab=VGND}
+N -130 -330 -130 -260 {
+lab=VGND}
+N -230 -600 -130 -600 {
+lab=VDPWR}
+N -130 -600 -130 -530 {
+lab=VDPWR}
+C {devices/title.sym} 160 -30 0 0 {name=l1 author="Sylvain Munaut"}
+C {devices/iopin.sym} 1370 -430 0 0 {name=p6 lab=mod sim_pinnumber=5}
+C {devices/iopin.sym} 1170 -430 0 1 {name=p7 lab=bus sim_pinnumber=6}
+C {devices/lab_wire.sym} 1270 -580 0 1 {name=p3 sig_type=std_logic lab=tgon_n}
+C {devices/lab_wire.sym} 1270 -280 2 0 {name=p4 sig_type=std_logic lab=tgon}
+C {devices/ipin.sym} -230 -430 2 1 {name=p5 lab=ctrl sim_pinnumber=4}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 880 -530 0 0 {name=M1
+W=0.84
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 880 -330 0 0 {name=M2
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 260 -530 0 1 {name=M3
+W=0.84
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 260 -330 0 1 {name=M4
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 1270 -540 1 0 {name=M5
+W=180
+L=0.5
+body=VAPWR
+nf=18
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 1270 -320 3 0 {name=M6
+W=60
+L=0.5
+body=VGND
+nf=12
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {devices/iopin.sym} -230 -260 2 0 {name=p8 lab=VGND sim_pinnumber=1}
+C {devices/iopin.sym} -230 -600 2 0 {name=p9 lab=VDPWR sim_pinnumber=2}
+C {sky130_fd_pr/nfet3_01v8.sym} -150 -380 0 0 {name=M7
+W=0.42
+L=0.15
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_01v8
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_01v8_hvt.sym} -150 -480 0 0 {name=M8
+W=1
+L=0.15
+body=VDPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_01v8_hvt
+spiceprefix=X
+}
+C {devices/lab_wire.sym} -50 -430 0 1 {name=p10 sig_type=std_logic lab=ctrl_n}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 440 -330 0 0 {name=M9
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/nfet3_g5v0d10v5.sym} 700 -330 0 1 {name=M10
+W=0.42
+L=0.5
+body=VGND
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=nfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 480 -430 0 1 {name=M11
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 660 -430 0 0 {name=M12
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 440 -530 0 0 {name=M13
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {sky130_fd_pr/pfet3_g5v0d10v5.sym} 700 -530 0 1 {name=M14
+W=0.42
+L=0.5
+body=VAPWR
+nf=1
+mult=1
+ad="'int((nf+1)/2) * W/nf * 0.29'"
+pd="'2*int((nf+1)/2) * (W/nf + 0.29)'"
+as="'int((nf+2)/2) * W/nf * 0.29'"
+ps="'2*int((nf+2)/2) * (W/nf + 0.29)'"
+nrd="'0.29 / W'" nrs="'0.29 / W'"
+sa=0 sb=0 sd=0
+model=pfet_g5v0d10v5
+spiceprefix=X
+}
+C {devices/lab_wire.sym} 760 -330 0 1 {name=p12 sig_type=std_logic lab=ctrl_n}
+C {devices/lab_wire.sym} 380 -330 0 0 {name=p13 sig_type=std_logic lab=ctrl}
+C {devices/iopin.sym} 120 -600 2 0 {name=p14 lab=VAPWR sim_pinnumber=3}
+C {devices/lab_wire.sym} 940 -430 0 1 {name=p1 sig_type=std_logic lab=tgon_n}
+C {devices/lab_wire.sym} 200 -430 0 0 {name=p2 sig_type=std_logic lab=tgon}
diff --git a/xschem/tt_asw_3v3.sym b/xschem/tt_asw_3v3.sym
new file mode 100644
index 0000000..82b3641
--- /dev/null
+++ b/xschem/tt_asw_3v3.sym
@@ -0,0 +1,34 @@
+v {xschem version=3.4.5 file_version=1.2
+}
+G {}
+K {type=subcircuit
+format="@name @pinlist @symname"
+template="name=x1"
+}
+V {}
+S {}
+E {}
+L 4 -130 -50 130 -50 {}
+L 4 -130 50 130 50 {}
+L 4 -150 -40 -130 -40 {}
+L 4 -130 -50 -130 50 {}
+L 4 130 -50 130 50 {}
+L 7 130 -40 150 -40 {}
+L 7 130 0 150 0 {}
+L 7 130 20 150 20 {}
+L 7 130 -20 150 -20 {}
+L 7 130 40 150 40 {}
+B 5 147.5 -42.5 152.5 -37.5 {name=VAPWR dir=inout sim_pinnumber=3}
+B 5 -152.5 -42.5 -147.5 -37.5 {name=ctrl dir=in sim_pinnumber=4}
+B 5 147.5 -2.5 152.5 2.5 {name=mod dir=inout sim_pinnumber=5}
+B 5 147.5 17.5 152.5 22.5 {name=bus dir=inout sim_pinnumber=6}
+B 5 147.5 -22.5 152.5 -17.5 {name=VDPWR dir=inout sim_pinnumber=2}
+B 5 147.5 37.5 152.5 42.5 {name=VGND dir=inout sim_pinnumber=1}
+T {@symname} -63 -6 0 0 0.3 0.3 {}
+T {@name} 135 -62 0 0 0.2 0.2 {}
+T {VAPWR} 125 -44 0 1 0.2 0.2 {}
+T {ctrl} -125 -44 0 0 0.2 0.2 {}
+T {mod} 125 -4 0 1 0.2 0.2 {}
+T {bus} 125 16 0 1 0.2 0.2 {}
+T {VDPWR} 125 -24 0 1 0.2 0.2 {}
+T {VGND} 125 36 0 1 0.2 0.2 {}