diff --git a/Components/9918/Implementation/9918.cpp b/Components/9918/Implementation/9918.cpp index b8a589e35d..984b8e7829 100644 --- a/Components/9918/Implementation/9918.cpp +++ b/Components/9918/Implementation/9918.cpp @@ -30,30 +30,6 @@ Base::Base() : // Unimaginatively, this class just passes RGB through to the shader. Investigation is needed // into whether there's a more natural form. It feels unlikely given the diversity of chips modelled. - if constexpr (is_sega_vdp(personality)) { - // Cf. https://www.smspower.org/forums/8161-SMSDisplayTiming - - // "For a line interrupt, /INT is pulled low 608 mclks into the appropriate scanline relative to pixel 0. - // This is 3 mclks before the rising edge of /HSYNC which starts the next scanline." - // - // i.e. it's 304 internal clocks after the end of the left border. - mode_timing_.line_interrupt_position = (LineLayout::EndOfLeftBorder + 304) % LineLayout::CyclesPerLine; - - // For a frame interrupt, /INT is pulled low 607 mclks into scanline 192 (of scanlines 0 through 261) relative to pixel 0. - // This is 4 mclks before the rising edge of /HSYNC which starts the next scanline. - // - // i.e. it's 1/2 cycle before the line interrupt position, which I have rounded. Ugh. - mode_timing_.end_of_frame_interrupt_position.column = mode_timing_.line_interrupt_position - 1; - mode_timing_.end_of_frame_interrupt_position.row = 192 + (LineLayout::EndOfLeftBorder + 304) / LineLayout::CyclesPerLine; - } - - if constexpr (is_yamaha_vdp(personality)) { - // TODO: this is used for interrupt _prediction_ but won't handle text modes correctly, and indeed - // can't be just a single value where the programmer has changed into or out of text modes during the - // middle of a line, since screen mode is latched (so it'll be one value for that line, another from then onwards).a - mode_timing_.line_interrupt_position = LineLayout::EndOfPixels; - } - // Establish that output is delayed after reading by `output_lag` cycles, // i.e. the fetch pointer is currently _ahead_ of the output pointer. output_pointer_.row = output_pointer_.column = 0; @@ -61,6 +37,22 @@ Base::Base() : fetch_pointer_ = output_pointer_; fetch_pointer_.column += output_lag; + // The fetch pointer is interpreted such that its zero is at the mode-latch cycle. + // Conversely the output pointer has zero be at start of sync. So the following + // is a mere change-of-origin. + // + // Logically, any mode latch time greater than 0 — i.e. beyond the start of sync — will + // cause fetch_pointer_ to **regress**. It will be set to the value it was at the start + // of sync, ready to overflow to 0 upon mode latch. When it overflows, the fetch row + // will be incremented. + // + // Therefore the nominal output row at instantiation needs to be one greater than the + // fetch row, as that's the first row that'll actually be fetched. + fetch_pointer_.column = to_internal(output_pointer_.column); + if(LineLayout::ModeLatchCycle) { + ++output_pointer_.row; + } + fetch_line_buffer_ = line_buffers_.begin(); draw_line_buffer_ = line_buffers_.begin(); fetch_sprite_buffer_ = sprite_buffers_.begin(); @@ -224,7 +216,7 @@ void TMS9918::run_for(const HalfCycles cycles) { // TODO: where did this magic constant come from? https://www.smspower.org/forums/17970-RoadRashHow#111000 mentioned in passing // that "the vertical scroll register is latched at the start of the active display" and this is two clocks before that, so it's // not uncompelling. I can just no longer find my source. - constexpr auto latch_time = LineLayout::EndOfLeftBorder - 2; + constexpr auto latch_time = to_internal(LineLayout::EndOfLeftBorder - 2); static_assert(latch_time > 0); if(this->fetch_pointer_.column < latch_time && end_column >= latch_time) { Storage::latched_vertical_scroll_ = Storage::vertical_scroll_; @@ -283,13 +275,15 @@ void TMS9918::run_for(const HalfCycles cycles) { // ------------------------------- // Check for interrupt conditions. // ------------------------------- - if constexpr (is_sega_vdp(personality)) { + if constexpr (LineLayout::HasFixedLineInterrupt) { // The Sega VDP offers a decrementing counter for triggering line interrupts; // it is reloaded either when it overflows or upon every non-pixel line after the first. // It is otherwise decremented. + + constexpr int FixedLineInterrupt = to_internal(LineLayout::FixedLineInterrupt); if( - this->fetch_pointer_.column < this->mode_timing_.line_interrupt_position && - end_column >= this->mode_timing_.line_interrupt_position + this->fetch_pointer_.column < FixedLineInterrupt && + end_column >= FixedLineInterrupt ) { if(this->fetch_pointer_.row >= 0 && this->fetch_pointer_.row <= this->mode_timing_.pixel_lines) { if(!this->line_interrupt_counter_) { diff --git a/Components/9918/Implementation/9918Base.hpp b/Components/9918/Implementation/9918Base.hpp index 4b4085f45b..94e9f36d45 100644 --- a/Components/9918/Implementation/9918Base.hpp +++ b/Components/9918/Implementation/9918Base.hpp @@ -170,16 +170,6 @@ template struct Base: public Storage { // then the appropriate status information will be set. int maximum_visible_sprites = 4; - // Set the position, in cycles, of the two interrupts, - // within a line. - // - // TODO: redetermine where this number came from. - struct { - int column = 313; - int row = 192; - } end_of_frame_interrupt_position; - int line_interrupt_position = -1; - // Enables or disabled the recognition of the sprite // list terminator, and sets the terminator value. bool allow_sprite_terminator = true; diff --git a/Components/9918/Implementation/ClockConverter.hpp b/Components/9918/Implementation/ClockConverter.hpp index 2aa9d840f5..1735468189 100644 --- a/Components/9918/Implementation/ClockConverter.hpp +++ b/Components/9918/Implementation/ClockConverter.hpp @@ -24,9 +24,15 @@ enum class Clock { TMSMemoryWindow, /// A fixed 1368-cycle/line clock that is used to count output to the CRT. CRT, +}; + +enum class Origin { + /// + ModeLatch, + /// Provides the same clock rate as ::Internal but is relocated so that 0 is the start of horizontal sync — very not coincidentally, /// where Grauw puts 0 on his detailed TMS and Yamaha timing diagrams. - FromStartOfSync, + StartOfSync, }; template constexpr int clock_rate() { @@ -41,7 +47,6 @@ template constexpr int clock_rate() { case Clock::TMSMemoryWindow: return 171; case Clock::CRT: return 1368; case Clock::Internal: - case Clock::FromStartOfSync: if constexpr (is_classic_vdp(personality)) { return 342; } else if constexpr (is_yamaha_vdp(personality)) { @@ -52,36 +57,50 @@ template constexpr int clock_rate() { } } -/// Statelessly converts @c length to the internal clock for @c personality; applies conversions per the list of clocks in left-to-right order. -template constexpr int to_internal(int length) { - if constexpr (head == Clock::FromStartOfSync) { - length = (length + LineLayout::StartOfSync) % LineLayout::CyclesPerLine; - } else { - length = length * clock_rate() / clock_rate(); - } +/// Scales @c length from @c clock to the internal clock rate. +template constexpr int to_internal(int length) { + return length * clock_rate() / clock_rate(); +} - if constexpr (!sizeof...(tail)) { - return length; - } else { - return to_internal(length); +/// Moves @c position that is relative to @c Origin::StartOfSync so that it is relative to @c origin ; +/// i.e. can be thought of as "to [internal with origin as specified]". +template constexpr int to_internal(int position) { + if constexpr (origin == Origin::ModeLatch) { + return ( + position + LineLayout::CyclesPerLine - LineLayout::ModeLatchCycle + ) % LineLayout::CyclesPerLine; } + return position; } -/// Statelessly converts @c length to @c clock from the the internal clock used by VDPs of @c personality throwing away any remainder. -template constexpr int from_internal(int length) { - if constexpr (head == Clock::FromStartOfSync) { - length = - (length + LineLayout::CyclesPerLine - LineLayout::StartOfSync) - % LineLayout::CyclesPerLine; - } else { - length = length * clock_rate() / clock_rate(); - } +/// Converts @c position from one that is measured at the rate implied by @c clock and relative to @c Origin::StartOfSync +/// to one that is at the internal clock rate and relative to @c origin. +template constexpr int to_internal(int position) { + position = to_internal(position); + return to_internal(position); +} + +/// Scales @c length from the internal clock rate to @c clock. +template constexpr int from_internal(int length) { + return length * clock_rate() / clock_rate(); +} - if constexpr (!sizeof...(tail)) { - return length; - } else { - return to_internal(length); +/// Moves @c position that is relative to @c origin so that it is relative to @c Origin::StartOfSync ; +/// i.e. can be thought of as "from [internal with origin as specified]". +template constexpr int from_internal(int length) { + if constexpr (origin == Origin::ModeLatch) { + return ( + length + LineLayout::ModeLatchCycle + ) % LineLayout::CyclesPerLine; } + return length; +} + +/// Converts @c position from one that is measured at the internal clock rate and relative to @c origin +/// to one that is at the rate implied by @c clock and relative to @c Origin::StartOfSync +template constexpr int from_internal(int position) { + position = from_internal(position); + return from_internal(position); } /*! diff --git a/Components/9918/Implementation/Fetch.hpp b/Components/9918/Implementation/Fetch.hpp index 0457705361..c5e4007324 100644 --- a/Components/9918/Implementation/Fetch.hpp +++ b/Components/9918/Implementation/Fetch.hpp @@ -54,7 +54,7 @@ template void Base::dispatch(Seq #define index(n) \ if(use_end && end == n) return; \ [[fallthrough]]; \ - case n: fetcher.template fetch(n)>(); + case n: fetcher.template fetch(n)>(); switch(start) { default: assert(false); @@ -373,7 +373,7 @@ struct RefreshSequencer { template void fetch() { if(cycle < 26 || (cycle & 1) || cycle >= 154) { - base->do_external_slot(to_internal(cycle)); + base->do_external_slot(to_internal(cycle)); } } @@ -387,7 +387,7 @@ struct TextSequencer { template void fetch() { // The first 30 and the final 4 slots are external. if constexpr (cycle < 30 || cycle >= 150) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); return; } else { // For the 120 slots in between follow a three-step pattern of: @@ -398,7 +398,7 @@ struct TextSequencer { fetcher.fetch_name(column); break; case 1: // (2) external slot. - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); break; case 2: // (3) fetch tile pattern. fetcher.fetch_pattern(column); @@ -419,7 +419,7 @@ struct CharacterSequencer { template void fetch() { if(cycle < 5) { - character_fetcher.base->do_external_slot(to_internal(cycle)); + character_fetcher.base->do_external_slot(to_internal(cycle)); } if(cycle == 5) { @@ -430,7 +430,7 @@ struct CharacterSequencer { } if(cycle > 14 && cycle < 19) { - character_fetcher.base->do_external_slot(to_internal(cycle)); + character_fetcher.base->do_external_slot(to_internal(cycle)); } // Fetch 8 new sprite Y coordinates, to begin selecting sprites for next line. @@ -448,7 +448,7 @@ struct CharacterSequencer { case 0: character_fetcher.fetch_name(block); break; case 1: if(!(block & 3)) { - character_fetcher.base->do_external_slot(to_internal(cycle)); + character_fetcher.base->do_external_slot(to_internal(cycle)); } else { constexpr int sprite = 8 + ((block >> 2) * 3) + ((block & 3) - 1); sprite_fetcher.fetch_y(sprite); @@ -463,7 +463,7 @@ struct CharacterSequencer { } if(cycle >= 155 && cycle < 157) { - character_fetcher.base->do_external_slot(to_internal(cycle)); + character_fetcher.base->do_external_slot(to_internal(cycle)); } if(cycle == 157) { @@ -511,7 +511,7 @@ struct SMSSequencer { // window 0 to HSYNC low. template void fetch() { if(cycle < 3) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); } if(cycle == 3) { @@ -522,7 +522,7 @@ struct SMSSequencer { } if(cycle == 15 || cycle == 16) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); } if(cycle == 17) { @@ -543,7 +543,7 @@ struct SMSSequencer { case 0: fetcher.fetch_tile_name(block); break; case 1: if(!(block & 3)) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); } else { constexpr int sprite = (8 + ((block >> 2) * 3) + ((block & 3) - 1)) << 1; fetcher.posit_sprite(sprite); @@ -555,7 +555,7 @@ struct SMSSequencer { } if(cycle >= 153 && cycle < 157) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); } if(cycle == 157) { @@ -566,7 +566,7 @@ struct SMSSequencer { } if(cycle >= 169) { - fetcher.base->do_external_slot(to_internal(cycle)); + fetcher.base->do_external_slot(to_internal(cycle)); } } diff --git a/Components/9918/Implementation/LineLayout.hpp b/Components/9918/Implementation/LineLayout.hpp index 460ee9d709..b858023b2c 100644 --- a/Components/9918/Implementation/LineLayout.hpp +++ b/Components/9918/Implementation/LineLayout.hpp @@ -28,8 +28,11 @@ template struct LineLayout; // * horizontal adjust on the Yamaha VDPs is applied to EndOfLeftBorder and EndOfPixels; // * the Sega VDPs may programatically extend the left border; and // * text mode on all VDPs adjusts border width. +// +// ModeLaytchCycle is the cycle at which the video mode, blank disable/enable and +// sprite enable/disable are latched for the line. -template struct LineLayout> { +template struct LineLayout> { constexpr static int StartOfSync = 0; constexpr static int EndOfSync = 26; constexpr static int StartOfColourBurst = 29; @@ -48,11 +51,34 @@ template struct LineLayout struct LineLayout> : + public LineLayout { + + // Cf. https://www.smspower.org/forums/8161-SMSDisplayTiming + + // "For a line interrupt, /INT is pulled low 608 mclks into the appropriate scanline relative to pixel 0. + // This is 3 mclks before the rising edge of /HSYNC which starts the next scanline." + // + // i.e. it's 304 internal clocks after the end of the left border. + constexpr static bool HasFixedLineInterrupt = false; + constexpr static int FixedLineInterrupt = (EndOfLeftBorder + 304) % CyclesPerLine; + + // For a frame interrupt, /INT is pulled low 607 mclks into scanline 192 (of scanlines 0 through 261) relative to pixel 0. + // This is 4 mclks before the rising edge of /HSYNC which starts the next scanline. + // + // i.e. it's 1/2 cycle before the line interrupt position, which I have rounded. Ugh. + constexpr static int EndOfFrameInterrupt = 313; +}; + template struct LineLayout> { constexpr static int StartOfSync = 0; constexpr static int EndOfSync = 100; @@ -70,6 +96,10 @@ template struct LineLayout(c)); + const int mapped_location = from_internal(c); + const auto event = GeneratorT::event(mapped_location); if(!event) { continue; } diff --git a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme index 3534e99265..474fa352ea 100644 --- a/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme +++ b/OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme @@ -1,7 +1,7 @@ + version = "1.8">