You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
The address pins of the EEPROMs are wired such that they appear at I2C address 0x50 and 0x52, instead of 0x50 and 051 as shown in the original schematics. This is easy enough to fix in the ATmega code that handles "disks":
Or, the address pins can be rewired on the bottom layer of the board by cutting traces and adding jumpers (the PCB layout is designed to allow this to be done "relatively easily.")
The text was updated successfully, but these errors were encountered:
That's pretty! The extra unmasked vias (VCC and GND) by the EEPROMs were actually put there to allow them to be "easily" re-addressed, so I anticipated something like:
But there's a certain elegance to the nice, straight, fixed-length jumpers...
Do you think it was helpful to have the "cut" spots of the traces unmasked? My theory was that having them uncovered would be "nice", but I see they got solder-plated instead of masked, so I'm not sure that worked out the way I had in mind. (at least, not for reasonably transparent soldermasks.)
The address pins of the EEPROMs are wired such that they appear at I2C address 0x50 and 0x52, instead of 0x50 and 051 as shown in the original schematics. This is easy enough to fix in the ATmega code that handles "disks":
#define EXT_EEPROM1 0x52 // I2C EEPROM 1 address (128kB))
Or, the address pins can be rewired on the bottom layer of the board by cutting traces and adding jumpers (the PCB layout is designed to allow this to be done "relatively easily.")
The text was updated successfully, but these errors were encountered: