diff --git a/include/aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h b/include/aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h index dac7d906ec..57cc6eedac 100644 --- a/include/aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h +++ b/include/aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h @@ -18,7 +18,7 @@ namespace mlir { class LLVMTypeConverter; class RewritePatternSet; -class Pass; +class ModuleOp; } // namespace mlir namespace xilinx { diff --git a/include/aie/Conversion/Passes.td b/include/aie/Conversion/Passes.td index 67ea543c7a..23051cdd32 100644 --- a/include/aie/Conversion/Passes.td +++ b/include/aie/Conversion/Passes.td @@ -24,7 +24,8 @@ def ConvertAIEVecToLLVM : Pass<"convert-aievec-to-llvm", "mlir::ModuleOp"> { let constructor = "xilinx::aievec::createConvertAIEVecToLLVMPass()"; let dependentDialects = ["LLVM::LLVMDialect", "mlir::arith::ArithDialect", - "mlir::vector::VectorDialect"]; + "mlir::vector::VectorDialect", + "xilinx::xllvm::XLLVMDialect"]; } #endif // AIE_CONVERSION_PASSES diff --git a/include/aie/Dialect/AIEVec/IR/AIEVecOps.td b/include/aie/Dialect/AIEVec/IR/AIEVecOps.td index 5bcde41dba..7180728df1 100644 --- a/include/aie/Dialect/AIEVec/IR/AIEVecOps.td +++ b/include/aie/Dialect/AIEVec/IR/AIEVecOps.td @@ -14,7 +14,6 @@ #define AIEVEC_OPS include "aie/Dialect/AIE/IR/AIEAttrs.td" -include "aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td" include "aie/Dialect/AIEVec/IR/AIEVecTypes.td" include "aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td" diff --git a/include/aie/Dialect/AIEVec/Utils/Utils.h b/include/aie/Dialect/AIEVec/Utils/Utils.h index fe7be3e5c7..79e5014b07 100644 --- a/include/aie/Dialect/AIEVec/Utils/Utils.h +++ b/include/aie/Dialect/AIEVec/Utils/Utils.h @@ -16,14 +16,6 @@ #include #include -namespace llvm { - -class CallInst; -class IRBuilderBase; -class StringRef; - -} // namespace llvm - namespace mlir { class AffineExpr; @@ -31,10 +23,6 @@ class AffineForOp; class AffineMap; class Operation; -namespace LLVM { -class ModuleTranslation; -} // namespace LLVM - } // namespace mlir namespace xilinx::aievec { @@ -49,12 +37,6 @@ std::optional getTransferReadAlignmentOffset(TransferReadLikeOp readOp, mlir::VectorType vType, int64_t alignment); -llvm::CallInst * -createExternalIntrinsicCall(llvm::IRBuilderBase &builder, - mlir::LLVM::ModuleTranslation &moduleTranslation, - mlir::Operation *intrOp, - llvm::StringRef intrinsicName); - } // namespace xilinx::aievec #endif // AIE_DIALECT_AIEVEC_UTILS_UTILS_H diff --git a/include/aie/Dialect/CMakeLists.txt b/include/aie/Dialect/CMakeLists.txt index 04a333c1f0..94820033d5 100644 --- a/include/aie/Dialect/CMakeLists.txt +++ b/include/aie/Dialect/CMakeLists.txt @@ -4,8 +4,10 @@ # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception # # (c) Copyright 2021 Xilinx Inc. +# (c) Copyright 2024 Advanced Micro Devices, Inc. add_subdirectory(ADF) add_subdirectory(AIE) add_subdirectory(AIEX) add_subdirectory(AIEVec) +add_subdirectory(XLLVM) diff --git a/include/aie/Dialect/XLLVM/CMakeLists.txt b/include/aie/Dialect/XLLVM/CMakeLists.txt new file mode 100644 index 0000000000..3bf2d01814 --- /dev/null +++ b/include/aie/Dialect/XLLVM/CMakeLists.txt @@ -0,0 +1,8 @@ +# +# This file is licensed under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# +# (c) Copyright 2024 Advanced Micro Devices, Inc. + +add_subdirectory(IR) diff --git a/include/aie/Dialect/XLLVM/IR/CMakeLists.txt b/include/aie/Dialect/XLLVM/IR/CMakeLists.txt new file mode 100644 index 0000000000..199f2c4688 --- /dev/null +++ b/include/aie/Dialect/XLLVM/IR/CMakeLists.txt @@ -0,0 +1,17 @@ +# +# This file is licensed under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# +# (c) Copyright 2024 Advanced Micro Devices, Inc. + +add_mlir_dialect(XLLVM xllvm) +add_mlir_doc(XLLVMOps XLLVMOps ./ -gen-dialect-doc -dialect=xllvm) + +# Add XLLVM operations +set(LLVM_TARGET_DEFINITIONS XLLVMOps.td) +mlir_tablegen(XLLVMOps.h.inc -gen-op-decls) +mlir_tablegen(XLLVMOps.cpp.inc -gen-op-defs) +add_public_tablegen_target(MLIRXLLVMOpsIncGen) +mlir_tablegen(XLLVMConversions.inc -gen-llvmir-conversions) +add_public_tablegen_target(MLIRXLLVMConversionsIncGen) diff --git a/include/aie/Dialect/XLLVM/IR/XLLVM.td b/include/aie/Dialect/XLLVM/IR/XLLVM.td new file mode 100644 index 0000000000..e35949407a --- /dev/null +++ b/include/aie/Dialect/XLLVM/IR/XLLVM.td @@ -0,0 +1,42 @@ +//===- XLLVM.td - XLLVM Dialect definition ----------------*- tablegen -*-====// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2024 Advanced Micro Devices, Inc. +// +//===----------------------------------------------------------------------===// +// Defines External LLVM (XLLVM) dialect. +//===----------------------------------------------------------------------===// + +#ifndef AIE_DIALECT_XLLVM_IR_XLLVM_TD +#define AIE_DIALECT_XLLVM_IR_XLLVM_TD + +include "mlir/IR/OpBase.td" +include "mlir/Dialect/LLVMIR/LLVMOpBase.td" + +def XLLVM_Dialect : Dialect { + let name = "xllvm"; + let summary = "Types and operations for external LLVM dialect"; + let cppNamespace = "::xilinx::xllvm"; +} + +// Base clase for external LLVM intrinsic operations +class ExtIntrOpBase traits, + int numResults +> : LLVM_OpBase, + Results { + string llvmBuilder = [{ + auto *inst = ::xilinx::xllvm::createExternalLLVMIntrinsicCall(builder, + moduleTranslation, &opInst, "llvm.}] # enumName # [{"); + (void) inst; + $res = inst; + }]; + string mlirBuilder = ""; + list llvmArgIndices = []; +} + +#endif // AIE_DIALECT_XLLVM_IR_XLLVMDIALECT_TD diff --git a/include/aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td b/include/aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td similarity index 60% rename from include/aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td rename to include/aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td index 931b17ea74..5e0bccae0a 100644 --- a/include/aie/Dialect/AIEVec/IR/AIEVecLLVMIntrOp.td +++ b/include/aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td @@ -1,46 +1,32 @@ -#ifndef AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD -#define AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD +//===- XLLVMAIE2IntrOps.td - XLLVM AIE2 intr. op defs. ----*- tablegen -*-====// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2024 Advanced Micro Devices, Inc. +// +//===----------------------------------------------------------------------===// +// Defines external LLVM (XLLVM) intrinsic operations for AIE2 devices. +//===----------------------------------------------------------------------===// -include "aie/Dialect/AIE/IR/AIEAttrs.td" -include "aie/Dialect/AIEVec/IR/AIEVecTypes.td" -include "aie/Dialect/AIEVec/IR/AIEVecTypeConstraints.td" +#ifndef AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD +#define AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD + +include "aie/Dialect/XLLVM/IR/XLLVM.td" include "mlir/Interfaces/InferTypeOpInterface.td" include "mlir/Interfaces/SideEffectInterfaces.td" -include "mlir/Dialect/LLVMIR/LLVMOpBase.td" - -class ExtIntrOpBase traits, - int numResults -> : LLVM_OpBase, - Results { - string llvmBuilder = [{ - auto *inst = ::xilinx::aievec::createExternalIntrinsicCall(builder, moduleTranslation, &opInst, "llvm.}] # - enumName # [{"); - (void) inst; - $res = inst; - }]; - string mlirBuilder = ""; - list llvmArgIndices = []; -} - -// TODO: Create an aievecllvm dialect so it can be marked legal all at once. -// TODO: That will require moving AIEVecLLVMIntrOp.td _out_ of AIEVecOps.td -// TODO: header, which is how these are being generated. // For AIE2 only class AIEVec2_IntrOp traits = [], int numResults = 1> : - ExtIntrOpBase; - // TODO: Find better names for these def MacConfAcc32IntrOp : AIEVec2_IntrOp<"I512.I512.ACC1024.acc32.mac.conf", @@ -77,4 +63,4 @@ def VectorSetI512I256IntrOp : Arguments<(ins VectorOfLengthAndType<[8], [I32]>:$src, I32:$pos)>; -#endif // AIE_DIALECT_AIEVEC_IR_AIEVECLLVMINTROP_TD +#endif // AIE_DIALECT_XLLVM_IR_XLLVMAIE2INTROPS_TD diff --git a/include/aie/Dialect/XLLVM/IR/XLLVMOps.td b/include/aie/Dialect/XLLVM/IR/XLLVMOps.td new file mode 100644 index 0000000000..697c60a8f6 --- /dev/null +++ b/include/aie/Dialect/XLLVM/IR/XLLVMOps.td @@ -0,0 +1,21 @@ +//===- XLLVMOps.td - XLLVM dialect op definitions ---------*- tablegen -*-====// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2024 Advanced Micro Devices, Inc. +// +//===----------------------------------------------------------------------===// +// Defines external LLVM (XLLVM) dialect operations. +//===----------------------------------------------------------------------===// + +#ifndef AIE_DIALECT_XLLVM_IR_XLLVMOPS_TD +#define AIE_DIALECT_XLLVM_IR_XLLVMOPS_TD + +include "aie/Dialect/XLLVM/IR/XLLVM.td" + +// Include AIE2 intrinsics. +include "aie/Dialect/XLLVM/IR/XLLVMAIE2IntrOps.td" + +#endif diff --git a/include/aie/Dialect/XLLVM/XLLVMDialect.h b/include/aie/Dialect/XLLVM/XLLVMDialect.h new file mode 100644 index 0000000000..c1fa5e2d79 --- /dev/null +++ b/include/aie/Dialect/XLLVM/XLLVMDialect.h @@ -0,0 +1,72 @@ +//===- XLLVMDialect.h - External LLVM (xllvm) dialect --------------C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file defines the XLLVM dialect, containing LLVM intrinsic operations +// for an external LLVM compiler. +// +//===----------------------------------------------------------------------===// + +#ifndef AIE_DIALECT_XLLVM_XLLVMDIALECT_H +#define AIE_DIALECT_XLLVM_XLLVMDIALECT_H + +#include "mlir/Bytecode/BytecodeOpInterface.h" +#include "mlir/Dialect/LLVMIR/LLVMAttrs.h" +#include "mlir/Dialect/LLVMIR/LLVMInterfaces.h" +#include "mlir/Dialect/LLVMIR/LLVMTypes.h" +#include "mlir/IR/BuiltinOps.h" +#include "mlir/IR/Dialect.h" +#include "mlir/IR/OpDefinition.h" +#include "mlir/IR/OpImplementation.h" +#include "mlir/IR/TypeSupport.h" +#include "mlir/IR/Types.h" +#include "mlir/Interfaces/CallInterfaces.h" +#include "mlir/Interfaces/ControlFlowInterfaces.h" +#include "mlir/Interfaces/FunctionInterfaces.h" +#include "mlir/Interfaces/InferTypeOpInterface.h" +#include "mlir/Interfaces/SideEffectInterfaces.h" +#include "mlir/Support/ThreadLocalCache.h" +#include "mlir/Transforms/Mem2Reg.h" +#include "llvm/ADT/PointerEmbeddedInt.h" +#include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/LLVMContext.h" +#include "llvm/IR/Module.h" +#include "llvm/IR/Type.h" + +#define GET_OP_CLASSES +#include "aie/Dialect/XLLVM/IR/XLLVMOps.h.inc" + +#include "aie/Dialect/XLLVM/IR/XLLVMDialect.h.inc" + +namespace llvm { + +class CallInst; +class IRBuilderBase; +class StringRef; + +} // namespace llvm + +namespace mlir { + +class Operation; + +namespace LLVM { +class ModuleTranslation; +} // namespace LLVM + +} // namespace mlir + +namespace xilinx::xllvm { + +llvm::CallInst *createExternalLLVMIntrinsicCall( + llvm::IRBuilderBase &builder, + mlir::LLVM::ModuleTranslation &moduleTranslation, mlir::Operation *intrOp, + llvm::StringRef intrinsicName); + +} // namespace xilinx::xllvm + +#endif // AIE_DIALECT_XLLVM_XLLVMDIALECT_H diff --git a/include/aie/InitialAllDialect.h b/include/aie/InitialAllDialect.h index 30409e8864..0338cd0645 100644 --- a/include/aie/InitialAllDialect.h +++ b/include/aie/InitialAllDialect.h @@ -18,6 +18,7 @@ #include "aie/Dialect/AIE/IR/AIEDialect.h" #include "aie/Dialect/AIEVec/IR/AIEVecDialect.h" #include "aie/Dialect/AIEX/IR/AIEXDialect.h" +#include "aie/Dialect/XLLVM/XLLVMDialect.h" #include "mlir/IR/Dialect.h" @@ -28,9 +29,10 @@ inline void registerAllDialects(mlir::DialectRegistry ®istry) { // clang-format off registry.insert< ADF::ADFDialect, - aievec::AIEVecDialect, AIE::AIEDialect, - AIEX::AIEXDialect + aievec::AIEVecDialect, + AIEX::AIEXDialect, + xllvm::XLLVMDialect >(); // clang-format on } diff --git a/include/aie/Target/LLVMIR/Dialect/All.h b/include/aie/Target/LLVMIR/Dialect/All.h index 969e1683b6..a8568d8ffd 100644 --- a/include/aie/Target/LLVMIR/Dialect/All.h +++ b/include/aie/Target/LLVMIR/Dialect/All.h @@ -16,7 +16,7 @@ #ifndef AIE_TARGET_LLVMIR_DIALECT_ALL_H #define AIE_TARGET_LLVMIR_DIALECT_ALL_H -#include "aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h" +#include "aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h" namespace mlir { class DialectRegistry; @@ -25,7 +25,7 @@ class DialectRegistry; namespace xilinx { static inline void registerAllAIEToLLVMIRTranslations(mlir::DialectRegistry ®istry) { - aievec::registerAIEVecDialectTranslation(registry); + xllvm::registerXLLVMDialectTranslation(registry); } } // namespace xilinx diff --git a/include/aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h b/include/aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h similarity index 65% rename from include/aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h rename to include/aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h index 11b5ad9410..59064c43ff 100644 --- a/include/aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h +++ b/include/aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h @@ -1,4 +1,4 @@ -//===- AIEVecToLLVMIRTranslation.h - AIEVec to LLVM dialect -----*- C++ -*-===// +//===- XLLVMToLLVMIRTranslation.h - XLLVM to LLVM IR translate -*- C++ -*-===// // // This file is licensed under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -8,29 +8,29 @@ // //===----------------------------------------------------------------------===// // -// This provides registration calls for AIEVec dialect to LLVM dialect +// This provides registration calls for XLLVM intrinsics to LLVM IR // translation. // //===----------------------------------------------------------------------===// -#ifndef AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H -#define AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H +#ifndef AIE_TARGET_LLVMIR_DIALECT_XLLVM_H +#define AIE_TARGET_LLVMIR_DIALECT_XLLVM_H namespace mlir { class DialectRegistry; class MLIRContext; } // namespace mlir -namespace xilinx::aievec { +namespace xilinx::xllvm { /// Register the AIEVec dialect and the translation from it to the LLVM dialect /// in the given registry. -void registerAIEVecDialectTranslation(mlir::DialectRegistry ®istry); +void registerXLLVMDialectTranslation(mlir::DialectRegistry ®istry); /// Register the AIEVec dialect and the translation from it to the LLVM dialect /// in the registry associated with the given context. -void registerAIEVecDialectTranslation(mlir::MLIRContext &context); +void registerXLLVMDialectTranslation(mlir::MLIRContext &context); -} // namespace xilinx::aievec +} // namespace xilinx::xllvm #endif // AIE_TARGET_LLVMIR_DIALECT_AIEVEC_H diff --git a/lib/CAPI/CMakeLists.txt b/lib/CAPI/CMakeLists.txt index 3dd6790976..892957d40c 100644 --- a/lib/CAPI/CMakeLists.txt +++ b/lib/CAPI/CMakeLists.txt @@ -19,6 +19,7 @@ add_mlir_public_c_api_library(AIECAPI MLIRAIEVecTransforms MLIRAIEVecUtils MLIRTargetAIEVecCpp + MLIRXLLVMToLLVMIRTranslation ) target_include_directories(AIECAPI PUBLIC ${VITIS_AIETOOLS_DIR}/include) diff --git a/lib/CAPI/Dialects.cpp b/lib/CAPI/Dialects.cpp index a144d819e2..680a50f977 100644 --- a/lib/CAPI/Dialects.cpp +++ b/lib/CAPI/Dialects.cpp @@ -10,6 +10,7 @@ #include "aie/Dialect/AIE/IR/AIEDialect.h" #include "aie/Dialect/AIEVec/IR/AIEVecDialect.h" #include "aie/Dialect/AIEX/IR/AIEXDialect.h" +#include "aie/Dialect/XLLVM/XLLVMDialect.h" #include "mlir/CAPI/Registration.h" @@ -17,6 +18,7 @@ MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(AIE, aie, xilinx::AIE::AIEDialect) MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(AIEX, aiex, xilinx::AIEX::AIEXDialect) MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(AIEVec, aievec, xilinx::aievec::AIEVecDialect) +MLIR_DEFINE_CAPI_DIALECT_REGISTRATION(XLLVM, xllvm, xilinx::xllvm::XLLVMDialect) //===---------------------------------------------------------------------===// // ObjectFifoType diff --git a/lib/CAPI/Registration.cpp b/lib/CAPI/Registration.cpp index af395b4697..18ce91f010 100644 --- a/lib/CAPI/Registration.cpp +++ b/lib/CAPI/Registration.cpp @@ -1,20 +1,20 @@ //===- Registration.cpp -----------------------------------------*- C++ -*-===// // -// Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. +// Copyright (C) 2022, 2024 Advanced Micro Devices, Inc. All rights reserved. // SPDX-License-Identifier: MIT // //===----------------------------------------------------------------------===// #include "aie-c/Registration.h" -#include "aie/InitialAllDialect.h" - #include "aie/Conversion/Passes.h" #include "aie/Dialect/AIE/Transforms/AIEPasses.h" #include "aie/Dialect/AIEVec/Analysis/Passes.h" #include "aie/Dialect/AIEVec/Pipelines/Passes.h" #include "aie/Dialect/AIEVec/Transforms/Passes.h" #include "aie/Dialect/AIEX/Transforms/AIEXPasses.h" +#include "aie/InitialAllDialect.h" +#include "aie/Target/LLVMIR/Dialect/All.h" #include "mlir/IR/Dialect.h" #include "mlir/InitAllDialects.h" @@ -39,5 +39,6 @@ void aieRegisterAllPasses() { registerAllExtensions(registry); registry.insert(); + xilinx::registerAllAIEToLLVMIRTranslations(registry); registerAllToLLVMIRTranslations(registry); } diff --git a/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp b/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp index 23c87c5164..a1b678804e 100644 --- a/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp +++ b/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp @@ -14,6 +14,7 @@ #include "aie/Conversion/AIEVecToLLVM/AIEVecToLLVM.h" #include "aie/Dialect/AIEVec/AIEVecUtils.h" #include "aie/Dialect/AIEVec/IR/AIEVecOps.h" +#include "aie/Dialect/XLLVM/XLLVMDialect.h" #include "mlir/Conversion/LLVMCommon/ConversionTarget.h" #include "mlir/Conversion/LLVMCommon/Pattern.h" #include "mlir/Dialect/LLVMIR/LLVMDialect.h" @@ -36,7 +37,7 @@ inline static Value bitcastValueToType(OpBuilder &builder, Location loc, inline static Value widen128bVectorValueTo512b(OpBuilder &builder, Location loc, Value val) { return builder - .create( + .create( loc, VectorType::get({16}, builder.getI32Type()), bitcastValueToType(builder, loc, val, VectorType::get({4}, builder.getI32Type()))) @@ -52,7 +53,7 @@ inline static Value widen256bVectorValueTo512b(OpBuilder &builder, Location loc, auto cst0 = builder.create(loc, builder.getI32Type(), (int32_t)0); return builder - .create( + .create( loc, VectorType::get({16}, builder.getI32Type()), bitcastValueToType(builder, loc, val, VectorType::get({8}, builder.getI32Type())), @@ -936,7 +937,7 @@ class MatMulOpConversion if (decodedMatMulOp.kind == DecodedMatMulOp::Kind::BF16) matMulResVal = rewriter - .create( + .create( loc, VectorType::get({8}, rewriter.getI64Type()), forceCastOperandsToSignature( rewriter, loc, operands, @@ -952,14 +953,14 @@ class MatMulOpConversion VectorType v16xi64ty = VectorType::get({16}, rewriter.getI64Type()); if (decodedMatMulOp.kind == DecodedMatMulOp::Kind::I32) matMulResVal = rewriter - .create( + .create( loc, v16xi64ty, forceCastOperandsToSignature( rewriter, loc, operands, intrFuncSig)) .getResult(); else matMulResVal = rewriter - .create( + .create( loc, v16xi64ty, forceCastOperandsToSignature( rewriter, loc, operands, intrFuncSig)) @@ -1012,11 +1013,8 @@ struct ConvertAIEVecToLLVMPass LLVMConversionTarget target(getContext()); target.addIllegalDialect(); - target.addLegalDialect(); - target - .addLegalOp(); + target.addLegalDialect(); if (failed(applyPartialConversion(getOperation(), target, std::move(patterns)))) signalPassFailure(); diff --git a/lib/Conversion/AIEVecToLLVM/CMakeLists.txt b/lib/Conversion/AIEVecToLLVM/CMakeLists.txt index 5d470aac98..acba6d9780 100644 --- a/lib/Conversion/AIEVecToLLVM/CMakeLists.txt +++ b/lib/Conversion/AIEVecToLLVM/CMakeLists.txt @@ -15,4 +15,5 @@ add_mlir_conversion_library(MLIRAIEVecToLLVM MLIRLLVMCommonConversion MLIRLLVMDialect MLIRTransforms + MLIRXLLVMDialect ) diff --git a/lib/Conversion/PassDetail.h b/lib/Conversion/PassDetail.h index 6207c68a24..51b78bb5f8 100644 --- a/lib/Conversion/PassDetail.h +++ b/lib/Conversion/PassDetail.h @@ -17,9 +17,21 @@ #include "mlir/Interfaces/FunctionInterfaces.h" #include "mlir/Pass/Pass.h" -namespace xilinx::aievec { +namespace xilinx { + +namespace aievec { + class AIEVecDialect; -} // namespace xilinx::aievec + +} // namespace aievec + +namespace xllvm { + +class XLLVMDialect; + +} // namespace xllvm + +} // namespace xilinx namespace mlir { diff --git a/lib/Dialect/AIEVec/Utils/Utils.cpp b/lib/Dialect/AIEVec/Utils/Utils.cpp index 1e215ba495..67f06ba327 100644 --- a/lib/Dialect/AIEVec/Utils/Utils.cpp +++ b/lib/Dialect/AIEVec/Utils/Utils.cpp @@ -16,7 +16,6 @@ #include "mlir/Dialect/Affine/IR/AffineOps.h" #include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Dialect/Vector/IR/VectorOps.h" -#include "mlir/Target/LLVMIR/ModuleTranslation.h" #include "llvm/ADT/TypeSwitch.h" #define DEBUG_TYPE "aievec-utils" @@ -96,31 +95,4 @@ template std::optional getTransferReadAlignmentOffset(vector::TransferReadOp::Adaptor readOp, VectorType vType, int64_t alignment); -static llvm::Function * -getNamedIntrinsicDeclaration(llvm::Module *M, llvm::StringRef fullName, - llvm::Type *resTy, ArrayRef argsTy) { - auto *FT = llvm::FunctionType::get(resTy, argsTy, /*isVarArg=*/false); - return cast(M->getOrInsertFunction(fullName, FT).getCallee()); -} - -llvm::CallInst * -createExternalIntrinsicCall(llvm::IRBuilderBase &builder, - LLVM::ModuleTranslation &moduleTranslation, - Operation *intrOp, llvm::StringRef intrinsicName) { - // We support 0 or 1 results - assert(intrOp->getNumResults() <= 1 && - "external multi-result intrinsics not supported"); - llvm::Type *resTy = nullptr; - if (intrOp->getNumResults()) - resTy = moduleTranslation.convertType(*(intrOp->getResultTypes().begin())); - auto operands = moduleTranslation.lookupValues(intrOp->getOperands()); - SmallVector types; - for (auto op : operands) - types.push_back(op->getType()); - llvm::Module *module = builder.GetInsertBlock()->getModule(); - llvm::Function *llvmIntr = - getNamedIntrinsicDeclaration(module, intrinsicName, resTy, types); - return builder.CreateCall(llvmIntr, operands); -} - } // namespace xilinx::aievec diff --git a/lib/Dialect/CMakeLists.txt b/lib/Dialect/CMakeLists.txt index 04a333c1f0..94820033d5 100644 --- a/lib/Dialect/CMakeLists.txt +++ b/lib/Dialect/CMakeLists.txt @@ -4,8 +4,10 @@ # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception # # (c) Copyright 2021 Xilinx Inc. +# (c) Copyright 2024 Advanced Micro Devices, Inc. add_subdirectory(ADF) add_subdirectory(AIE) add_subdirectory(AIEX) add_subdirectory(AIEVec) +add_subdirectory(XLLVM) diff --git a/lib/Dialect/XLLVM/CMakeLists.txt b/lib/Dialect/XLLVM/CMakeLists.txt new file mode 100644 index 0000000000..fa5b70aa5e --- /dev/null +++ b/lib/Dialect/XLLVM/CMakeLists.txt @@ -0,0 +1,20 @@ +# +# This file is licensed under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# +# (c) Copyright 2024 Advanced Micro Devices, Inc. + +add_mlir_dialect_library(MLIRXLLVMDialect + XLLVMOps.cpp + + ADDITIONAL_HEADER_DIRS + ${CMAKE_CURRENT_SOURCE_DIR}/../../../include/aie/Dialect/XLLVM + + DEPENDS + MLIRXLLVMOpsIncGen + + LINK_LIBS PUBLIC + MLIRIR + MLIRPass + ) diff --git a/lib/Dialect/XLLVM/XLLVMOps.cpp b/lib/Dialect/XLLVM/XLLVMOps.cpp new file mode 100644 index 0000000000..31356dcb81 --- /dev/null +++ b/lib/Dialect/XLLVM/XLLVMOps.cpp @@ -0,0 +1,68 @@ +//===---- XLLVMOps.cpp - XLLVM Dialect Operations ---------------*- C++ -*-===// +// +// This file is licensed under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +// (c) Copyright 2024 Advanced Micro Devices, Inc. +// +//===----------------------------------------------------------------------===// +// External LLVM (XLLVM) Dialect implementation. +//===----------------------------------------------------------------------===// + +#include "aie/Dialect/XLLVM/XLLVMDialect.h" +#include "mlir/Dialect/LLVMIR/LLVMTypes.h" +#include "mlir/IR/OpDefinition.h" +#include "mlir/IR/TypeUtilities.h" +#include "mlir/Target/LLVMIR/ModuleTranslation.h" +#include "mlir/Transforms/FoldUtils.h" + +using namespace mlir; +using namespace xilinx; +using namespace xilinx::xllvm; + +#include "aie/Dialect/XLLVM/IR/XLLVMDialect.cpp.inc" + +//===----------------------------------------------------------------------===// +// XLLVMDialect +//===----------------------------------------------------------------------===// + +void xllvm::XLLVMDialect::initialize() { + addOperations< +#define GET_OP_LIST +#include "aie/Dialect/XLLVM/IR/XLLVMOps.cpp.inc" + >(); +} + +namespace xilinx::xllvm { + +static llvm::Function * +getNamedIntrinsicDeclaration(llvm::Module *M, llvm::StringRef fullName, + llvm::Type *resTy, ArrayRef argsTy) { + auto *FT = llvm::FunctionType::get(resTy, argsTy, /*isVarArg=*/false); + return cast(M->getOrInsertFunction(fullName, FT).getCallee()); +} + +llvm::CallInst *createExternalLLVMIntrinsicCall( + llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, + Operation *intrOp, llvm::StringRef intrinsicName) { + // We support 0 or 1 results + assert(intrOp->getNumResults() <= 1 && + "external multi-result intrinsics not supported"); + llvm::Type *resTy = nullptr; + if (intrOp->getNumResults()) + resTy = moduleTranslation.convertType(*(intrOp->getResultTypes().begin())); + auto operands = moduleTranslation.lookupValues(intrOp->getOperands()); + SmallVector types; + for (auto op : operands) + types.push_back(op->getType()); + llvm::Module *module = builder.GetInsertBlock()->getModule(); + llvm::Function *llvmIntr = + getNamedIntrinsicDeclaration(module, intrinsicName, resTy, types); + return builder.CreateCall(llvmIntr, operands); +} + +} // namespace xilinx::xllvm + +#define GET_OP_CLASSES +#include "aie/Dialect/XLLVM/IR/XLLVMOps.cpp.inc" diff --git a/lib/Target/LLVMIR/Dialect/AIEVec/CMakeLists.txt b/lib/Target/LLVMIR/Dialect/AIEVec/CMakeLists.txt deleted file mode 100644 index 6cfcf41e65..0000000000 --- a/lib/Target/LLVMIR/Dialect/AIEVec/CMakeLists.txt +++ /dev/null @@ -1,18 +0,0 @@ -add_mlir_translation_library(MLIRAIEVecToLLVMIRTranslation - AIEVecToLLVMIRTranslation.cpp - - DEPENDS - MLIRAIEVecConversionsIncGen - - LINK_COMPONENTS - Core - - LINK_LIBS PUBLIC - MLIRIR - MLIRAIEVecDialect - MLIRAIEVecUtils - MLIRLLVMDialect - MLIRSupport - MLIRTargetLLVMIRExport - ) - diff --git a/lib/Target/LLVMIR/Dialect/CMakeLists.txt b/lib/Target/LLVMIR/Dialect/CMakeLists.txt index b69d8ec801..dc67b26110 100644 --- a/lib/Target/LLVMIR/Dialect/CMakeLists.txt +++ b/lib/Target/LLVMIR/Dialect/CMakeLists.txt @@ -1,2 +1,2 @@ -add_subdirectory(AIEVec) +add_subdirectory(XLLVM) diff --git a/lib/Target/LLVMIR/Dialect/XLLVM/CMakeLists.txt b/lib/Target/LLVMIR/Dialect/XLLVM/CMakeLists.txt new file mode 100644 index 0000000000..e284b9a44a --- /dev/null +++ b/lib/Target/LLVMIR/Dialect/XLLVM/CMakeLists.txt @@ -0,0 +1,17 @@ +add_mlir_translation_library(MLIRXLLVMToLLVMIRTranslation + XLLVMToLLVMIRTranslation.cpp + + DEPENDS + MLIRXLLVMConversionsIncGen + + LINK_COMPONENTS + Core + + LINK_LIBS PUBLIC + MLIRIR + MLIRLLVMDialect + MLIRSupport + MLIRTargetLLVMIRExport + MLIRXLLVMDialect + ) + diff --git a/lib/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.cpp b/lib/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.cpp similarity index 62% rename from lib/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.cpp rename to lib/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.cpp index 25f1ee98ca..4aa34db056 100644 --- a/lib/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.cpp +++ b/lib/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.cpp @@ -1,4 +1,4 @@ -//======- AIEVecToLLVMIRTranslation.cpp - Translate AIEVec to LLVM IR -=======// +//===- XLLVMToLLVMIRTranslation.cpp - Translate AIEVec to LLVM IR ---------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -12,10 +12,8 @@ // //===----------------------------------------------------------------------===// -#include "aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h" -#include "aie/Dialect/AIEVec/IR/AIEVecDialect.h" -#include "aie/Dialect/AIEVec/IR/AIEVecOps.h" -#include "aie/Dialect/AIEVec/Utils/Utils.h" +#include "aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h" +#include "aie/Dialect/XLLVM/XLLVMDialect.h" #include "mlir/IR/Operation.h" #include "mlir/Target/LLVMIR/ModuleTranslation.h" @@ -28,8 +26,8 @@ using namespace mlir::LLVM; namespace { /// Implementation of the dialect interface that converts operations belonging -/// to the AIEVec dialect to LLVM IR. -class AIEVecDialectLLVMIRTranslationInterface +/// to the XLLVM dialect to LLVM IR. +class XLLVMDialectLLVMIRTranslationInterface : public LLVMTranslationDialectInterface { public: using LLVMTranslationDialectInterface::LLVMTranslationDialectInterface; @@ -40,23 +38,22 @@ class AIEVecDialectLLVMIRTranslationInterface convertOperation(Operation *op, llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation) const final { Operation &opInst = *op; -#include "aie/Dialect/AIEVec/IR/AIEVecConversions.inc" +#include "aie/Dialect/XLLVM/IR/XLLVMConversions.inc" return failure(); } }; } // namespace -void xilinx::aievec::registerAIEVecDialectTranslation( - DialectRegistry ®istry) { - registry.insert(); - registry.addExtension(+[](MLIRContext *ctx, aievec::AIEVecDialect *dialect) { - dialect->addInterfaces(); +void xilinx::xllvm::registerXLLVMDialectTranslation(DialectRegistry ®istry) { + registry.insert(); + registry.addExtension(+[](MLIRContext *ctx, xllvm::XLLVMDialect *dialect) { + dialect->addInterfaces(); }); } -void xilinx::aievec::registerAIEVecDialectTranslation(MLIRContext &context) { +void xilinx::xllvm::registerXLLVMDialectTranslation(MLIRContext &context) { DialectRegistry registry; - registerAIEVecDialectTranslation(registry); + registerXLLVMDialectTranslation(registry); context.appendDialectRegistry(registry); } diff --git a/test/Conversion/AIEVecToLLVM/matmul.mlir b/test/Conversion/AIEVecToLLVM/matmul.mlir index 3e9cd55dba..aa36c92586 100644 --- a/test/Conversion/AIEVecToLLVM/matmul.mlir +++ b/test/Conversion/AIEVecToLLVM/matmul.mlir @@ -19,7 +19,7 @@ func.func @matmul(%A : vector<4x8xbf16>, %B : vector<8x4xbf16>, // CHECK-SAME: vector<4x4xf32> to vector<16xf32> // CHECK: %[[CONF:.*]] = llvm.mlir.constant(28 : i32) : i32 // CHECK: %[[BCACC:.*]] = llvm.bitcast %[[FC]] : vector<16xf32> to vector<8xi64> -// CHECK: %[[RACC:.*]] = "aievec.intr.bf.mac16.conf"( +// CHECK: %[[RACC:.*]] = "xllvm.intr.aie2.bf.mac16.conf"( // CHECK-SAME: %[[FA]], %[[FB]], %[[BCACC]], %[[CONF]]) : // CHECK-SAME: (vector<32xbf16>, vector<32xbf16>, vector<8xi64>, i32) // CHECK-SAME: -> vector<8xi64> @@ -50,13 +50,13 @@ func.func @matmul(%A : vector<4x8xi8>, %B : vector<8x8xi8>, // CHECK: %[[CONF:.*]] = llvm.mlir.constant(776 : i32) : i32 // CHECK: %[[C0I32:.*]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: %[[IFA2512b:.*]] = llvm.bitcast %[[FA]] : vector<32xi8> to vector<8xi32> -// CHECK: %[[IFA:.*]] = "aievec.intr.set.I512.I256"(%[[IFA2512b]], +// CHECK: %[[IFA:.*]] = "xllvm.intr.aie2.set.I512.I256"(%[[IFA2512b]], // CHECK-SAME: %[[C0I32]]) : (vector<8xi32>, i32) -> vector<16xi32> // CHECK: %[[BCA:.*]] = llvm.bitcast %[[IFA]] : vector<16xi32> to vector<64xi8> // CHECK: %[[BCB:.*]] = llvm.bitcast %[[FB]] : vector<64xi8> to vector<16xi32> // CHECK: %[[BCC:.*]] = llvm.bitcast %[[FC]] : vector<32xi32> to vector<16xi64> // CHECK: %[[RACC:.*]] = -// CHECK-SAME: "aievec.intr.I512.I512.ACC1024.acc32.mac.conf"( +// CHECK-SAME: "xllvm.intr.aie2.I512.I512.ACC1024.acc32.mac.conf"( // CHECK-SAME: %[[BCA]], %[[BCB]], %[[BCC]], %[[CONF]]) : // CHECK-SAME: (vector<64xi8>, vector<16xi32>, vector<16xi64>, i32) // CHECK-SAME: -> vector<16xi64> @@ -88,19 +88,19 @@ func.func @matmul(%A : vector<4x2xi32>, %B : vector<2x4xi16>, // CHECK: %[[C0I32:.*]] = llvm.mlir.constant(0 : i32) : i32 // CHECK: %[[IFA2512b:.*]] = llvm.bitcast %[[FA]] : vector<8xi32> to // CHECK-SAME: vector<8xi32> -// CHECK: %[[IFA:.*]] = "aievec.intr.set.I512.I256"(%[[IFA2512b]], +// CHECK: %[[IFA:.*]] = "xllvm.intr.aie2.set.I512.I256"(%[[IFA2512b]], // CHECK-SAME: %[[C0I32]]) : (vector<8xi32>, i32) -> // CHECK-SAME: vector<16xi32> // CHECK: %[[BCA:.*]] = llvm.bitcast %[[IFA]] : vector<16xi32> to // CHECK-SAME: vector<64xi8> // CHECK: %[[IFB2512b:.*]] = llvm.bitcast %[[FB]] : vector<8xi16> to // CHECK-SAME: vector<4xi32> -// CHECK: %[[IFB:.*]] = "aievec.intr.set.I512.I128"(%[[IFB2512b]]) : +// CHECK: %[[IFB:.*]] = "xllvm.intr.aie2.set.I512.I128"(%[[IFB2512b]]) : // CHECK-SAME: (vector<4xi32>) -> vector<16xi32> // CHECK: %[[BCB:.*]] = llvm.bitcast %[[IFB]] : vector<16xi32> to // CHECK-SAME: vector<16xi32> // CHECK: %[[RACC:.*]] = -// CHECK-SAME: "aievec.intr.I512.I512.ACC1024.acc64.mac.conf"( +// CHECK-SAME: "xllvm.intr.aie2.I512.I512.ACC1024.acc64.mac.conf"( // CHECK-SAME: %[[BCA]], %[[BCB]], %[[FC]], %[[CONF]]) : // CHECK-SAME: (vector<64xi8>, vector<16xi32>, vector<16xi64>, i32) // CHECK-SAME: -> vector<16xi64> diff --git a/test/Target/LLVMIR/aievec.mlir b/test/Target/LLVMIR/aievec.mlir index f3be3b5acc..d80a3c98d9 100644 --- a/test/Target/LLVMIR/aievec.mlir +++ b/test/Target/LLVMIR/aievec.mlir @@ -9,7 +9,7 @@ llvm.func @mac_conf_acc32(%A : vector<64xi8>, // CHECK: call <16 x i64> @llvm.aie2.I512.I512.ACC1024.acc32.mac.conf( // CHECK-SAME: <64 x i8> %{{[0-9]+}}, <16 x i32> %{{[0-9]+}}, // CHECK-SAME: <16 x i64> %{{[0-9]+}}, i32 %{{[0-9]+}}) - %0 = "aievec.intr.I512.I512.ACC1024.acc32.mac.conf"(%A, %B, %C, %cfg) : + %0 = "xllvm.intr.aie2.I512.I512.ACC1024.acc32.mac.conf"(%A, %B, %C, %cfg) : (vector<64xi8>, vector<16xi32>, vector<16xi64>, i32) -> vector<16xi64> llvm.return %0 : vector<16xi64> } @@ -23,7 +23,7 @@ llvm.func @mac_conf_bf16(%A : vector<32xbf16>, // CHECK: call <8 x i64> @llvm.aie2.bf.mac16.conf( // CHECK-SAME: <32 x bfloat> %{{[0-9]+}}, <32 x bfloat> %{{[0-9]+}}, // CHECK-SAME: <8 x i64> %{{[0-9]+}}, i32 %{{[0-9]+}}) - %0 = "aievec.intr.bf.mac16.conf"(%A, %B, %C, %cfg) : + %0 = "xllvm.intr.aie2.bf.mac16.conf"(%A, %B, %C, %cfg) : (vector<32xbf16>, vector<32xbf16>, vector<8xi64>, i32) -> vector<8xi64> llvm.return %0 : vector<8xi64> } @@ -31,7 +31,7 @@ llvm.func @mac_conf_bf16(%A : vector<32xbf16>, // CHECK-LABEL: define <16 x i32> @vector_set_128b_into_512b llvm.func @vector_set_128b_into_512b(%v : vector<4xi32>) -> vector<16xi32> { // CHECK: call <16 x i32> @llvm.aie2.set.I512.I128(<4 x i32> - %0 = "aievec.intr.set.I512.I128"(%v) : (vector<4xi32>) -> vector<16xi32> + %0 = "xllvm.intr.aie2.set.I512.I128"(%v) : (vector<4xi32>) -> vector<16xi32> llvm.return %0 : vector<16xi32> } @@ -39,7 +39,7 @@ llvm.func @vector_set_128b_into_512b(%v : vector<4xi32>) -> vector<16xi32> { llvm.func @vector_set_256b_into_512b(%v : vector<8xi32>) -> vector<16xi32> { %0 = llvm.mlir.constant(0 : i32) : i32 // CHECK: call <16 x i32> @llvm.aie2.set.I512.I256(<8 x i32> - %1 = "aievec.intr.set.I512.I256"(%v, %0) : + %1 = "xllvm.intr.aie2.set.I512.I256"(%v, %0) : (vector<8xi32>, i32) -> vector<16xi32> llvm.return %1 : vector<16xi32> } diff --git a/tools/aie-opt/CMakeLists.txt b/tools/aie-opt/CMakeLists.txt index 2a3b4de5cd..115ec9a51c 100644 --- a/tools/aie-opt/CMakeLists.txt +++ b/tools/aie-opt/CMakeLists.txt @@ -35,5 +35,6 @@ set(LIBS MLIRAIEVecTransforms MLIRAIEVecToLLVM MLIRTransformDialect + MLIRXLLVMDialect ) target_link_libraries(aie-opt PUBLIC ${LIBS}) diff --git a/tools/aie-translate/CMakeLists.txt b/tools/aie-translate/CMakeLists.txt index 17eaab5c84..e38805d7a7 100644 --- a/tools/aie-translate/CMakeLists.txt +++ b/tools/aie-translate/CMakeLists.txt @@ -25,7 +25,7 @@ target_link_libraries(aie-translate AIEXTransforms AIEXUtils AIETargets - MLIRAIEVecToLLVMIRTranslation + MLIRXLLVMToLLVMIRTranslation MLIRIR MLIRParser MLIRPass diff --git a/tools/aie2xclbin/CMakeLists.txt b/tools/aie2xclbin/CMakeLists.txt index 15720157ea..b6056b18c9 100644 --- a/tools/aie2xclbin/CMakeLists.txt +++ b/tools/aie2xclbin/CMakeLists.txt @@ -29,13 +29,15 @@ target_link_libraries(aie2xclbin MLIRAIEVecDialect MLIRAIEVecToLLVM MLIRAIEVecTransforms - MLIRAIEVecToLLVMIRTranslation + MLIRXLLVMToLLVMIRTranslation ADF AIE AIETransforms AIETargets AIEX - AIEXTransforms) + AIEXTransforms + MLIRAIEVecDialect + MLIRXLLVMDialect) install(TARGETS aie2xclbin EXPORT AIE2XCLBIN diff --git a/tools/aie2xclbin/XCLBinGen.cpp b/tools/aie2xclbin/XCLBinGen.cpp index 85a21b4742..bb9040f77e 100644 --- a/tools/aie2xclbin/XCLBinGen.cpp +++ b/tools/aie2xclbin/XCLBinGen.cpp @@ -15,7 +15,7 @@ #include "aie/Dialect/AIEVec/Pipelines/Passes.h" #include "aie/Dialect/AIEX/Transforms/AIEXPasses.h" #include "aie/InitialAllDialect.h" -#include "aie/Target/LLVMIR/Dialect/AIEVec/AIEVecToLLVMIRTranslation.h" +#include "aie/Target/LLVMIR/Dialect/XLLVM/XLLVMToLLVMIRTranslation.h" #include "aie/Targets/AIETargets.h" #include "mlir/Conversion/AffineToStandard/AffineToStandard.h" @@ -629,7 +629,7 @@ static LogicalResult generateUnifiedObject(MLIRContext *context, PassManager pm(context, moduleOp.getOperationName()); applyConfigToPassManager(TK, pm); - xilinx::aievec::registerAIEVecDialectTranslation(*context); + xilinx::xllvm::registerXLLVMDialectTranslation(*context); pm.addNestedPass(AIE::createAIELocalizeLocksPass()); pm.addNestedPass(AIE::createAIENormalizeAddressSpacesPass()); pm.addPass(AIE::createAIECoreToStandardPass());