How many outputs does a LUTx have?

[pbreuer]

I get that LUT1 .. LUT6 (more?) in the yosys stats output means a table with respectively 1 to 6 inputs (columns), but how many outputs (columns) does it have? 1? 2? Where can I read in the doc to find out?

This is with synth_xilinx and default family target.

The background is that I am trying to figure how yosys' LC estimate is related numerically to commercial tools' estimates. So far I only have a (useless) ALM number from quartus for intel. But I know that is 8-input 4-output. So if you tell me how many outputs you are reckoning for LUT1 ... LUT6 I can reckon mathematical min and max bounds for the possible ratio. If LUT1 ... LUT6 have 1 output then 1 ALM is worth at least 4 LUTs of any kind, and up to 4x4=16 LUT6s, 4x8=32 LUT5s, etc. If LUT1 ... LUT6 have 2 outputs then 1 ALM is worth at least 2 LUTs of any kind and up to 2x4=8 LUT6s, 2x8=16 LUT5s, etc, and so on.

So how many is it? Yes, I know people generally run the software and get a ratio in practice!

Thanks in advance for the info, anyone who knows!

PTB

[whitequark]

LUTs in Yosys are 1-output.

[pbreuer]

Thanks!

[nakengelhardt]

If it helps, the code for how yosys converts the number of instances of LUT1-LUT6 into estimated LCs is here, and it is fairly naive:

yosys/passes/cmds/stat.cc

Line 152 in 101d19b

unsigned int estimate_xilinx_lc()

[pbreuer]

Thank you. That appears to be LC=LUT6+LUT5+LUT4+LUT3+delta where delta is usually zero but may be (LUT2+LUT1-LUT6-LUT5-LUT4-LUT3)/2 if that is positive. Usually the other terms are big enough combined to cover LUT2+LUT1 and that delta is zero.

I don't get this. A modern xilinx platform has LUT6_2 units with two output lines that configure as either one LUT6 or two LUT5s (with one output line). I don't know if it has special units for LUT4 and below. So the estimate should be LC=LUT6+LUT5/2+something and that is a conservative estimate because sometimes one can squeeze a bit more out of a LUT6_2 than just one LUT6.

A typical modern xilinx platform seems to have about 1/4 million LUT6_2 units available, plus half that number MUX7 units, half that number again MUX8 units, and half again MUX9 units.

With a MUX2 I could choose between the output of two n-input LUTs according to an n+1th input and build an n+1 input LUT. A 1-input LUT is either straight-through or an inverter, and does one have those? I'm just grasping at how LUT1 ... LUT4 might be built. A MUX8 unit would build a LUT3 out of straight-through wires and inverters, so I will say that LUT3s are either built as LUT5s or as MUX8s. I vaguely imagine a LUT4 could be put together from a MUX9 and a MUX8 unit or something like.

That seems to give a better LC estimate as LUT6+(LUT5+LUT4+LUT3+LUT2+LUT1)/2, and it still takes no account of optimizations at all.

But a LUT1 is ridiculous! Its a wire or inverter. So why does yosys produce separate INV and LUT1 counts?

It's all very well to say that the LC estimate is naive, but what is the sense behind it? Perhaps that could be clarified?