diff --git a/docs/library/axi_ad485x/index.rst b/docs/library/axi_ad485x/index.rst index 06a9d0ef665..81885dd5b90 100644 --- a/docs/library/axi_ad485x/index.rst +++ b/docs/library/axi_ad485x/index.rst @@ -235,7 +235,7 @@ all of the 8 channels and lanes enabled. There are no extra definitions for the LVDS interface compared to the datasheet. -.. wavedrom:: +.. wavedrom { "signal" : [ { "name": "cnvs", "wave": "010.................................."}, @@ -259,10 +259,13 @@ There are no extra definitions for the LVDS interface compared to the datasheet. { "name": "data 5", "wave": "z...............................4....","data":["ch 5"]}, { "name": "data 6", "wave": "z...............................4....","data":["ch 6"]}, { "name": "data 7", "wave": "z...............................4....","data":["ch 7"]}, - ], - foot: {text: ['tspan', 'all lanesi(8) all channels(8) active']}} + ]} -.. wavedrom:: +.. figure:: wavedrom-1.svg + + all lanesi(8) all channels(8) active. + +.. wavedrom { "signal" : [ { "name": "cnvs", "wave": "010.......|.................10......."}, @@ -286,8 +289,11 @@ There are no extra definitions for the LVDS interface compared to the datasheet. { "name": "data 5", "wave": "z..........................4.........","data":["ch 5"]}, { "name": "data 6", "wave": "z..........................4.........","data":["ch 6"]}, { "name": "data 7", "wave": "z..........................4.........","data":["ch 7"]}, - ], - foot: {text: ['tspan', 'all lanesi(8) all channels(8) active']}} + ]} + +.. figure:: wavedrom-2.svg + + All lanesi(8) all channels(8) active. Register Map -------------------------------------------------------------------------------- diff --git a/docs/library/axi_ad485x/wavedrom-1.svg b/docs/library/axi_ad485x/wavedrom-1.svg new file mode 100644 index 00000000000..c9966320c7b --- /dev/null +++ b/docs/library/axi_ad485x/wavedrom-1.svg @@ -0,0 +1,4 @@ + + + +cnvsbusysckisckolane 0lane 1lane 2lane 3lane 4lane 5lane 6lane 7adc_validdata 0ch 0data 1ch 1data 2ch 2data 3ch 3data 4ch 4data 5ch 5data 6ch 6data 7ch 7 \ No newline at end of file diff --git a/docs/library/axi_ad485x/wavedrom-2.svg b/docs/library/axi_ad485x/wavedrom-2.svg new file mode 100644 index 00000000000..0b7aebd356a --- /dev/null +++ b/docs/library/axi_ad485x/wavedrom-2.svg @@ -0,0 +1,4 @@ + + + +cnvsbusysckisckolane 0lane 1lane 2lane 3lane 4lane 5lane 6lane 7adc_validdata 0ch 0data 1ch 1data 2ch 2data 3ch 3data 4ch 4data 5ch 5data 6ch 6data 7ch 7 \ No newline at end of file diff --git a/docs/library/axi_ad7606x/index.rst b/docs/library/axi_ad7606x/index.rst index 05956daa541..4f72b60b534 100644 --- a/docs/library/axi_ad7606x/index.rst +++ b/docs/library/axi_ad7606x/index.rst @@ -135,7 +135,7 @@ operation followed by a write operation. :adi:`AD7606C-18` chip can be obtained from the page 12 of the :adi:`AD7606C-18 Datasheet `. -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CS_N', wave:'1.0......|......1..'}, @@ -148,13 +148,15 @@ operation followed by a write operation. ] } +.. image:: wavedrom-1.svg + The following timing diagrams illustrate available ADC read modes using the AD7606x family devices. ADC Read Mode (AD7606B/C-16) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -166,10 +168,12 @@ ADC Read Mode (AD7606B/C-16) ] } +.. image:: wavedrom-2.svg + ADC Read Mode (AD7606C-18) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -181,10 +185,12 @@ ADC Read Mode (AD7606C-18) ] } +.. image:: wavedrom-3.svg + ADC Read Mode with CRC enabled (AD7606B/C-16) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -196,11 +202,12 @@ ADC Read Mode with CRC enabled (AD7606B/C-16) ] } +.. image:: wavedrom-4.svg ADC Read Mode with CRC enabled (AD7606C-18) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -212,10 +219,12 @@ ADC Read Mode with CRC enabled (AD7606C-18) ] } +.. image:: wavedrom-5.svg + ADC Read Mode with Status enabled (AD7606B/C-16) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -228,10 +237,12 @@ ADC Read Mode with Status enabled (AD7606B/C-16) ] } +.. image:: wavedrom-6.svg + ADC Read Mode with Status enabled (AD7606C-18) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|......01.'}, @@ -258,10 +269,12 @@ ADC Read Mode with Status enabled (AD7606C-18) ] } +.. image:: wavedrom-7.svg + ADC Read Mode with Status and CRC enabled (AD7606B/C-16) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|..........01.'}, @@ -274,10 +287,12 @@ ADC Read Mode with Status and CRC enabled (AD7606B/C-16) ] } +.. image:: wavedrom-8.svg + ADC Read Mode with Status and CRC enabled (AD7606C-18) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'CNVST_N', wave: '1..01...........|..........01.'}, @@ -304,6 +319,8 @@ ADC Read Mode with Status and CRC enabled (AD7606C-18) ] } +.. image:: wavedrom-9.svg + Software Support ------------------------------------------------------------------------------- diff --git a/docs/library/axi_ad7606x/wavedrom-1.svg b/docs/library/axi_ad7606x/wavedrom-1.svg new file mode 100644 index 00000000000..bea8a219713 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-1.svg @@ -0,0 +1,4 @@ + + + +CS_NRD_NWR_NDB[15]DB[14:8]ADDRADDRADDRDB[7:0]DCDATADATADCMODEADC ReadADC Register ModeADC Read \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-2.svg b/docs/library/axi_ad7606x/wavedrom-2.svg new file mode 100644 index 00000000000..c42125cf30f --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-2.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:0]V1V2V3V7V8FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-3.svg b/docs/library/axi_ad7606x/wavedrom-3.svg new file mode 100644 index 00000000000..e3433274fd1 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-3.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:0]V1[17:2]V1[1:0]V3[17:2]V8[17:2]V8[1:0]FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-4.svg b/docs/library/axi_ad7606x/wavedrom-4.svg new file mode 100644 index 00000000000..0766f856202 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-4.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:0]V1V2V3V8CRCFIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-5.svg b/docs/library/axi_ad7606x/wavedrom-5.svg new file mode 100644 index 00000000000..74d3b4b7367 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-5.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:0]V1[17:2]V1[1:0]V3[17:2]V8[1:0]CRCFIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-6.svg b/docs/library/axi_ad7606x/wavedrom-6.svg new file mode 100644 index 00000000000..97f60b0f988 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-6.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:8]V1[15:8]Status_CH1V2[15:8]V8[15:8]Status_CH8DB[7:0]V1[7:0]V2[7:0]V3[7:0]FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-7.svg b/docs/library/axi_ad7606x/wavedrom-7.svg new file mode 100644 index 00000000000..f55b648f354 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-7.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15]V1[17]V1[1]V2[17]V8[17]V8[1]DB[14]V1[16]V1[0]V2[16]V8[16]V8[0]DB[13]V1[15]V2[15]V8[15]DB[12]V1[14]V2[14]V8[14]DB[11]V1[13]V2[13]V8[13]DB[10]V1[12]V2[12]V8[12]DB[9]V1[11]V2[11]V8[11]DB[8]V1[10]V2[10]V8[10]DB[7]V1[9]Status1[7]V2[9]V8[9]Status8[7]DB[6]V1[8]Status1[6]V2[8]V8[8]Status8[6]DB[5]V1[7]Status1[5]V2[7]V8[7]Status8[5]DB[4]V1[6]Status1[4]V2[6]V8[6]Status8[4]DB[3]V1[5]Status1[3]V2[5]V8[5]Status8[3]DB[2]V1[4]Status1[2]V2[4]V8[4]Status8[2]DB[1]V1[3]Status1[1]V2[3]V8[3]Status8[1]DB[0]V1[2]Status1[0]V2[2]V8[2]Status8[0]FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-8.svg b/docs/library/axi_ad7606x/wavedrom-8.svg new file mode 100644 index 00000000000..2fd24fabc55 --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-8.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15:8]V1[15:8]Status_CH1V2[15:8]V8[15:8]Status_CH8CRC[15:8]DB[7:0]V1[7:0]V2[7:0]V3[7:0]CRC[7:0]FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7606x/wavedrom-9.svg b/docs/library/axi_ad7606x/wavedrom-9.svg new file mode 100644 index 00000000000..a96557b331d --- /dev/null +++ b/docs/library/axi_ad7606x/wavedrom-9.svg @@ -0,0 +1,4 @@ + + + +CNVST_NBUSYCS_NRD_NDB[15]V1[17]V1[1]V2[17]V8[17]V8[1]CRC[15]DB[14]V1[16]V1[0]V2[16]V8[16]V8[0]CRC[14]DB[13]V1[15]V2[15]V8[15]CRC[13]DB[12]V1[14]V2[14]V8[14]CRC[12]DB[11]V1[13]V2[13]V8[13]CRC[11]DB[10]V1[12]V2[12]V8[12]CRC[10]DB[9]V1[11]V2[11]V8[11]CRC[9]DB[8]V1[10]V2[10]V8[10]CRC[8]DB[7]V1[9]Status1[7]V2[9]V8[9]Status8[7]CRC[7]DB[6]V1[8]Status1[6]V2[8]V8[8]Status8[6]CRC[6]DB[5]V1[7]Status1[5]V2[7]V8[7]Status8[5]CRC[5]DB[4]V1[6]Status1[4]V2[6]V8[6]Status8[4]CRC[4]DB[3]V1[5]Status1[3]V2[5]V8[5]Status8[3]CRC[3]DB[2]V1[4]Status1[2]V2[4]V8[4]Status8[2]CRC[2]DB[1]V1[3]Status1[1]V2[3]V8[3]Status8[1]CRC[1]DB[0]V1[2]Status1[0]V2[2]V8[2]Status8[0]CRC[0]FIRST_DATA \ No newline at end of file diff --git a/docs/library/axi_ad7616/index.rst b/docs/library/axi_ad7616/index.rst index 6426cbc934c..697acf5fe7e 100644 --- a/docs/library/axi_ad7616/index.rst +++ b/docs/library/axi_ad7616/index.rst @@ -112,7 +112,7 @@ signal, that is available in the *up_adc_common* module, controls burst_length. Software Parallel Mode Channel Conversion Setting ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom {signal: [ {name: 'RESET_N', wave:'101................'}, @@ -122,37 +122,38 @@ Software Parallel Mode Channel Conversion Setting {name: 'WR_N', wave:'1.....01..............01..............', "period" :0.5}, {name: 'RD_N', wave:'1.................0101................', "period" :0.5}, {name: 'DB[0:15]', wave:'z.....=.z.........=.=.=.z.........|.....', data: ['CHx',"A0","B0","CHy"], "period" :0.45} - ], - foot: {text: - ['tspan', 'CHx CONVERSION START'] - } - } + ]} + +.. figure:: wavedrom-1.svg + + CHx CONVERSION START Parallel Read Timing Diagram ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom - {signal: [ + {signal: [ {name: 'CNVST', wave:'010..........10....'}, {name: 'BUSY', wave:'0..1......0................1......0...', "period" :0.5}, {name: 'CS_N', wave:'1..........0..1..0..1..............0..', "period" :0.5}, {name: 'RD_N', wave:'1......................01........01................................01.', "period" :0.25}, {name: 'DB[0:15]', wave:'z.....=.z=.z.......', data: ['CONVA',"CONVB","B0","CHy"], "period" :1,"phase":-0.1} - ] - } + ]} + +.. image:: wavedrom-2.svg Parallel Write Timing Diagram ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -.. wavedrom:: +.. wavedrom - {signal: [ + {signal: [ {name: 'CNVST', wave:'0..........................1..0', "period" :0.5}, {name: 'CS_N', wave:'1......0.....1.....0.....1.....', "period" :0.5}, {name: 'WR_N', wave:'1......0...1.......0...1......', "period" :0.5,"phase":-0.5}, {name: 'DB[0:15]', wave:'z..=.z.=.z.', data: ['WRITE REG 1',"WRITE REG 2","B0","CHy"], "period" :1.3,"phase":0.7} - ] - } + ]} +.. image:: wavedrom-3.svg Software Support -------------------------------------------------------------------------------- diff --git a/docs/library/axi_ad7616/wavedrom-1.svg b/docs/library/axi_ad7616/wavedrom-1.svg new file mode 100644 index 00000000000..d391ad26307 --- /dev/null +++ b/docs/library/axi_ad7616/wavedrom-1.svg @@ -0,0 +1,4 @@ + + + +RESET_NCNVSTBUSYCS_NWR_NRD_NDB[0:15]CHxA0B0CHy \ No newline at end of file diff --git a/docs/library/axi_ad7616/wavedrom-2.svg b/docs/library/axi_ad7616/wavedrom-2.svg new file mode 100644 index 00000000000..6a47e3f0e79 --- /dev/null +++ b/docs/library/axi_ad7616/wavedrom-2.svg @@ -0,0 +1,4 @@ + + + +CNVSTBUSYCS_NRD_NDB[0:15]CONVACONVB \ No newline at end of file diff --git a/docs/library/axi_ad7616/wavedrom-3.svg b/docs/library/axi_ad7616/wavedrom-3.svg new file mode 100644 index 00000000000..e46710d47d3 --- /dev/null +++ b/docs/library/axi_ad7616/wavedrom-3.svg @@ -0,0 +1,4 @@ + + + +CNVSTCS_NWR_NDB[0:15]WRITE REG 1WRITE REG 2 \ No newline at end of file diff --git a/docs/library/axi_pwm_gen/index.rst b/docs/library/axi_pwm_gen/index.rst index 02617041c6a..9296cc8dfae 100644 --- a/docs/library/axi_pwm_gen/index.rst +++ b/docs/library/axi_pwm_gen/index.rst @@ -173,7 +173,7 @@ Timing Diagrams and examples The timing diagram below, shows the ``load_config`` functionality with force align and start at sync disabled. -.. wavedrom:: +.. wavedrom { "signal" : [ { "name": "clk", "wave": "P................................"}, @@ -191,10 +191,12 @@ force align and start at sync disabled. { "name": "pwm 1", "wave": "l....h..l......................h."}, ]} +.. image:: wavedrom-load_config.svg + The timing diagram below, shows the ``load_config`` functionality with force align disabled and start at sync enabled. -.. wavedrom:: +.. wavedrom { "signal" : [ { "name": "clk", "wave": "P.............................."}, @@ -212,10 +214,12 @@ force align disabled and start at sync enabled. { "name": "pwm 1", "wave": "l....h..l............h....l...."}, ]} +.. image:: wavedrom-load_config-start_at_sync.svg + The timing diagram below, shows the ``load_config`` functionality with force align and start at sync enabled. -.. wavedrom:: +.. wavedrom { "signal" : [ { "name": "clk", "wave": "P.............................."}, @@ -233,9 +237,11 @@ force align and start at sync enabled. { "name": "pwm 1", "wave": "l....h..l....hl...h....l....h.."}, ]} +.. image:: wavedrom-load_config-force_align-start_at_sync.svg + The below timing diagrams, shows the ``external_sync`` functionality: -.. wavedrom:: +.. wavedrom { "signal" : [ { "name": "clk", "wave": "P............................"}, @@ -251,11 +257,13 @@ The below timing diagrams, shows the ``external_sync`` functionality: { "name": "pwm 0", "wave": "l......h..l....h..l....h..l.."}, { "name": "counter 1", "wave": "=..........44444445555555544=","data":["1","2","3","4","5","6","7","8","1","2","3","4","5","6","7","8","1","2"]}, { "name": "pwm 1", "wave": "l..........h..l....h..l....h."}, - ], - foot: {text: ['tspan', 'External sync, start at sync (default) e.g.'], - }} + ]} + +.. figure:: wavedrom-external_sync-start_at_sync.svg -.. wavedrom:: + External sync, start at sync (default). + +.. wavedrom { "signal" : [ { "name": "clk", "wave": "P............................"}, @@ -271,9 +279,11 @@ The below timing diagrams, shows the ``external_sync`` functionality: { "name": "pwm 0", "wave": "l.............h..l....h..l..."}, { "name": "counter 1", "wave": "=..........44444445555555544=","data":["1","2","3","4","5","6","7","8","1","2","3","4","5","6","7","8","1","2"]}, { "name": "pwm 1", "wave": "l.................h..l....h.."}, - ], - foot: {text: ['tspan', 'External sync without start at sync e.g.'], - }} + ]} + +.. figure:: wavedrom-external_sync.svg + + External sync without start at sync. Register Map -------------------------------------------------------------------------------- diff --git a/docs/library/axi_pwm_gen/wavedrom-external_sync-start_at_sync.svg b/docs/library/axi_pwm_gen/wavedrom-external_sync-start_at_sync.svg new file mode 100644 index 00000000000..44cb2ab4cb7 --- /dev/null +++ b/docs/library/axi_pwm_gen/wavedrom-external_sync-start_at_sync.svg @@ -0,0 +1,4 @@ + + + +clkpwm_1 period8pwm_1 pulse3pwm_1 offset1pwm_2 period8pwm_2 pulse3pwm_2 offset5external_syncoffset counter012345678910111213141516171819202122counter 01234567812345678123456pwm 0counter 1123456781234567812pwm 1 \ No newline at end of file diff --git a/docs/library/axi_pwm_gen/wavedrom-external_sync.svg b/docs/library/axi_pwm_gen/wavedrom-external_sync.svg new file mode 100644 index 00000000000..7b44084fb27 --- /dev/null +++ b/docs/library/axi_pwm_gen/wavedrom-external_sync.svg @@ -0,0 +1,4 @@ + + + +clkpwm_1 period8pwm_1 pulse3pwm_1 offset1pwm_2 period8pwm_2 pulse3pwm_2 offset5external_syncoffset counter012345678910111213141516171819202122counter 01234567812345678123456pwm 0counter 1123456781234567812pwm 1 \ No newline at end of file diff --git a/docs/library/axi_pwm_gen/wavedrom-load_config-force_align-start_at_sync.svg b/docs/library/axi_pwm_gen/wavedrom-load_config-force_align-start_at_sync.svg new file mode 100644 index 00000000000..b73bb5d8aea --- /dev/null +++ b/docs/library/axi_pwm_gen/wavedrom-load_config-force_align-start_at_sync.svg @@ -0,0 +1,4 @@ + + + +clkpwm_1 period810pwm_1 pulse35pwm_1 offset11pwm_2 period810pwm_2 pulse35pwm_2 offset54load_configoffset counter5556575859606162636465666768012345678910111213141516counter 081234567812345112345678910123456pwm 0counter 145678123456781112345678910123pwm 1 \ No newline at end of file diff --git a/docs/library/axi_pwm_gen/wavedrom-load_config-start_at_sync.svg b/docs/library/axi_pwm_gen/wavedrom-load_config-start_at_sync.svg new file mode 100644 index 00000000000..2569a8f746e --- /dev/null +++ b/docs/library/axi_pwm_gen/wavedrom-load_config-start_at_sync.svg @@ -0,0 +1,4 @@ + + + +clkpwm_1 period810pwm_1 pulse35pwm_1 offset11pwm_2 period810pwm_2 pulse35pwm_2 offset54load_configoffset counter555657585960616263646566012345678910111213counter 081234567812345678112345678910123pwm 0counter 14567812345678112345678910pwm 1 \ No newline at end of file diff --git a/docs/library/axi_pwm_gen/wavedrom-load_config.svg b/docs/library/axi_pwm_gen/wavedrom-load_config.svg new file mode 100644 index 00000000000..70307ce3fb3 --- /dev/null +++ b/docs/library/axi_pwm_gen/wavedrom-load_config.svg @@ -0,0 +1,4 @@ + + + +clkpwm_1 period810pwm_1 pulse35pwm_1 offset11pwm_2 period810pwm_2 pulse35pwm_2 offset54load_configoffset counter5556575859606162636465660123456789101112131415counter 08123456781234567811234567891012345pwm 0counter 1456781234567811234567891012pwm 1 \ No newline at end of file diff --git a/docs/library/common/ad_dds/index.rst b/docs/library/common/ad_dds/index.rst index b46d0589352..b8a3d1c8855 100644 --- a/docs/library/common/ad_dds/index.rst +++ b/docs/library/common/ad_dds/index.rst @@ -285,7 +285,7 @@ equal to the CLOCK_RATIO. .. image:: fw_sync_basics.svg -.. wavedrom:: +.. wavedrom { "signal" : [ @@ -302,12 +302,12 @@ equal to the CLOCK_RATIO. { "name": "tone 2 gen2", "wave": "=.........5=55|5555555","data":["","i2","","i2+","i2+","i2+","..."]}, { "name": "tone 2 gen3", "wave": "=..........555|5555555","data":["","i3","i3+","i3+","i3+","..."]}, { "name": "tone 2", "wave": "=.......======|5555555","data":["","0","0","0","0","0","...","s0-3","s4-8","s8-C","..."]}, - ], - foot: { - text: ['tspan', 'Frequency word sync at CLK_RATIO=4'], - } + ] } +.. figure:: wavedrom.svg + + text: ['tspan', 'Frequency word sync at CLK_RATIO=4'], In the above diagram example: diff --git a/docs/library/common/ad_dds/wavedrom.svg b/docs/library/common/ad_dds/wavedrom.svg new file mode 100644 index 00000000000..dfc2e3c628a --- /dev/null +++ b/docs/library/common/ad_dds/wavedrom.svg @@ -0,0 +1,4 @@ + + + +clkexternal syncphase inittone 1 gen0i0i0+i0+i0+...tone 1 gen1i1i1+i1+i1+...tone 1 gen2i2i2+i2+i2+...tone 1 gen3i3i3+i3+i3+...tone 100000...s0-3s4-8s8-C...tone 2 gen0i0i0+i0+i0+...tone 2 gen1i1i1+i1+i1+...tone 2 gen2i2i2+i2+i2+...tone 2 gen3i3i3+i3+i3+...tone 200000...s0-3s4-8s8-C... \ No newline at end of file diff --git a/docs/library/jesd204/axi_jesd204_rx/index.rst b/docs/library/jesd204/axi_jesd204_rx/index.rst index 8770b1f926b..a8ae0c1517c 100644 --- a/docs/library/jesd204/axi_jesd204_rx/index.rst +++ b/docs/library/jesd204/axi_jesd204_rx/index.rst @@ -277,8 +277,7 @@ signal, but not the TREADY flow control signal. The behavior of the interface is as if the TREADY signal was always asserted. This means as soon as ``rx_valid`` is asserted, a continuous stream of user data must be accepted from ``rx_data``. -.. wavedrom:: - :align: center +.. wavedrom { signal: [ @@ -296,6 +295,8 @@ is asserted, a continuous stream of user data must be accepted from ``rx_data``. } } +.. image:: wavedrom-1.svg + After reset and during link initialization, the ``rx_valid`` signal is deasserted. As soon as the User Data Phase is entered, the ``rx_valid`` will be asserted to indicate that the peripheral is now providing the processed data @@ -525,10 +526,7 @@ local-multiblock-clock (LEMC). A setting of 0 indicates that the release opportunity is aligned to the LMFC/LEMC edge. A setting of X indicates that it trails the LMFC/LEMC edge by X octets. -.. wavedrom:: - :scale: 100% - :align: center - +.. wavedrom { signal: [ { name: "device_clk", wave: 'P.........' }, @@ -538,6 +536,8 @@ trails the LMFC/LEMC edge by X octets. edge: ['a~>b BUFFER DELAY/4'] } +.. image:: wavedrom-2.svg + The ``BUFFER_DELAY`` field must be set to a multiple of 4. Writing a value that is not a multiple of 4 will be rounded down to the next multiple of 4. For correct operation, the ``BUFFER_DELAY`` field must also be set to a value diff --git a/docs/library/jesd204/axi_jesd204_rx/wavedrom-1.svg b/docs/library/jesd204/axi_jesd204_rx/wavedrom-1.svg new file mode 100644 index 00000000000..a13481ed448 --- /dev/null +++ b/docs/library/jesd204/axi_jesd204_rx/wavedrom-1.svg @@ -0,0 +1,4 @@ + + + +Link InitializationUser Data Phasedevice_clkrx_dataD0D1D2D3D4...rx_validRX_DATA \ No newline at end of file diff --git a/docs/library/jesd204/axi_jesd204_rx/wavedrom-2.svg b/docs/library/jesd204/axi_jesd204_rx/wavedrom-2.svg new file mode 100644 index 00000000000..2f7175d217d --- /dev/null +++ b/docs/library/jesd204/axi_jesd204_rx/wavedrom-2.svg @@ -0,0 +1,4 @@ + + + +device_clkLMFC edgeRelease OpportunityBUFFER DELAY/4ab \ No newline at end of file diff --git a/docs/library/jesd204/axi_jesd204_tx/index.rst b/docs/library/jesd204/axi_jesd204_tx/index.rst index 5763ad1a9ab..80cd6359e64 100644 --- a/docs/library/jesd204/axi_jesd204_tx/index.rst +++ b/docs/library/jesd204/axi_jesd204_tx/index.rst @@ -270,8 +270,7 @@ interface is as if the TVALID signal was always asserted. This means as soon as tx_ready is asserted a continuous stream of user data must be provided on tx_data. -.. wavedrom:: - :align: center +.. wavedrom {signal: [ @@ -289,6 +288,8 @@ tx_data. } } +.. image:: wavedrom-1.svg + After reset and during link initialization the ``tx_ready`` signal is de-asserted. As soon as the :ref:`User Data Phase ` is entered the ``tx_ready`` will be asserted to indicate that the peripheral is now @@ -729,7 +730,7 @@ All other octets of the ILAS sequence will contain the numerical value corresponding to the position of the octet in the ILAS sequence (E.g. the fifth octet of the first multi-frame contains the value 4). -.. wavedrom:: +.. wavedrom { signal: @@ -742,6 +743,8 @@ octet of the first multi-frame contains the value 4). config: { skin: 'narrow' } } +.. image:: wavedrom-2.svg + By default the ILAS is transmitted for a duration of 4 multi-frames. After the last ILAS multi-frame the peripheral switches to the DATA phase. diff --git a/docs/library/jesd204/axi_jesd204_tx/wavedrom-1.svg b/docs/library/jesd204/axi_jesd204_tx/wavedrom-1.svg new file mode 100644 index 00000000000..b373dccf5dd --- /dev/null +++ b/docs/library/jesd204/axi_jesd204_tx/wavedrom-1.svg @@ -0,0 +1,4 @@ + + + +Link InitializationUser Data Phasedevice_clktx_dataD0D1D2D3D4...tx_readyTX_DATA \ No newline at end of file diff --git a/docs/library/jesd204/axi_jesd204_tx/wavedrom-2.svg b/docs/library/jesd204/axi_jesd204_tx/wavedrom-2.svg new file mode 100644 index 00000000000..9671311220b --- /dev/null +++ b/docs/library/jesd204/axi_jesd204_tx/wavedrom-2.svg @@ -0,0 +1,4 @@ + + + +ILAS/R/DD/A//R//Q/CD/A//R/DD/A//R/DDALMFC \ No newline at end of file diff --git a/docs/user_guide/ip_cores/interfaces.rst b/docs/user_guide/ip_cores/interfaces.rst index 4976b91c828..26316b49691 100644 --- a/docs/user_guide/ip_cores/interfaces.rst +++ b/docs/user_guide/ip_cores/interfaces.rst @@ -81,8 +81,7 @@ Timing diagram The following timing diagram illustrates the signals and functionality of the interface. It show a register write access and two consecutive register read access. -.. wavedrom:: - :caption: UP interface timing diagram +.. wavedrom {signal: [ {name: 'up_clk', wave:'P............|.......'}, @@ -111,6 +110,10 @@ interface. It show a register write access and two consecutive register read acc } } +.. figure:: wavedrom.svg + + UP interface timing diagram + References -------------------------------------------------------------------------------- diff --git a/docs/user_guide/ip_cores/wavedrom.svg b/docs/user_guide/ip_cores/wavedrom.svg new file mode 100644 index 00000000000..b62ea119674 --- /dev/null +++ b/docs/user_guide/ip_cores/wavedrom.svg @@ -0,0 +1,4 @@ + + + +UP interfaceup_clkup_rstnup_wrequp_wackup_waddrADDR0up_wdataDATA0up_rrequp_rackup_raddrADDR0ADDR1up_rdataDATA0DATA1abcde \ No newline at end of file