From f1bd991d4eb59b55bbb25bc86982f1d286200a5f Mon Sep 17 00:00:00 2001 From: Peter Saunderson Date: Sun, 3 Jan 2016 20:23:45 +0000 Subject: [PATCH 1/2] dv test for mailbox accesses and wait testing Using elink0_mux_txwr_access to filter frames for elink0 and elink1_mux_rxwr_access for elink1 Tests can write to mailbox in elink0 or elink1 and read from mailbox in elink0 Adding WAIT parameter to elink1 the rx channel on elink1 backs up into the tx channel of elink0 MMU can also be used in both elink0 and elink1 if necessary Added simple memory testing with mailbox providing failure count feedback from core Signed-off-by: Peter Saunderson --- elink/dv/dut_axi_elink.v | 409 +++++++++--------- elink/dv/test.memh | 71 ++++ elink/sw/memory/build.sh | 26 ++ elink/sw/memory/run.sh | 17 + elink/sw/memory/src/common.h | 2 + elink/sw/memory/src/e-main.c | 797 +++++++++++++++++++++++++++++++++++ elink/sw/memory/src/e-task.c | 125 ++++++ elink/sw/memory/test.sh | 122 ++++++ 8 files changed, 1359 insertions(+), 210 deletions(-) create mode 100644 elink/dv/test.memh create mode 100755 elink/sw/memory/build.sh create mode 100755 elink/sw/memory/run.sh create mode 100644 elink/sw/memory/src/common.h create mode 100644 elink/sw/memory/src/e-main.c create mode 100644 elink/sw/memory/src/e-task.c create mode 100755 elink/sw/memory/test.sh diff --git a/elink/dv/dut_axi_elink.v b/elink/dv/dut_axi_elink.v index 7040cf81..20f9d154 100644 --- a/elink/dv/dut_axi_elink.v +++ b/elink/dv/dut_axi_elink.v @@ -44,15 +44,11 @@ module dut(/*AUTOARG*/ wire elink0_cclk_p; // From elink0 of elink.v wire elink0_chip_resetb; // From elink0 of elink.v wire [11:0] elink0_chipid; // From elink0 of elink.v - wire elink0_mailbox_full; // From elink0 of elink.v - wire elink0_mailbox_not_empty;// From elink0 of elink.v wire elink0_timeout; // From elink0 of elink.v wire elink1_cclk_n; // From elink1 of elink.v wire elink1_cclk_p; // From elink1 of elink.v wire elink1_chip_resetb; // From elink1 of elink.v wire [11:0] elink1_chipid; // From elink1 of elink.v - wire elink1_mailbox_full; // From elink1 of elink.v - wire elink1_mailbox_not_empty;// From elink1 of elink.v wire elink1_rxrd_access; // From elink1 of elink.v wire [PW-1:0] elink1_rxrd_packet; // From elink1 of elink.v wire elink1_rxrr_access; // From elink1 of elink.v @@ -71,13 +67,20 @@ module dut(/*AUTOARG*/ wire [PW-1:0] emem_packet; wire elink1_rxrd_wait; wire elink1_rxwr_wait; - + wire emem_txwr_wait; + wire emem_txrd_wait; + // Beginning of automatic outputs (from unused autoinst outputs) // End of automatics - + + wire elink0_rxrr_wait; + /*AUTOWIRE*/ // Beginning of automatic wires (for undeclared instantiated-module outputs) + wire e2c_xmesh_access_out; // From emesh_if of emesh_if.v + wire [PW-1:0] e2c_xmesh_packet_out; // From emesh_if of emesh_if.v + wire e2c_xmesh_wait_in; // From emaxi of emaxi.v wire elink0_chip_nreset; // From elink0 of elink.v wire elink0_mailbox_irq; // From elink0 of elink.v wire elink0_rxo_rd_wait_n; // From elink0 of elink.v @@ -156,48 +159,46 @@ module dut(/*AUTOARG*/ wire [PW-1:0] elink1_txwr_packet; // From esaxi of esaxi.v wire emem_txrd_access; // From etx_fifo of etx_fifo.v wire [PW-1:0] emem_txrd_packet; // From etx_fifo of etx_fifo.v - wire emem_txrr_access; // From etx_fifo of etx_fifo.v - wire [PW-1:0] emem_txrr_packet; // From etx_fifo of etx_fifo.v wire emem_txwr_access; // From etx_fifo of etx_fifo.v wire [PW-1:0] emem_txwr_packet; // From etx_fifo of etx_fifo.v - wire [31:0] stub_m_axi_araddr; // From aximaster_stub of aximaster_stub.v - wire [1:0] stub_m_axi_arburst; // From aximaster_stub of aximaster_stub.v - wire [3:0] stub_m_axi_arcache; // From aximaster_stub of aximaster_stub.v - wire [M_IDW-1:0] stub_m_axi_arid; // From aximaster_stub of aximaster_stub.v - wire [7:0] stub_m_axi_arlen; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_arlock; // From aximaster_stub of aximaster_stub.v - wire [2:0] stub_m_axi_arprot; // From aximaster_stub of aximaster_stub.v - wire [3:0] stub_m_axi_arqos; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_arready; // From elink1 of axi_elink.v - wire [2:0] stub_m_axi_arsize; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_arvalid; // From aximaster_stub of aximaster_stub.v - wire [31:0] stub_m_axi_awaddr; // From aximaster_stub of aximaster_stub.v - wire [1:0] stub_m_axi_awburst; // From aximaster_stub of aximaster_stub.v - wire [3:0] stub_m_axi_awcache; // From aximaster_stub of aximaster_stub.v - wire [M_IDW-1:0] stub_m_axi_awid; // From aximaster_stub of aximaster_stub.v - wire [7:0] stub_m_axi_awlen; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_awlock; // From aximaster_stub of aximaster_stub.v - wire [2:0] stub_m_axi_awprot; // From aximaster_stub of aximaster_stub.v - wire [3:0] stub_m_axi_awqos; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_awready; // From elink1 of axi_elink.v - wire [2:0] stub_m_axi_awsize; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_awvalid; // From aximaster_stub of aximaster_stub.v - wire [S_IDW-1:0] stub_m_axi_bid; // From elink1 of axi_elink.v - wire stub_m_axi_bready; // From aximaster_stub of aximaster_stub.v - wire [1:0] stub_m_axi_bresp; // From elink1 of axi_elink.v - wire stub_m_axi_bvalid; // From elink1 of axi_elink.v - wire [31:0] stub_m_axi_rdata; // From elink1 of axi_elink.v - wire [S_IDW-1:0] stub_m_axi_rid; // From elink1 of axi_elink.v - wire stub_m_axi_rlast; // From elink1 of axi_elink.v - wire stub_m_axi_rready; // From aximaster_stub of aximaster_stub.v - wire [1:0] stub_m_axi_rresp; // From elink1 of axi_elink.v - wire stub_m_axi_rvalid; // From elink1 of axi_elink.v - wire [63:0] stub_m_axi_wdata; // From aximaster_stub of aximaster_stub.v - wire [M_IDW-1:0] stub_m_axi_wid; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_wlast; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_wready; // From elink1 of axi_elink.v - wire [7:0] stub_m_axi_wstrb; // From aximaster_stub of aximaster_stub.v - wire stub_m_axi_wvalid; // From aximaster_stub of aximaster_stub.v + wire [31:0] m_axi_araddr; // From emaxi of emaxi.v + wire [1:0] m_axi_arburst; // From emaxi of emaxi.v + wire [3:0] m_axi_arcache; // From emaxi of emaxi.v + wire [M_IDW-1:0] m_axi_arid; // From emaxi of emaxi.v + wire [7:0] m_axi_arlen; // From emaxi of emaxi.v + wire m_axi_arlock; // From emaxi of emaxi.v + wire [2:0] m_axi_arprot; // From emaxi of emaxi.v + wire [3:0] m_axi_arqos; // From emaxi of emaxi.v + wire m_axi_arready; // From elink1 of axi_elink.v + wire [2:0] m_axi_arsize; // From emaxi of emaxi.v + wire m_axi_arvalid; // From emaxi of emaxi.v + wire [31:0] m_axi_awaddr; // From emaxi of emaxi.v + wire [1:0] m_axi_awburst; // From emaxi of emaxi.v + wire [3:0] m_axi_awcache; // From emaxi of emaxi.v + wire [M_IDW-1:0] m_axi_awid; // From emaxi of emaxi.v + wire [7:0] m_axi_awlen; // From emaxi of emaxi.v + wire m_axi_awlock; // From emaxi of emaxi.v + wire [2:0] m_axi_awprot; // From emaxi of emaxi.v + wire [3:0] m_axi_awqos; // From emaxi of emaxi.v + wire m_axi_awready; // From elink1 of axi_elink.v + wire [2:0] m_axi_awsize; // From emaxi of emaxi.v + wire m_axi_awvalid; // From emaxi of emaxi.v + wire [S_IDW-1:0] m_axi_bid; // From elink1 of axi_elink.v + wire m_axi_bready; // From emaxi of emaxi.v + wire [1:0] m_axi_bresp; // From elink1 of axi_elink.v + wire m_axi_bvalid; // From elink1 of axi_elink.v + wire [31:0] m_axi_rdata; // From elink1 of axi_elink.v + wire [S_IDW-1:0] m_axi_rid; // From elink1 of axi_elink.v + wire m_axi_rlast; // From elink1 of axi_elink.v + wire m_axi_rready; // From emaxi of emaxi.v + wire [1:0] m_axi_rresp; // From elink1 of axi_elink.v + wire m_axi_rvalid; // From elink1 of axi_elink.v + wire [63:0] m_axi_wdata; // From emaxi of emaxi.v + wire [M_IDW-1:0] m_axi_wid; // From emaxi of emaxi.v + wire m_axi_wlast; // From emaxi of emaxi.v + wire m_axi_wready; // From elink1 of axi_elink.v + wire [7:0] m_axi_wstrb; // From emaxi of emaxi.v + wire m_axi_wvalid; // From emaxi of emaxi.v // End of automatics @@ -226,10 +227,7 @@ module dut(/*AUTOARG*/ .c2e_rmesh_packet_in({(PW){1'b0}}), .c2e_xmesh_access_in(1'b0), .c2e_xmesh_packet_in({(PW){1'b0}}), - .e2c_xmesh_wait_in(1'b0), - .e2c_xmesh_access_out(), - .e2c_xmesh_packet_out(), - .c2e_cmesh_wait_out (elink0_rxrr_wait), + .c2e_cmesh_wait_out (elink0_rxrr_wait), /*AUTOINST*/ // Outputs .e2c_cmesh_access_out (elink0_txwr_access), // Templated @@ -238,6 +236,8 @@ module dut(/*AUTOARG*/ .e2c_rmesh_access_out (elink0_txrd_access), // Templated .e2c_rmesh_packet_out (elink0_txrd_packet[PW-1:0]), // Templated .c2e_xmesh_wait_out (), // Templated + .e2c_xmesh_access_out (e2c_xmesh_access_out), + .e2c_xmesh_packet_out (e2c_xmesh_packet_out[PW-1:0]), .e2c_emesh_wait_out (wait_out), // Templated .c2e_emesh_access_out (access_out), // Templated .c2e_emesh_packet_out (packet_out[PW-1:0]), // Templated @@ -246,37 +246,11 @@ module dut(/*AUTOARG*/ .c2e_cmesh_packet_in (elink0_rxrr_packet[PW-1:0]), // Templated .e2c_cmesh_wait_in (elink0_txwr_wait), // Templated .e2c_rmesh_wait_in (elink0_txrd_wait), // Templated + .e2c_xmesh_wait_in (e2c_xmesh_wait_in), .e2c_emesh_access_in (access_in), // Templated .e2c_emesh_packet_in (packet_in[PW-1:0]), // Templated .c2e_emesh_wait_in (wait_in)); // Templated - - - //###################################################################### - //AXI MASTER (DRIVES STIMULUS) - //###################################################################### - /*emaxi AUTO_TEMPLATE (//Stimulus - .rxwr_access (elink0_txwr_access), - .rxwr_packet (elink0_txwr_packet[PW-1:0]), - .rxwr_wait (elink0_txwr_wait), - .rxrd_access (elink0_txrd_access), - .rxrd_packet (elink0_txrd_packet[PW-1:0]), - .rxrd_wait (elink0_txrd_wait), - //outputs (read response back to monitor) - .txrr_access (elink0_rxrr_access), - .txrr_packet (elink0_rxrr_packet[PW-1:0]), - .txrr_wait (1'b0), - ); - */ - - /* - emaxi #(.M_IDW(M_IDW)) - emaxi (.m_axi_aclk (clk), - .m_axi_aresetn (nreset), - .m_axi_rdata ({m_axi_rdata[31:0],m_axi_rdata[31:0]}), - ); - */ - //###################################################################### //TIE OFF UNUSED MASTER PORT ON ELINK0 @@ -291,48 +265,23 @@ module dut(/*AUTOARG*/ defparam axislave_stub.S_IDW = S_IDW; axislave_stub axislave_stub (.s_axi_aclk (clk), .s_axi_aresetn (nreset), - // Outputs - .s_axi_arready (stub_m_axi_arready), - .s_axi_awready (stub_m_axi_awready), - .s_axi_bid (stub_m_axi_bid[S_IDW-1:0]), - .s_axi_bresp (stub_m_axi_bresp[1:0]), - .s_axi_bvalid (stub_m_axi_bvalid), - .s_axi_rid (stub_m_axi_rid[S_IDW-1:0]), - .s_axi_rdata (stub_m_axi_rdata[31:0]), - .s_axi_rlast (stub_m_axi_rlast), - .s_axi_rresp (stub_m_axi_rresp[1:0]), - .s_axi_rvalid (stub_m_axi_rvalid), - .s_axi_wready (stub_m_axi_wready), - // Inputs - .s_axi_arid (stub_m_axi_arid[S_IDW-1:0]), - .s_axi_araddr (stub_m_axi_araddr[31:0]), - .s_axi_arburst (stub_m_axi_arburst[1:0]), - .s_axi_arcache (stub_m_axi_arcache[3:0]), - .s_axi_arlock (stub_m_axi_arlock), - .s_axi_arlen (stub_m_axi_arlen[7:0]), - .s_axi_arprot (stub_m_axi_arprot[2:0]), - .s_axi_arqos (stub_m_axi_arqos[3:0]), - .s_axi_arsize (stub_m_axi_arsize[2:0]), - .s_axi_arvalid (stub_m_axi_arvalid), - .s_axi_awid (stub_m_axi_awid[S_IDW-1:0]), - .s_axi_awaddr (stub_m_axi_awaddr[31:0]), - .s_axi_awburst (stub_m_axi_awburst[1:0]), - .s_axi_awcache (stub_m_axi_awcache[3:0]), - .s_axi_awlock (stub_m_axi_awlock), - .s_axi_awlen (stub_m_axi_awlen[7:0]), - .s_axi_awprot (stub_m_axi_awprot[2:0]), - .s_axi_awqos (stub_m_axi_awqos[3:0]), - .s_axi_awsize (stub_m_axi_awsize[2:0]), - .s_axi_awvalid (stub_m_axi_awvalid), - .s_axi_bready (stub_m_axi_bready), - .s_axi_rready (stub_m_axi_rready), - .s_axi_wid (stub_m_axi_wid[S_IDW-1:0]), - .s_axi_wdata (stub_m_axi_wdata[31:0]), - .s_axi_wlast (stub_m_axi_wlast), - .s_axi_wstrb (stub_m_axi_wstrb[3:0]), - .s_axi_wvalid (stub_m_axi_wvalid)); +); */ + + // Provide an easy way to send mailbox messages to elink0 via the 0x910 address + wire elink0_mux_txwr_access; + wire elink1_mux_rxwr_access; + + assign elink0_mux_txwr_access = elink0_txwr_access & + (e2c_xmesh_packet_out[39:28]==12'h810 | + e2c_xmesh_packet_out[39:28]==12'h808 | + e2c_xmesh_packet_out[39:28]==12'h920); + assign elink1_mux_rxwr_access = elink0_txwr_access & + (e2c_xmesh_packet_out[39:28]==12'h820 | + e2c_xmesh_packet_out[39:28]==12'h910); + + //###################################################################### //1ST ELINK //###################################################################### @@ -361,6 +310,7 @@ module dut(/*AUTOARG*/ defparam elink0.ID = 12'h810; defparam elink0.ETYPE = 0; + //defparam elink0.WAIT = 0; elink elink0 (.sys_nreset (nreset), .elink_active (dut_active), .txrr_access (1'b0),//not tested @@ -374,6 +324,7 @@ module dut(/*AUTOARG*/ .rxwr_wait (1'b0),//not tested .rxrd_wait (1'b0),//not tested .rxrr_wait (elink0_rxrr_wait), + .txwr_access (elink0_mux_txwr_access), /*AUTOINST*/ // Outputs .rxo_wr_wait_p (elink0_rxo_wr_wait_p), // Templated @@ -407,12 +358,85 @@ module dut(/*AUTOARG*/ .txi_wr_wait_n (elink1_rxo_wr_wait_n), // Templated .txi_rd_wait_p (elink1_rxo_rd_wait_p), // Templated .txi_rd_wait_n (elink1_rxo_rd_wait_n), // Templated - .txwr_access (elink0_txwr_access), // Templated .txwr_packet (elink0_txwr_packet[PW-1:0]), // Templated .txrd_access (elink0_txrd_access), // Templated .txrd_packet (elink0_txrd_packet[PW-1:0])); // Templated - + + //###################################################################### + //AXI MASTER (DRIVES STIMULUS) to configure elink1 + //###################################################################### + /*emaxi AUTO_TEMPLATE (//Stimulus + .m_axi_aresetn (nreset), + .m_axi_aclk (clk), + .rxrd_access (1'b0), + .rxrd_packet ({(PW){1'b0}}), + .rxrd_wait (), + .txrr_access (elink1_txrr_access), + .txrr_packet (elink1_txrr_packet[PW-1:0]), + .txrr_wait (elink1_txrr_wait), + .rxwr_access (elink1_mux_rxwr_access), + .rxwr_packet (e2c_xmesh_packet_out[PW-1:0]), + .rxwr_wait (e2c_xmesh_wait_in), + .m_\(.*\) (m_\1[]), + ); + */ + + + emaxi #(.M_IDW(M_IDW)) + emaxi (/*AUTOINST*/ + // Outputs + .rxwr_wait (e2c_xmesh_wait_in), // Templated + .rxrd_wait (), // Templated + .txrr_access (elink1_txrr_access), // Templated + .txrr_packet (elink1_txrr_packet[PW-1:0]), // Templated + .m_axi_awid (m_axi_awid[M_IDW-1:0]), // Templated + .m_axi_awaddr (m_axi_awaddr[31:0]), // Templated + .m_axi_awlen (m_axi_awlen[7:0]), // Templated + .m_axi_awsize (m_axi_awsize[2:0]), // Templated + .m_axi_awburst (m_axi_awburst[1:0]), // Templated + .m_axi_awlock (m_axi_awlock), // Templated + .m_axi_awcache (m_axi_awcache[3:0]), // Templated + .m_axi_awprot (m_axi_awprot[2:0]), // Templated + .m_axi_awqos (m_axi_awqos[3:0]), // Templated + .m_axi_awvalid (m_axi_awvalid), // Templated + .m_axi_wid (m_axi_wid[M_IDW-1:0]), // Templated + .m_axi_wdata (m_axi_wdata[63:0]), // Templated + .m_axi_wstrb (m_axi_wstrb[7:0]), // Templated + .m_axi_wlast (m_axi_wlast), // Templated + .m_axi_wvalid (m_axi_wvalid), // Templated + .m_axi_bready (m_axi_bready), // Templated + .m_axi_arid (m_axi_arid[M_IDW-1:0]), // Templated + .m_axi_araddr (m_axi_araddr[31:0]), // Templated + .m_axi_arlen (m_axi_arlen[7:0]), // Templated + .m_axi_arsize (m_axi_arsize[2:0]), // Templated + .m_axi_arburst (m_axi_arburst[1:0]), // Templated + .m_axi_arlock (m_axi_arlock), // Templated + .m_axi_arcache (m_axi_arcache[3:0]), // Templated + .m_axi_arprot (m_axi_arprot[2:0]), // Templated + .m_axi_arqos (m_axi_arqos[3:0]), // Templated + .m_axi_arvalid (m_axi_arvalid), // Templated + .m_axi_rready (m_axi_rready), // Templated + // Inputs + .rxwr_access (elink1_mux_rxwr_access), // Templated + .rxwr_packet (e2c_xmesh_packet_out[PW-1:0]), // Templated + .rxrd_access (1'b0), // Templated + .rxrd_packet ({(PW){1'b0}}), // Templated + .txrr_wait (elink1_txrr_wait), // Templated + .m_axi_aclk (clk), // Templated + .m_axi_aresetn (nreset), // Templated + .m_axi_awready (m_axi_awready), // Templated + .m_axi_wready (m_axi_wready), // Templated + .m_axi_bid (m_axi_bid[M_IDW-1:0]), // Templated + .m_axi_bresp (m_axi_bresp[1:0]), // Templated + .m_axi_bvalid (m_axi_bvalid), // Templated + .m_axi_arready (m_axi_arready), // Templated + .m_axi_rid (m_axi_rid[M_IDW-1:0]), // Templated + .m_axi_rdata (m_axi_rdata[63:0]), // Templated + .m_axi_rresp (m_axi_rresp[1:0]), // Templated + .m_axi_rlast (m_axi_rlast), // Templated + .m_axi_rvalid (m_axi_rvalid)); // Templated + //###################################################################### //2ND ELINK //###################################################################### @@ -422,7 +446,7 @@ module dut(/*AUTOARG*/ .sys_clk (clk), .rxi_\(.*\) (elink1_txo_\1[]), .txi_\(.*\) (elink1_rxo_\1[]), - .s_\(.*\) (stub_m_\1[]), + .s_\(.*\) (m_\1[]), .m_\(.*\) (elink1_m_\1[]), .\(.*\) (@"(substring vl-cell-name 0 6)"_\1[]), @@ -433,7 +457,7 @@ module dut(/*AUTOARG*/ defparam elink1.ETYPE = 0; defparam elink1.S_IDW = S_IDW; defparam elink1.M_IDW = M_IDW; - + //defparam elink1.WAIT = 1; axi_elink elink1 ( .m_axi_rdata ({elink1_m_axi_rdata[31:0],elink1_m_axi_rdata[31:0]}), .m_axi_aresetn (nreset), .s_axi_aresetn (nreset), @@ -493,17 +517,17 @@ module dut(/*AUTOARG*/ .m_axi_arqos (elink1_m_axi_arqos[3:0]), // Templated .m_axi_arvalid (elink1_m_axi_arvalid), // Templated .m_axi_rready (elink1_m_axi_rready), // Templated - .s_axi_arready (stub_m_axi_arready), // Templated - .s_axi_awready (stub_m_axi_awready), // Templated - .s_axi_bid (stub_m_axi_bid[S_IDW-1:0]), // Templated - .s_axi_bresp (stub_m_axi_bresp[1:0]), // Templated - .s_axi_bvalid (stub_m_axi_bvalid), // Templated - .s_axi_rid (stub_m_axi_rid[S_IDW-1:0]), // Templated - .s_axi_rdata (stub_m_axi_rdata[31:0]), // Templated - .s_axi_rlast (stub_m_axi_rlast), // Templated - .s_axi_rresp (stub_m_axi_rresp[1:0]), // Templated - .s_axi_rvalid (stub_m_axi_rvalid), // Templated - .s_axi_wready (stub_m_axi_wready), // Templated + .s_axi_arready (m_axi_arready), // Templated + .s_axi_awready (m_axi_awready), // Templated + .s_axi_bid (m_axi_bid[S_IDW-1:0]), // Templated + .s_axi_bresp (m_axi_bresp[1:0]), // Templated + .s_axi_bvalid (m_axi_bvalid), // Templated + .s_axi_rid (m_axi_rid[S_IDW-1:0]), // Templated + .s_axi_rdata (m_axi_rdata[31:0]), // Templated + .s_axi_rlast (m_axi_rlast), // Templated + .s_axi_rresp (m_axi_rresp[1:0]), // Templated + .s_axi_rvalid (m_axi_rvalid), // Templated + .s_axi_wready (m_axi_wready), // Templated // Inputs .sys_clk (clk), // Templated .m_axi_awready (elink1_m_axi_awready), // Templated @@ -516,33 +540,33 @@ module dut(/*AUTOARG*/ .m_axi_rresp (elink1_m_axi_rresp[1:0]), // Templated .m_axi_rlast (elink1_m_axi_rlast), // Templated .m_axi_rvalid (elink1_m_axi_rvalid), // Templated - .s_axi_arid (stub_m_axi_arid[S_IDW-1:0]), // Templated - .s_axi_araddr (stub_m_axi_araddr[31:0]), // Templated - .s_axi_arburst (stub_m_axi_arburst[1:0]), // Templated - .s_axi_arcache (stub_m_axi_arcache[3:0]), // Templated - .s_axi_arlock (stub_m_axi_arlock), // Templated - .s_axi_arlen (stub_m_axi_arlen[7:0]), // Templated - .s_axi_arprot (stub_m_axi_arprot[2:0]), // Templated - .s_axi_arqos (stub_m_axi_arqos[3:0]), // Templated - .s_axi_arsize (stub_m_axi_arsize[2:0]), // Templated - .s_axi_arvalid (stub_m_axi_arvalid), // Templated - .s_axi_awid (stub_m_axi_awid[S_IDW-1:0]), // Templated - .s_axi_awaddr (stub_m_axi_awaddr[31:0]), // Templated - .s_axi_awburst (stub_m_axi_awburst[1:0]), // Templated - .s_axi_awcache (stub_m_axi_awcache[3:0]), // Templated - .s_axi_awlock (stub_m_axi_awlock), // Templated - .s_axi_awlen (stub_m_axi_awlen[7:0]), // Templated - .s_axi_awprot (stub_m_axi_awprot[2:0]), // Templated - .s_axi_awqos (stub_m_axi_awqos[3:0]), // Templated - .s_axi_awsize (stub_m_axi_awsize[2:0]), // Templated - .s_axi_awvalid (stub_m_axi_awvalid), // Templated - .s_axi_bready (stub_m_axi_bready), // Templated - .s_axi_rready (stub_m_axi_rready), // Templated - .s_axi_wid (stub_m_axi_wid[S_IDW-1:0]), // Templated - .s_axi_wdata (stub_m_axi_wdata[31:0]), // Templated - .s_axi_wlast (stub_m_axi_wlast), // Templated - .s_axi_wstrb (stub_m_axi_wstrb[3:0]), // Templated - .s_axi_wvalid (stub_m_axi_wvalid)); // Templated + .s_axi_arid (m_axi_arid[S_IDW-1:0]), // Templated + .s_axi_araddr (m_axi_araddr[31:0]), // Templated + .s_axi_arburst (m_axi_arburst[1:0]), // Templated + .s_axi_arcache (m_axi_arcache[3:0]), // Templated + .s_axi_arlock (m_axi_arlock), // Templated + .s_axi_arlen (m_axi_arlen[7:0]), // Templated + .s_axi_arprot (m_axi_arprot[2:0]), // Templated + .s_axi_arqos (m_axi_arqos[3:0]), // Templated + .s_axi_arsize (m_axi_arsize[2:0]), // Templated + .s_axi_arvalid (m_axi_arvalid), // Templated + .s_axi_awid (m_axi_awid[S_IDW-1:0]), // Templated + .s_axi_awaddr (m_axi_awaddr[31:0]), // Templated + .s_axi_awburst (m_axi_awburst[1:0]), // Templated + .s_axi_awcache (m_axi_awcache[3:0]), // Templated + .s_axi_awlock (m_axi_awlock), // Templated + .s_axi_awlen (m_axi_awlen[7:0]), // Templated + .s_axi_awprot (m_axi_awprot[2:0]), // Templated + .s_axi_awqos (m_axi_awqos[3:0]), // Templated + .s_axi_awsize (m_axi_awsize[2:0]), // Templated + .s_axi_awvalid (m_axi_awvalid), // Templated + .s_axi_bready (m_axi_bready), // Templated + .s_axi_rready (m_axi_rready), // Templated + .s_axi_wid (m_axi_wid[S_IDW-1:0]), // Templated + .s_axi_wdata (m_axi_wdata[31:0]), // Templated + .s_axi_wlast (m_axi_wlast), // Templated + .s_axi_wstrb (m_axi_wstrb[3:0]), // Templated + .s_axi_wvalid (m_axi_wvalid)); // Templated //###################################################################### //TIE OFF UNUSED SLAVE PORT ON ELINK1 @@ -553,51 +577,12 @@ module dut(/*AUTOARG*/ .m_\(.*\) (stub_m_\1[]), ); */ - aximaster_stub + /*aximaster_stub #(.M_IDW(M_IDW)) aximaster_stub (.m_axi_aclk (aclk), .m_axi_aresetn (nreset), - /*AUTOINST*/ - // Outputs - .m_axi_awid (stub_m_axi_awid[M_IDW-1:0]), // Templated - .m_axi_awaddr (stub_m_axi_awaddr[31:0]), // Templated - .m_axi_awlen (stub_m_axi_awlen[7:0]), // Templated - .m_axi_awsize (stub_m_axi_awsize[2:0]), // Templated - .m_axi_awburst (stub_m_axi_awburst[1:0]), // Templated - .m_axi_awlock (stub_m_axi_awlock), // Templated - .m_axi_awcache (stub_m_axi_awcache[3:0]), // Templated - .m_axi_awprot (stub_m_axi_awprot[2:0]), // Templated - .m_axi_awqos (stub_m_axi_awqos[3:0]), // Templated - .m_axi_awvalid (stub_m_axi_awvalid), // Templated - .m_axi_wid (stub_m_axi_wid[M_IDW-1:0]), // Templated - .m_axi_wdata (stub_m_axi_wdata[63:0]), // Templated - .m_axi_wstrb (stub_m_axi_wstrb[7:0]), // Templated - .m_axi_wlast (stub_m_axi_wlast), // Templated - .m_axi_wvalid (stub_m_axi_wvalid), // Templated - .m_axi_bready (stub_m_axi_bready), // Templated - .m_axi_arid (stub_m_axi_arid[M_IDW-1:0]), // Templated - .m_axi_araddr (stub_m_axi_araddr[31:0]), // Templated - .m_axi_arlen (stub_m_axi_arlen[7:0]), // Templated - .m_axi_arsize (stub_m_axi_arsize[2:0]), // Templated - .m_axi_arburst (stub_m_axi_arburst[1:0]), // Templated - .m_axi_arlock (stub_m_axi_arlock), // Templated - .m_axi_arcache (stub_m_axi_arcache[3:0]), // Templated - .m_axi_arprot (stub_m_axi_arprot[2:0]), // Templated - .m_axi_arqos (stub_m_axi_arqos[3:0]), // Templated - .m_axi_arvalid (stub_m_axi_arvalid), // Templated - .m_axi_rready (stub_m_axi_rready), // Templated - // Inputs - .m_axi_awready (stub_m_axi_awready), // Templated - .m_axi_wready (stub_m_axi_wready), // Templated - .m_axi_bid (stub_m_axi_bid[M_IDW-1:0]), // Templated - .m_axi_bresp (stub_m_axi_bresp[1:0]), // Templated - .m_axi_bvalid (stub_m_axi_bvalid), // Templated - .m_axi_arready (stub_m_axi_arready), // Templated - .m_axi_rid (stub_m_axi_rid[M_IDW-1:0]), // Templated - .m_axi_rdata (stub_m_axi_rdata[63:0]), // Templated - .m_axi_rresp (stub_m_axi_rresp[1:0]), // Templated - .m_axi_rlast (stub_m_axi_rlast), // Templated - .m_axi_rvalid (stub_m_axi_rvalid)); // Templated + + );*/ //###################################################################### //AXI SLAVE PORT FOR MEMORY @@ -613,7 +598,7 @@ module dut(/*AUTOARG*/ esaxi #(.S_IDW(S_IDW)) esaxi (.s_axi_aclk (clk), .s_axi_aresetn (nreset), - .s_axi_wstrb ( elink1_m_axi_wstrb[3:0] | elink1_m_axi_wstrb[7:4] ), + .s_axi_wstrb (elink1_m_axi_wstrb[3:0] | elink1_m_axi_wstrb[7:4] ), /*AUTOINST*/ // Outputs .txwr_access (elink1_txwr_access), // Templated @@ -665,6 +650,9 @@ module dut(/*AUTOARG*/ .s_axi_wvalid (elink1_m_axi_wvalid)); // Templated /*etx_fifo AUTO_TEMPLATE ( + .txrr_fifo_wait (1'b0), + .txrr_fifo_access (), + .txrr_fifo_packet (), .\(.*\)_fifo_\(.*\) (emem_\1_\2[]), .\(.*\) (elink1_\1[]), @@ -674,9 +662,7 @@ module dut(/*AUTOARG*/ etx_fifo etx_fifo (.sys_nreset (nreset), .sys_clk (clk), .tx_lclk_div4 (clk), - .txrd_fifo_wait (emem_txrd_wait), - .txrr_fifo_wait (emem_txrr_wait), - .txwr_fifo_wait (emem_txwr_wait), + /*AUTOINST*/ // Outputs .txrd_wait (elink1_txrd_wait), // Templated @@ -684,8 +670,8 @@ module dut(/*AUTOARG*/ .txrr_wait (elink1_txrr_wait), // Templated .txrd_fifo_access (emem_txrd_access), // Templated .txrd_fifo_packet (emem_txrd_packet[PW-1:0]), // Templated - .txrr_fifo_access (emem_txrr_access), // Templated - .txrr_fifo_packet (emem_txrr_packet[PW-1:0]), // Templated + .txrr_fifo_access (), // Templated + .txrr_fifo_packet (), // Templated .txwr_fifo_access (emem_txwr_access), // Templated .txwr_fifo_packet (emem_txwr_packet[PW-1:0]), // Templated // Inputs @@ -694,8 +680,10 @@ module dut(/*AUTOARG*/ .txwr_access (elink1_txwr_access), // Templated .txwr_packet (elink1_txwr_packet[PW-1:0]), // Templated .txrr_access (elink1_txrr_access), // Templated - .txrr_packet (elink1_txrr_packet[PW-1:0])); // Templated - + .txrr_packet (elink1_txrr_packet[PW-1:0]), // Templated + .txrd_fifo_wait (emem_txrd_wait), // Templated + .txrr_fifo_wait (1'b0), // Templated + .txwr_fifo_wait (emem_txwr_wait)); // Templated //###################################################################### //AXI SLAVE PORT FOR MEMORY @@ -711,6 +699,7 @@ module dut(/*AUTOARG*/ assign emem_txrd_wait = (emem_wait & emem_txrd_access) | emem_txwr_access; assign emem_txwr_wait = (emem_wait & emem_txwr_access); + /*ememory AUTO_TEMPLATE ( // Outputsd .\(.*\)_out (elink1_rxrr_\1[]), @@ -735,7 +724,7 @@ module dut(/*AUTOARG*/ endmodule // dv_elink // Local Variables: -// verilog-library-directories:("." "../hdl" "../../emesh/dv" "../../axi/dv" "../../emesh/hdl" "../../memory/hdl") +// verilog-library-directories:("." "../hdl" "../../emesh/dv" "../../axi/dv" "../axi/hdl" ../../emesh/hdl" "../../memory/hdl") // End: diff --git a/elink/dv/test.memh b/elink/dv/test.memh new file mode 100644 index 00000000..dc7f8794 --- /dev/null +++ b/elink/dv/test.memh @@ -0,0 +1,71 @@ +00000000_00000003_810f0200_05_0040 //WRITE (E_RESET): assert reset (and wait!!!) +00000000_00000000_810f0200_05_0100 // (E_RESET): deassert reset (and wait more!!) +00000000_00000810_810Ec880_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4880: address 910, 0: mi_wr_vec = f lower four bytes - Writing to entry "910" lower +00000000_00000000_810Ec884_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4884: address 910, 4: mi_wr_vec = 30 upper two bytes - Writing to entry "910" upper ie 910 -> 810 +00000000_00000808_810Ec040_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4040: 100 0 000 01address 808, 0: mi_wr_vec = f lower - Writing to entry "808" +00000000_00000000_810Ec044_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4044: address 808, 4: mi_wr_vec = 30 upper - ie 808 -> 808 +00000000_00000810_810Ec080_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4080: address 810, 0: mi_wr_vec = f lower - Writing to entry "810" +00000000_00000000_810Ec084_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4084: address 810, 4: mi_wr_vec = 30 upper - ie 810 -> 808 +00000000_00000002_810f0300_05_0020 // Enable MMU +00000000_00000820_820Ec900_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4880: address 920, 0: mi_wr_vec = f lower four bytes - Writing to entry "920" lower +00000000_00000000_820Ec904_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4884: address 920, 4: mi_wr_vec = 30 upper two bytes - Writing to entry "920" upper ie 920 -> 820 +00000000_00000808_820Ec040_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4040: 100 0 000 01address 808, 0: mi_wr_vec = f lower - Writing to entry "808" +00000000_00000000_820Ec044_05_0000 // E: EGROUP_MMU, 8 (c): RX, 4044: address 808, 4: mi_wr_vec = 30 upper - ie 808 -> 808 +00000000_00000002_820f0300_05_0000 // Enable MMU +810D0204_00000001_810f0204_05_0000 // (E_CLK): configure clock +00000000_00000002_810f0208_05_0000 // (E_CHIPID): write chipid +00000000_0000AABB_810f020c_05_0000 // (E_VERSION): write version +00000000_00000000_810f0210_05_0000 // (ETX_CFG): write TX config +00000000_00000000_810f0214_05_0000 // (ETX_STATUS): clear TX status +00000000_810f1234_810f0218_05_0000 // (ETX_GPIO): write tx gpio +00000000_00000000_810F021c_05_0010 //zero out monitor +00000000_00000000_810f0304_05_0000 // (ERX_STATUS): clear RX status +00000000_00000000_810f030C_05_0000 // (ERX_OFFSET): offset register +00000000_810f4321_810f0318_05_0000 // (ERX_TESTDATA):test data +00000000_808a5a51_80800000_05_0000 //32-bit write +00000000_8085a5a2_80800004_05_0000 //32-bit write +00000000_808a5a53_80800008_05_0000 //32-bit write +00000000_80801014_8080000c_05_0000 //32-bit write +00000000_80812125_80800010_05_0000 //32-bit write +00000000_80823236_80800014_05_0000 //32-bit write +00000000_80898397_80800018_05_0000 //32-bit write +00000000_808ecec8_8080001c_05_0000 //32-bit write +81000000_ff0a5a5a_910f0320_05_0000 // write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +810D0000_DEADBEEF_80800000_04_00f0 // dummy read?? - wait for all the Emem writes +810D0000_DEADBEEF_80800000_04_0020 // cheat and allow multiple reads at once! +810D0004_DEADBEEF_80800004_04_0020 // +81000000_ff15a5a5_910f0320_05_0000 // write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +00000000_00000000_820f0304_05_0000 // (elink1:ERX_STATUS): clear RX status +82000000_EE145678_920f0320_05_0000 // elink1:write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +810D0008_DEADBEEF_80800008_04_0020 // +00000000_FEDABEE1_810f0318_05_0000 // (ERX_TESTDATA):test data +810D000c_DEADBEEF_8080000c_04_0002 // +82000000_EE287654_920f0320_05_0000 // elink1:write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +00000000_808cece9_80800020_05_0000 //32-bit write +00000000_820f1111_820f0218_05_0000 // (elink1:ETX_GPIO): write tx gpio +810D0320_DEADBEEF_810f0320_04_0020 // (E_MAILBOXLO): read from lo mailbox +82000000_EE3a5a5a_920f0320_05_0000 // write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +00000000_808cecea_80800024_05_0000 //32-bit write +810D0010_DEADBEEF_80800010_04_0020 // +81000000_ff245678_910f0320_05_0000 // write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +82000000_EE145678_920f0320_05_0000 // elink1:write mailbox 64bit: control mode 0; data mode 2'b10; write & ext_access +00000000_810f3292_810f0318_05_0000 // (ERX_TESTDATA):test data +810D0014_DEADBEEF_80800014_04_0020 // +00000000_808abcdb_80800028_05_0000 //32-bit write +810D0018_DEADBEEF_80800018_04_0020 // +00000000_808dbcac_8080002c_05_0000 //32-bit write +00000000_820f2222_820f0318_05_0000 // (elink1:ERX_TESTDATA):test data +810D001c_DEADBEEF_8080001c_04_0020 // +810D0324_DEADFEEF_810f0324_04_0020 // (E_MAILBOXHI): read from hi mailbox +810D020C_DEADBEEF_810f020c_04_0020 //READ (E_VERSION): read version +810D0210_DEADBEEF_810f0210_04_0020 // (ETX_CFG): read config +810D0320_DEADBEEF_810f0320_04_0020 // (E_MAILBOXLO): read from lo mailbox +810D0324_DEADFEEF_810f0324_04_0020 // (E_MAILBOXHI): read from hi mailbox +810D0214_DEADBEEF_810f0214_04_0020 // (ETX_STATUS): read status +810D0218_DEADBEEF_810f0218_04_0020 // (ETX_GPIO): read from tx gpio +810D0300_DEADBEEF_810f0300_04_0020 // (ERX_CFG): read from RX config +810D0304_DEADBEEF_810f0304_04_0020 // (ERX_STATUS): read from RX status +810D0320_DEADBEEF_810f0320_04_0020 // (E_MAILBOXLO): read from lo mailbox +810D0324_DEADFEEF_810f0324_04_0020 // (E_MAILBOXHI): read from hi mailbox +810D0308_DEADFEEF_810f0308_04_0020 // (ERX_GPIO): read from RX GPIO + diff --git a/elink/sw/memory/build.sh b/elink/sw/memory/build.sh new file mode 100755 index 00000000..b4675684 --- /dev/null +++ b/elink/sw/memory/build.sh @@ -0,0 +1,26 @@ +#!/bin/bash + +set -e + +ESDK=${EPIPHANY_HOME} +ELIBS="-L ${ESDK}/tools/host/lib" +EINCS="-I ${ESDK}/tools/host/include" +ELDF=${ESDK}/bsps/current/internal.ldf + +SCRIPT=$(readlink -f "$0") +EXEPATH=$(dirname "$SCRIPT") +cd $EXEPATH + +# Create the binaries directory +mkdir -p bin/ + +CROSS_PREFIX= + +# Build HOST side application +${CROSS_PREFIX}gcc src/e-main.c -o bin/e-main.elf ${EINCS} ${ELIBS} -le-hal -le-loader -lpthread + +# Build DEVICE side program +e-gcc -O0 -T ${ELDF} src/e-task.c -o bin/e-task.elf -le-lib -lm -ffast-math + +# Convert ebinary to SREC file +e-objcopy --srec-forceS3 --output-target srec bin/e-task.elf bin/e-task.srec diff --git a/elink/sw/memory/run.sh b/elink/sw/memory/run.sh new file mode 100755 index 00000000..36d63bb0 --- /dev/null +++ b/elink/sw/memory/run.sh @@ -0,0 +1,17 @@ +#!/bin/bash + +set -e + +SCRIPT=$(readlink -f "$0") +EXEPATH=$(dirname "$SCRIPT") + + + + +#dumping disassembly +e-objdump -D bin/e-task.elf > DUMP + +#running program +cd $EXEPATH/bin +./e-main.elf e-task.elf + diff --git a/elink/sw/memory/src/common.h b/elink/sw/memory/src/common.h new file mode 100644 index 00000000..07f72e15 --- /dev/null +++ b/elink/sw/memory/src/common.h @@ -0,0 +1,2 @@ +#define N 1024 + diff --git a/elink/sw/memory/src/e-main.c b/elink/sw/memory/src/e-main.c new file mode 100644 index 00000000..e1a3db22 --- /dev/null +++ b/elink/sw/memory/src/e-main.c @@ -0,0 +1,797 @@ +#include "common.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include // for errno +#include +#include +#include // for ioctl numbers + +#define TAPS 64 + +// Stuff already defined somewhere else +#define E_REG_MESHCFG (0xF0700) +#define E_REG_ILATST (0xF042C) + +// +#define E_SYS_TXSTATUS (0xF0214) +#define E_SYS_TXMONITOR (0xF021c) +#define E_SYS_TXPACKET (0xF0220) +#define E_SYS_RXSTATUS (0xF0304) +#define E_SYS_RXIDELAY0 (0xF0310) +#define E_SYS_RXIDELAY1 (0xF0314) +#define EPIPHANY_DEV "/dev/epiphany" + +#ifdef EPIPHANY_IOC_MB_ENABLE +typedef struct _MAILBOX_CONTROL +{ + int running; // 1 if ready; otherwise not ready + int devfd; // handle for epiphany device driver + int epollfd; // handle for blocking wait on notification + int kernelEventfd; // handle for kernel notification + struct epoll_event *events; + mailbox_notifier_t mailbox_notifier; +} mailbox_control_t; +static mailbox_control_t mc; +#endif + +int InitialEpiphany(void); +void CloseEpiphany(void); +int InitialTestMessageStore(void); +void CloseTestMessageStore(void); +int InitialMailboxNotifier(void); +int OpenEpiphanyDevice(void); +int OpenKernelEventMonitor(void); +void CloseMailboxNotifier(void); +void CancelMailboxNotifier(void); +int WaitForMailboxNotifier(void); +void PrintStuffOfInterest(void); +int setup_system(void); +int my_reset_system(void); +void WriteTestPatternsToMemory(e_mem_t *emem, e_epiphany_t *dev); +void ReadTestPatternsFromMemory(e_mem_t *emem, e_epiphany_t *dev, int initval, int incr); +int CheckTestPatterns(int initval, int incr); + +#define _BuffSize (0x2000) +#define _SharedBuffOffset (0x1000000) +#define _LocalBuffOffset (0x5000) + +static int Zero = 0; +static int UseInterrupts = 0; // interrupts 1 + 2000 + 10 bus errors!! with pc at various points +// interrupts 1 + 2000 + 9 freezes with pc 0xd1e, or 0xd2a or ... +static e_sys_rxcfg_t rxcfg = { .reg = 0 }; +static char emsg[_BuffSize]; + +static int idelay[TAPS]={0x00000000,0x00000000,//0 + 0x11111111,0x00000001,//1 + 0x22222222,0x00000002,//2 + 0x33333333,0x00000003,//3 + 0x44444444,0x00000004,//4 + 0x55555555,0x00000005,//5 + 0x66666666,0x00000006,//6 + 0x77777777,0x00000007,//7 + 0x88888888,0x00000008,//8 + 0x99999999,0x00000009,//9 + 0xaaaaaaaa,0x0000000a,//10 + 0xbbbbbbbb,0x0000000b,//11 + 0xcccccccc,0x0000000c,//12 + 0xdddddddd,0x0000000d,//13 + 0xeeeeeeee,0x0000000e,//14 + 0xffffffff,0x0000000f,//15 + 0x00000000,0x00000010,//16 + 0x11111111,0x00000011,//17 + 0x22222222,0x00000012,//18 + 0x33333333,0x00000013,//29 + 0x44444444,0x00000014,//20 + 0x55555555,0x00000015,//21 + 0x66666666,0x00000016,//22 + 0x77777777,0x00000017,//23 + 0x88888888,0x00000018,//24 + 0x99999999,0x00000019,//25 + 0xaaaaaaaa,0x0000001a,//26 + 0xbbbbbbbb,0x0000001b,//27 + 0xcccccccc,0x0000001c,//28 + 0xdddddddd,0x0000001d,//29 + 0xeeeeeeee,0x0000001e,//30 + 0xffffffff,0x0000001f};//31 + +int main(int argc, char *argv[]){ + e_loader_diag_t e_verbose; + e_platform_t platform; + e_epiphany_t dev, *pdev; + e_mem_t dram, *pdram; + size_t size; + int status=1;//pass + char elfFile[4096]; + pdev = &dev; + pdram = &dram; + int i,j; + unsigned result[N]; + unsigned data = 0xDEADBEEF; + unsigned tmp,fail; + unsigned row, col, loopcount; + int count; + + srand(time(NULL)); + + if (UseInterrupts) + { + // Initialize the Mailbox notifier + InitialMailboxNotifier(); + } + + //Gets ELF file name from command line + strcpy(elfFile, "./bin/e-task.elf"); + + //Initalize Epiphany device + e_set_host_verbosity(H_D0); + e_init(NULL); + my_reset_system(); + e_get_platform_info(&platform); + + // Allocate memory in shared area + e_mem_t emem; + e_alloc(&emem, _SharedBuffOffset, _BuffSize); + + row = 0; + col = 0; + for (loopcount=0; loopcount<40; loopcount++) + { + // Setup system + if (setup_system()) + { + break; + } + usleep(1000); + + // Draw a random core + //row = rand() % platform.rows; + //col = rand() % platform.cols; + + // Visit each core + unsigned lastCol = col; + col = col % platform.cols; + + if (col < lastCol) + { + row++; + unsigned lastRow = row; + row = row % platform.rows; + + if (row < lastRow) + { + break; + } + } + + if (!UseInterrupts) + { + // Without interrupts + // For some reason fixed row and col is better + //row = 0; + //col = 0; + + // With interrupts fixed row and col fails earlier! + } + + printf("INFO: loopcount: %d, row: %d, col: %d\n", loopcount, row, col); + + e_open(&dev, row, col, 1, 1); //open core 0,0 + usleep(1000); + e_reset_group(&dev); + usleep(1000); + + if (UseInterrupts) + { + // Configure epoll to listen for interrupt event + int rtn = ArmMailboxNotifier(); + if (rtn) + { + int rtns = errno; + printf ("main(): EPOLL_CTL_ADD kernelEventfd failed! %s errno: %d\n", strerror(rtns), rtns); + + break; + } + + // Enable the mailbox interrupt + rxcfg.reg = rxcfg.reg | (0x1 << 28); + + if (sizeof(int) != ee_write_esys(E_SYS_RXCFG, rxcfg.reg)) + { + printf("main(): Failed set rxcfg register\n"); + } + usleep(1000); + } + + WriteTestPatternsToMemory(&emem, &dev); + ReadTestPatternsFromMemory(&emem, &dev, 0xff, -1); + + // Read significant registers on the core + printf("E_REG_ILATST: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_ILATST)); + printf("E_REG_MESHCFG: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_MESHCFG)); + printf("E_REG_MEMSTATUS: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_MEMSTATUS)); + printf("E_REG_CONFIG: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_CONFIG)); + printf("E_REG_PC: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_PC)); + printf("E_REG_FSTATUS: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_FSTATUS)); + + //Start program + printf("main(%d,%d): Load core\n", row, col); + if (e_load_group(elfFile, &dev, 0, 0, 1, 1, E_TRUE)) + { + break; + } + + // Read significant registers on the core + printf("E_REG_CONFIG: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_CONFIG)); + printf("E_REG_PC: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_PC)); + printf("E_REG_FSTATUS: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_FSTATUS)); + printf("E_REG_ILATST: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_ILATST)); + printf("E_REG_MESHCFG: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_MESHCFG)); + printf("E_REG_MEMSTATUS: 0x%x\n", ee_read_reg(&dev, 0,0, E_REG_MEMSTATUS)); + + usleep(1000); + + printf("main(%d,%d): Core Loaded\n", row, col); + + // Setup system + if (setup_system()) + { + break; + } + + if (UseInterrupts) + { + WaitForMailboxNotifier(); + } + else + { + for (count=0; count<40; count++) + { + //Reading mailbox + int pre_stat = ee_read_esys(0xF0328); + + if (pre_stat) + { + break; + } + usleep(100000); + } + } + + PrintStuffOfInterest(); + ReadTestPatternsFromMemory(&emem, &dev, 0x0, 1); + + for (count=0; count<40; count++) + { + //Reading mailbox + int pre_stat = ee_read_esys(0xF0328); + int mbox_lo = ee_read_esys(0xF0320); + int mbox_hi = ee_read_esys(0xF0324); + int post_stat = ee_read_esys(0xF0328); + printf ("PRE_STAT=%08x POST_STAT=%08x LO=%08x HI=%08x\n", pre_stat, post_stat, mbox_lo, mbox_hi); + + if (!post_stat) + { + if (mbox_lo) printf("ERROR: e-task 0x%x read errors for local memory, last error at 0x%x\n", mbox_lo & 0xffff, (mbox_lo>>16) & 0xffff); + if (mbox_hi) printf("ERROR: e-task 0x%x read errors for shared memory, last error at 0x%x\n", mbox_hi & 0xffff, (mbox_hi>>16) & 0xffff); + + break; + } + } + + e_close(&dev); + usleep(1000); + + col++; + } + + if (UseInterrupts) + { + CloseMailboxNotifier(); + } + + e_free(&emem); + + //Close down Epiphany device + e_finalize(); + + //self check + if(status){ + return EXIT_SUCCESS; + } + else{ + return EXIT_FAILURE; + } +} + +int CheckTestPatterns(int initval, int incr) +{ + char val = initval; + int count; + int failures=0; + int passes = 0; + int reports = 0; + + for (count=0; count<_BuffSize; count++) + { + if (emsg[count] != val) + { + failures++; + } + else + { + passes++; + } + + if (0reports) + { + printf("INFO: Read 0x%x, should be 0x%x\n", emsg[count], val); + reports++; + } + val += incr; + } + + if (0> 2 */; + if (sizeof(int) != ee_write_esys(E_SYS_CHIPID, chipid /* << 2 */)) + goto err; + usleep(1000); +#endif + +#if 1 + txcfg.enable = 1; + txcfg.mmu_enable = 0; + if (sizeof(int) != ee_write_esys(E_SYS_TXCFG, txcfg.reg)) + goto err; + usleep(1000); +#endif + + rxcfg.testmode = 0; /* bug/(feature?) workaround */ + rxcfg.mmu_enable = 0; + + // I have no idea how this works! mailbox data addressed to 810 -> 310?? + rxcfg.remap_cfg = 1; // "static" remap_addr + rxcfg.remap_mask = 0xf00; + rxcfg.remap_base = 0x300;//turn 8 into 3 + // But changing to this has no effect! + //rxcfg.remap_mask = 0xff0; + //rxcfg.remap_base = 0x810;//route all to 810 + if (sizeof(int) != ee_write_esys(E_SYS_RXCFG, rxcfg.reg)) + goto err; + usleep(1000); + +#if 0 // ? + rx_dmacfg.enable = 1; + if (sizeof(int) != ee_write_esys(E_SYS_RXDMACFG, rx_dmacfg.reg)) + goto err; + usleep(1000); +#endif + + int delayNo = 7; + if (sizeof(int) != ee_write_esys(E_SYS_RXIDELAY0, idelay[((delayNo+1)*2)-2])) + { + printf("ERROR: setting idelay0 failed\n"); + goto err; + } + + if (sizeof(int) != ee_write_esys(E_SYS_RXIDELAY1, idelay[((delayNo+1)*2)-1])) + { + printf("ERROR: setting idelay1 failed\n"); + goto err; + } + + rc = E_ERR; + + if ( E_OK != e_open(&dev, 2, 3, 1, 1) ) { + warnx("e_reset_system(): e_open() failure."); + goto err; + } + + txcfg.ctrlmode = 0x5; /* Force east */ + txcfg.ctrlmode_select = 0x1; /* */ + usleep(1000); + if (sizeof(int) != ee_write_esys(E_SYS_TXCFG, txcfg.reg)) + goto cleanup_platform; + + //divider = 1; /* Divide by 4, see data sheet */ + divider = 0; /* Divide by 2, see data sheet */ + usleep(1000); + if (sizeof(int) != e_write(&dev, 0, 0, E_REG_LINKCFG, ÷r, sizeof(int))) + goto cleanup_platform; + + txcfg.ctrlmode = 0x0; + txcfg.ctrlmode_select = 0x0; /* */ + usleep(1000); + if (sizeof(int) != ee_write_esys(E_SYS_TXCFG, txcfg.reg)) + goto cleanup_platform; + + rc = E_OK; + +cleanup_platform: + if (E_OK != rc) printf("e_reset_system(): fails\n"); + e_close(&dev); + + usleep(1000); + return rc; + +err: + warnx("e_reset_system(): Failed\n"); + usleep(1000); + return E_ERR; +} + +int my_reset_system(void) +{ + int rc = 0; + uint32_t divider; + uint32_t chipid; + e_sys_txcfg_t txcfg = { .reg = 0 }; + e_sys_rx_dmacfg_t rx_dmacfg = { .reg = 0 }; + e_sys_clkcfg_t clkcfg = { .reg = 0 }; + e_sys_reset_t resetcfg = { .reg = 0 }; + e_epiphany_t dev; + +#if 1 + resetcfg.reset = 1; + if (sizeof(int) != ee_write_esys(E_SYS_RESET, resetcfg.reg)) + goto err; + usleep(1000); + + /* Do we need this ? */ + resetcfg.reset = 0; + if (sizeof(int) != ee_write_esys(E_SYS_RESET, resetcfg.reg)) + goto err; + usleep(1000); +#endif + + return setup_system(); + + err: + warnx("e_reset_system(): Failed\n"); + usleep(1000); + return E_ERR; +} + +void PrintStuffOfInterest() +{ + // Print stuff of interest + int etx_status = ee_read_esys(E_SYS_TXSTATUS); + int etx_config = ee_read_esys(E_SYS_TXCFG); + int erx_status = ee_read_esys(E_SYS_RXSTATUS); + int erx_config = ee_read_esys(E_SYS_RXCFG); + printf("INFO: etx_status: 0x%x, etx_config: 0x%x, erx_status: 0x%x, erx_config: 0x%x", etx_status, etx_config, erx_status, erx_config); + + int txmonitor = ee_read_esys(E_SYS_TXMONITOR);//TXMONITOR + int packet = ee_read_esys(E_SYS_TXPACKET);//TXPACKET + + printf(", TXMON=%d PACKET=0x%08x\n", txmonitor, packet); + + ee_write_esys(E_SYS_TXSTATUS, Zero);//TXSTATUS + ee_write_esys(E_SYS_TXMONITOR, Zero);//TXMONITOR + ee_write_esys(E_SYS_RXSTATUS, Zero);//RXSTATUS + + //printf("E_REG_ILATST: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_ILATST)); + //printf("E_REG_MESHCFG: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_MESHCFG)); + //printf("E_REG_MEMSTATUS: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_MEMSTATUS)); + //printf("E_REG_CONFIG: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_CONFIG)); + //printf("E_REG_PC: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_PC)); + //printf("E_REG_FSTATUS: 0x%x\n", ee_read_reg(dev, 0,0, E_REG_FSTATUS)); +} + +int InitialMailboxNotifier() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + int returns; + + mc.running = 0; + + // Open an epoll object + mc.epollfd = epoll_create(1); + if ( -1 == mc.epollfd ) { + printf("InitialMailboxNotifier(): epoll open failure."); + return E_ERR; + } + + returns = OpenEpiphanyDevice(); + if (returns) + { + printf("InitialMailboxNotifier(): epiphany open failure."); + close(mc.epollfd); + return returns; + } + + returns = OpenKernelEventMonitor(); + if (returns) + { + printf("InitialMailboxNotifier(): mailbox sysfs monitor open failure."); + // Tidy up + close(mc.devfd); + close(mc.epollfd); + return returns; + } + + // Now allocate the event list + mc.events = calloc(2, sizeof(struct epoll_event)); + if (NULL == mc.events) + { + printf("InitialMailboxNotifier(): malloc of event memory failure."); + // Tidy up + struct epoll_event event; + epoll_ctl (mc.epollfd, EPOLL_CTL_DEL, mc.kernelEventfd, &event); + close(mc.kernelEventfd); + close(mc.devfd); + close(mc.epollfd); + return returns; + } + + mc.running = 1; + return returns; +#endif + return 0; +} + +int OpenEpiphanyDevice() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + // Now open the epiphany device for mailbox interrupt control + mc.devfd = open(EPIPHANY_DEV, O_RDWR | O_SYNC); + // printf ("OpenEpiphanyDevice(): mc.devfd %d\n", mc.devfd); + if ( -1 == mc.devfd ) + { + int rtn = errno; + printf ("InitialMaiboxNotifier(): epiphany device open failed! %s errno %d\n", strerror(rtn), rtn); + + return E_ERR; + } +#endif + return 0; +} + +int OpenKernelEventMonitor() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + int returns; + char notifier[8]; + int notifierfd; + int oldNotifier; + + // Open the kernel Event Notifier + mc.kernelEventfd = eventfd(0, EFD_NONBLOCK); + if ( -1 == mc.kernelEventfd ) + { + int rtn = errno; + printf ("InitialMailboxNotifier(): Kernel Event Notifier open failure! %s errno: %d\n", strerror(rtn), rtn); + + return E_ERR; + } + + // Add the kernelEventfd handle to epoll + returns = ModifyNotifier(mc.kernelEventfd, EPOLL_CTL_ADD); + if (returns) + { + int rtn = errno; + printf ("InitialMailboxNotifier(): EPOLL_CTL_ADD kernelEventfd failed! %s errno: %d kernelEventfd: %d\n", strerror(rtn), rtn, mc.kernelEventfd); + + // Tidy up + close(mc.kernelEventfd); + return rtn; + } + + // Starting from scratch with no other application running + // read the current kernel mailbox_notifier fd handle + // If the current kernel mailbox_notifier fd handle is -1 there is no + // other application using the mailbox. + notifierfd = open(MAILBOX_NOTIFIER, O_RDONLY); + oldNotifier = -1; + if (0 < notifierfd) + { + int rtn = read(notifierfd, notifier, 8); + + // printf ("InitialMailboxNotifier(): returns: %d, Old notifier fd: %s\n", rtn, notifier); + if (rtn) + { + sscanf(notifier, "%d", &oldNotifier); + } + + close(notifierfd); + } + + // Starting from scratch ignore other applications and override them + // by passing the old kernel mailbox_notifier fd handle to the driver + // and replace this with the new fd + mc.mailbox_notifier.old_notifier = oldNotifier; + mc.mailbox_notifier.new_notifier = mc.kernelEventfd; + if ( -1 == ioctl(mc.devfd, EPIPHANY_IOC_MB_NOTIFIER, &mc.mailbox_notifier) ) + { + int rtn = errno; + printf("InitialMailboxNotifier(): Failed to send notifier to driver. %s errno: %d kernelEventfd: %d\n", strerror(rtn), rtn, mc.kernelEventfd); + + // Tidy up + struct epoll_event event; + epoll_ctl (mc.epollfd, EPOLL_CTL_DEL, mc.kernelEventfd, &event); + close(mc.kernelEventfd); + mc.kernelEventfd = -1; + return rtn; + } + + return returns; +#endif + return 0; +} + +int ArmMailboxNotifier() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + if (mc.running) + { + return ModifyNotifier(mc.kernelEventfd, EPOLL_CTL_MOD); + } + + return E_ERR; +#endif + return 0; +} + +int ModifyNotifier(int fd, int operation) +{ + return UpdateEpoll(fd, operation, EPOLLIN | EPOLLET); +} + +int UpdateEpoll(int fd, int operation, uint32_t waitOnEvent) +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + int returns; + struct epoll_event event; + + returns = E_ERR; + + // Add the kernelEventfd handle to epoll + event.data.fd = fd; + event.events = waitOnEvent; + returns = epoll_ctl (mc.epollfd, operation, fd, &event); + if (returns) + { + returns = errno; + printf ("InitialMailboxNotifier(): epoll_ctl failed! %s errno: %d operation: %d, event: %d, fd: %d\n", strerror(returns), returns, operation, waitOnEvent, fd); + } + + return returns; +#endif + return 0; +} + +int WaitForMailboxNotifier() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + int numberOfEvents; + size_t bytesRead; + int64_t eventfdCount; + + numberOfEvents = epoll_wait(mc.epollfd, mc.events, 2, -1); + if ((1 < numberOfEvents) || (mc.events[0].data.fd != mc.kernelEventfd)) + { + printf("INFO: WaitForMailboxNotifier(): Cancelled!\n"); + } + + if (0 > numberOfEvents) + { + int epollerrno = errno; + printf("WaitForMailboxNotifier(): epoll_wait failed! %s errno %d\n", strerror(epollerrno), epollerrno); + } + + bytesRead = read(mc.kernelEventfd, &eventfdCount, sizeof(int64_t)); + if (0 > bytesRead) + { + // failure to reset the eventfd counter to zero + // can cause lockups! + int eventfderrno = errno; + printf("ERROR: WaitForMailboxNotifier(): lockup likely: eventfd counter reset failed! %s errno %d\n", strerror(eventfderrno), eventfderrno); + } + + // printf("WaitForMailboxNotifier(): bytesRead: %d, eventfdCount: %d\n", bytesRead, eventfdCount); + + return numberOfEvents; +#else + // do the best we can and wait + usleep(100000); + return 0; +#endif +} + +void CloseMailboxNotifier() +{ +#ifdef EPIPHANY_IOC_MB_ENABLE + //printf ("INFO: MailboxNotifier Closing\n"); + if (mc.running) + { + if (0 < mc.kernelEventfd) + { + mc.mailbox_notifier.old_notifier = mc.kernelEventfd; + mc.mailbox_notifier.new_notifier = -1; + ioctl(mc.devfd, EPIPHANY_IOC_MB_NOTIFIER, &mc.mailbox_notifier); + } + + struct epoll_event event; + epoll_ctl (mc.epollfd, EPOLL_CTL_DEL, mc.kernelEventfd, &event); + free((void *)mc.events); + close(mc.kernelEventfd); + mc.kernelEventfd = -1; + close(mc.devfd); + close(mc.epollfd); + } +#endif +} + + diff --git a/elink/sw/memory/src/e-task.c b/elink/sw/memory/src/e-task.c new file mode 100644 index 00000000..dc14ea34 --- /dev/null +++ b/elink/sw/memory/src/e-task.c @@ -0,0 +1,125 @@ + +/*A bare minimum self test function function */ +#include +#include "common.h" +#include + +#define USE_DMA 1 +#ifdef USE_DMA +#define e_memcopy(dst, src, size) e_dma_copy(dst, src, size) +#else +#define e_memcopy(dst, src, size) memcpy(dst, src, size) +#endif + +#define MAILBOX_ADDR 0x810F0320 + +#define _BuffSize (0x2000) // 0x10 + 5 freezes +#define _NoMessages (5) // 0x100 + 4 freezes +// 0x2000 + 10 freezes with various PC counters reported. +//#define _SharedBuffOffset (0x1000000) +#define _LocalBuffOffset (0x5000) +//following clears the test buffer! so instead use hard coded value +//char shared[_BuffSize] SECTION("shared_dram"); +char *shared = (char*)0x8f000000; +char *local = (char*)0x5000; + +void checkandupdate(int count, void *message, int size, int * location, int *failures, char * errorval, char * check, char *val); + +int main(void){ + + int count; + int *mailbox = (int *) MAILBOX_ADDR; + char sharedval = 0; + char localval = 0; + char sharedcheck = 0xff; //_BuffSize - 1; + char localcheck = sharedcheck; + int localfailures = 0; + int sharedfailures = 0; + char localfailure = 0; + char sharedfailure = 0; + int locallocation = 0; + int sharedlocation = 0; + + long long message; + + char * dst; + + for (count=0; count<_BuffSize/8; count++) + { + // Read/Write from/to local memory + dst = (char*)(_LocalBuffOffset + count*sizeof(message)); + e_read(&e_group_config, &message, 0,0, dst, sizeof(message)); + + // Limit the number of samples sent to the mailbox! + if (_NoMessages>count) e_memcopy(mailbox, &message, sizeof(message)); + + checkandupdate(count, (void*)&message, sizeof(message), &localfailures, &locallocation, &localfailure, &localcheck, &localval); + + e_write(&e_group_config, &message, 0,0, dst, sizeof(message)); + + // Read/Write from/to shared memory + dst = (char*)(shared + count*sizeof(message)); + e_memcopy((void *)&message, (void *)dst, sizeof(message)); + + // Limit the number of samples sent to the mailbox! + if (_NoMessages>count) e_memcopy(mailbox, &message, sizeof(message)); + + checkandupdate(count, (void*)&message, sizeof(message), &sharedfailures, &sharedlocation, &sharedfailure, &sharedcheck, &sharedval); + + // Write to shared memory + e_memcopy((void *)dst, (void *)&message, sizeof(message)); + } + + //message = 0; + message = 0xfedcba9876543210; + //message = (long long)dst; - 0xffffffff8f000ff8 + + // message = (long long)&message; - 0x7fc0 + // message = (long long)&shared - 0xffffffff8f000000 + // message = (long long)&shared[_BuffSize];- 0xffffffff8f001000 + + for (count = 0; count<_NoMessages; count++) + { + e_memcopy(mailbox, &message, sizeof(message)); + //message++; + } + + // In last message report the number of read failures + message = (long long)sharedlocation; + message = message << 16; + //message += (long long)sharedfailure; + //message = message << 16; + message += (long long)sharedfailures; + message = message << 16; + message += (long long)locallocation; + message = message << 16; + message += (long long)localfailures; + e_memcopy(mailbox, &message, sizeof(message)); +} + +void checkandupdate(int count, void *message, int size, int * failures, int * location, char * errorval, char * check, char * val) +{ + int index; + char *pos; + + pos = (char*) message; + for (index=0; index /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log +#$EXEPATH/bin/e-main.elf $EXEPATH/bin/e-task.srec >> /var/log/e-main.log + +retval=$? + +if [ $retval -ne 0 ] +then + echo "$SCRIPT FAILED" +else + echo "$SCRIPT PASSED" +fi + +exit $retval + From 4ba0e1f45ec159814598395cdb9a3f7c75de2780 Mon Sep 17 00:00:00 2001 From: Peter Saunderson Date: Fri, 8 Jan 2016 19:05:24 +0000 Subject: [PATCH 2/2] Provided more control over application of wait signals from the dut Signed-off-by: Peter Saunderson --- elink/dv/dut_axi_elink.v | 33 +++++++++++++++++---------------- elink/hdl/axi_elink.v | 6 ++++++ elink/hdl/elink.v | 12 +++++++++--- elink/hdl/erx.v | 8 ++++++-- elink/hdl/erx_fifo.v | 23 +++++++++++++++++------ elink/hdl/etx.v | 6 +++++- elink/hdl/etx_fifo.v | 19 ++++++++++++++++--- 7 files changed, 76 insertions(+), 31 deletions(-) diff --git a/elink/dv/dut_axi_elink.v b/elink/dv/dut_axi_elink.v index 20f9d154..cb262d20 100644 --- a/elink/dv/dut_axi_elink.v +++ b/elink/dv/dut_axi_elink.v @@ -69,13 +69,13 @@ module dut(/*AUTOARG*/ wire elink1_rxwr_wait; wire emem_txwr_wait; wire emem_txrd_wait; - + // Beginning of automatic outputs (from unused autoinst outputs) // End of automatics - + wire elink0_rxrr_wait; - + /*AUTOWIRE*/ // Beginning of automatic wires (for undeclared instantiated-module outputs) wire e2c_xmesh_access_out; // From emesh_if of emesh_if.v @@ -271,17 +271,17 @@ module dut(/*AUTOARG*/ // Provide an easy way to send mailbox messages to elink0 via the 0x910 address wire elink0_mux_txwr_access; wire elink1_mux_rxwr_access; - - assign elink0_mux_txwr_access = elink0_txwr_access & - (e2c_xmesh_packet_out[39:28]==12'h810 | + + assign elink0_mux_txwr_access = elink0_txwr_access & + (e2c_xmesh_packet_out[39:28]==12'h810 | e2c_xmesh_packet_out[39:28]==12'h808 | e2c_xmesh_packet_out[39:28]==12'h920); - assign elink1_mux_rxwr_access = elink0_txwr_access & - (e2c_xmesh_packet_out[39:28]==12'h820 | + assign elink1_mux_rxwr_access = elink0_txwr_access & + (e2c_xmesh_packet_out[39:28]==12'h820 | e2c_xmesh_packet_out[39:28]==12'h910); - - + + //###################################################################### //1ST ELINK //###################################################################### @@ -310,7 +310,9 @@ module dut(/*AUTOARG*/ defparam elink0.ID = 12'h810; defparam elink0.ETYPE = 0; - //defparam elink0.WAIT = 0; + defparam elink0.WAIT_CFG = 1; + defparam elink0.WAIT_RR = 0; + elink elink0 (.sys_nreset (nreset), .elink_active (dut_active), .txrr_access (1'b0),//not tested @@ -379,7 +381,7 @@ module dut(/*AUTOARG*/ .rxwr_packet (e2c_xmesh_packet_out[PW-1:0]), .rxwr_wait (e2c_xmesh_wait_in), .m_\(.*\) (m_\1[]), - ); + ); */ @@ -436,7 +438,7 @@ module dut(/*AUTOARG*/ .m_axi_rresp (m_axi_rresp[1:0]), // Templated .m_axi_rlast (m_axi_rlast), // Templated .m_axi_rvalid (m_axi_rvalid)); // Templated - + //###################################################################### //2ND ELINK //###################################################################### @@ -457,7 +459,7 @@ module dut(/*AUTOARG*/ defparam elink1.ETYPE = 0; defparam elink1.S_IDW = S_IDW; defparam elink1.M_IDW = M_IDW; - //defparam elink1.WAIT = 1; + defparam elink1.WAIT_WRRD = 0; axi_elink elink1 ( .m_axi_rdata ({elink1_m_axi_rdata[31:0],elink1_m_axi_rdata[31:0]}), .m_axi_aresetn (nreset), .s_axi_aresetn (nreset), @@ -577,11 +579,10 @@ module dut(/*AUTOARG*/ .m_\(.*\) (stub_m_\1[]), ); */ - /*aximaster_stub + /*aximaster_stub #(.M_IDW(M_IDW)) aximaster_stub (.m_axi_aclk (aclk), .m_axi_aresetn (nreset), - );*/ //###################################################################### diff --git a/elink/hdl/axi_elink.v b/elink/hdl/axi_elink.v index c6cacb85..61448a6e 100644 --- a/elink/hdl/axi_elink.v +++ b/elink/hdl/axi_elink.v @@ -35,6 +35,9 @@ module axi_elink(/*AUTOARG*/ parameter M_IDW = 6; //ID width for M_AXI parameter IOSTD_ELINK = "LVDS_25"; parameter ETYPE = 0; + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; + parameter WAIT_CFG = 0; /****************************/ /*CLK AND RESET */ @@ -217,6 +220,9 @@ module axi_elink(/*AUTOARG*/ defparam elink.IOSTD_ELINK = IOSTD_ELINK; defparam elink.ETYPE = ETYPE; defparam elink.ID = ID; + defparam elink.WAIT_RR = WAIT_RR; + defparam elink.WAIT_WRRD = WAIT_WRRD; + defparam elink.WAIT_CFG = WAIT_CFG; elink elink( /*AUTOINST*/ diff --git a/elink/hdl/elink.v b/elink/hdl/elink.v index b32dea03..7f0378b5 100644 --- a/elink/hdl/elink.v +++ b/elink/hdl/elink.v @@ -18,7 +18,10 @@ module elink (/*AUTOARG*/ parameter ID = 12'h810; //epiphany ID for elink (ie addr[31:20]) parameter IOSTD_ELINK = "LVDS_25"; parameter ETYPE = 1; - + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; + parameter WAIT_CFG = 0; + /****************************/ /*MAIN CLOCK AND RESET */ /****************************/ @@ -149,7 +152,8 @@ module elink (/*AUTOARG*/ defparam erx.ID = ID; defparam erx.ETYPE = ETYPE; - + defparam erx.WAIT_RR = WAIT_RR; + defparam erx.WAIT_WRRD = WAIT_WRRD; erx erx(.rx_active (elink_active), /*AUTOINST*/ // Outputs @@ -198,7 +202,8 @@ module elink (/*AUTOARG*/ defparam etx.ID = ID; defparam etx.ETYPE = ETYPE; - + defparam etx.WAIT_RR = WAIT_RR; + defparam etx.WAIT_WRRD = WAIT_WRRD; etx etx( /*AUTOINST*/ // Outputs @@ -240,6 +245,7 @@ module elink (/*AUTOARG*/ /***********************************************************/ defparam ecfg_cdc.DW=104; defparam ecfg_cdc.DEPTH=32; + defparam ecfg_cdc.WAIT = WAIT_CFG; oh_fifo_cdc ecfg_cdc (.nreset (erx_nreset), // Outputs diff --git a/elink/hdl/erx.v b/elink/hdl/erx.v index ba0a5db1..51312c2b 100644 --- a/elink/hdl/erx.v +++ b/elink/hdl/erx.v @@ -16,7 +16,9 @@ module erx (/*AUTOARG*/ parameter RFAW = 6; parameter ID = 12'h800; parameter IOSTD_ELINK = "LVDS_25"; - parameter ETYPE = 1; + parameter ETYPE = 1; + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; //Synched resets, clock input soft_reset; // sw driven reset @@ -176,7 +178,9 @@ module erx (/*AUTOARG*/ /************************************************************/ /*FIFOs */ - /************************************************************/ + /************************************************************/ + defparam erx_fifo.WAIT_RR = WAIT_RR; + defparam erx_fifo.WAIT_WRRD = WAIT_WRRD; erx_fifo erx_fifo ( /*AUTOINST*/ // Outputs diff --git a/elink/hdl/erx_fifo.v b/elink/hdl/erx_fifo.v index c237ad66..0e21ea0e 100644 --- a/elink/hdl/erx_fifo.v +++ b/elink/hdl/erx_fifo.v @@ -12,6 +12,8 @@ module erx_fifo (/*AUTOARG*/ parameter DW = 32; parameter PW = 104; parameter RFAW = 6; + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; //reset & clocks input sys_clk; @@ -76,8 +78,11 @@ module erx_fifo (/*AUTOARG*/ //Read request fifo (from Epiphany) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) - rxrd_fifo ( + defparam rxrd_fifo.DW = 104; + defparam rxrd_fifo.DEPTH = 32; + defparam rxrd_fifo.WAIT = WAIT_WRRD; + + oh_fifo_cdc rxrd_fifo ( /*AUTOINST*/ // Outputs .wait_out (rxrd_fifo_wait), // Templated @@ -94,8 +99,11 @@ module erx_fifo (/*AUTOARG*/ //Write fifo (from Epiphany) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) - rxwr_fifo( + defparam rxwr_fifo.DW = 104; + defparam rxwr_fifo.DEPTH = 32; + defparam rxwr_fifo.WAIT = WAIT_WRRD; + + oh_fifo_cdc rxwr_fifo( /*AUTOINST*/ // Outputs .wait_out (rxwr_fifo_wait), // Templated @@ -111,8 +119,11 @@ module erx_fifo (/*AUTOARG*/ //Read response fifo (for host) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) - rxrr_fifo( + defparam rxrr_fifo.DW = 104; + defparam rxrr_fifo.DEPTH = 32; + defparam rxrr_fifo.WAIT = WAIT_RR; + + oh_fifo_cdc rxrr_fifo( /*AUTOINST*/ // Outputs .wait_out (rxrr_fifo_wait), // Templated diff --git a/elink/hdl/etx.v b/elink/hdl/etx.v index 416efb77..9ef3751d 100644 --- a/elink/hdl/etx.v +++ b/elink/hdl/etx.v @@ -14,7 +14,9 @@ module etx(/*AUTOARG*/ parameter PW = 104; parameter RFAW = 6; parameter ID = 12'h000; - parameter ETYPE = 0; + parameter ETYPE = 0; + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; //Reset and clocks input sys_clk; // clock for fifos @@ -106,6 +108,8 @@ module etx(/*AUTOARG*/ /************************************************************/ /*FIFOs */ /************************************************************/ + defparam etx_fifo.WAIT_RR = WAIT_RR; + defparam etx_fifo.WAIT_WRRD = WAIT_WRRD; etx_fifo etx_fifo (/*AUTOINST*/ // Outputs .txrd_wait (txrd_wait), diff --git a/elink/hdl/etx_fifo.v b/elink/hdl/etx_fifo.v index be03faec..3fa8decd 100644 --- a/elink/hdl/etx_fifo.v +++ b/elink/hdl/etx_fifo.v @@ -14,6 +14,8 @@ module etx_fifo(/*AUTOARG*/ parameter PW = 104; parameter RFAW = 6; parameter ID = 12'h000; + parameter WAIT_RR = 0; + parameter WAIT_WRRD = 0; //Clocks,reset,config input sys_nreset; @@ -77,7 +79,11 @@ module etx_fifo(/*AUTOARG*/ */ //Write fifo (from slave) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) txwr_fifo( + defparam txwr_fifo.DW = 104; + defparam txwr_fifo.DEPTH = 32; + //defparam txwr_fifo.WAIT = WAIT_WRRD; + + oh_fifo_cdc txwr_fifo( /*AUTOINST*/ // Outputs .wait_out (txwr_wait), // Templated @@ -92,7 +98,11 @@ module etx_fifo(/*AUTOARG*/ .wait_in (txwr_fifo_wait)); // Templated //Read request fifo (from slave) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) txrd_fifo( + defparam txrd_fifo.DW = 104; + defparam txrd_fifo.DEPTH = 32; + //defparam txrd_fifo.WAIT = WAIT_WRRD; + + oh_fifo_cdc txrd_fifo( /*AUTOINST*/ // Outputs .wait_out (txrd_wait), // Templated @@ -109,7 +119,10 @@ module etx_fifo(/*AUTOARG*/ //Read response fifo (from master) - oh_fifo_cdc #(.DW(104), .DEPTH(32)) txrr_fifo( + defparam txrr_fifo.DW = 104; + defparam txrr_fifo.DEPTH = 32; + //defparam txrr_fifo.WAIT = WAIT_RR; + oh_fifo_cdc txrr_fifo( /*AUTOINST*/ // Outputs