From 46aa88c0858748762e52ff3d701afccc1008c773 Mon Sep 17 00:00:00 2001 From: Ricardo Pardini Date: Sat, 4 Jan 2025 11:36:25 +0000 Subject: [PATCH] `rockchip64`/`edge`: rewrite-kernel-patches, no changes --- .../rockchip64-6.13/rk356x-fix-pcie2-reset.patch | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/patch/kernel/archive/rockchip64-6.13/rk356x-fix-pcie2-reset.patch b/patch/kernel/archive/rockchip64-6.13/rk356x-fix-pcie2-reset.patch index 942c564a6d70..0e31b53aab61 100644 --- a/patch/kernel/archive/rockchip64-6.13/rk356x-fix-pcie2-reset.patch +++ b/patch/kernel/archive/rockchip64-6.13/rk356x-fix-pcie2-reset.patch @@ -1,7 +1,7 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: amazingfate -Subject: [PATCH 1/2] arm64: dts: rockchip: rk3568: add reset-names for combphy Date: Fri, 22 Nov 2024 15:30:05 +0800 +Subject: arm64: dts: rockchip: rk3568: add reset-names for combphy The reset-names of combphy are missing, add it. @@ -12,7 +12,7 @@ Signed-off-by: Chukun Pan 2 files changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi -index ecaefe208e3e..695cccbdab0f 100644 +index 111111111111..222222222222 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -350,6 +350,7 @@ combphy0: phy@fe820000 { @@ -24,10 +24,10 @@ index ecaefe208e3e..695cccbdab0f 100644 rockchip,pipe-phy-grf = <&pipe_phy_grf0>; #phy-cells = <1>; diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi -index 62be06f3b863..e55390629114 100644 +index 111111111111..222222222222 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi -@@ -1681,6 +1681,7 @@ combphy1: phy@fe830000 { +@@ -1714,6 +1714,7 @@ combphy1: phy@fe830000 { assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY1>; @@ -35,7 +35,7 @@ index 62be06f3b863..e55390629114 100644 rockchip,pipe-grf = <&pipegrf>; rockchip,pipe-phy-grf = <&pipe_phy_grf1>; #phy-cells = <1>; -@@ -1697,6 +1698,7 @@ combphy2: phy@fe840000 { +@@ -1730,6 +1731,7 @@ combphy2: phy@fe840000 { assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>; assigned-clock-rates = <100000000>; resets = <&cru SRST_PIPEPHY2>; @@ -44,4 +44,5 @@ index 62be06f3b863..e55390629114 100644 rockchip,pipe-phy-grf = <&pipe_phy_grf2>; #phy-cells = <1>; -- -2.25.1 +Armbian +