diff --git a/CHANGELOG.md b/CHANGELOG.md
index 6182cdc..e910c85 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -1,6 +1,4 @@
-# CHANGELOG
-
-
+# 📝 Changelog
 
 ## v3.13.1 (2023-12-04)
 
@@ -158,11 +156,11 @@ Improve SPL description ([`26c9a34`](https://github.com/avengineers/spl-core/com
 
 * Feature/cmake macro to set compile options for dir (#83)
 
-CMake macro to set compile options for files and directories
-
----------
-
-Co-authored-by: Kobagapu, Akshit (RDS-RM) <Akshit.Kobagapu@marquardt.com>
+CMake macro to set compile options for files and directories
+
+---------
+
+Co-authored-by: Kobagapu, Akshit (RDS-RM) <Akshit.Kobagapu@marquardt.com>
 Co-authored-by: Karsten A. M. Guenther <xxthunder@users.noreply.github.com> ([`078d0cb`](https://github.com/avengineers/spl-core/commit/078d0cb9fe6db867063fe4c0605bcddd2854ab20))
 
 * Add a table of test cases as unit test specification ([`76879be`](https://github.com/avengineers/spl-core/commit/76879be2d048cd19ac88876c463db6380cab7ce9))
@@ -365,16 +363,16 @@ Co-authored-by: Kobagapu, Akshit (RDS-RM) <Akshit.Kobagapu@marquardt.com>
 
 * Make it usable as CMake module (#42)
 
-* Get rid of spl.ps1
-
-* Adapt ProjectCreator to support spl-core as CMake Module
-
-* cleanup
-
-* Some more meaningful unit tests
-
-* Update CI workflow, publish test results
-
+* Get rid of spl.ps1
+
+* Adapt ProjectCreator to support spl-core as CMake Module
+
+* cleanup
+
+* Some more meaningful unit tests
+
+* Update CI workflow, publish test results
+
 * Update README ([`3ed97c5`](https://github.com/avengineers/spl-core/commit/3ed97c50986bc09a7ec2ac52e7c8f27352a1e95c))
 
 
@@ -384,12 +382,12 @@ Co-authored-by: Kobagapu, Akshit (RDS-RM) <Akshit.Kobagapu@marquardt.com>
 
 * add custom target for add executable (#40)
 
-* add custom target for add executable
-
-* modified changes based on review suggestion
-
----------
-
+* add custom target for add executable
+
+* modified changes based on review suggestion
+
+---------
+
 Co-authored-by: Kobagapu, Akshit (RDS-RM) <Akshit.Kobagapu@marquardt.com> ([`c9ba241`](https://github.com/avengineers/spl-core/commit/c9ba24156f05e2048ba7f242ef6894b17fd9cf7f))
 
 
diff --git a/docs/changelog/index.rst b/docs/changelog/index.rst
new file mode 100644
index 0000000..6ae006a
--- /dev/null
+++ b/docs/changelog/index.rst
@@ -0,0 +1 @@
+.. mdinclude:: ../../CHANGELOG.md
diff --git a/docs/index.rst b/docs/index.rst
index ca5279a..8f085d3 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -7,3 +7,4 @@ Software Product Line (SPL) Core Documentation
     getting_started/index
     reference/index
     internals/index
+    changelog/index
\ No newline at end of file