From 0ccbc2097c65458b591e44c8c17a765d741792ba Mon Sep 17 00:00:00 2001 From: WillLillis Date: Wed, 25 Dec 2024 22:24:06 -0500 Subject: [PATCH] feat: add avr assembler --- README.md | 3 + asm-lsp/config_builder.rs | 3 +- asm-lsp/lsp.rs | 6 +- asm-lsp/parser.rs | 97 ++++++++ asm-lsp/serialized/directives/avr | Bin 0 -> 14362 bytes asm-lsp/serialized/directives/gas | Bin 45075 -> 45075 bytes asm-lsp/serialized/directives/masm | Bin 21607 -> 21607 bytes asm-lsp/serialized/directives/nasm | Bin 16754 -> 16754 bytes asm-lsp/serialized/opcodes/arm | Bin 419355 -> 419355 bytes asm-lsp/serialized/opcodes/arm64 | Bin 419355 -> 419355 bytes asm-lsp/serialized/opcodes/riscv | Bin 43654 -> 43654 bytes asm-lsp/serialized/opcodes/x86 | Bin 906174 -> 906174 bytes asm-lsp/serialized/opcodes/x86_64 | Bin 950298 -> 950298 bytes asm-lsp/serialized/opcodes/z80 | Bin 71525 -> 71525 bytes asm-lsp/serialized/registers/6502 | Bin 2830 -> 2830 bytes asm-lsp/serialized/registers/arm | Bin 3605 -> 3605 bytes asm-lsp/serialized/registers/arm64 | Bin 13521 -> 13521 bytes asm-lsp/serialized/registers/power-isa | Bin 6260 -> 6260 bytes asm-lsp/serialized/registers/x86 | Bin 37829 -> 37829 bytes asm-lsp/serialized/registers/x86_64 | Bin 75776 -> 75776 bytes asm-lsp/serialized/registers/z80 | Bin 3348 -> 3348 bytes asm-lsp/test.rs | 118 +++++++++- asm-lsp/types.rs | 4 + asm_docs_parsing/regenerate.sh | 1 + asm_docs_parsing/src/main.rs | 4 +- docs_store/directives/raw/ab | 0 docs_store/directives/raw/avr.xml | 309 +++++++++++++++++++++++++ samples/avr.s | 35 +++ 28 files changed, 572 insertions(+), 8 deletions(-) create mode 100644 asm-lsp/serialized/directives/avr create mode 100644 docs_store/directives/raw/ab create mode 100644 docs_store/directives/raw/avr.xml create mode 100644 samples/avr.s diff --git a/README.md b/README.md index 6083103d..d662f3b9 100644 --- a/README.md +++ b/README.md @@ -145,6 +145,7 @@ Valid options for the `assembler` field include: - `"masm"` - `"nasm"` - `"ca65"` +- `"avr"` Don't see an architecture and/or assembler that you'd like to work with? File an [issue](https://github.com/bergercookie/asm-lsp/issues/new/choose)! We would be @@ -234,6 +235,8 @@ git repository. - PowerISA instruction documentation sourced from the [open-power-sdk](https://github.com/open-power-sdk) PowerISA [documentation](https://github.com/open-power-sdk/PowerISA?tab=Apache-2.0-1-ov-file)* +- AVR assembler documentation sourced from the [AVR documentation](https://ww1.microchip.com/downloads/en/DeviceDoc/40001917A.pdf) +
* Licensed under Apache 2.0

``` diff --git a/asm-lsp/config_builder.rs b/asm-lsp/config_builder.rs index b5ebebe9..2dc40f7c 100644 --- a/asm-lsp/config_builder.rs +++ b/asm-lsp/config_builder.rs @@ -22,12 +22,13 @@ const ARCH_LIST: [Arch; 9] = [ Arch::PowerISA, ]; -const ASSEMBLER_LIST: [Assembler; 5] = [ +const ASSEMBLER_LIST: [Assembler; 6] = [ Assembler::Gas, Assembler::Go, Assembler::Masm, Assembler::Nasm, Assembler::Ca65, + Assembler::Avr, ]; #[derive(Args, Debug, Clone)] diff --git a/asm-lsp/lsp.rs b/asm-lsp/lsp.rs index 9ac552d6..416f1164 100644 --- a/asm-lsp/lsp.rs +++ b/asm-lsp/lsp.rs @@ -826,8 +826,9 @@ pub fn get_hover_resp( if config.is_assembler_enabled(Assembler::Gas) || config.is_assembler_enabled(Assembler::Masm) || config.is_assembler_enabled(Assembler::Ca65) + || config.is_assembler_enabled(Assembler::Avr) { - // all gas directives have a '.' prefix, some masm directives do + // all gas and AVR directives have a '.' prefix, some masm directives do let directive_lookup = get_directive_hover_resp(word, &store.names_to_info.directives, config); if directive_lookup.is_some() { @@ -1216,12 +1217,13 @@ pub fn get_comp_resp( }); } } - // prepend all GAS, all Ca65, some MASM, some NASM directives with "." + // prepend all GAS, all Ca65, all AVR, some MASM, some NASM directives with "." Some(".") => { if config.is_assembler_enabled(Assembler::Gas) || config.is_assembler_enabled(Assembler::Masm) || config.is_assembler_enabled(Assembler::Nasm) || config.is_assembler_enabled(Assembler::Ca65) + || config.is_assembler_enabled(Assembler::Avr) { return Some(CompletionList { is_incomplete: true, diff --git a/asm-lsp/parser.rs b/asm-lsp/parser.rs index 11987df7..a41e64ff 100644 --- a/asm-lsp/parser.rs +++ b/asm-lsp/parser.rs @@ -1640,6 +1640,103 @@ pub fn populate_gas_directives(xml_contents: &str) -> Result> { Ok(directives_map.into_values().collect()) } +/// Parse the provided XML contents and return a vector of all the directives based on that. +/// If parsing fails, the appropriate error will be returned instead. +/// +/// Current function assumes that the XML file is already read and that it's been given a reference +/// to its contents (`&str`). +/// +/// # Errors +/// +/// This function is highly specialized to parse a handful of files and will panic or return +/// `Err` for most mal-formed/unexpected inputs +/// +/// # Panics +/// +/// This function is highly specialized to parse a handful of files and will panic or return +/// `Err` for most mal-formed/unexpected inputs +pub fn populate_avr_directives(xml_contents: &str) -> Result> { + let mut directives_map = HashMap::::new(); + + // iterate through the XML + let mut reader = Reader::from_str(xml_contents); + + // ref to the assembler directive that's currently under construction + let mut curr_directive = Directive::default(); + let mut assembler = Assembler::None; + + debug!("Parsing directive XML contents..."); + loop { + match reader.read_event() { + // start event + Ok(Event::Start(ref e)) => { + match e.name() { + QName(b"Assembler") => { + for attr in e.attributes() { + let Attribute { key, value } = attr.unwrap(); + if b"name" == key.into_inner() { + assembler = Assembler::from_str(ustr::get_str(&value)).unwrap(); + } + } + } + QName(b"Directive") => { + // start of a new directive + curr_directive = Directive::default(); + curr_directive.assembler = assembler; + + // iterate over the attributes + for attr in e.attributes() { + let Attribute { key, value } = attr.unwrap(); + match key.into_inner() { + b"name" => { + let name = ustr::get_str(&value); + curr_directive.name = name.to_ascii_lowercase(); + } + b"description" => { + let description = ustr::get_str(&value); + curr_directive.description = + unescape(description).unwrap().to_string(); + } + _ => {} + } + } + } + QName(b"Signature") => { + for attr in e.attributes() { + let Attribute { key, value } = attr.unwrap(); + if b"sig" == key.into_inner() { + let sig = ustr::get_str(&value); + curr_directive + .signatures + .push(unescape(sig).unwrap().to_string()); + } + } + } + _ => {} // unknown event + } + } + // end event + Ok(Event::End(ref e)) => { + if QName(b"Directive") == e.name() { + // finish directive + directives_map.insert(curr_directive.name.clone(), curr_directive.clone()); + } + } + Ok(Event::Eof) => break, + Err(e) => panic!("Error at position {}: {:?}", reader.buffer_position(), e), + _ => {} // rest of events that we don't consider + } + } + + // Since directive entries have their assembler labeled on a per-instance basis, + // we check to make sure all of them have been assigned correctly + for directive in directives_map.values() { + assert_ne!(directive.assembler, Assembler::None); + } + + Ok(directives_map.into_values().collect()) +} + /// Parse the provided HTML contents and return a vector of all the directives based on that. /// If parsing fails, the appropriate error will be returned instead. /// diff --git a/asm-lsp/serialized/directives/avr b/asm-lsp/serialized/directives/avr new file mode 100644 index 0000000000000000000000000000000000000000..dfcafe5276b01848d8e7c9594064798a5c0a80dc GIT binary patch literal 14362 zcmeHOO_Ll~mDOMdW-^8VW{8zKfeb^SZu@$t`CDUQ4TXahnFdMQeUsWf{ z$}DGQb*l-M{sS!LZ?Ga*vzyKAX2F&v!GZ+=tU2f2`(9>cb<2`R4uS|PWVbr=<@>lF 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populate_riscv_instructions, + populate_6502_instructions, populate_arm_instructions, populate_avr_directives, + populate_ca65_directives, populate_masm_nasm_directives, + populate_power_isa_instructions, populate_riscv_instructions, }, populate_gas_directives, populate_instructions, populate_name_to_directive_map, populate_name_to_instruction_map, populate_name_to_register_map, populate_registers, Arch, @@ -42,6 +42,16 @@ mod tests { } } + fn avr_assembler_test_config() -> Config { + Config { + version: None, + assembler: Assembler::Avr, + instruction_set: Arch::None, + opts: Some(ConfigOptions::default()), + client: None, + } + } + fn power_isa_test_config() -> Config { Config { version: None, @@ -169,6 +179,7 @@ mod tests { masm_directives: Vec, nasm_directives: Vec, ca65_directives: Vec, + avr_directives: Vec, } impl GlobalInfo { @@ -194,6 +205,7 @@ mod tests { masm_directives: Vec::new(), nasm_directives: Vec::new(), ca65_directives: Vec::new(), + avr_directives: Vec::new(), } } } @@ -355,6 +367,13 @@ mod tests { Vec::new() }; + info.avr_directives = if config.is_assembler_enabled(Assembler::Avr) { + let avr_dirs = include_bytes!("serialized/directives/avr"); + bincode::deserialize(avr_dirs)? + } else { + Vec::new() + }; + Ok(info) } @@ -481,6 +500,12 @@ mod tests { &mut store.names_to_info.directives, ); + populate_name_to_directive_map( + Assembler::Avr, + &info.avr_directives, + &mut store.names_to_info.directives, + ); + store.completion_items.instructions = get_completes( &store.names_to_info.instructions, Some(CompletionItemKind::OPERATOR), @@ -724,6 +749,78 @@ mod tests { ); } + /************************************************************************** + * AVR Tests + *************************************************************************/ + #[test] + fn handle_autocomplete_avr_assembler_it_provides_dir_comps_no_args() { + test_directive_autocomplete( + ".und", + &avr_assembler_test_config(), + CompletionTriggerKind::INVOKED, + None, + ); + } + + #[test] + fn handle_autocomplete_avr_assembler_it_provides_dir_comps_args_1() { + test_directive_autocomplete( + ".or 0x120 ; Set SRAM address to hex 120", + &avr_assembler_test_config(), + CompletionTriggerKind::INVOKED, + None, + ); + } + + #[test] + fn handle_autocomplete_avr_assembler_it_provides_dir_comps_args_2() { + test_directive_autocomplete( + ".incl ", + &avr_assembler_test_config(), + CompletionTriggerKind::INVOKED, + None, + ); + } + + #[test] + fn handle_hover_avr_assembler_it_provides_dir_info_1() { + test_hover( + ".include ", + r#".include [avr] +Include another file. +The INCLUDE directive tells the Assembler to start reading from a specified file. The Assembler then +assembles the specified file until end of file (EOF) or an EXIT directive is encountered. An included file +may contain INCLUDE directives itself. The difference between the two forms is that the first one search +the current directory first, the second one does not. + +- .INCLUDE "filename" +- .INCLUDE "#, + &avr_assembler_test_config(), + ); + } + + #[test] + fn handle_hover_avr_assembler_it_provides_dir_info_2() { + test_hover( + ".org 0x0000", + ".org [avr] +Set program origin. +The ORG directive sets the location counter to an absolute value. The value to set is given as a +parameter. If an ORG directive is given within a Data Segment, then it is the SRAM location counter +which is set, if the directive is given within a Code Segment, then it is the Program memory counter which +is set and if the directive is given within an EEPROM Segment, it is the EEPROM location counter which +is set. +The default values of the Code and the EEPROM location counters are zero, and the default value of the +SRAM location counter is the address immediately following the end of I/O address space (0x60 for +devices without extended I/O, 0x100 or more for devices with extended I/O) when the assembling is +started. Note that the SRAM and EEPROM location counters count bytes whereas the Program memory +location counter counts words. Also note that some devices lack SRAM and/or EEPROM. + +- .ORG expression", + &avr_assembler_test_config(), + ); + } + /************************************************************************** * PowerISA Tests *************************************************************************/ @@ -2544,7 +2641,12 @@ Width: 8 bits", let ser_vec = bincode::deserialize::>(dirs_ser).unwrap(); let dirs_raw = include_str!($raw_path); - let raw_vec = $populate_fn(dirs_raw).unwrap(); + let mut raw_vec = $populate_fn(dirs_raw).unwrap(); + + // HACK: Windows line endings... + for dir in &mut raw_vec { + dir.description = dir.description.replace('\r', ""); + } for dir in ser_vec { *cmp_map.entry(dir.clone()).or_insert(0) += 1; @@ -2597,4 +2699,12 @@ Width: 8 bits", populate_ca65_directives ); } + #[test] + fn serialized_avr_directives_are_up_to_date() { + serialized_directives_test!( + "serialized/directives/avr", + "../docs_store/directives/raw/avr.xml", + populate_avr_directives + ); + } } diff --git a/asm-lsp/types.rs b/asm-lsp/types.rs index 4c69445f..8deff460 100644 --- a/asm-lsp/types.rs +++ b/asm-lsp/types.rs @@ -851,6 +851,9 @@ pub enum Assembler { #[strum(serialize = "ca65")] #[serde(rename = "ca65")] Ca65, + #[strum(serialize = "avr")] + #[serde(rename = "avr")] + Avr, #[serde(skip)] None, } @@ -887,6 +890,7 @@ impl Assembler { Self::Nasm => load_directives_with_path!(Self::Nasm, "serialized/directives/nasm"), Self::Go => warn!("There is currently no Go-specific assembler documentation"), Self::Ca65 => load_directives_with_path!(Self::Ca65, "serialized/directives/ca65"), + Self::Avr => load_directives_with_path!(Self::Avr, "serialized/directives/avr"), Self::None => unreachable!(), } } diff --git a/asm_docs_parsing/regenerate.sh b/asm_docs_parsing/regenerate.sh index ade7a11d..c36bc21f 100755 --- a/asm_docs_parsing/regenerate.sh +++ b/asm_docs_parsing/regenerate.sh @@ -33,3 +33,4 @@ cargo build --release ../target/release/asm_docs_parsing ../docs_store/directives/raw/masm.xml -o ../asm-lsp/serialized/directives/masm --doc-type directive --assembler masm ../target/release/asm_docs_parsing ../docs_store/directives/raw/nasm.xml -o ../asm-lsp/serialized/directives/nasm --doc-type directive --assembler nasm ../target/release/asm_docs_parsing ../docs_store/directives/raw/ca65.html -o ../asm-lsp/serialized/directives/ca65 --doc-type directive --assembler ca65 +../target/release/asm_docs_parsing ../docs_store/directives/raw/avr.xml -o ../asm-lsp/serialized/directives/avr --doc-type directive --assembler avr diff --git a/asm_docs_parsing/src/main.rs b/asm_docs_parsing/src/main.rs index 7683909c..e5307d89 100644 --- a/asm_docs_parsing/src/main.rs +++ b/asm_docs_parsing/src/main.rs @@ -6,7 +6,8 @@ use ::asm_lsp::parser::{ populate_registers, populate_riscv_instructions, populate_riscv_registers, }; use asm_lsp::{ - parser::populate_power_isa_instructions, Arch, Assembler, Directive, Instruction, Register, + parser::{populate_avr_directives, populate_power_isa_instructions}, + Arch, Assembler, Directive, Instruction, Register, }; use anyhow::{anyhow, Result}; @@ -144,6 +145,7 @@ fn run(opts: &SerializeDocs) -> Result<()> { Assembler::Gas | Assembler::Go => populate_gas_directives(&conts)?, Assembler::Masm | Assembler::Nasm => populate_masm_nasm_directives(&conts)?, Assembler::Ca65 => populate_ca65_directives(&conts)?, + Assembler::Avr => populate_avr_directives(&conts)?, Assembler::None => unreachable!(), }, }; diff --git a/docs_store/directives/raw/ab b/docs_store/directives/raw/ab new file mode 100644 index 00000000..e69de29b diff --git a/docs_store/directives/raw/avr.xml b/docs_store/directives/raw/avr.xml new file mode 100644 index 00000000..6ae68012 --- /dev/null +++ b/docs_store/directives/raw/avr.xml @@ -0,0 +1,309 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/samples/avr.s b/samples/avr.s new file mode 100644 index 00000000..2d450281 --- /dev/null +++ b/samples/avr.s @@ -0,0 +1,35 @@ +; Sourced from https://www.instructables.com/Command-Line-Assembly-Language-Programming-for-Ard-2/ + +.device ATmega328P +.org 0x0000 +jmp a +.org 0x0020 +jmp e +a: + ldi r16,0x05 + out 0x25,r16 + ldi r16,0x01 + sts 0x6e,r16 + sei + clr r16 + out 0x26,r16 + sbi 0x0a,0x04 + sbi 0x0b,0x04 +b: + sbi 0x0b,0x04 + rcall c + cbi 0x0b,0x04 + rcall c + rjmp b +c: + clr r17 +d: + cpi r17,0x1e + brne d + ret +e: + inc r17 + cpi r17, 0x3d + brne PC+2 + clr r17 + reti