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RISCV 開放指令集處理器

• https://github.com/riscv
  • https://github.com/riscv/riscv-tools
  • https://github.com/riscv/riscv-gnu-toolchain/
  • Spike, a RISC-V ISA Simulator -- https://github.com/riscv/riscv-isa-sim
  • https://github.com/riscv/riscv-qemu
  • https://github.com/riscv/riscv-opcodes/blob/master/opcodes
  • https://github.com/riscv/riscv-gcc
• https://www.csl.cornell.edu/courses/ece4750/
  • https://www.csl.cornell.edu/courses/ece4750/handouts/ece4750-tinyrv-isa.txt
  • https://www.csl.cornell.edu/courses/ece4750/handouts/ece4750-T01-proc-concepts.pdf
• https://content.riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf
• RISC-V Instruction Formats
  • http://inst.eecs.berkeley.edu/~cs61c/resources/su18_lec/Lecture7.pdf
• 18‐447 Lecture 2: RISC‐V Instruction Set Architecture
  • http://users.ece.cmu.edu/~jhoe/course/ece447/S18handouts/L02.pdf (讚!)
• https://rv8.io/ -- RISC-V simulator for x86-64 (讚!)
  • Code -- https://github.com/rv8-io/ (讚!)
  • https://rv8.io/isa.html -- RISC-V Instruction Set Reference
  • https://rv8.io/asm -- RISC-V Assembler Reference
  • https://github.com/rv8-io/rv8/blob/master/doc/pdf/riscv-instructions.pdf
• 紙本書 : 手把手教你設計 CPU-RISC-V 處理器篇 手把手教你设计CPU-RISC-V处理器篇
  • 程式: https://github.com/SI-RISCV/e200_opensource
• https://zh.wikipedia.org/wiki/RISC-V
• 高魁良 (nonerkao) 與妖精共舞：在 RISC-V 架構上使用 GO 語言實作 binutils 工具包
  • https://ithelp.ithome.com.tw/users/20103524/ironman/1348