diff --git a/Makefile b/Makefile
index f2cb136..8b5c0cc 100644
--- a/Makefile
+++ b/Makefile
@@ -55,7 +55,7 @@ CONFIGS = configs/
 
 SPIKE = spike
 PATCHER_SPIKE = build/pspike
-MARCH = rv${XLEN}gcv_zvbb
+MARCH = rv${XLEN}gcv_zvbb_zvkg
 MABI = lp64d
 
 ifeq ($(XLEN), 32)
diff --git a/Makefrag b/Makefrag
index 3a5244a..b6f3b9a 100644
--- a/Makefrag
+++ b/Makefrag
@@ -409,6 +409,8 @@ tests = \
   vfwsub_wf-0 \
   vfwsub_wf-1 \
   vfwsub_wv-0 \
+  vghsh_vv-0 \
+  vgmul_vv-0 \
   vid_v-0 \
   vid_v-1 \
   viota_m-0 \
diff --git a/configs/vghsh.vv.toml b/configs/vghsh.vv.toml
new file mode 100644
index 0000000..125ea25
--- /dev/null
+++ b/configs/vghsh.vv.toml
@@ -0,0 +1,19 @@
+name = "vghsh.vv"
+format = "vd,vs2,vs1"
+
+[tests]
+base = [
+    [0x0, 0x0],
+    [0x1, 0x2],
+    [0x3, 0xf]
+]
+
+sew32 = [
+    [0xfffffff8, 0x00000000],
+    [0xffffff80, 0xfffffff8],
+    [0x00007fff, 0x00000000],
+    [0x00007fff, 0x000007ff],
+    [0x00007fff, 0x00000001],
+    [0xffffffff, 0x00000000],
+    [0xffffffff, 0xffffffff]
+]
diff --git a/configs/vgmul.vv.toml b/configs/vgmul.vv.toml
new file mode 100644
index 0000000..6dfd925
--- /dev/null
+++ b/configs/vgmul.vv.toml
@@ -0,0 +1,19 @@
+name = "vgmul.vv"
+format = "vd,vs2"
+
+[tests]
+base = [
+    [0x0, 0x0],
+    [0x1, 0x2],
+    [0x3, 0xf]
+]
+
+sew32 = [
+    [0xfffffff8, 0x00000000],
+    [0xffffff80, 0xfffffff8],
+    [0x00007fff, 0x00000000],
+    [0x00007fff, 0x000007ff],
+    [0x00007fff, 0x00000001],
+    [0xffffffff, 0x00000000],
+    [0xffffffff, 0xffffffff]
+]
diff --git a/generator/insn_util.go b/generator/insn_util.go
index da9d91d..4d2e426 100644
--- a/generator/insn_util.go
+++ b/generator/insn_util.go
@@ -179,4 +179,4 @@ func getVRegs(lmul1 LMUL, v0 bool, seed string) (int, int, int) {
 	})
 
 	return availableOptions[0], availableOptions[1], availableOptions[2]
-}
+}
\ No newline at end of file
diff --git a/generator/insn_vdvs2.go b/generator/insn_vdvs2.go
index 80fc614..d3fa37e 100644
--- a/generator/insn_vdvs2.go
+++ b/generator/insn_vdvs2.go
@@ -9,16 +9,28 @@ import (
 )
 
 func (i *Insn) genCodeVdVs2(pos int) []string {
-	s := regexp.MustCompile(`vmv(\d)r.v`)
-	nr, err := strconv.Atoi(s.FindStringSubmatch(i.Name)[1])
-	if err != nil {
-		log.Fatal("unreachable")
+	zvkg_insn := strings.HasPrefix(i.Name, "vg")
+	sew32_only := iff(zvkg_insn, []SEW{32}, allSEWs)
+
+	var nr int
+	var err error
+
+	if match := regexp.MustCompile(`vmv(\d+)r.v`).FindStringSubmatch(i.Name); len(match) > 1 {
+		nr, err = strconv.Atoi(match[1])
+		if err != nil {
+			log.Fatalf("Error parsing register number: %v", err)
+		}
 	}
 
-	combinations := i.combinations([]LMUL{LMUL(nr)}, allSEWs, []bool{false}, i.vxrms())
+
+	combinations := i.combinations(iff(zvkg_insn, []LMUL{1, 2, 4, 8}, []LMUL{LMUL(nr)}), iff(zvkg_insn, sew32_only, allSEWs), []bool{false}, i.vxrms())
 	res := make([]string, 0, len(combinations))
 
 	for _, c := range combinations[pos:] {
+		if zvkg_insn && c.Vl % 4 != 0 {
+			c.Vl = (c.Vl + 3) / 4 * 4 
+		}
+
 		builder := strings.Builder{}
 		builder.WriteString(c.initialize())
 
@@ -32,8 +44,7 @@ func (i *Insn) genCodeVdVs2(pos int) []string {
 
 		builder.WriteString("# -------------- TEST BEGIN --------------\n")
 		builder.WriteString(i.gVsetvli(c.Vl, c.SEW, c.LMUL))
-		builder.WriteString(fmt.Sprintf("%s v%d, v%d\n",
-			i.Name, vd, vs2))
+		builder.WriteString(fmt.Sprintf("%s v%d, v%d\n", i.Name, vd, vs2))
 		builder.WriteString("# -------------- TEST END   --------------\n")
 
 		builder.WriteString(i.gResultDataAddr())
@@ -41,7 +52,6 @@ func (i *Insn) genCodeVdVs2(pos int) []string {
 		builder.WriteString(i.gMagicInsn(vd, c.LMUL))
 
 		res = append(res, builder.String())
-
 	}
 
 	return res
diff --git a/generator/insn_vdvs2vs1.go b/generator/insn_vdvs2vs1.go
index 8d4a542..16aec4d 100644
--- a/generator/insn_vdvs2vs1.go
+++ b/generator/insn_vdvs2vs1.go
@@ -6,9 +6,19 @@ import (
 )
 
 func (i *Insn) genCodeVdVs2Vs1(pos int) []string {
-	combinations := i.combinations(allLMULs, allSEWs, []bool{false}, i.vxrms())
+	zvkg_insn := strings.HasPrefix(i.Name, "vg")
+	sew32_only := iff(zvkg_insn, []SEW{32}, allSEWs)
+	combinations := i.combinations(
+		iff(zvkg_insn, []LMUL{1, 2, 4, 8}, allLMULs),
+		iff(zvkg_insn, sew32_only, allSEWs),
+		[]bool{false},
+		i.vxrms(),
+	)
 	res := make([]string, 0, len(combinations))
 	for _, c := range combinations[pos:] {
+		if zvkg_insn && c.Vl % 4 != 0 {
+			c.Vl = (c.Vl + 3) / 4 * 4 
+		}
 		builder := strings.Builder{}
 		builder.WriteString(c.initialize())
 
diff --git a/main.go b/main.go
index 92ed088..1bb7e6d 100644
--- a/main.go
+++ b/main.go
@@ -100,6 +100,7 @@ func main() {
 			}
 			insn, err := generator.ReadInsnFromToml(contents, option)
 			fatalIf(err)
+
 			if insn.Name != strings.Replace(file.Name(), ".toml", "", -1) {
 				fatalIf(errors.New("filename and instruction name unmatched"))
 			}
@@ -130,4 +131,4 @@ func writeTo(path string, name string, contents string) {
 	fatalIf(err)
 	err = os.WriteFile(filepath.Join(path, name), []byte(contents), 0644)
 	fatalIf(err)
-}
+}
\ No newline at end of file