From 0a9e02b2d0ce32fcfd913363a1d46a165aa3a571 Mon Sep 17 00:00:00 2001
From: Jiuyang Liu <liu@jiuyang.me>
Date: Thu, 17 Oct 2024 12:29:51 +0800
Subject: [PATCH] [build system] align name of elaborator and omreader

---
 ...oml => org.chipsalliance.t1.elaborator.t1emu.TestBench.toml} | 0
 ... org.chipsalliance.t1.elaborator.t1rocketemu.TestBench.toml} | 0
 elaborator/src/t1emu/{Testbench.scala => TestBench.scala}       | 2 +-
 elaborator/src/t1rocketemu/{Testbench.scala => TestBench.scala} | 2 +-
 omreader/src/t1emu/Testbench.scala                              | 2 +-
 omreader/src/t1rocketvemu/{T1.scala => TestBench.scala}         | 2 +-
 6 files changed, 4 insertions(+), 4 deletions(-)
 rename designs/{org.chipsalliance.t1.elaborator.t1emu.Testbench.toml => org.chipsalliance.t1.elaborator.t1emu.TestBench.toml} (100%)
 rename designs/{org.chipsalliance.t1.elaborator.t1rocketemu.T1RocketTile.toml => org.chipsalliance.t1.elaborator.t1rocketemu.TestBench.toml} (100%)
 rename elaborator/src/t1emu/{Testbench.scala => TestBench.scala} (97%)
 rename elaborator/src/t1rocketemu/{Testbench.scala => TestBench.scala} (98%)
 rename omreader/src/t1rocketvemu/{T1.scala => TestBench.scala} (98%)

diff --git a/designs/org.chipsalliance.t1.elaborator.t1emu.Testbench.toml b/designs/org.chipsalliance.t1.elaborator.t1emu.TestBench.toml
similarity index 100%
rename from designs/org.chipsalliance.t1.elaborator.t1emu.Testbench.toml
rename to designs/org.chipsalliance.t1.elaborator.t1emu.TestBench.toml
diff --git a/designs/org.chipsalliance.t1.elaborator.t1rocketemu.T1RocketTile.toml b/designs/org.chipsalliance.t1.elaborator.t1rocketemu.TestBench.toml
similarity index 100%
rename from designs/org.chipsalliance.t1.elaborator.t1rocketemu.T1RocketTile.toml
rename to designs/org.chipsalliance.t1.elaborator.t1rocketemu.TestBench.toml
diff --git a/elaborator/src/t1emu/Testbench.scala b/elaborator/src/t1emu/TestBench.scala
similarity index 97%
rename from elaborator/src/t1emu/Testbench.scala
rename to elaborator/src/t1emu/TestBench.scala
index 8ef0cf01f..cc239559e 100644
--- a/elaborator/src/t1emu/Testbench.scala
+++ b/elaborator/src/t1emu/TestBench.scala
@@ -9,7 +9,7 @@ import org.chipsalliance.t1.rtl.vrf.RamType.{p0rp1w, p0rw, p0rwp1rw}
 import org.chipsalliance.t1.rtl.{T1Parameter, VFUInstantiateParameter}
 import org.chipsalliance.t1.t1emu.TestBench
 
-object Testbench extends SerializableModuleElaborator {
+object TestBench extends SerializableModuleElaborator {
   implicit object PathRead extends TokensReader.Simple[os.Path] {
     def shortName = "path"
     def read(strs: Seq[String]) = Right(os.Path(strs.head, os.pwd))
diff --git a/elaborator/src/t1rocketemu/Testbench.scala b/elaborator/src/t1rocketemu/TestBench.scala
similarity index 98%
rename from elaborator/src/t1rocketemu/Testbench.scala
rename to elaborator/src/t1rocketemu/TestBench.scala
index 45371867c..46072ff26 100644
--- a/elaborator/src/t1rocketemu/Testbench.scala
+++ b/elaborator/src/t1rocketemu/TestBench.scala
@@ -13,7 +13,7 @@ import org.chipsalliance.t1.t1rocketemu.TestBench
 import org.chipsalliance.t1.tile.T1RocketTileParameter
 
 // --instructionSets rv32_i --instructionSets rv_a --instructionSets rv_c --instructionSets rv_v --instructionSets Zve32x --instructionSets zvl1024b --cacheBlockBytes 32 --nPMPs 8 --cacheable 80000000-ffffffff --sideEffects 00000000-1fffffff --dcacheNSets 64 --dcacheNWays 4 --dcacheRowBits 32 --iCacheNSets 32 --iCacheNWays 4 --iCachePrefetch false --dLen 256 --vrfBankSize 2 --vrfRamType p0rp1w
-object T1RocketTile extends SerializableModuleElaborator {
+object TestBench extends SerializableModuleElaborator {
   implicit object PathRead extends TokensReader.Simple[os.Path] {
     def shortName = "path"
     def read(strs: Seq[String]) = Right(os.Path(strs.head, os.pwd))
diff --git a/omreader/src/t1emu/Testbench.scala b/omreader/src/t1emu/Testbench.scala
index f7e38e14c..038e62eec 100644
--- a/omreader/src/t1emu/Testbench.scala
+++ b/omreader/src/t1emu/Testbench.scala
@@ -6,7 +6,7 @@ package org.chipsalliance.t1.omreader.t1emu
 import mainargs._
 import org.chipsalliance.t1.omreaderlib.t1emu.{TestBench => Lib}
 
-object Testbench {
+object TestBench {
   implicit object PathRead extends TokensReader.Simple[os.Path] {
     def shortName = "path"
     def read(strs: Seq[String]): Either[String, os.Path] = Right(os.Path(strs.head, os.pwd))
diff --git a/omreader/src/t1rocketvemu/T1.scala b/omreader/src/t1rocketvemu/TestBench.scala
similarity index 98%
rename from omreader/src/t1rocketvemu/T1.scala
rename to omreader/src/t1rocketvemu/TestBench.scala
index bd7ed9a40..cfe852a99 100644
--- a/omreader/src/t1rocketvemu/T1.scala
+++ b/omreader/src/t1rocketvemu/TestBench.scala
@@ -6,7 +6,7 @@ package org.chipsalliance.t1.omreader.t1rocketemu
 import mainargs._
 import org.chipsalliance.t1.omreaderlib.t1rocketemu.{TestBench => Lib}
 
-object Testbench {
+object TestBench {
   implicit object PathRead extends TokensReader.Simple[os.Path] {
     def shortName = "path"
     def read(strs: Seq[String]): Either[String, os.Path] = Right(os.Path(strs.head, os.pwd))