OC3A is on pin D6~ for 32 pins mcus #293
trimarco232
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Hmmm.... interesting. 8 PWM and HW USART at time... For now I disable using USART and enable OC3A on the D1/TXD pin. Just turn off USART and route internal PortF output: DDRD &= ~(1u << DDD1);
DDRF |= (1u << DDF1); complete sample for PWM configuration on the Timer3A/B outputs (my case): // 16 bit
case Pwm::Timer3A:
case Pwm::Timer3B:
{
// COM1Ax, COM1Bx - control output enabled
// 1 - active high (ex COM1A1)
// 0 - active low (ex COM1A0)
uint8_t output = TCCR3A & ((1u << COM3A1) | (1u << COM3B1));
if (id == Pwm::Timer3A)
output |= (1u << COM3A1);
else
output |= (1u << COM3B1);
TCNT3 = 0;
TCCR3A = 0;
TCCR3C = 0;
byte n = 1;
// clksys / 1 = 1
// clksys / 8 = 2
// clksys / 64 = 3
// clksys / 256 = 4
// clksys / 1024 = 5
// [CS12:CS10]
#if 1
// 8 bit mode
TCCR3A = output | (1 << WGM30);
TCCR3B = (1 << WGM32) | n;
ICR3 = 255;
#else
// 16 bit
TCCR3A = output | (1 << WGM31);
TCCR3B = (1 << WGM33) | (1 << WGM32) | n;
ICR3 = 65535;
#endif
// Turn off shared functions
// Ref: https://github.com/dbuezas/lgt8fx/issues/57#issuecomment-758955088
// Ref: https://github.com/dbuezas/lgt8fx/issues/57#issuecomment-759052620 - repair on breaks
if (id == Pwm::Timer3A) {
DDRD &= ~(1u << DDD1);
DDRF |= (1u << DDF1);
// set bit2 to 0 - route OC3A to PF1 that internally connected with PD1
//PMX1 &= ~(1u << C3AC);
} else {
DDRD &= ~(1u << DDD2);
DDRF |= (1u << DDF2);
}
if (id == Pwm::Timer3A)
OCR3A = val;
else
OCR3B = val;
break;
} I also use Timer0 with Divider 1, so some functions like millis() "breaks". I just use next WA: constexpr unsigned long long int ms(unsigned long long int val) {
return val * 64;
}
constexpr unsigned long long int operator""_ms(unsigned long long int val) {
return val * 64; // we use divider 1 vs default divider 64 for timer0
} and in the code:
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says we want to use PD1 (pin n°31) as TXD of the USART : OC3A is no more available as PWM output for this pin
but we need 8 PWM outputs
the solution might be (I didn't test it yet) :
EDIT : don't set PD6 as OUTPUT !
PMX1 Bit 2 C3AC = 1 = OC3A output to QFP48/AC0P
PMX0 Bit 3 C0AC0 : OC0A Auxiliary output control
The 0C0A output is controlled by the C0AC0 bit in conjunction with the C0AS bit of the TCCR0B register:
{ C0AC0, C0AS } = 10 = 0C0A output to PC0
in this case , one probably don't have to worry about the OC0AS Bit of TCCR0B ...
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