| + | + |
|---|---|
Package |
+Version |
+License |
+Dependencies |
+
|---|---|---|---|
| + | ≥5.0.0 |
++ | None |
+
| + | ≥0.27.1 |
++ | + | +
| + | ≥0.3.1 |
++ | + | +
| + | ≥0.1.0 |
++ | + | +
Additional Python packages needed for testing, code coverage collection and static type checking. These packages are +only needed for developers or on a CI server, thus sub-dependencies are not evaluated further.
+Manually Installing Test Requirements
+Use the tests/requirements.txt file to install all dependencies via pip3. The file will recursively install
+the mandatory dependencies too.
pip3 install -U -r tests/requirements.txt
+Dependency List
+Package |
+Version |
+License |
+Dependencies |
+
|---|---|---|---|
| + | ≥7.4.0 |
++ | Not yet evaluated. |
+
| + | ≥4.1.0 |
++ | Not yet evaluated. |
+
| + | ≥7.3 |
++ | Not yet evaluated. |
+
| + | ≥1.5 |
++ | Not yet evaluated. |
+
| + | ≥4.7.1 |
++ | Not yet evaluated. |
+
| + | ≥4.9 |
++ | Not yet evaluated. |
+
Additional Python packages needed for documentation generation. These packages are only needed for developers or on a +CI server, thus sub-dependencies are not evaluated further.
+Manually Installing Documentation Requirements
+Use the doc/requirements.txt file to install all dependencies via pip3. The file will recursively install
+the mandatory dependencies too.
pip3 install -U -r doc/requirements.txt
+Dependency List
+Package |
+Version |
+License |
+Dependencies |
+
|---|---|---|---|
| + | ≥5.0.0 |
++ | None |
+
| + | ≥5.3.0 |
++ | Not yet evaluated. |
+
| + | ≥0.5.2 |
++ | Not yet evaluated. |
+
| + | ≥0.0.6 |
++ | Not yet evaluated. |
+
| + | ≥1.19.5 |
++ | Not yet evaluated. |
+
Additional Python packages needed for installation package generation. These packages are only needed for developers or +on a CI server, thus sub-dependencies are not evaluated further.
+Manually Installing Packaging Requirements
+Use the build/requirements.txt file to install all dependencies via pip3. The file will recursively
+install the mandatory dependencies too.
pip3 install -U -r build/requirements.txt
+Dependency List
+Package |
+Version |
+License |
+Dependencies |
+
|---|---|---|---|
| + | ≥5.0.0 |
++ | None |
+
| + | ≥0.40.0 |
++ | Not yet evaluated. |
+
Additional Python packages needed for publishing the generated installation package to e.g, PyPI or any equivalent +services. These packages are only needed for maintainers or on a CI server, thus sub-dependencies are not evaluated +further.
+Manually Installing Publishing Requirements
+Use the dist/requirements.txt file to install all dependencies via pip3. The file will recursively
+install the mandatory dependencies too.
pip3 install -U -r dist/requirements.txt
+Dependency List
+Package |
+Version |
+License |
+Dependencies |
+
|---|---|---|---|
| + | ≥0.40.0 |
++ | Not yet evaluated. |
+
| + | ≥4.0.2 |
++ | Not yet evaluated. |
+
Note
+This is a local copy of the Creative Commons - Attribution 4.0 International (CC BY 4.0).
+Attention
+This CC BY 4.0 license applies only to the documentation of this project.
+Creative Commons Corporation (“Creative Commons”) is not a law firm and does not +provide legal services or legal advice. Distribution of Creative Commons public +licenses does not create a lawyer-client or other relationship. Creative Commons +makes its licenses and related information available on an “as-is” basis. +Creative Commons gives no warranties regarding its licenses, any material +licensed under their terms and conditions, or any related information. Creative +Commons disclaims all liability for damages resulting from their use to the +fullest extent possible.
+ +Creative Commons Attribution 4.0 International Public License
+By exercising the Licensed Rights (defined below), You accept and agree to be +bound by the terms and conditions of this Creative Commons Attribution 4.0 +International Public License (“Public License”). To the extent this Public +License may be interpreted as a contract, You are granted the Licensed Rights +in consideration of Your acceptance of these terms and conditions, and the +Licensor grants You such rights in consideration of benefits the Licensor +receives from making the Licensed Material available under these terms and +conditions.
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Adapter’s License means the license You apply to Your Copyright and +Similar Rights in Your contributions to Adapted Material in accordance with +the terms and conditions of this Public License.
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Licensor means the individual(s) or entity(ies) granting rights under +this Public License.
Share means to provide material to the public by any means or process +that requires permission under the Licensed Rights, such as reproduction, +public display, public performance, distribution, dissemination, +communication, or importation, and to make material available to the public +including in ways that members of the public may access the material from a +place and at a time individually chosen by them.
Sui Generis Database Rights means rights other than copyright +resulting from Directive 96/9/EC of the European Parliament and of the +Council of 11 March 1996 on the legal protection of databases, as amended +and/or succeeded, as well as other essentially equivalent rights anywhere +in the world.
You means the individual or entity exercising the Licensed Rights +under this Public License. Your has a corresponding meaning.
License grant.
+Subject to the terms and conditions of this Public License, the Licensor +hereby grants You a worldwide, royalty-free, non-sublicensable, +non-exclusive, irrevocable license to exercise the Licensed Rights in the +Licensed Material to:
++++
+- +
reproduce and Share the Licensed Material, in whole or in part; and
- +
produce, reproduce, and Share Adapted Material.
Exceptions and Limitations. For the avoidance of doubt, where +Exceptions and Limitations apply to Your use, this Public License does not +apply, and You do not need to comply with its terms and conditions.
Term. The term of this Public License is specified in Section 6(a).
Media and formats; technical modifications allowed. The Licensor +authorizes You to exercise the Licensed Rights in all media and formats +whether now known or hereafter created, and to make technical +modifications necessary to do so. The Licensor waives and/or agrees not to +assert any right or authority to forbid You from making technical +modifications necessary to exercise the Licensed Rights, including +technical modifications necessary to circumvent Effective Technological +Measures. For purposes of this Public License, simply making modifications +authorized by this Section 2(a)(4) never produces Adapted Material.
Downstream recipients.
++++
+- +
Offer from the Licensor – Licensed Material. Every recipient of +the Licensed Material automatically receives an offer from the +Licensor to exercise the Licensed Rights under the terms and +conditions of this Public License.
- +
No downstream restrictions. You may not offer or impose any +additional or different terms or conditions on, or apply any Effective +Technological Measures to, the Licensed Material if doing so restricts +exercise of the Licensed Rights by any recipient of the Licensed +Material.
No endorsement. Nothing in this Public License constitutes or may +be construed as permission to assert or imply that You are, or that Your +use of the Licensed Material is, connected with, or sponsored, endorsed, +or granted official status by, the Licensor or others designated to +receive attribution as provided in Section 3(a)(1)(A)(i).
Other rights.
+Moral rights, such as the right of integrity, are not licensed under this +Public License, nor are publicity, privacy, and/or other similar +personality rights; however, to the extent possible, the Licensor waives +and/or agrees not to assert any such rights held by the Licensor to the +limited extent necessary to allow You to exercise the Licensed Rights, but +not otherwise.
Patent and trademark rights are not licensed under this Public License.
To the extent possible, the Licensor waives any right to collect royalties +from You for the exercise of the Licensed Rights, whether directly or +through a collecting society under any voluntary or waivable statutory or +compulsory licensing scheme. In all other cases the Licensor expressly +reserves any right to collect such royalties.
Your exercise of the Licensed Rights is expressly made subject to the following conditions.
+Attribution.
+If You Share the Licensed Material (including in modified form), You must:
++++
+- +
retain the following if it is supplied by the Licensor with the +Licensed Material:
+++
+- +
identification of the creator(s) of the Licensed Material and any +others designated to receive attribution, in any reasonable manner +requested by the Licensor (including by pseudonym if designated);
- +
a copyright notice;
- +
a notice that refers to this Public License;
- +
a notice that refers to the disclaimer of warranties;
- +
a URI or hyperlink to the Licensed Material to the extent reasonably +practicable;
+
+- +
indicate if You modified the Licensed Material and retain an +indication of any previous modifications; and
- +
indicate the Licensed Material is licensed under this Public License, +and include the text of, or the URI or hyperlink to, this Public +License.
You may satisfy the conditions in Section 3(a)(1) in any reasonable manner +based on the medium, means, and context in which You Share the Licensed +Material. For example, it may be reasonable to satisfy the conditions by +providing a URI or hyperlink to a resource that includes the required +information.
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If You Share Adapted Material You produce, the Adapter’s License You apply +must not prevent recipients of the Adapted Material from complying with +this Public License.
Where the Licensed Rights include Sui Generis Database Rights that apply to Your +use of the Licensed Material:
+for the avoidance of doubt, Section 2(a)(1) grants You the right to extract, +reuse, reproduce, and Share all or a substantial portion of the contents of +the database;
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You must comply with the conditions in Section 3(a) if You Share all or a +substantial portion of the contents of the database.
For the avoidance of doubt, this Section 4 supplements and does not replace +Your obligations under this Public License where the Licensed Rights include +other Copyright and Similar Rights.
+Unless otherwise separately undertaken by the Licensor, to the extent +possible, the Licensor offers the Licensed Material as-is and as-available, +and makes no representations or warranties of any kind concerning the +Licensed Material, whether express, implied, statutory, or other. This +includes, without limitation, warranties of title, merchantability, +fitness for a particular purpose, non-infringement, absence of latent or +other defects, accuracy, or the presence or absence of errors, whether or +not known or discoverable. Where disclaimers of warranties are not allowed +in full or in part, this disclaimer may not apply to You.
To the extent possible, in no event will the Licensor be liable to You +on any legal theory (including, without limitation, negligence) or +otherwise for any direct, special, indirect, incidental, consequential, +punitive, exemplary, or other losses, costs, expenses, or damages arising +out of this Public License or use of the Licensed Material, even if the +Licensor has been advised of the possibility of such losses, costs, expenses, +or damages. Where a limitation of liability is not allowed in full or in +part, this limitation may not apply to You.
The disclaimer of warranties and limitation of liability provided above +shall be interpreted in a manner that, to the extent possible, most +closely approximates an absolute disclaimer and waiver of all liability.
This Public License applies for the term of the Copyright and Similar Rights +licensed here. However, if You fail to comply with this Public License, then +Your rights under this Public License terminate automatically.
Where Your right to use the Licensed Material has terminated under +Section 6(a), it reinstates:
+automatically as of the date the violation is cured, provided it is cured +within 30 days of Your discovery of the violation; or
upon express reinstatement by the Licensor.
For the avoidance of doubt, this Section 6(b) does not affect any right the +Licensor may have to seek remedies for Your violations of this Public License.
+For the avoidance of doubt, the Licensor may also offer the Licensed Material +under separate terms or conditions or stop distributing the Licensed Material +at any time; however, doing so will not terminate this Public License.
Sections 1, 5, 6, 7, and 8 survive termination of this Public License.
The Licensor shall not be bound by any additional or different terms or +conditions communicated by You unless expressly agreed.
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For the avoidance of doubt, this Public License does not, and shall not be +interpreted to, reduce, limit, restrict, or impose conditions on any use of +the Licensed Material that could lawfully be made without permission under +this Public License.
To the extent possible, if any provision of this Public License is deemed +unenforceable, it shall be automatically reformed to the minimum extent +necessary to make it enforceable. If the provision cannot be reformed, it +shall be severed from this Public License without affecting the +enforceability of the remaining terms and conditions.
No term or condition of this Public License will be waived and no failure to +comply consented to unless expressly agreed to by the Licensor.
Nothing in this Public License constitutes or may be interpreted as a +limitation upon, or waiver of, any privileges and immunities that apply to +the Licensor or You, including from the legal processes of any jurisdiction +or authority.
Creative Commons is not a party to its public licenses. Notwithstanding, +Creative Commons may elect to apply one of its public licenses to material it +publishes and in those instances will be considered the “Licensor.” Except for +the limited purpose of indicating that material is shared under a Creative +Commons public license or as otherwise permitted by the Creative Commons +policies published at creativecommons.org/policies, +Creative Commons does not authorize the use of the trademark “Creative Commons” +or any other trademark or logo of Creative Commons without its prior written +consent including, without limitation, in connection with any unauthorized +modifications to any of its public licenses or any other arrangements, +understandings, or agreements concerning use of licensed material. For the +avoidance of doubt, this paragraph does not form part of the public licenses.
+Creative Commons may be contacted at creativecommons.org
+Design Goal
+TBD
+Language Reference Manual is the name given to IEEE Standard documents defining Hardware Description Languages:
+ +An ancestor class for other derived classes.
+A representation of a physical file.
+A group of files.
+If no fileset is specified, the pre-existing fileset named default is used to group files.
A namespace in VHDL to group and organize VHDL design units (entity, package, configuration, context).
+A …
+A …
+Note
+Python ≥3.7 is required for this package due to problems with meta classes and
+__getattr__ in Python 3.6.
pip3 install pyEDAA.ProjectModel
+pip3 install -U pyEDAA.ProjectModel
+pip3 uninstall pyEDAA.ProjectModel
+pip3 install .
+setup.py (legacy)¶See sections above on how to use PIP.
+setup.py¶setup.py install
+Note
+This is a local copy of the Apache License Version 2.0.
+Attention
+This Apache License, 2.0 applies to all source and configuration files of project, except documentation.
+Version 2.0, January 2004
+TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+“License” shall mean the terms and conditions for use, reproduction, and distribution as defined by Sections 1 through 9 of this document.
+“Licensor” shall mean the copyright owner or entity authorized by the copyright owner that is granting the License.
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+“You” (or “Your”) shall mean an individual or Legal Entity exercising permissions granted by this License.
+“Source” form shall mean the preferred form for making modifications, including but not limited to software source code, documentation source, and +configuration files.
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+“Work” shall mean the work of authorship, whether in Source or Object form, made available under the License, as indicated by a copyright notice that is +included in or attached to the work (an example is provided in the Appendix below).
+“Derivative Works” shall mean any work, whether in Source or Object form, that is based on (or derived from) the Work and for which the editorial revisions, +annotations, elaborations, or other modifications represent, as a whole, an original work of authorship. For the purposes of this License, Derivative Works +shall not include works that remain separable from, or merely link (or bind by name) to the interfaces of, the Work and Derivative Works thereof.
+“Contribution” shall mean any work of authorship, including the original version of the Work and any modifications or additions to that Work or Derivative +Works thereof, that is intentionally submitted to Licensor for inclusion in the Work by the copyright owner or by an individual or Legal Entity authorized to +submit on behalf of the copyright owner. For the purposes of this definition, “submitted” means any form of electronic, verbal, or written communication +sent to the Licensor or its representatives, including but not limited to communication on electronic mailing lists, source code control systems, and issue +tracking systems that are managed by, or on behalf of, the Licensor for the purpose of discussing and improving the Work, but excluding communication that is +conspicuously marked or otherwise designated in writing by the copyright owner as “Not a Contribution.”
+“Contributor” shall mean Licensor and any individual or Legal Entity on behalf of whom a Contribution has been received by Licensor and subsequently +incorporated within the Work.
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+You may reproduce and distribute copies of the Work or Derivative Works thereof in any medium, with or without modifications, and in Source or Object form, +provided that You meet the following conditions:
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+Unless You explicitly state otherwise, any Contribution intentionally submitted for inclusion in the Work by You to the Licensor shall be under the terms and +conditions of this License, without any additional terms or conditions. Notwithstanding the above, nothing herein shall supersede or modify the terms of any +separate license agreement you may have executed with Licensor regarding such Contributions.
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+In no event and under no legal theory, whether in tort (including negligence), contract, or otherwise, unless required by applicable law (such as deliberate +and grossly negligent acts) or agreed to in writing, shall any Contributor be liable to You for damages, including any direct, indirect, special, incidental, or +consequential damages of any character arising as a result of this License or out of the use or inability to use the Work (including but not limited to damages +for loss of goodwill, work stoppage, computer failure or malfunction, or any and all other commercial damages or losses), even if such Contributor has been +advised of the possibility of such damages.
+While redistributing the Work or Derivative Works thereof, You may choose to offer, and charge a fee for, acceptance of support, warranty, indemnity, or other +liability obligations and/or rights consistent with this License. However, in accepting such obligations, You may act only on Your own behalf and on Your sole +responsibility, not on behalf of any other Contributor, and only if You agree to indemnify, defend, and hold each Contributor harmless for any liability +incurred by, or claims asserted against, such Contributor by reason of your accepting any such warranty or additional liability.
+Appendix: How to apply the Apache License to your work
+To apply the Apache License to your work, attach the following boilerplate notice, with the fields enclosed by brackets “[]” replaced with your own identifying +information. (Don’t include the brackets!) The text should be enclosed in the appropriate comment syntax for the file format. We also recommend that a file or +class name and description of purpose be included on the same “printed page” as the copyright notice for easier identification within third-party archives.
+Copyright [yyyy] [name of copyright owner]
+
+Licensed under the Apache License, Version 2.0 (the "License");
+you may not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an "AS IS" BASIS,
+WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+Generic description of an EDA design.
+Todo
+Write documentation.
+Class Relationship
+Design¶@export
+class Design:
+ _name: str
+ _project: Nullable['Project']
+ _directory: Nullable[Path]
+ _fileSets: Dict[str, FileSet]
+ _defaultFileSet: Nullable[FileSet]
+ _vhdlLibraries: Dict[str, VHDLLibrary]
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: VerilogVersion
+ _svVersion: SystemVerilogVersion
+ _externalVHDLLibraries: List
+
+ def __init__(
+ self,
+ name: str,
+ directory: Path = Path("."),
+ project: 'Project' = None,
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: VerilogVersion = None,
+ svVersion: SystemVerilogVersion = None
+ ):
+
+ @property
+ def Name(self) -> str:
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+
+ @property
+ def Directory(self) -> Path:
+ @Directory.setter
+ def Directory(self, value: Path) -> None:
+
+ @property
+ def ResolvedPath(self) -> Path:
+
+ @property
+ def DefaultFileSet(self) -> FileSet:
+ @DefaultFileSet.setter
+ def DefaultFileSet(self, value: Union[str, FileSet]) -> None:
+
+ @property
+ def FileSets(self) -> Dict[str, FileSet]:
+
+ def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[str, FileSet] = None) -> Generator[File, None, None]:
+
+ @property
+ def VHDLLibraries(self) -> List[VHDLLibrary]:
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+
+ @property
+ def VerilogVersion(self) -> VerilogVersion:
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: VerilogVersion) -> None:
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+
+ @property
+ def ExternalVHDLLibraries(self) -> List:
+
+ def AddFileSet(self, fileSet: FileSet) -> None:
+
+ def AddFileSets(self, fileSets: Iterable[FileSet]) -> None:
+
+ def AddFile(self, file: File) -> None:
+
+ def AddFiles(self, files: Iterable[File]) -> None:
+Generic description of a file in EDA design.
+Todo
+Write documentation.
+Class Relationship
+File¶@export
+class File(metaclass=FileType):
+ _path: Path
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _fileSet: Nullable['FileSet']
+
+ def __init__(
+ self,
+ path: Path,
+ project: 'Project' = None,
+ design: 'Design' = None,
+ fileSet: 'FileSet' = None
+ ):
+
+ @property
+ def FileType(self) -> 'FileType':
+
+ @property
+ def Path(self) -> Path:
+
+ @property
+ def ResolvedPath(self) -> Path:
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ @Design.setter
+ def Design(self, value: 'Design') -> None:
+
+ @property
+ def FileSet(self) -> Nullable['FileSet']:
+ @FileSet.setter
+ def FileSet(self, value: 'FileSet') -> None:
+Generic description of an EDA file set (group of files).
+Todo
+Write documentation.
+Class Relationship
+FileSet¶@export
+class FileSet:
+ _name: str
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _directory: Nullable[Path]
+ _parent: Nullable['FileSet']
+ _fileSets: Dict[str, 'FileSet']
+ _files: List[File]
+
+ _vhdlLibrary: 'VHDLLibrary'
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: VerilogVersion
+ _svVersion: SystemVerilogVersion
+
+ def __init__(
+ self,
+ name: str,
+ directory: Path = Path("."),
+ project: 'Project' = None,
+ design: 'Design' = None,
+ parent: Nullable['FileSet'] = None,
+ vhdlLibrary: Union[str, 'VHDLLibrary'] = None,
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: VerilogVersion = None,
+ svVersion: SystemVerilogVersion = None
+ ):
+
+ @property
+ def Name(self) -> str:
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ @Design.setter
+ def Design(self, value: 'Design') -> None:
+
+ @property
+ def Directory(self) -> Path:
+ @Directory.setter
+ def Directory(self, value: Path) -> None:
+
+ @property
+ def ResolvedPath(self) -> Path:
+
+ @property
+ def Parent(self) -> Nullable['FileSet']:
+ @Parent.setter
+ def Parent(self, value: 'FileSet') -> None:
+
+ @property
+ def FileSets(self) -> Dict[str, 'FileSet']:
+
+ def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[str, 'FileSet'] = None) -> Generator[File, None, None]:
+
+ def AddFile(self, file: File) -> None:
+
+ def AddFiles(self, files: Iterable[File]) -> None:
+
+ @property
+ def VHDLLibrary(self) -> 'VHDLLibrary':
+ @VHDLLibrary.setter
+ def VHDLLibrary(self, value: 'VHDLLibrary') -> None:
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+
+ @property
+ def VerilogVersion(self) -> VerilogVersion:
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: VerilogVersion) -> None:
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+Generic description of an EDA project.
+Todo
+Write documentation.
+Class Relationship
+Project¶@export
+class Project:
+ _name: str
+ _rootDirectory: Nullable[Path]
+ _designs: Dict[str, Design]
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: VerilogVersion
+ _svVersion: SystemVerilogVersion
+
+ def __init__(
+ self,
+ name: str,
+ rootDirectory: Path = Path("."),
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: VerilogVersion = None,
+ svVersion: SystemVerilogVersion = None
+ ):
+
+ @property
+ def Name(self) -> str:
+
+ @property
+ def RootDirectory(self) -> Path:
+ @RootDirectory.setter
+ def RootDirectory(self, value: Path) -> None:
+
+ @property
+ def ResolvedPath(self) -> Path:
+
+ @property
+ def Designs(self) -> Dict[str, Design]:
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+
+ @property
+ def VerilogVersion(self) -> VerilogVersion:
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: VerilogVersion) -> None:
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+Generic description of a VHDL library (group of VHDL files containing VHDL primary units).
+Todo
+Write documentation.
+Class Relationship
+VHDLLibrary¶@export
+class VHDLLibrary:
+ _name: str
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _files: List[File]
+ _vhdlVersion: VHDLVersion
+
+ def __init__(
+ self,
+ name: str,
+ project: 'Project' = None,
+ design: 'Design' = None,
+ vhdlVersion: VHDLVersion = None
+ ):
+
+ @property
+ def Name(self) -> str:
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ @Project.setter
+ def Project(self, value: 'Project'):
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ @Design.setter
+ def Design(self, value: 'Design'):
+
+ @property
+ def Files(self) -> Generator[File, None, None]:
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+Design Goal
+Clearly named classes that model the semantics of an EDA project.
Child objects shall have a reference to their parent.
Overall Hierarchy
+An EDA project contains one or multiple variants of a EDA design. +A design then has at least one but usually multiple file sets to group source files and apply settings or attributes to that group.
+Elements of the Project Model
+
+# ==================================================================================================================== #
+# _____ ____ _ _ ____ _ _ __ __ _ _ #
+# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+# |_| |___/ |__/ #
+# ==================================================================================================================== #
+# Authors: #
+# Patrick Lehmann #
+# #
+# License: #
+# ==================================================================================================================== #
+# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+# Copyright 2014-2016 Technische Universität Dresden - Germany, Chair of VLSI-Design, Diagnostics and Architecture #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+# #
+# SPDX-License-Identifier: Apache-2.0 #
+# ==================================================================================================================== #
+#
+"""An abstract model of EDA tool projects."""
+__author__ = "Patrick Lehmann"
+__email__ = "Paebbels@gmail.com"
+__copyright__ = "2014-2023, Patrick Lehmann, Unai Martinez-Corral"
+__license__ = "Apache License, Version 2.0"
+__version__ = "0.5.0"
+__keywords__ = ["eda project", "model", "abstract", "xilinx", "vivado", "osvvm", "file set", "file group", "test bench", "test harness"]
+
+from os.path import relpath as path_relpath
+from pathlib import Path as pathlib_Path
+from typing import Dict, Union, Optional as Nullable, List, Iterable, Generator, Tuple, Any as typing_Any, Type, Set, \
+ Any
+
+from pyTooling.Decorators import export
+from pyTooling.MetaClasses import ExtendedType
+from pyTooling.Graph import Graph, Vertex
+from pySVModel import SystemVerilogVersion
+from pyVHDLModel import VHDLVersion
+from pySystemRDLModel import SystemRDLVersion
+
+
+[docs]@export
+class Attribute(metaclass=ExtendedType):
+ KEY: str
+ VALUE_TYPE: typing_Any
+
+ @staticmethod
+ def resolve(obj: typing_Any, key: Type['Attribute']):
+ if isinstance(obj, File):
+ return obj._fileSet[key]
+ elif isinstance(obj, FileSet):
+ return obj._design[key]
+ elif isinstance(obj, Design):
+ return obj._project[key]
+ else:
+ raise Exception("Resolution error")
+
+
+[docs]@export
+class FileType(ExtendedType):
+ """
+ A :term:`meta-class` to construct *FileType* classes.
+
+ Modifications done by this meta-class:
+ * Register all classes of type :class:`FileType` or derived variants in a class field :attr:`FileType.FileTypes` in this meta-class.
+ """
+
+ FileTypes: Dict[str, 'FileType'] = {} #: Dictionary of all classes of type :class:`FileType` or derived variants
+ Any: 'FileType'
+
+[docs] def __init__(cls, name: str, bases: Tuple[type, ...], dictionary: Dict[str, typing_Any], **kwargs):
+ super().__init__(name, bases, dictionary, **kwargs)
+ cls.Any = cls
+
+[docs] def __new__(cls, className, baseClasses, classMembers: Dict, *args, **kwargs):
+ fileType = super().__new__(cls, className, baseClasses, classMembers, *args, **kwargs)
+ cls.FileTypes[className] = fileType
+ return fileType
+
+ def __getattr__(cls, item) -> 'FileType':
+ if item[:2] != "__" and item[-2:] != "__":
+ return cls.FileTypes[item]
+ else:
+ return super().__getattribute__(item)
+
+ def __contains__(cls, item) -> bool:
+ return issubclass(item, cls)
+
+
+@export
+class File(metaclass=FileType, slots=True):
+ """
+ A :term:`File` represents a file in a design. This :term:`base-class` is used
+ for all derived file classes.
+
+ A file can be created standalone and later associated to a fileset, design and
+ project. Or a fileset, design and/or project can be associated immediately
+ while creating a file.
+
+ :arg path: Relative or absolute path to the file.
+ :arg project: Project the file is associated with.
+ :arg design: Design the file is associated with.
+ :arg fileSet: Fileset the file is associated with.
+ """
+
+ _path: pathlib_Path
+ _fileType: 'FileType'
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _fileSet: Nullable['FileSet']
+ _attributes: Dict[Type[Attribute], typing_Any]
+
+ def __init__(
+ self,
+ path: pathlib_Path,
+ project: 'Project' = None,
+ design: 'Design' = None,
+ fileSet: 'FileSet' = None
+ ):
+ self._fileType = getattr(FileTypes, self.__class__.__name__)
+ self._path = path
+ if project is not None:
+ self._project = project
+ self._design = design
+ if fileSet is not None:
+ self.FileSet = fileSet
+ elif design is not None:
+ self._project = design._project
+ self._design = design
+ self.FileSet = design.DefaultFileSet if fileSet is None else fileSet
+ elif fileSet is not None:
+ design = fileSet._design
+ if design is not None:
+ self._project = design._project
+ else:
+ self._project = None
+ self._design = design
+ self.FileSet = fileSet
+ else:
+ self._project = None
+ self._design = None
+ self._fileSet = None
+
+ self._attributes = {}
+ self._registerAttributes()
+
+ def _registerAttributes(self):
+ pass
+
+ @property
+ def FileType(self) -> 'FileType':
+ """Read-only property to return the file type of this file."""
+ return self._fileType
+
+ @property
+ def Path(self) -> pathlib_Path:
+ """Read-only property returning the path of this file."""
+ return self._path
+
+ # TODO: setter?
+
+ @property
+ def ResolvedPath(self) -> pathlib_Path:
+ """Read-only property returning the resolved path of this file."""
+ if self._path.is_absolute():
+ return self._path.resolve()
+ elif self._fileSet is not None:
+ path = (self._fileSet.ResolvedPath / self._path).resolve()
+
+ if path.is_absolute():
+ return path
+ else:
+ # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+ return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+ else:
+ # TODO: message and exception type
+ raise Exception("")
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ """Property setting or returning the project this file is used in."""
+ return self._project
+
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+ self._project = value
+
+ if self._fileSet is None:
+ self._project.DefaultDesign.DefaultFileSet.AddFile(self)
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ """Property setting or returning the design this file is used in."""
+ return self._design
+
+ @Design.setter
+ def Design(self, value: 'Design') -> None:
+ self._design = value
+
+ if self._fileSet is None:
+ self._design.DefaultFileSet.AddFile(self)
+
+ if self._project is None:
+ self._project = value._project
+ elif self._project is not value._project:
+ raise Exception("The design's project is not identical to the already assigned project.")
+
+ @property
+ def FileSet(self) -> Nullable['FileSet']:
+ """Property setting or returning the fileset this file is used in."""
+ return self._fileSet
+
+ @FileSet.setter
+ def FileSet(self, value: 'FileSet') -> None:
+ self._fileSet = value
+ value._files.append(self)
+
+ def Validate(self):
+ """Validate this file."""
+ if self._path is None:
+ raise Exception("Validation: File has no path.")
+ try:
+ path = self.ResolvedPath
+ except Exception as ex:
+ raise Exception(f"Validation: File '{self._path}' could not compute resolved path.") from ex
+ if not path.exists():
+ raise Exception(f"Validation: File '{self._path}' (={path}) does not exist.")
+ if not path.is_file():
+ raise Exception(f"Validation: File '{self._path}' (={path}) is not a file.")
+
+ if self._fileSet is None:
+ raise Exception(f"Validation: File '{self._path}' has no fileset.")
+ if self._design is None:
+ raise Exception(f"Validation: File '{self._path}' has no design.")
+ if self._project is None:
+ raise Exception(f"Validation: File '{self._path}' has no project.")
+
+ def __len__(self) -> int:
+ return len(self._attributes)
+
+ def __getitem__(self, key: Type[Attribute]) -> Any:
+ """Index access for returning attributes on this file."""
+ if not issubclass(key, Attribute):
+ raise TypeError("Parameter 'key' is not an 'Attribute'.")
+
+ try:
+ return self._attributes[key]
+ except KeyError:
+ return key.resolve(self, key)
+
+ def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+ """Index access for setting attributes on this file."""
+ if not issubclass(key, Attribute):
+ raise TypeError("Parameter 'key' is not an 'Attribute'.")
+
+ self._attributes[key] = value
+
+
+FileTypes = File
+
+
+[docs]@export
+class HumanReadableContent(metaclass=ExtendedType, mixin=True):
+ """A file type representing human-readable contents."""
+
+
+[docs]@export
+class XMLContent(HumanReadableContent, mixin=True):
+ """A file type representing XML contents."""
+
+
+[docs]@export
+class YAMLContent(HumanReadableContent, mixin=True):
+ """A file type representing YAML contents."""
+
+
+[docs]@export
+class JSONContent(HumanReadableContent, mixin=True):
+ """A file type representing JSON contents."""
+
+
+[docs]@export
+class INIContent(HumanReadableContent, mixin=True):
+ """A file type representing INI contents."""
+
+
+[docs]@export
+class TOMLContent(HumanReadableContent, mixin=True):
+ """A file type representing TOML contents."""
+
+
+[docs]@export
+class TCLContent(HumanReadableContent, mixin=True):
+ """A file type representing content in TCL code."""
+
+
+[docs]@export
+class SDCContent(TCLContent, mixin=True):
+ """A file type representing contents as Synopsys Design Constraints (SDC)."""
+
+
+[docs]@export
+class PythonContent(HumanReadableContent, mixin=True):
+ """A file type representing contents as Python source code."""
+
+
+@export
+class TextFile(File, HumanReadableContent):
+ """A text file (``*.txt``)."""
+
+
+@export
+class LogFile(File, HumanReadableContent):
+ """A log file (``*.log``)."""
+
+
+@export
+class XMLFile(File, XMLContent):
+ """An XML file (``*.xml``)."""
+
+
+@export
+class SourceFile(File):
+ """Base-class of all source files."""
+
+
+@export
+class HDLSourceFile(SourceFile):
+ """Base-class of all HDL source files."""
+
+
+@export
+class RDLSourceFile(SourceFile):
+ """Base-class of all RDL source files."""
+
+
+@export
+class NetlistFile(SourceFile):
+ """Base-class of all netlist source files."""
+
+
+@export
+class EDIFNetlistFile(NetlistFile):
+ """Netlist file in EDIF (Electronic Design Interchange Format)."""
+
+
+@export
+class TCLSourceFile(SourceFile, TCLContent):
+ """A TCL source file."""
+
+
+@export
+class VHDLSourceFile(HDLSourceFile, HumanReadableContent):
+ """
+ A VHDL source file (of any language version).
+
+ :arg path: Relative or absolute path to the file.
+ :arg vhdlLibrary: VHDLLibrary this VHDL source file is associated wih.
+ :arg vhdlVersion: VHDLVersion this VHDL source file is associated wih.
+ :arg project: Project the file is associated with.
+ :arg design: Design the file is associated with.
+ :arg fileSet: Fileset the file is associated with.
+ """
+
+ _vhdlLibrary: 'VHDLLibrary'
+ _vhdlVersion: VHDLVersion
+
+ def __init__(self, path: pathlib_Path, vhdlLibrary: Union[str, 'VHDLLibrary'] = None, vhdlVersion: VHDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+ super().__init__(path, project, design, fileSet)
+
+ if isinstance(vhdlLibrary, str):
+ if design is not None:
+ try:
+ vhdlLibrary = design.VHDLLibraries[vhdlLibrary]
+ except KeyError as ex:
+ raise Exception(f"VHDL library '{vhdlLibrary}' not found in design '{design.Name}'.") from ex
+ elif project is not None:
+ try:
+ vhdlLibrary = project.DefaultDesign.VHDLLibraries[vhdlLibrary]
+ except KeyError as ex:
+ raise Exception(f"VHDL library '{vhdlLibrary}' not found in default design '{project.DefaultDesign.Name}'.") from ex
+ else:
+ raise Exception(f"Can't lookup VHDL library because neither 'project' nor 'design' is given as a parameter.")
+ elif isinstance(vhdlLibrary, VHDLLibrary):
+ self._vhdlLibrary = vhdlLibrary
+ vhdlLibrary.AddFile(self)
+ elif vhdlLibrary is None:
+ self._vhdlLibrary = None
+ else:
+ raise TypeError(f"Parameter 'vhdlLibrary' is neither a 'str' nor 'VHDLibrary'.")
+
+ self._vhdlVersion = vhdlVersion
+
+ def Validate(self) -> None:
+ """Validate this VHDL source file."""
+ super().Validate()
+
+ try:
+ _ = self.VHDLLibrary
+ except Exception as ex:
+ raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLLibrary assigned.") from ex
+ try:
+ _ = self.VHDLVersion
+ except Exception as ex:
+ raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLVersion assigned.") from ex
+
+ @property
+ def VHDLLibrary(self) -> 'VHDLLibrary':
+ """Property setting or returning the VHDL library this VHDL source file is used in."""
+ if self._vhdlLibrary is not None:
+ return self._vhdlLibrary
+ elif self._fileSet is not None:
+ return self._fileSet.VHDLLibrary
+ else:
+ raise Exception("VHDLLibrary was neither set locally nor globally.")
+
+ @VHDLLibrary.setter
+ def VHDLLibrary(self, value: 'VHDLLibrary') -> None:
+ self._vhdlLibrary = value
+ value._files.append(self)
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ """Property setting or returning the VHDL version this VHDL source file is used in."""
+ if self._vhdlVersion is not None:
+ return self._vhdlVersion
+ elif self._fileSet is not None:
+ return self._fileSet.VHDLVersion
+ else:
+ raise Exception("VHDLVersion was neither set locally nor globally.")
+
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+ self._vhdlVersion = value
+
+ def __repr__(self) -> str:
+ return f"<VHDL file: '{self.ResolvedPath}'; lib: '{self.VHDLLibrary}'; version: {self.VHDLVersion}>"
+
+
+class VerilogMixIn(metaclass=ExtendedType, mixin=True):
+ @property
+ def VerilogVersion(self) -> SystemVerilogVersion:
+ """Property setting or returning the Verilog version this Verilog source file is used in."""
+ if self._version is not None:
+ return self._version
+ elif self._fileSet is not None:
+ return self._fileSet.VerilogVersion
+ else:
+ raise Exception("VerilogVersion was neither set locally nor globally.")
+
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+ self._version = value
+
+
+class SystemVerilogMixIn(metaclass=ExtendedType, mixin=True):
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ """Property setting or returning the SystemVerilog version this SystemVerilog source file is used in."""
+ if self._version is not None:
+ return self._version
+ elif self._fileSet is not None:
+ return self._fileSet.SVVersion
+ else:
+ raise Exception("SVVersion was neither set locally nor globally.")
+
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+ self._version = value
+
+
+@export
+class VerilogBaseFile(HDLSourceFile, HumanReadableContent):
+ _version: SystemVerilogVersion
+
+ def __init__(self, path: pathlib_Path, version: SystemVerilogVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+ super().__init__(path, project, design, fileSet)
+
+ self._version = version
+
+
+@export
+class VerilogSourceFile(VerilogBaseFile, VerilogMixIn):
+ """A Verilog source file (of any language version)."""
+
+
+@export
+class VerilogHeaderFile(VerilogBaseFile, VerilogMixIn):
+ """A Verilog header file (of any language version)."""
+
+
+@export
+class SystemVerilogBaseFile(VerilogBaseFile):
+ ...
+
+
+@export
+class SystemVerilogSourceFile(SystemVerilogBaseFile, SystemVerilogMixIn):
+ """A SystemVerilog source file (of any language version)."""
+
+
+@export
+class SystemVerilogHeaderFile(SystemVerilogBaseFile, SystemVerilogMixIn):
+ """A SystemVerilog header file (of any language version)."""
+
+
+@export
+class SystemRDLSourceFile(RDLSourceFile, HumanReadableContent):
+ """A SystemRDL source file (of any language version)."""
+
+ _srdlVersion: SystemRDLVersion
+
+ def __init__(self, path: pathlib_Path, srdlVersion: SystemRDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+ super().__init__(path, project, design, fileSet)
+
+ self._srdlVersion = srdlVersion
+
+ @property
+ def SystemRDLVersion(self) -> SystemRDLVersion:
+ """Property setting or returning the SystemRDL version this SystemRDL source file is used in."""
+ if self._srdlVersion is not None:
+ return self._srdlVersion
+ elif self._fileSet is not None:
+ return self._fileSet.SRDLVersion
+ else:
+ raise Exception("SRDLVersion was neither set locally nor globally.")
+
+ @SystemRDLVersion.setter
+ def SystemRDLVersion(self, value: SystemRDLVersion) -> None:
+ self._srdlVersion = value
+
+
+@export
+class PythonSourceFile(SourceFile, PythonContent):
+ """A Python source file."""
+
+
+# TODO: move to a Cocotb module
+@export
+class CocotbPythonFile(PythonSourceFile):
+ """A Python source file used by Cocotb."""
+
+
+@export
+class ConstraintFile(File, HumanReadableContent):
+ """Base-class of all constraint files."""
+
+
+@export
+class ProjectFile(File):
+ """Base-class of all tool-specific project files."""
+
+
+@export
+class CSourceFile(SourceFile):
+ """Base-class of all ANSI-C source files."""
+
+
+@export
+class CppSourceFile(SourceFile):
+ """Base-class of all ANSI-C++ source files."""
+
+
+@export
+class SettingFile(File):
+ """Base-class of all tool-specific setting files."""
+
+
+@export
+class SimulationAnalysisFile(File):
+ """Base-class of all tool-specific analysis files."""
+
+
+@export
+class SimulationElaborationFile(File):
+ """Base-class of all tool-specific elaboration files."""
+
+
+@export
+class SimulationStartFile(File):
+ """Base-class of all tool-specific simulation start-up files."""
+
+
+@export
+class SimulationRunFile(File):
+ """Base-class of all tool-specific simulation run (execution) files."""
+
+
+@export
+class WaveformConfigFile(File):
+ """Base-class of all tool-specific waveform configuration files."""
+
+
+@export
+class WaveformDatabaseFile(File):
+ """Base-class of all tool-specific waveform database files."""
+
+
+@export
+class WaveformExchangeFile(File):
+ """Base-class of all tool-independent waveform exchange files."""
+
+
+[docs]@export
+class FileSet(metaclass=ExtendedType, slots=True):
+ """
+ A :term:`FileSet` represents a group of files. Filesets can have sub-filesets.
+
+ The order of insertion is preserved. A fileset can be created standalone and
+ later associated to another fileset, design and/or project. Or a fileset,
+ design and/or project can be associated immediately while creating the
+ fileset.
+
+ :arg name: Name of this fileset.
+ :arg topLevel: Name of the fileset's toplevel.
+ :arg directory: Path of this fileset (absolute or relative to a parent fileset or design).
+ :arg project: Project the file is associated with.
+ :arg design: Design the file is associated with.
+ :arg parent: Parent fileset if this fileset is nested.
+ :arg vhdlLibrary: Default VHDL library for files in this fileset, if not specified for the file itself.
+ :arg vhdlVersion: Default VHDL version for files in this fileset, if not specified for the file itself.
+ :arg verilogVersion: Default Verilog version for files in this fileset, if not specified for the file itself.
+ :arg svVersion: Default SystemVerilog version for files in this fileset, if not specified for the file itself.
+ :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself.
+ """
+
+ _name: str
+ _topLevel: Nullable[str]
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _directory: pathlib_Path
+ _parent: Nullable['FileSet']
+ _fileSets: Dict[str, 'FileSet']
+ _files: List[File]
+ _set: Set
+ _attributes: Dict[Type[Attribute], typing_Any]
+ _vhdlLibraries: Dict[str, 'VHDLLibrary']
+ _vhdlLibrary: 'VHDLLibrary'
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: SystemVerilogVersion
+ _svVersion: SystemVerilogVersion
+ _srdlVersion: SystemRDLVersion
+
+[docs] def __init__(
+ self,
+ name: str,
+ topLevel: str = None,
+ directory: pathlib_Path = pathlib_Path("."),
+ project: 'Project' = None,
+ design: 'Design' = None,
+ parent: Nullable['FileSet'] = None,
+ vhdlLibrary: Union[str, 'VHDLLibrary'] = None,
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: SystemVerilogVersion = None,
+ svVersion: SystemVerilogVersion = None,
+ srdlVersion: SystemRDLVersion = None
+ ):
+ self._name = name
+ self._topLevel = topLevel
+ if project is not None:
+ self._project = project
+ self._design = design if design is not None else project.DefaultDesign
+
+ elif design is not None:
+ self._project = design._project
+ self._design = design
+ else:
+ self._project = None
+ self._design = None
+ self._directory = directory
+ self._parent = parent
+ self._fileSets = {}
+ self._files = []
+ self._set = set()
+
+ if design is not None:
+ design._fileSets[name] = self
+
+ self._attributes = {}
+ self._vhdlLibraries = {}
+
+ # TODO: handle if vhdlLibrary is a string
+ self._vhdlLibrary = vhdlLibrary
+ self._vhdlVersion = vhdlVersion
+ self._verilogVersion = verilogVersion
+ self._svVersion = svVersion
+ self._srdlVersion = srdlVersion
+
+ @property
+ def Name(self) -> str:
+ """Property setting or returning the fileset's name."""
+ return self._name
+
+ @Name.setter
+ def Name(self, value: str) -> None:
+ self._name = value
+
+ @property
+ def TopLevel(self) -> str:
+ """Property setting or returning the fileset's toplevel."""
+ return self._topLevel
+
+ @TopLevel.setter
+ def TopLevel(self, value: str) -> None:
+ self._topLevel = value
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ """Property setting or returning the project this fileset is used in."""
+ return self._project
+
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+ self._project = value
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ """Property setting or returning the design this fileset is used in."""
+ if self._design is not None:
+ return self._design
+ elif self._parent is not None:
+ return self._parent.Design
+ else:
+ return None
+ # TODO: raise exception instead
+ # QUESTION: how to handle if design and parent is set?
+
+ @Design.setter
+ def Design(self, value: 'Design') -> None:
+ self._design = value
+ if self._project is None:
+ self._project = value._project
+ elif self._project is not value._project:
+ raise Exception("The design's project is not identical to the already assigned project.")
+
+ @property
+ def Directory(self) -> pathlib_Path:
+ """Property setting or returning the directory this fileset is located in."""
+ return self._directory
+
+ @Directory.setter
+ def Directory(self, value: pathlib_Path) -> None:
+ self._directory = value
+
+ @property
+ def ResolvedPath(self) -> pathlib_Path:
+ """Read-only property returning the resolved path of this fileset."""
+ if self._directory.is_absolute():
+ return self._directory.resolve()
+ else:
+ if self._parent is not None:
+ directory = self._parent.ResolvedPath
+ elif self._design is not None:
+ directory = self._design.ResolvedPath
+ elif self._project is not None:
+ directory = self._project.ResolvedPath
+ else:
+ # TODO: message and exception type
+ raise Exception("")
+
+ directory = (directory / self._directory).resolve()
+ if directory.is_absolute():
+ return directory
+ else:
+ # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+ return pathlib_Path(path_relpath(directory, pathlib_Path.cwd()))
+
+ @property
+ def Parent(self) -> Nullable['FileSet']:
+ """Property setting or returning the parent fileset this fileset is used in."""
+ return self._parent
+
+ @Parent.setter
+ def Parent(self, value: 'FileSet') -> None:
+ self._parent = value
+ value._fileSets[self._name] = self
+ # TODO: check it it already exists
+ # QUESTION: make an Add fileset method?
+
+ @property
+ def FileSets(self) -> Dict[str, 'FileSet']:
+ """Read-only property returning the dictionary of sub-filesets."""
+ return self._fileSets
+
+[docs] def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[bool, str, 'FileSet'] = None) -> Generator[File, None, None]:
+ """
+ Method returning the files of this fileset.
+
+ :arg fileType: A filter for file types. Default: ``Any``.
+ :arg fileSet: Specifies how to handle sub-filesets.
+ """
+ if fileSet is False:
+ for file in self._files:
+ if file.FileType in fileType:
+ yield file
+ elif fileSet is None:
+ for fileSet in self._fileSets.values():
+ for file in fileSet.Files(fileType):
+ yield file
+ for file in self._files:
+ if file.FileType in fileType:
+ yield file
+ else:
+ if isinstance(fileSet, str):
+ fileSetName = fileSet
+ try:
+ fileSet = self._fileSets[fileSetName]
+ except KeyError as ex:
+ raise Exception(f"Fileset {fileSetName} not bound to fileset {self.Name}.") from ex
+ elif not isinstance(fileSet, FileSet):
+ raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.")
+
+ for file in fileSet.Files(fileType):
+ yield file
+
+[docs] def AddFileSet(self, fileSet: "FileSet") -> None:
+ """
+ Method to add a single sub-fileset to this fileset.
+
+ :arg fileSet: A fileset to add to this fileset as sub-fileset.
+ """
+ if not isinstance(fileSet, FileSet):
+ raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.")
+ elif fileSet in self._fileSets:
+ raise Exception("Sub-fileset already contains this fileset.")
+ elif fileSet.Name in self._fileSets.keys():
+ raise Exception(f"Fileset already contains a sub-fileset named '{fileSet.Name}'.")
+
+ self._fileSets[fileSet.Name] = fileSet
+ fileSet._parent = self
+
+[docs] def AddFileSets(self, fileSets: Iterable["FileSet"]) -> None:
+ """
+ Method to add a multiple sub-filesets to this fileset.
+
+ :arg fileSets: An iterable of filesets to add each to the fileset.
+ """
+ for fileSet in fileSets:
+ self.AddFileSet(fileSet)
+
+ @property
+ def FileSetCount(self) -> int:
+ """Returns number of file sets excl. sub-filesets."""
+ return len(self._fileSets)
+
+ @property
+ def TotalFileSetCount(self) -> int:
+ """Returns number of file sets incl. sub-filesets."""
+ fileSetCount = len(self._fileSets)
+ for fileSet in self._fileSets.values():
+ fileSetCount += fileSet.TotalFileSetCount
+
+ return fileSetCount
+
+[docs] def AddFile(self, file: File) -> None:
+ """
+ Method to add a single file to this fileset.
+
+ :arg file: A file to add to this fileset.
+ """
+ if not isinstance(file, File):
+ raise TypeError("Parameter 'file' is not of type ProjectModel.File.")
+ elif file._fileSet is not None:
+ ex = ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}'.")
+ ex.add_note(f"A file can't be assigned to another fileset.")
+ raise ex
+ elif file in self._set:
+ ex = ValueError(f"File '{file.Path!s}' is already part of this fileset.")
+ ex.add_note(f"A file can't be added twice to a fileset.")
+ raise ex
+
+ self._files.append(file)
+ self._set.add(file)
+ file._fileSet = self
+
+[docs] def AddFiles(self, files: Iterable[File]) -> None:
+ """
+ Method to add a multiple files to this fileset.
+
+ :arg files: An iterable of files to add each to the fileset.
+ """
+ for file in files:
+ self.AddFile(file)
+
+ @property
+ def FileCount(self) -> int:
+ """Returns number of files excl. sub-filesets."""
+ return len(self._files)
+
+ @property
+ def TotalFileCount(self) -> int:
+ """Returns number of files incl. the files in sub-filesets."""
+ fileCount = len(self._files)
+ for fileSet in self._fileSets.values():
+ fileCount += fileSet.FileCount
+
+ return fileCount
+
+[docs] def Validate(self) -> None:
+ """Validate this fileset."""
+ if self._name is None or self._name == "":
+ raise Exception("Validation: FileSet has no name.")
+
+ if self._directory is None:
+ raise Exception(f"Validation: FileSet '{self._name}' has no directory.")
+ try:
+ path = self.ResolvedPath
+ except Exception as ex:
+ raise Exception(f"Validation: FileSet '{self._name}' could not compute resolved path.") from ex
+ if not path.exists():
+ raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' does not exist.")
+ if not path.is_dir():
+ raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' is not a directory.")
+
+ if self._design is None:
+ raise Exception(f"Validation: FileSet '{self._path}' has no design.")
+ if self._project is None:
+ raise Exception(f"Validation: FileSet '{self._path}' has no project.")
+
+ for fileSet in self._fileSets.values():
+ fileSet.Validate()
+ for file in self._files:
+ file.Validate()
+
+[docs] def __len__(self) -> int:
+ """Returns number of attributes set on the file set."""
+ return len(self._attributes)
+
+[docs] def __getitem__(self, key: Type[Attribute]) -> Any:
+ """Index access for returning attributes on this file."""
+ if not issubclass(key, Attribute):
+ raise TypeError("Parameter 'key' is not an 'Attribute'.")
+
+ try:
+ return self._attributes[key]
+ except KeyError:
+ return key.resolve(self, key)
+
+[docs] def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+ """Index access for setting attributes on this file."""
+ self._attributes[key] = value
+
+ def GetOrCreateVHDLLibrary(self, name) -> None:
+ if name in self._vhdlLibraries:
+ return self._vhdlLibraries[name]
+ elif name in self._design._vhdlLibraries:
+ library = self._design._vhdlLibraries[name]
+ self._vhdlLibraries[name] = library
+ return library
+ else:
+ library = VHDLLibrary(name, design=self._design, vhdlVersion=self._vhdlVersion)
+ self._vhdlLibraries[name] = library
+ return library
+
+ @property
+ def VHDLLibrary(self) -> 'VHDLLibrary':
+ """Property setting or returning the VHDL library of this fileset."""
+ if self._vhdlLibrary is not None:
+ return self._vhdlLibrary
+ elif self._parent is not None:
+ return self._parent.VHDLLibrary
+ elif self._design is not None:
+ return self._design.VHDLLibrary
+ else:
+ raise Exception("VHDLLibrary was neither set locally nor globally.")
+
+ @VHDLLibrary.setter
+ def VHDLLibrary(self, value: 'VHDLLibrary') -> None:
+ self._vhdlLibrary = value
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ """Property setting or returning the VHDL version of this fileset."""
+ if self._vhdlVersion is not None:
+ return self._vhdlVersion
+ elif self._parent is not None:
+ return self._parent.VHDLVersion
+ elif self._design is not None:
+ return self._design.VHDLVersion
+ else:
+ raise Exception("VHDLVersion was neither set locally nor globally.")
+
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+ self._vhdlVersion = value
+
+ @property
+ def VerilogVersion(self) -> SystemVerilogVersion:
+ """Property setting or returning the Verilog version of this fileset."""
+ if self._verilogVersion is not None:
+ return self._verilogVersion
+ elif self._parent is not None:
+ return self._parent.VerilogVersion
+ elif self._design is not None:
+ return self._design.VerilogVersion
+ else:
+ raise Exception("VerilogVersion was neither set locally nor globally.")
+
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+ self._verilogVersion = value
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ """Property setting or returning the SystemVerilog version of this fileset."""
+ if self._svVersion is not None:
+ return self._svVersion
+ elif self._parent is not None:
+ return self._parent.SVVersion
+ elif self._design is not None:
+ return self._design.SVVersion
+ else:
+ raise Exception("SVVersion was neither set locally nor globally.")
+
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+ self._svVersion = value
+
+ @property
+ def SRDLVersion(self) -> SystemRDLVersion:
+ if self._srdlVersion is not None:
+ return self._srdlVersion
+ elif self._parent is not None:
+ return self._parent.SRDLVersion
+ elif self._design is not None:
+ return self._design.SRDLVersion
+ else:
+ raise Exception("SRDLVersion was neither set locally nor globally.")
+
+ @SRDLVersion.setter
+ def SRDLVersion(self, value: SystemRDLVersion) -> None:
+ self._srdlVersion = value
+
+
+
+
+[docs]@export
+class VHDLLibrary(metaclass=ExtendedType, slots=True):
+ """
+ A :term:`VHDLLibrary` represents a group of VHDL source files compiled into the same VHDL library.
+
+ :arg name: The VHDL libraries' name.
+ :arg project: Project the VHDL library is associated with.
+ :arg design: Design the VHDL library is associated with.
+ :arg vhdlVersion: Default VHDL version for files in this VHDL library, if not specified for the file itself.
+ """
+
+ _name: str
+ _project: Nullable['Project']
+ _design: Nullable['Design']
+ _files: List[File]
+ _vhdlVersion: VHDLVersion
+
+ _dependencyNode: Vertex
+
+[docs] def __init__(
+ self,
+ name: str,
+ project: 'Project' = None,
+ design: 'Design' = None,
+ vhdlVersion: VHDLVersion = None
+ ):
+ self._name = name
+ if project is not None:
+ self._project = project
+ self._design = project._defaultDesign if design is None else design
+ self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph)
+
+ if name in self._design._vhdlLibraries:
+ raise Exception(f"Library '{name}' already in design '{self._design.Name}'.")
+ else:
+ self._design._vhdlLibraries[name] = self
+
+ elif design is not None:
+ self._project = design._project
+ self._design = design
+ self._dependencyNode = Vertex(value=self, graph=design._vhdlLibraryDependencyGraph)
+
+ if name in design._vhdlLibraries:
+ raise Exception(f"Library '{name}' already in design '{design.Name}'.")
+ else:
+ design._vhdlLibraries[name] = self
+
+ else:
+ self._project = None
+ self._design = None
+ self._dependencyNode = None
+
+ self._files = []
+ self._vhdlVersion = vhdlVersion
+
+ @property
+ def Name(self) -> str:
+ return self._name
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ """Property setting or returning the project this VHDL library is used in."""
+ return self._project
+
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+ if not isinstance(value, Project):
+ raise TypeError("Parameter 'value' is not of type 'Project'.")
+
+ if value is None:
+ # TODO: unlink VHDLLibrary from project
+ self._project = None
+ else:
+ self._project = value
+ if self._design is None:
+ self._design = value._defaultDesign
+
+ @property
+ def Design(self) -> Nullable['Design']:
+ """Property setting or returning the design this VHDL library is used in."""
+ return self._design
+
+ @Design.setter
+ def Design(self, value: 'Design') -> None:
+ if not isinstance(value, Design):
+ raise TypeError("Parameter 'value' is not of type 'Design'.")
+
+ if value is None:
+ # TODO: unlink VHDLLibrary from design
+ self._design = None
+ else:
+ if self._design is None:
+ self._design = value
+ self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph)
+ elif self._design is not value:
+ # TODO: move VHDLLibrary to other design
+ # TODO: create new vertex in dependency graph and remove vertex from old graph
+ self._design = value
+ else:
+ pass
+
+ if self._project is None:
+ self._project = value._project
+ elif self._project is not value._project:
+ raise Exception("The design's project is not identical to the already assigned project.")
+
+ @property
+ def Files(self) -> Generator[File, None, None]:
+ """Read-only property to return all files in this VHDL library."""
+ for file in self._files:
+ yield file
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ """Property setting or returning the VHDL version of this VHDL library."""
+ if self._vhdlVersion is not None:
+ return self._vhdlVersion
+ elif self._design is not None:
+ return self._design.VHDLVersion
+ else:
+ raise Exception("VHDLVersion is not set on VHDLLibrary nor parent object.")
+
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+ self._vhdlVersion = value
+
+ def AddDependency(self, library: 'VHDLLibrary') -> None:
+ library.parent = self
+
+ def AddFile(self, vhdlFile: VHDLSourceFile) -> None:
+ if not isinstance(vhdlFile, VHDLSourceFile):
+ raise TypeError(f"Parameter 'vhdlFile' is not a 'VHDLSourceFile'.")
+
+ self._files.append(vhdlFile)
+
+ def AddFiles(self, vhdlFiles: Iterable[VHDLSourceFile]) -> None:
+ for vhdlFile in vhdlFiles:
+ if not isinstance(vhdlFile, VHDLSourceFile):
+ raise TypeError(f"Item '{vhdlFile}' in parameter 'vhdlFiles' is not a 'VHDLSourceFile'.")
+
+ self._files.append(vhdlFile)
+
+ @property
+ def FileCount(self) -> int:
+ """Returns number of files."""
+ return len(self._files)
+
+
+
+
+[docs]@export
+class Design(metaclass=ExtendedType, slots=True):
+ """
+ A :term:`Design` represents a group of filesets and the source files therein.
+
+ Each design contains at least one fileset - the :term:`default fileset`. For
+ designs with VHDL source files, a independent `VHDLLibraries` overlay structure
+ exists.
+
+ :arg name: The design's name.
+ :arg topLevel: Name of the design's toplevel.
+ :arg directory: Path of this design (absolute or relative to the project).
+ :arg project: Project the design is associated with.
+ :arg vhdlVersion: Default VHDL version for files in this design, if not specified for the file itself.
+ :arg verilogVersion: Default Verilog version for files in this design, if not specified for the file itself.
+ :arg svVersion: Default SystemVerilog version for files in this design, if not specified for the file itself.
+ :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself.
+ """
+
+ _name: str
+ _topLevel: Nullable[str]
+ _project: Nullable['Project']
+ _directory: pathlib_Path
+ _fileSets: Dict[str, FileSet]
+ _defaultFileSet: Nullable[FileSet]
+ _attributes: Dict[Type[Attribute], typing_Any]
+
+ _vhdlLibraries: Dict[str, VHDLLibrary]
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: SystemVerilogVersion
+ _svVersion: SystemVerilogVersion
+ _srdlVersion: SystemRDLVersion
+ _externalVHDLLibraries: List
+
+ _vhdlLibraryDependencyGraph: Graph
+ _fileDependencyGraph: Graph
+
+[docs] def __init__(
+ self,
+ name: str,
+ topLevel: str = None,
+ directory: pathlib_Path = pathlib_Path("."),
+ project: 'Project' = None,
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: SystemVerilogVersion = None,
+ svVersion: SystemVerilogVersion = None,
+ srdlVersion: SystemRDLVersion = None
+ ):
+ self._name = name
+ self._topLevel = topLevel
+ self._project = project
+ if project is not None:
+ project._designs[name] = self
+ self._directory = directory
+ self._fileSets = {}
+ self._defaultFileSet = FileSet("default", project=project, design=self)
+ self._attributes = {}
+ self._vhdlLibraries = {}
+ self._vhdlVersion = vhdlVersion
+ self._verilogVersion = verilogVersion
+ self._svVersion = svVersion
+ self._srdlVersion = srdlVersion
+ self._externalVHDLLibraries = []
+
+ self._vhdlLibraryDependencyGraph = Graph()
+ self._fileDependencyGraph = Graph()
+
+ @property
+ def Name(self) -> str:
+ """Property setting or returning the design's name."""
+ return self._name
+
+ @Name.setter
+ def Name(self, value: str) -> None:
+ self._name = value
+
+ @property
+ def TopLevel(self) -> str:
+ """Property setting or returning the fileset's toplevel."""
+ return self._topLevel
+
+ @TopLevel.setter
+ def TopLevel(self, value: str) -> None:
+ self._topLevel = value
+
+ @property
+ def Project(self) -> Nullable['Project']:
+ """Property setting or returning the project this design is used in."""
+ return self._project
+
+ @Project.setter
+ def Project(self, value: 'Project') -> None:
+ self._project = value
+
+ @property
+ def Directory(self) -> pathlib_Path:
+ """Property setting or returning the directory this design is located in."""
+ return self._directory
+
+ @Directory.setter
+ def Directory(self, value: pathlib_Path) -> None:
+ self._directory = value
+
+ @property
+ def ResolvedPath(self) -> pathlib_Path:
+ """Read-only property returning the resolved path of this fileset."""
+ if self._directory.is_absolute():
+ return self._directory.resolve()
+ elif self._project is not None:
+ path = (self._project.ResolvedPath / self._directory).resolve()
+
+ if path.is_absolute():
+ return path
+ else:
+ # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+ return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+ else:
+ # TODO: message and exception type
+ raise Exception("")
+
+ @property
+ def DefaultFileSet(self) -> FileSet:
+ """Property setting or returning the default fileset of this design."""
+ return self._defaultFileSet
+
+ @DefaultFileSet.setter
+ def DefaultFileSet(self, value: Union[str, FileSet]) -> None:
+ if isinstance(value, str):
+ if value not in self._fileSets.keys():
+ raise Exception(f"Fileset '{value}' is not in this design.")
+
+ self._defaultFileSet = self._fileSets[value]
+ elif isinstance(value, FileSet):
+ if value not in self.FileSets:
+ raise Exception(f"Fileset '{value}' is not associated to this design.")
+
+ self._defaultFileSet = value
+ else:
+ raise ValueError("Unsupported parameter type for 'value'.")
+
+ # TODO: return generator with another method
+ @property
+ def FileSets(self) -> Dict[str, FileSet]:
+ """Read-only property returning the dictionary of filesets."""
+ return self._fileSets
+
+[docs] def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[str, FileSet] = None) -> Generator[File, None, None]:
+ """
+ Method returning the files of this design.
+
+ :arg fileType: A filter for file types. Default: ``Any``.
+ :arg fileSet: Specifies if all files from all filesets (``fileSet=None``) are files from a single fileset are returned.
+ """
+ if fileSet is None:
+ for fileSet in self._fileSets.values():
+ for file in fileSet.Files(fileType):
+ yield file
+ else:
+ if isinstance(fileSet, str):
+ try:
+ fileSet = self._fileSets[fileSet]
+ except KeyError as ex:
+ raise Exception(f"Fileset {fileSet.Name} not bound to design {self.Name}.") from ex
+ elif not isinstance(fileSet, FileSet):
+ raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.")
+
+ for file in fileSet.Files(fileType):
+ yield file
+
+
+
+[docs] def Validate(self) -> None:
+ """Validate this design."""
+ if self._name is None or self._name == "":
+ raise Exception("Validation: Design has no name.")
+
+ if self._directory is None:
+ raise Exception(f"Validation: Design '{self._name}' has no directory.")
+ try:
+ path = self.ResolvedPath
+ except Exception as ex:
+ raise Exception(f"Validation: Design '{self._name}' could not compute resolved path.") from ex
+ if not path.exists():
+ raise Exception(f"Validation: Design '{self._name}'s directory '{path}' does not exist.")
+ if not path.is_dir():
+ raise Exception(f"Validation: Design '{self._name}'s directory '{path}' is not a directory.")
+
+ if len(self._fileSets) == 0:
+ raise Exception(f"Validation: Design '{self._name}' has no fileset.")
+ try:
+ if self._defaultFileSet is not self._fileSets[self._defaultFileSet.Name]:
+ raise Exception(f"Validation: Design '{self._name}'s default fileset is the same as listed in filesets.")
+ except KeyError as ex:
+ raise Exception(f"Validation: Design '{self._name}'s default fileset is not in list of filesets.") from ex
+ if self._project is None:
+ raise Exception(f"Validation: Design '{self._path}' has no project.")
+
+ for fileSet in self._fileSets.values():
+ fileSet.Validate()
+
+[docs] def __len__(self) -> int:
+ """Returns number of attributes set on the file set."""
+ return len(self._attributes)
+
+ def __getitem__(self, key: Type[Attribute]) -> Any:
+ if not issubclass(key, Attribute):
+ raise TypeError("Parameter 'key' is not an 'Attribute'.")
+
+ try:
+ return self._attributes[key]
+ except KeyError:
+ return key.resolve(self, key)
+
+ def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+ self._attributes[key] = value
+
+ @property
+ def VHDLLibraries(self) -> Dict[str, VHDLLibrary]:
+ return self._vhdlLibraries
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ if self._vhdlVersion is not None:
+ return self._vhdlVersion
+ elif self._project is not None:
+ return self._project.VHDLVersion
+ else:
+ raise Exception("VHDLVersion was neither set locally nor globally.")
+
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+ self._vhdlVersion = value
+
+ @property
+ def VerilogVersion(self) -> SystemVerilogVersion:
+ if self._verilogVersion is not None:
+ return self._verilogVersion
+ elif self._project is not None:
+ return self._project.VerilogVersion
+ else:
+ raise Exception("VerilogVersion was neither set locally nor globally.")
+
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+ self._verilogVersion = value
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ if self._svVersion is not None:
+ return self._svVersion
+ elif self._project is not None:
+ return self._project.SVVersion
+ else:
+ raise Exception("SVVersion was neither set locally nor globally.")
+
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+ self._svVersion = value
+
+ @property
+ def SRDLVersion(self) -> SystemRDLVersion:
+ if self._srdlVersion is not None:
+ return self._srdlVersion
+ elif self._project is not None:
+ return self._project.SRDLVersion
+ else:
+ raise Exception("SRDLVersion was neither set locally nor globally.")
+
+ @SRDLVersion.setter
+ def SRDLVersion(self, value: SystemRDLVersion) -> None:
+ self._srdlVersion = value
+
+ @property
+ def ExternalVHDLLibraries(self) -> List:
+ return self._externalVHDLLibraries
+
+ def AddFileSet(self, fileSet: FileSet) -> None:
+ if not isinstance(fileSet, FileSet):
+ raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.")
+ elif fileSet in self._fileSets:
+ raise Exception("Design already contains this fileset.")
+ elif fileSet.Name in self._fileSets.keys():
+ raise Exception(f"Design already contains a fileset named '{fileSet.Name}'.")
+
+ self._fileSets[fileSet.Name] = fileSet
+ fileSet.Design = self
+ fileSet._parent = self
+
+ def AddFileSets(self, fileSets: Iterable[FileSet]) -> None:
+ for fileSet in fileSets:
+ self.AddFileSet(fileSet)
+
+ @property
+ def FileSetCount(self) -> int:
+ """Returns number of file sets excl. sub-filesets."""
+ return len(self._fileSets)
+
+ @property
+ def TotalFileSetCount(self) -> int:
+ """Returns number of file sets incl. sub-filesets."""
+ fileSetCount = len(self._fileSets)
+ for fileSet in self._fileSets.values():
+ fileSetCount += fileSet.TotalFileSetCount
+
+ return fileSetCount
+
+ def AddFile(self, file: File) -> None:
+ if file.FileSet is None:
+ self._defaultFileSet.AddFile(file)
+ else:
+ raise ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}' and can't be assigned via Design to a default fileset.")
+
+ def AddFiles(self, files: Iterable[File]) -> None:
+ for file in files:
+ self.AddFile(file)
+
+ def AddVHDLLibrary(self, vhdlLibrary: VHDLLibrary) -> None:
+ if vhdlLibrary.Name in self._vhdlLibraries:
+ if self._vhdlLibraries[vhdlLibrary.Name] is vhdlLibrary:
+ raise Exception(f"The VHDLLibrary '{vhdlLibrary.Name}' was already added to the design.")
+ else:
+ raise Exception(f"A VHDLLibrary with same name ('{vhdlLibrary.Name}') already exists for this design.")
+
+
+
+
+[docs]@export
+class Project(metaclass=ExtendedType, slots=True):
+ """
+ A :term:`Project` represents a group of designs and the source files therein.
+
+ :arg name: The project's name.
+ :arg rootDirectory: Base-path to the project.
+ :arg vhdlVersion: Default VHDL version for files in this project, if not specified for the file itself.
+ :arg verilogVersion: Default Verilog version for files in this project, if not specified for the file itself.
+ :arg svVersion: Default SystemVerilog version for files in this project, if not specified for the file itself.
+ """
+
+ _name: str
+ _rootDirectory: pathlib_Path
+ _designs: Dict[str, Design]
+ _defaultDesign: Design
+ _attributes: Dict[Type[Attribute], typing_Any]
+
+ _vhdlVersion: VHDLVersion
+ _verilogVersion: SystemVerilogVersion
+ _svVersion: SystemVerilogVersion
+ _srdlVersion: SystemRDLVersion
+
+[docs] def __init__(
+ self,
+ name: str,
+ rootDirectory: pathlib_Path = pathlib_Path("."),
+ vhdlVersion: VHDLVersion = None,
+ verilogVersion: SystemVerilogVersion = None,
+ svVersion: SystemVerilogVersion = None
+ ):
+ self._name = name
+ self._rootDirectory = rootDirectory
+ self._designs = {}
+ self._defaultDesign = Design("default", project=self)
+ self._attributes = {}
+ self._vhdlVersion = vhdlVersion
+ self._verilogVersion = verilogVersion
+ self._svVersion = svVersion
+
+ @property
+ def Name(self) -> str:
+ """Property setting or returning the project's name."""
+ return self._name
+
+ @property
+ def RootDirectory(self) -> pathlib_Path:
+ """Property setting or returning the root directory this project is located in."""
+ return self._rootDirectory
+
+ @RootDirectory.setter
+ def RootDirectory(self, value: pathlib_Path) -> None:
+ self._rootDirectory = value
+
+ @property
+ def ResolvedPath(self) -> pathlib_Path:
+ """Read-only property returning the resolved path of this fileset."""
+ path = self._rootDirectory.resolve()
+ if self._rootDirectory.is_absolute():
+ return path
+ else:
+ # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+ return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+
+ # TODO: return generator with another method
+ @property
+ def Designs(self) -> Dict[str, Design]:
+ return self._designs
+
+ @property
+ def DefaultDesign(self) -> Design:
+ return self._defaultDesign
+
+[docs] def Validate(self) -> None:
+ """Validate this project."""
+ if self._name is None or self._name == "":
+ raise Exception("Validation: Project has no name.")
+
+ if self._rootDirectory is None:
+ raise Exception(f"Validation: Project '{self._name}' has no root directory.")
+ try:
+ path = self.ResolvedPath
+ except Exception as ex:
+ raise Exception(f"Validation: Project '{self._name}' could not compute resolved path.") from ex
+ if not path.exists():
+ raise Exception(f"Validation: Project '{self._name}'s directory '{path}' does not exist.")
+ if not path.is_dir():
+ raise Exception(f"Validation: Project '{self._name}'s directory '{path}' is not a directory.")
+
+ if len(self._designs) == 0:
+ raise Exception(f"Validation: Project '{self._name}' has no design.")
+ try:
+ if self._defaultDesign is not self._designs[self._defaultDesign.Name]:
+ raise Exception(f"Validation: Project '{self._name}'s default design is the same as listed in designs.")
+ except KeyError as ex:
+ raise Exception(f"Validation: Project '{self._name}'s default design is not in list of designs.") from ex
+
+ for design in self._designs.values():
+ design.Validate()
+
+ @property
+ def DesignCount(self) -> int:
+ """Returns number of designs."""
+ return len(self._designs)
+
+[docs] def __len__(self) -> int:
+ """Returns number of attributes set on the file set."""
+ return len(self._attributes)
+
+ def __getitem__(self, key: Type[Attribute]) -> Any:
+ if not issubclass(key, Attribute):
+ raise TypeError("Parameter 'key' is not an 'Attribute'.")
+
+ try:
+ return self._attributes[key]
+ except KeyError:
+ return key.resolve(self, key)
+
+ def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+ self._attributes[key] = value
+
+ @property
+ def VHDLVersion(self) -> VHDLVersion:
+ # TODO: check for None and return exception
+ return self._vhdlVersion
+
+ @VHDLVersion.setter
+ def VHDLVersion(self, value: VHDLVersion) -> None:
+ self._vhdlVersion = value
+
+ @property
+ def VerilogVersion(self) -> SystemVerilogVersion:
+ # TODO: check for None and return exception
+ return self._verilogVersion
+
+ @VerilogVersion.setter
+ def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+ self._verilogVersion = value
+
+ @property
+ def SVVersion(self) -> SystemVerilogVersion:
+ # TODO: check for None and return exception
+ return self._svVersion
+
+ @SVVersion.setter
+ def SVVersion(self, value: SystemVerilogVersion) -> None:
+ self._svVersion = value
+
+ @property
+ def SRDLVersion(self) -> SystemRDLVersion:
+ # TODO: check for None and return exception
+ return self._srdlVersion
+
+ @SRDLVersion.setter
+ def SRDLVersion(self, value: SystemRDLVersion) -> None:
+ self._srdlVersion = value
+
+
+
+# ==================================================================================================================== #
+# _____ ____ _ _ ____ _ _ __ __ _ _ #
+# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+# |_| |___/ |__/ #
+# ==================================================================================================================== #
+# Authors: #
+# Patrick Lehmann #
+# #
+# License: #
+# ==================================================================================================================== #
+# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+# #
+# SPDX-License-Identifier: Apache-2.0 #
+# ==================================================================================================================== #
+#
+"""A set of common attributes to store meta information on ProjectModel entities (project, design, fileset, file, ...)."""
+from typing import Dict
+from pyTooling.Decorators import export
+
+from pyEDAA.ProjectModel import Attribute
+
+
+[docs]@export
+class KeyValueAttribute(Attribute):
+ KEY = "ID"
+
+ _keyValuePairs: Dict[str, str]
+
+
+
+ def __getitem__(self, item: str) -> str:
+ return self._keyValuePairs[item]
+
+ def __setitem__(self, key: str, value: str) -> None:
+ self._keyValuePairs[key] = value
+
+# ==================================================================================================================== #
+# _____ ____ _ _ ____ _ _ __ __ _ _ #
+# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+# |_| |___/ |__/ #
+# ==================================================================================================================== #
+# Authors: #
+# Patrick Lehmann #
+# #
+# License: #
+# ==================================================================================================================== #
+# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+# #
+# Licensed under the Apache License, Version 2.0 (the "License"); #
+# you may not use this file except in compliance with the License. #
+# You may obtain a copy of the License at #
+# #
+# http://www.apache.org/licenses/LICENSE-2.0 #
+# #
+# Unless required by applicable law or agreed to in writing, software #
+# distributed under the License is distributed on an "AS IS" BASIS, #
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+# See the License for the specific language governing permissions and #
+# limitations under the License. #
+# #
+# SPDX-License-Identifier: Apache-2.0 #
+# ==================================================================================================================== #
+#
+"""Specific file types and attributes for Xilinx Vivado."""
+from pathlib import Path
+from typing import Iterable
+
+from xml.dom import minidom, Node
+
+from pyTooling.MetaClasses import ExtendedType
+from pyVHDLModel import VHDLVersion
+from pyTooling.Decorators import export
+
+from pyEDAA.ProjectModel import ProjectFile, XMLFile, XMLContent, SDCContent, Project, FileSet, Attribute, Design
+from pyEDAA.ProjectModel import File as Model_File
+from pyEDAA.ProjectModel import ConstraintFile as Model_ConstraintFile
+from pyEDAA.ProjectModel import VerilogSourceFile as Model_VerilogSourceFile
+from pyEDAA.ProjectModel import VHDLSourceFile as Model_VHDLSourceFile
+
+
+
+
+
+@export
+class File(Model_File):
+ pass
+
+
+class VivadoFileMixIn(metaclass=ExtendedType, mixin=True):
+ def _registerAttributes(self):
+ self._attributes[UsedInAttribute] = []
+
+
+@export
+class ConstraintFile(Model_ConstraintFile, VivadoFileMixIn):
+ def _registerAttributes(self):
+ super()._registerAttributes()
+ VivadoFileMixIn._registerAttributes(self)
+
+
+@export
+class VerilogSourceFile(Model_VerilogSourceFile):
+ def _registerAttributes(self):
+ super()._registerAttributes()
+ VivadoFileMixIn._registerAttributes(self)
+
+
+@export
+class VHDLSourceFile(Model_VHDLSourceFile):
+ def _registerAttributes(self):
+ super()._registerAttributes()
+ VivadoFileMixIn._registerAttributes(self)
+
+
+@export
+class VivadoProjectFile(ProjectFile, XMLContent):
+ """A Vivado project file (``*.xpr``)."""
+
+ _xprProject: Project
+
+ def __init__(
+ self,
+ path: Path,
+ project: Project = None,
+ design: Design = None,
+ fileSet: FileSet = None
+ ):
+ super().__init__(path, project, design, fileSet)
+
+ self._xprProject = None
+
+ @property
+ def ProjectModel(self) -> Project:
+ return self._xprProject
+
+ def Parse(self):
+ if not self._path.exists():
+ raise Exception(f"Vivado project file '{self._path!s}' not found.") from FileNotFoundError(f"File '{self._path!s}' not found.")
+
+ try:
+ root = minidom.parse(str(self._path)).documentElement
+ except Exception as ex:
+ raise Exception(f"Couldn't open '{self._path!s}'.") from ex
+
+ self._xprProject = Project(self._path.stem, rootDirectory=self._path.parent)
+ self._ParseRootElement(root)
+
+ def _ParseRootElement(self, root):
+ for rootNode in root.childNodes:
+ if rootNode.nodeName == "FileSets":
+ self._ParseFileSets(rootNode)
+ break
+
+ def _ParseFileSets(self, filesetsNode):
+ for fileSetsNode in filesetsNode.childNodes:
+ if fileSetsNode.nodeType == Node.ELEMENT_NODE and fileSetsNode.tagName == "FileSet":
+ self._ParseFileSet(fileSetsNode)
+
+ def _ParseFileSet(self, filesetNode):
+ filesetName = filesetNode.getAttribute("Name")
+ fileset = FileSet(filesetName, design=self._xprProject.DefaultDesign)
+
+ for fileNode in filesetNode.childNodes:
+ if fileNode.nodeType == Node.ELEMENT_NODE:
+ if fileNode.tagName == "File":
+ self._ParseFile(fileNode, fileset)
+ elif fileNode.nodeType == Node.ELEMENT_NODE and fileNode.tagName == "Config":
+ self._ParseFileSetConfig(fileNode, fileset)
+
+ def _ParseFile(self, fileNode, fileset):
+ croppedPath = fileNode.getAttribute("Path").replace("$PPRDIR/", "")
+ filePath = Path(croppedPath)
+ if filePath.suffix in (".vhd", ".vhdl"):
+ self._ParseVHDLFile(fileNode, filePath, fileset)
+ elif filePath.suffix == ".xdc":
+ self._ParseXDCFile(fileNode, filePath, fileset)
+ elif filePath.suffix == ".v":
+ self._ParseVerilogFile(fileNode, filePath, fileset)
+ elif filePath.suffix == ".xci":
+ self._ParseXCIFile(fileNode, filePath, fileset)
+ else:
+ self._ParseDefaultFile(fileNode, filePath, fileset)
+
+ def _ParseVHDLFile(self, fileNode, path, fileset):
+ vhdlFile = VHDLSourceFile(path)
+ fileset.AddFile(vhdlFile)
+ usedInAttr = vhdlFile[UsedInAttribute]
+
+ for childNode in fileNode.childNodes:
+ if childNode.nodeType == Node.ELEMENT_NODE and childNode.tagName == "FileInfo":
+ if childNode.getAttribute("SFType") == "VHDL2008":
+ vhdlFile.VHDLVersion = VHDLVersion.VHDL2008
+ else:
+ vhdlFile.VHDLVersion = VHDLVersion.VHDL93
+
+ for fileAttribute in childNode.childNodes:
+ if fileAttribute.nodeType == Node.ELEMENT_NODE and fileAttribute.tagName == "Attr":
+ if fileAttribute.getAttribute("Name") == "Library":
+ libraryName = fileAttribute.getAttribute("Val")
+ vhdlFile.VHDLLibrary = fileset.GetOrCreateVHDLLibrary(libraryName)
+ elif fileAttribute.getAttribute("Val") == "UsedIn":
+ usedInAttr.append(fileAttribute.getAttribute("Val"))
+
+ def _ParseDefaultFile(self, _, path, fileset):
+ File(path, fileSet=fileset)
+
+ def _ParseXDCFile(self, _, path, fileset):
+ XDCConstraintFile(path, fileSet=fileset)
+
+ def _ParseVerilogFile(self, _, path, fileset):
+ VerilogSourceFile(path, fileSet=fileset)
+
+ def _ParseXCIFile(self, _, path, fileset):
+ IPCoreInstantiationFile(path, fileSet=fileset)
+
+ def _ParseFileSetConfig(self, fileNode, fileset):
+ for option in fileNode.childNodes:
+ if option.nodeType == Node.ELEMENT_NODE and option.tagName == "Option":
+ if option.getAttribute("Name") == "TopModule":
+ fileset.TopLevel = option.getAttribute("Val")
+
+
+@export
+class XDCConstraintFile(ConstraintFile, SDCContent):
+ """A Vivado constraint file (Xilinx Design Constraints; ``*.xdc``)."""
+
+
+@export
+class IPCoreDescriptionFile(XMLFile):
+ pass
+
+
+@export
+class IPCoreInstantiationFile(XMLFile):
+ """A Vivado IP core instantiation file (Xilinx IPCore Instance; ``*.xci``)."""
+' + + '' + + _("Hide Search Matches") + + "
" + ) + ); + }, + + /** + * helper function to hide the search marks again + */ + hideSearchWords: () => { + document + .querySelectorAll("#searchbox .highlight-link") + .forEach((el) => el.remove()); + document + .querySelectorAll("span.highlighted") + .forEach((el) => el.classList.remove("highlighted")); + localStorage.removeItem("sphinx_highlight_terms") + }, + + initEscapeListener: () => { + // only install a listener if it is really needed + if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) return; + + document.addEventListener("keydown", (event) => { + // bail for input elements + if (BLACKLISTED_KEY_CONTROL_ELEMENTS.has(document.activeElement.tagName)) return; + // bail with special keys + if (event.shiftKey || event.altKey || event.ctrlKey || event.metaKey) return; + if (DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS && (event.key === "Escape")) { + SphinxHighlight.hideSearchWords(); + event.preventDefault(); + } + }); + }, +}; + +_ready(SphinxHighlight.highlightSearchWords); +_ready(SphinxHighlight.initEscapeListener); diff --git a/coverage/coverage_html.js b/coverage/coverage_html.js new file mode 100644 index 00000000..59348828 --- /dev/null +++ b/coverage/coverage_html.js @@ -0,0 +1,624 @@ +// Licensed under the Apache License: http://www.apache.org/licenses/LICENSE-2.0 +// For details: https://github.com/nedbat/coveragepy/blob/master/NOTICE.txt + +// Coverage.py HTML report browser code. +/*jslint browser: true, sloppy: true, vars: true, plusplus: true, maxerr: 50, indent: 4 */ +/*global coverage: true, document, window, $ */ + +coverage = {}; + +// General helpers +function debounce(callback, wait) { + let timeoutId = null; + return function(...args) { + clearTimeout(timeoutId); + timeoutId = setTimeout(() => { + callback.apply(this, args); + }, wait); + }; +}; + +function checkVisible(element) { + const rect = element.getBoundingClientRect(); + const viewBottom = Math.max(document.documentElement.clientHeight, window.innerHeight); + const viewTop = 30; + return !(rect.bottom < viewTop || rect.top >= viewBottom); +} + +function on_click(sel, fn) { + const elt = document.querySelector(sel); + if (elt) { + elt.addEventListener("click", fn); + } +} + +// Helpers for table sorting +function getCellValue(row, column = 0) { + const cell = row.cells[column] // nosemgrep: eslint.detect-object-injection + if (cell.childElementCount == 1) { + const child = cell.firstElementChild + if (child instanceof HTMLTimeElement && child.dateTime) { + return child.dateTime + } else if (child instanceof HTMLDataElement && child.value) { + return child.value + } + } + return cell.innerText || cell.textContent; +} + +function rowComparator(rowA, rowB, column = 0) { + let valueA = getCellValue(rowA, column); + let valueB = getCellValue(rowB, column); + if (!isNaN(valueA) && !isNaN(valueB)) { + return valueA - valueB + } + return valueA.localeCompare(valueB, undefined, {numeric: true}); +} + +function sortColumn(th) { + // Get the current sorting direction of the selected header, + // clear state on other headers and then set the new sorting direction + const currentSortOrder = th.getAttribute("aria-sort"); + [...th.parentElement.cells].forEach(header => header.setAttribute("aria-sort", "none")); + if (currentSortOrder === "none") { + th.setAttribute("aria-sort", th.dataset.defaultSortOrder || "ascending"); + } else { + th.setAttribute("aria-sort", currentSortOrder === "ascending" ? "descending" : "ascending"); + } + + const column = [...th.parentElement.cells].indexOf(th) + + // Sort all rows and afterwards append them in order to move them in the DOM + Array.from(th.closest("table").querySelectorAll("tbody tr")) + .sort((rowA, rowB) => rowComparator(rowA, rowB, column) * (th.getAttribute("aria-sort") === "ascending" ? 1 : -1)) + .forEach(tr => tr.parentElement.appendChild(tr) ); +} + +// Find all the elements with data-shortcut attribute, and use them to assign a shortcut key. +coverage.assign_shortkeys = function () { + document.querySelectorAll("[data-shortcut]").forEach(element => { + document.addEventListener("keypress", event => { + if (event.target.tagName.toLowerCase() === "input") { + return; // ignore keypress from search filter + } + if (event.key === element.dataset.shortcut) { + element.click(); + } + }); + }); +}; + +// Create the events for the filter box. +coverage.wire_up_filter = function () { + // Cache elements. + const table = document.querySelector("table.index"); + const table_body_rows = table.querySelectorAll("tbody tr"); + const no_rows = document.getElementById("no_rows"); + + // Observe filter keyevents. + document.getElementById("filter").addEventListener("input", debounce(event => { + // Keep running total of each metric, first index contains number of shown rows + const totals = new Array(table.rows[0].cells.length).fill(0); + // Accumulate the percentage as fraction + totals[totals.length - 1] = { "numer": 0, "denom": 0 }; // nosemgrep: eslint.detect-object-injection + + // Hide / show elements. + table_body_rows.forEach(row => { + if (!row.cells[0].textContent.includes(event.target.value)) { + // hide + row.classList.add("hidden"); + return; + } + + // show + row.classList.remove("hidden"); + totals[0]++; + + for (let column = 1; column < totals.length; column++) { + // Accumulate dynamic totals + cell = row.cells[column] // nosemgrep: eslint.detect-object-injection + if (column === totals.length - 1) { + // Last column contains percentage + const [numer, denom] = cell.dataset.ratio.split(" "); + totals[column]["numer"] += parseInt(numer, 10); // nosemgrep: eslint.detect-object-injection + totals[column]["denom"] += parseInt(denom, 10); // nosemgrep: eslint.detect-object-injection + } else { + totals[column] += parseInt(cell.textContent, 10); // nosemgrep: eslint.detect-object-injection + } + } + }); + + // Show placeholder if no rows will be displayed. + if (!totals[0]) { + // Show placeholder, hide table. + no_rows.style.display = "block"; + table.style.display = "none"; + return; + } + + // Hide placeholder, show table. + no_rows.style.display = null; + table.style.display = null; + + const footer = table.tFoot.rows[0]; + // Calculate new dynamic sum values based on visible rows. + for (let column = 1; column < totals.length; column++) { + // Get footer cell element. + const cell = footer.cells[column]; // nosemgrep: eslint.detect-object-injection + + // Set value into dynamic footer cell element. + if (column === totals.length - 1) { + // Percentage column uses the numerator and denominator, + // and adapts to the number of decimal places. + const match = /\.([0-9]+)/.exec(cell.textContent); + const places = match ? match[1].length : 0; + const { numer, denom } = totals[column]; // nosemgrep: eslint.detect-object-injection + cell.dataset.ratio = `${numer} ${denom}`; + // Check denom to prevent NaN if filtered files contain no statements + cell.textContent = denom + ? `${(numer * 100 / denom).toFixed(places)}%` + : `${(100).toFixed(places)}%`; + } else { + cell.textContent = totals[column]; // nosemgrep: eslint.detect-object-injection + } + } + })); + + // Trigger change event on setup, to force filter on page refresh + // (filter value may still be present). + document.getElementById("filter").dispatchEvent(new Event("input")); +}; + +coverage.INDEX_SORT_STORAGE = "COVERAGE_INDEX_SORT_2"; + +// Loaded on index.html +coverage.index_ready = function () { + coverage.assign_shortkeys(); + coverage.wire_up_filter(); + document.querySelectorAll("[data-sortable] th[aria-sort]").forEach( + th => th.addEventListener("click", e => sortColumn(e.target)) + ); + + // Look for a localStorage item containing previous sort settings: + const stored_list = localStorage.getItem(coverage.INDEX_SORT_STORAGE); + + if (stored_list) { + const {column, direction} = JSON.parse(stored_list); + const th = document.querySelector("[data-sortable]").tHead.rows[0].cells[column]; // nosemgrep: eslint.detect-object-injection + th.setAttribute("aria-sort", direction === "ascending" ? "descending" : "ascending"); + th.click() + } + + // Watch for page unload events so we can save the final sort settings: + window.addEventListener("unload", function () { + const th = document.querySelector('[data-sortable] th[aria-sort="ascending"], [data-sortable] [aria-sort="descending"]'); + if (!th) { + return; + } + localStorage.setItem(coverage.INDEX_SORT_STORAGE, JSON.stringify({ + column: [...th.parentElement.cells].indexOf(th), + direction: th.getAttribute("aria-sort"), + })); + }); + + on_click(".button_prev_file", coverage.to_prev_file); + on_click(".button_next_file", coverage.to_next_file); + + on_click(".button_show_hide_help", coverage.show_hide_help); +}; + +// -- pyfile stuff -- + +coverage.LINE_FILTERS_STORAGE = "COVERAGE_LINE_FILTERS"; + +coverage.pyfile_ready = function () { + // If we're directed to a particular line number, highlight the line. + var frag = location.hash; + if (frag.length > 2 && frag[1] === "t") { + document.querySelector(frag).closest(".n").classList.add("highlight"); + coverage.set_sel(parseInt(frag.substr(2), 10)); + } else { + coverage.set_sel(0); + } + + on_click(".button_toggle_run", coverage.toggle_lines); + on_click(".button_toggle_mis", coverage.toggle_lines); + on_click(".button_toggle_exc", coverage.toggle_lines); + on_click(".button_toggle_par", coverage.toggle_lines); + + on_click(".button_next_chunk", coverage.to_next_chunk_nicely); + on_click(".button_prev_chunk", coverage.to_prev_chunk_nicely); + on_click(".button_top_of_page", coverage.to_top); + on_click(".button_first_chunk", coverage.to_first_chunk); + + on_click(".button_prev_file", coverage.to_prev_file); + on_click(".button_next_file", coverage.to_next_file); + on_click(".button_to_index", coverage.to_index); + + on_click(".button_show_hide_help", coverage.show_hide_help); + + coverage.filters = undefined; + try { + coverage.filters = localStorage.getItem(coverage.LINE_FILTERS_STORAGE); + } catch(err) {} + + if (coverage.filters) { + coverage.filters = JSON.parse(coverage.filters); + } + else { + coverage.filters = {run: false, exc: true, mis: true, par: true}; + } + + for (cls in coverage.filters) { + coverage.set_line_visibilty(cls, coverage.filters[cls]); // nosemgrep: eslint.detect-object-injection + } + + coverage.assign_shortkeys(); + coverage.init_scroll_markers(); + coverage.wire_up_sticky_header(); + + document.querySelectorAll("[id^=ctxs]").forEach( + cbox => cbox.addEventListener("click", coverage.expand_contexts) + ); + + // Rebuild scroll markers when the window height changes. + window.addEventListener("resize", coverage.build_scroll_markers); +}; + +coverage.toggle_lines = function (event) { + const btn = event.target.closest("button"); + const category = btn.value + const show = !btn.classList.contains("show_" + category); + coverage.set_line_visibilty(category, show); + coverage.build_scroll_markers(); + coverage.filters[category] = show; + try { + localStorage.setItem(coverage.LINE_FILTERS_STORAGE, JSON.stringify(coverage.filters)); + } catch(err) {} +}; + +coverage.set_line_visibilty = function (category, should_show) { + const cls = "show_" + category; + const btn = document.querySelector(".button_toggle_" + category); + if (btn) { + if (should_show) { + document.querySelectorAll("#source ." + category).forEach(e => e.classList.add(cls)); + btn.classList.add(cls); + } + else { + document.querySelectorAll("#source ." + category).forEach(e => e.classList.remove(cls)); + btn.classList.remove(cls); + } + } +}; + +// Return the nth line div. +coverage.line_elt = function (n) { + return document.getElementById("t" + n)?.closest("p"); +}; + +// Set the selection. b and e are line numbers. +coverage.set_sel = function (b, e) { + // The first line selected. + coverage.sel_begin = b; + // The next line not selected. + coverage.sel_end = (e === undefined) ? b+1 : e; +}; + +coverage.to_top = function () { + coverage.set_sel(0, 1); + coverage.scroll_window(0); +}; + +coverage.to_first_chunk = function () { + coverage.set_sel(0, 1); + coverage.to_next_chunk(); +}; + +coverage.to_prev_file = function () { + window.location = document.getElementById("prevFileLink").href; +} + +coverage.to_next_file = function () { + window.location = document.getElementById("nextFileLink").href; +} + +coverage.to_index = function () { + location.href = document.getElementById("indexLink").href; +} + +coverage.show_hide_help = function () { + const helpCheck = document.getElementById("help_panel_state") + helpCheck.checked = !helpCheck.checked; +} + +// Return a string indicating what kind of chunk this line belongs to, +// or null if not a chunk. +coverage.chunk_indicator = function (line_elt) { + const classes = line_elt?.className; + if (!classes) { + return null; + } + const match = classes.match(/\bshow_\w+\b/); + if (!match) { + return null; + } + return match[0]; +}; + +coverage.to_next_chunk = function () { + const c = coverage; + + // Find the start of the next colored chunk. + var probe = c.sel_end; + var chunk_indicator, probe_line; + while (true) { + probe_line = c.line_elt(probe); + if (!probe_line) { + return; + } + chunk_indicator = c.chunk_indicator(probe_line); + if (chunk_indicator) { + break; + } + probe++; + } + + // There's a next chunk, `probe` points to it. + var begin = probe; + + // Find the end of this chunk. + var next_indicator = chunk_indicator; + while (next_indicator === chunk_indicator) { + probe++; + probe_line = c.line_elt(probe); + next_indicator = c.chunk_indicator(probe_line); + } + c.set_sel(begin, probe); + c.show_selection(); +}; + +coverage.to_prev_chunk = function () { + const c = coverage; + + // Find the end of the prev colored chunk. + var probe = c.sel_begin-1; + var probe_line = c.line_elt(probe); + if (!probe_line) { + return; + } + var chunk_indicator = c.chunk_indicator(probe_line); + while (probe > 1 && !chunk_indicator) { + probe--; + probe_line = c.line_elt(probe); + if (!probe_line) { + return; + } + chunk_indicator = c.chunk_indicator(probe_line); + } + + // There's a prev chunk, `probe` points to its last line. + var end = probe+1; + + // Find the beginning of this chunk. + var prev_indicator = chunk_indicator; + while (prev_indicator === chunk_indicator) { + probe--; + if (probe <= 0) { + return; + } + probe_line = c.line_elt(probe); + prev_indicator = c.chunk_indicator(probe_line); + } + c.set_sel(probe+1, end); + c.show_selection(); +}; + +// Returns 0, 1, or 2: how many of the two ends of the selection are on +// the screen right now? +coverage.selection_ends_on_screen = function () { + if (coverage.sel_begin === 0) { + return 0; + } + + const begin = coverage.line_elt(coverage.sel_begin); + const end = coverage.line_elt(coverage.sel_end-1); + + return ( + (checkVisible(begin) ? 1 : 0) + + (checkVisible(end) ? 1 : 0) + ); +}; + +coverage.to_next_chunk_nicely = function () { + if (coverage.selection_ends_on_screen() === 0) { + // The selection is entirely off the screen: + // Set the top line on the screen as selection. + + // This will select the top-left of the viewport + // As this is most likely the span with the line number we take the parent + const line = document.elementFromPoint(0, 0).parentElement; + if (line.parentElement !== document.getElementById("source")) { + // The element is not a source line but the header or similar + coverage.select_line_or_chunk(1); + } else { + // We extract the line number from the id + coverage.select_line_or_chunk(parseInt(line.id.substring(1), 10)); + } + } + coverage.to_next_chunk(); +}; + +coverage.to_prev_chunk_nicely = function () { + if (coverage.selection_ends_on_screen() === 0) { + // The selection is entirely off the screen: + // Set the lowest line on the screen as selection. + + // This will select the bottom-left of the viewport + // As this is most likely the span with the line number we take the parent + const line = document.elementFromPoint(document.documentElement.clientHeight-1, 0).parentElement; + if (line.parentElement !== document.getElementById("source")) { + // The element is not a source line but the header or similar + coverage.select_line_or_chunk(coverage.lines_len); + } else { + // We extract the line number from the id + coverage.select_line_or_chunk(parseInt(line.id.substring(1), 10)); + } + } + coverage.to_prev_chunk(); +}; + +// Select line number lineno, or if it is in a colored chunk, select the +// entire chunk +coverage.select_line_or_chunk = function (lineno) { + var c = coverage; + var probe_line = c.line_elt(lineno); + if (!probe_line) { + return; + } + var the_indicator = c.chunk_indicator(probe_line); + if (the_indicator) { + // The line is in a highlighted chunk. + // Search backward for the first line. + var probe = lineno; + var indicator = the_indicator; + while (probe > 0 && indicator === the_indicator) { + probe--; + probe_line = c.line_elt(probe); + if (!probe_line) { + break; + } + indicator = c.chunk_indicator(probe_line); + } + var begin = probe + 1; + + // Search forward for the last line. + probe = lineno; + indicator = the_indicator; + while (indicator === the_indicator) { + probe++; + probe_line = c.line_elt(probe); + indicator = c.chunk_indicator(probe_line); + } + + coverage.set_sel(begin, probe); + } + else { + coverage.set_sel(lineno); + } +}; + +coverage.show_selection = function () { + // Highlight the lines in the chunk + document.querySelectorAll("#source .highlight").forEach(e => e.classList.remove("highlight")); + for (let probe = coverage.sel_begin; probe < coverage.sel_end; probe++) { + coverage.line_elt(probe).querySelector(".n").classList.add("highlight"); + } + + coverage.scroll_to_selection(); +}; + +coverage.scroll_to_selection = function () { + // Scroll the page if the chunk isn't fully visible. + if (coverage.selection_ends_on_screen() < 2) { + const element = coverage.line_elt(coverage.sel_begin); + coverage.scroll_window(element.offsetTop - 60); + } +}; + +coverage.scroll_window = function (to_pos) { + window.scroll({top: to_pos, behavior: "smooth"}); +}; + +coverage.init_scroll_markers = function () { + // Init some variables + coverage.lines_len = document.querySelectorAll("#source > p").length; + + // Build html + coverage.build_scroll_markers(); +}; + +coverage.build_scroll_markers = function () { + const temp_scroll_marker = document.getElementById("scroll_marker") + if (temp_scroll_marker) temp_scroll_marker.remove(); + // Don't build markers if the window has no scroll bar. + if (document.body.scrollHeight <= window.innerHeight) { + return; + } + + const marker_scale = window.innerHeight / document.body.scrollHeight; + const line_height = Math.min(Math.max(3, window.innerHeight / coverage.lines_len), 10); + + let previous_line = -99, last_mark, last_top; + + const scroll_marker = document.createElement("div"); + scroll_marker.id = "scroll_marker"; + document.getElementById("source").querySelectorAll( + "p.show_run, p.show_mis, p.show_exc, p.show_exc, p.show_par" + ).forEach(element => { + const line_top = Math.floor(element.offsetTop * marker_scale); + const line_number = parseInt(element.querySelector(".n a").id.substr(1)); + + if (line_number === previous_line + 1) { + // If this solid missed block just make previous mark higher. + last_mark.style.height = `${line_top + line_height - last_top}px`; + } else { + // Add colored line in scroll_marker block. + last_mark = document.createElement("div"); + last_mark.id = `m${line_number}`; + last_mark.classList.add("marker"); + last_mark.style.height = `${line_height}px`; + last_mark.style.top = `${line_top}px`; + scroll_marker.append(last_mark); + last_top = line_top; + } + + previous_line = line_number; + }); + + // Append last to prevent layout calculation + document.body.append(scroll_marker); +}; + +coverage.wire_up_sticky_header = function () { + const header = document.querySelector("header"); + const header_bottom = ( + header.querySelector(".content h2").getBoundingClientRect().top - + header.getBoundingClientRect().top + ); + + function updateHeader() { + if (window.scrollY > header_bottom) { + header.classList.add("sticky"); + } else { + header.classList.remove("sticky"); + } + } + + window.addEventListener("scroll", updateHeader); + updateHeader(); +}; + +coverage.expand_contexts = function (e) { + var ctxs = e.target.parentNode.querySelector(".ctxs"); + + if (!ctxs.classList.contains("expanded")) { + var ctxs_text = ctxs.textContent; + var width = Number(ctxs_text[0]); + ctxs.textContent = ""; + for (var i = 1; i < ctxs_text.length; i += width) { + key = ctxs_text.substring(i, i + width).trim(); + ctxs.appendChild(document.createTextNode(contexts[key])); + ctxs.appendChild(document.createElement("br")); + } + ctxs.classList.add("expanded"); + } +}; + +document.addEventListener("DOMContentLoaded", () => { + if (document.body.classList.contains("indexfile")) { + coverage.index_ready(); + } else { + coverage.pyfile_ready(); + } +}); diff --git a/coverage/d_bb657af29d23493a_Attributes_py.html b/coverage/d_bb657af29d23493a_Attributes_py.html new file mode 100644 index 00000000..7234a794 --- /dev/null +++ b/coverage/d_bb657af29d23493a_Attributes_py.html @@ -0,0 +1,152 @@ + + + + ++ « prev + ^ index + » next + + coverage.py v7.3.0, + created at 2023-08-13 23:53 +0000 +
+ +1# ==================================================================================================================== #
+2# _____ ____ _ _ ____ _ _ __ __ _ _ #
+3# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+4# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+5# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+6# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+7# |_| |___/ |__/ #
+8# ==================================================================================================================== #
+9# Authors: #
+10# Patrick Lehmann #
+11# #
+12# License: #
+13# ==================================================================================================================== #
+14# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+15# #
+16# Licensed under the Apache License, Version 2.0 (the "License"); #
+17# you may not use this file except in compliance with the License. #
+18# You may obtain a copy of the License at #
+19# #
+20# http://www.apache.org/licenses/LICENSE-2.0 #
+21# #
+22# Unless required by applicable law or agreed to in writing, software #
+23# distributed under the License is distributed on an "AS IS" BASIS, #
+24# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+25# See the License for the specific language governing permissions and #
+26# limitations under the License. #
+27# #
+28# SPDX-License-Identifier: Apache-2.0 #
+29# ==================================================================================================================== #
+30#
+31"""A set of common attributes to store meta information on ProjectModel entities (project, design, fileset, file, ...)."""
+32from typing import Dict
+33from pyTooling.Decorators import export
+ +35from pyEDAA.ProjectModel import Attribute
+ + +38@export
+39class KeyValueAttribute(Attribute):
+40 KEY = "ID"
+ +42 _keyValuePairs: Dict[str, str]
+ +44 def __init__(self):
+45 super().__init__()
+ +47 self._keyValuePairs = {}
+ +49 def __getitem__(self, item: str) -> str:
+50 return self._keyValuePairs[item]
+ +52 def __setitem__(self, key: str, value: str) -> None:
+53 self._keyValuePairs[key] = value
++ « prev + ^ index + » next + + coverage.py v7.3.0, + created at 2023-08-13 23:53 +0000 +
+ +1# ==================================================================================================================== #
+2# _____ ____ _ _ ____ _ _ __ __ _ _ #
+3# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+4# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+5# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+6# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+7# |_| |___/ |__/ #
+8# ==================================================================================================================== #
+9# Authors: #
+10# Patrick Lehmann #
+11# #
+12# License: #
+13# ==================================================================================================================== #
+14# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+15# Copyright 2014-2016 Technische Universität Dresden - Germany, Chair of VLSI-Design, Diagnostics and Architecture #
+16# #
+17# Licensed under the Apache License, Version 2.0 (the "License"); #
+18# you may not use this file except in compliance with the License. #
+19# You may obtain a copy of the License at #
+20# #
+21# http://www.apache.org/licenses/LICENSE-2.0 #
+22# #
+23# Unless required by applicable law or agreed to in writing, software #
+24# distributed under the License is distributed on an "AS IS" BASIS, #
+25# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+26# See the License for the specific language governing permissions and #
+27# limitations under the License. #
+28# #
+29# SPDX-License-Identifier: Apache-2.0 #
+30# ==================================================================================================================== #
+31#
+32"""An abstract model of EDA tool projects."""
+33__author__ = "Patrick Lehmann"
+34__email__ = "Paebbels@gmail.com"
+35__copyright__ = "2014-2023, Patrick Lehmann, Unai Martinez-Corral"
+36__license__ = "Apache License, Version 2.0"
+37__version__ = "0.5.0"
+38__keywords__ = ["eda project", "model", "abstract", "xilinx", "vivado", "osvvm", "file set", "file group", "test bench", "test harness"]
+ +40from os.path import relpath as path_relpath
+41from pathlib import Path as pathlib_Path
+42from typing import Dict, Union, Optional as Nullable, List, Iterable, Generator, Tuple, Any as typing_Any, Type, Set, \
+43 Any
+ +45from pyTooling.Decorators import export
+46from pyTooling.MetaClasses import ExtendedType
+47from pyTooling.Graph import Graph, Vertex
+48from pySVModel import SystemVerilogVersion
+49from pyVHDLModel import VHDLVersion
+50from pySystemRDLModel import SystemRDLVersion
+ + +53@export
+54class Attribute(metaclass=ExtendedType):
+55 KEY: str
+56 VALUE_TYPE: typing_Any
+ +58 @staticmethod
+59 def resolve(obj: typing_Any, key: Type['Attribute']):
+60 if isinstance(obj, File): 60 ↛ 62line 60 didn't jump to line 62, because the condition on line 60 was never false
+61 return obj._fileSet[key]
+62 elif isinstance(obj, FileSet):
+63 return obj._design[key]
+64 elif isinstance(obj, Design):
+65 return obj._project[key]
+66 else:
+67 raise Exception("Resolution error")
+ + +70@export
+71class FileType(ExtendedType):
+72 """
+73 A :term:`meta-class` to construct *FileType* classes.
+ +75 Modifications done by this meta-class:
+76 * Register all classes of type :class:`FileType` or derived variants in a class field :attr:`FileType.FileTypes` in this meta-class.
+77 """
+ +79 FileTypes: Dict[str, 'FileType'] = {} #: Dictionary of all classes of type :class:`FileType` or derived variants
+80 Any: 'FileType'
+ +82 def __init__(cls, name: str, bases: Tuple[type, ...], dictionary: Dict[str, typing_Any], **kwargs):
+83 super().__init__(name, bases, dictionary, **kwargs)
+84 cls.Any = cls
+ +86 def __new__(cls, className, baseClasses, classMembers: Dict, *args, **kwargs):
+87 fileType = super().__new__(cls, className, baseClasses, classMembers, *args, **kwargs)
+88 cls.FileTypes[className] = fileType
+89 return fileType
+ +91 def __getattr__(cls, item) -> 'FileType':
+92 if item[:2] != "__" and item[-2:] != "__":
+93 return cls.FileTypes[item]
+94 else:
+95 return super().__getattribute__(item)
+ +97 def __contains__(cls, item) -> bool:
+98 return issubclass(item, cls)
+ + +101@export
+102class File(metaclass=FileType, slots=True):
+103 """
+104 A :term:`File` represents a file in a design. This :term:`base-class` is used
+105 for all derived file classes.
+ +107 A file can be created standalone and later associated to a fileset, design and
+108 project. Or a fileset, design and/or project can be associated immediately
+109 while creating a file.
+ +111 :arg path: Relative or absolute path to the file.
+112 :arg project: Project the file is associated with.
+113 :arg design: Design the file is associated with.
+114 :arg fileSet: Fileset the file is associated with.
+115 """
+ +117 _path: pathlib_Path
+118 _fileType: 'FileType'
+119 _project: Nullable['Project']
+120 _design: Nullable['Design']
+121 _fileSet: Nullable['FileSet']
+122 _attributes: Dict[Type[Attribute], typing_Any]
+ +124 def __init__(
+125 self,
+126 path: pathlib_Path,
+127 project: 'Project' = None,
+128 design: 'Design' = None,
+129 fileSet: 'FileSet' = None
+130 ):
+131 self._fileType = getattr(FileTypes, self.__class__.__name__)
+132 self._path = path
+133 if project is not None:
+134 self._project = project
+135 self._design = design
+136 if fileSet is not None: 136 ↛ 137line 136 didn't jump to line 137, because the condition on line 136 was never true
+137 self.FileSet = fileSet
+138 elif design is not None:
+139 self._project = design._project
+140 self._design = design
+141 self.FileSet = design.DefaultFileSet if fileSet is None else fileSet
+142 elif fileSet is not None:
+143 design = fileSet._design
+144 if design is not None:
+145 self._project = design._project
+146 else:
+147 self._project = None
+148 self._design = design
+149 self.FileSet = fileSet
+150 else:
+151 self._project = None
+152 self._design = None
+153 self._fileSet = None
+ +155 self._attributes = {}
+156 self._registerAttributes()
+ +158 def _registerAttributes(self):
+159 pass
+ +161 @property
+162 def FileType(self) -> 'FileType':
+163 """Read-only property to return the file type of this file."""
+164 return self._fileType
+ +166 @property
+167 def Path(self) -> pathlib_Path:
+168 """Read-only property returning the path of this file."""
+169 return self._path
+ +171 # TODO: setter?
+ +173 @property
+174 def ResolvedPath(self) -> pathlib_Path:
+175 """Read-only property returning the resolved path of this file."""
+176 if self._path.is_absolute(): 176 ↛ 177line 176 didn't jump to line 177, because the condition on line 176 was never true
+177 return self._path.resolve()
+178 elif self._fileSet is not None: 178 ↛ 188line 178 didn't jump to line 188, because the condition on line 178 was never false
+179 path = (self._fileSet.ResolvedPath / self._path).resolve()
+ +181 if path.is_absolute(): 181 ↛ 185line 181 didn't jump to line 185, because the condition on line 181 was never false
+182 return path
+183 else:
+184 # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+185 return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+186 else:
+187 # TODO: message and exception type
+188 raise Exception("")
+ +190 @property
+191 def Project(self) -> Nullable['Project']:
+192 """Property setting or returning the project this file is used in."""
+193 return self._project
+ +195 @Project.setter
+196 def Project(self, value: 'Project') -> None:
+197 self._project = value
+ +199 if self._fileSet is None: 199 ↛ exitline 199 didn't return from function 'Project', because the condition on line 199 was never false
+200 self._project.DefaultDesign.DefaultFileSet.AddFile(self)
+ +202 @property
+203 def Design(self) -> Nullable['Design']:
+204 """Property setting or returning the design this file is used in."""
+205 return self._design
+ +207 @Design.setter
+208 def Design(self, value: 'Design') -> None:
+209 self._design = value
+ +211 if self._fileSet is None: 211 ↛ 214line 211 didn't jump to line 214, because the condition on line 211 was never false
+212 self._design.DefaultFileSet.AddFile(self)
+ +214 if self._project is None: 214 ↛ 216line 214 didn't jump to line 216, because the condition on line 214 was never false
+215 self._project = value._project
+216 elif self._project is not value._project:
+217 raise Exception("The design's project is not identical to the already assigned project.")
+ +219 @property
+220 def FileSet(self) -> Nullable['FileSet']:
+221 """Property setting or returning the fileset this file is used in."""
+222 return self._fileSet
+ +224 @FileSet.setter
+225 def FileSet(self, value: 'FileSet') -> None:
+226 self._fileSet = value
+227 value._files.append(self)
+ +229 def Validate(self):
+230 """Validate this file."""
+231 if self._path is None: 231 ↛ 232line 231 didn't jump to line 232, because the condition on line 231 was never true
+232 raise Exception("Validation: File has no path.")
+233 try:
+234 path = self.ResolvedPath
+235 except Exception as ex:
+236 raise Exception(f"Validation: File '{self._path}' could not compute resolved path.") from ex
+237 if not path.exists(): 237 ↛ 238line 237 didn't jump to line 238, because the condition on line 237 was never true
+238 raise Exception(f"Validation: File '{self._path}' (={path}) does not exist.")
+239 if not path.is_file(): 239 ↛ 240line 239 didn't jump to line 240, because the condition on line 239 was never true
+240 raise Exception(f"Validation: File '{self._path}' (={path}) is not a file.")
+ +242 if self._fileSet is None: 242 ↛ 243line 242 didn't jump to line 243, because the condition on line 242 was never true
+243 raise Exception(f"Validation: File '{self._path}' has no fileset.")
+244 if self._design is None: 244 ↛ 245line 244 didn't jump to line 245, because the condition on line 244 was never true
+245 raise Exception(f"Validation: File '{self._path}' has no design.")
+246 if self._project is None: 246 ↛ 247line 246 didn't jump to line 247, because the condition on line 246 was never true
+247 raise Exception(f"Validation: File '{self._path}' has no project.")
+ +249 def __len__(self) -> int:
+250 return len(self._attributes)
+ +252 def __getitem__(self, key: Type[Attribute]) -> Any:
+253 """Index access for returning attributes on this file."""
+254 if not issubclass(key, Attribute): 254 ↛ 255line 254 didn't jump to line 255, because the condition on line 254 was never true
+255 raise TypeError("Parameter 'key' is not an 'Attribute'.")
+ +257 try:
+258 return self._attributes[key]
+259 except KeyError:
+260 return key.resolve(self, key)
+ +262 def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+263 """Index access for setting attributes on this file."""
+264 if not issubclass(key, Attribute): 264 ↛ 265line 264 didn't jump to line 265, because the condition on line 264 was never true
+265 raise TypeError("Parameter 'key' is not an 'Attribute'.")
+ +267 self._attributes[key] = value
+ + +270FileTypes = File
+ + +273@export
+274class HumanReadableContent(metaclass=ExtendedType, mixin=True):
+275 """A file type representing human-readable contents."""
+ + +278@export
+279class XMLContent(HumanReadableContent, mixin=True):
+280 """A file type representing XML contents."""
+ + +283@export
+284class YAMLContent(HumanReadableContent, mixin=True):
+285 """A file type representing YAML contents."""
+ + +288@export
+289class JSONContent(HumanReadableContent, mixin=True):
+290 """A file type representing JSON contents."""
+ + +293@export
+294class INIContent(HumanReadableContent, mixin=True):
+295 """A file type representing INI contents."""
+ + +298@export
+299class TOMLContent(HumanReadableContent, mixin=True):
+300 """A file type representing TOML contents."""
+ + +303@export
+304class TCLContent(HumanReadableContent, mixin=True):
+305 """A file type representing content in TCL code."""
+ + +308@export
+309class SDCContent(TCLContent, mixin=True):
+310 """A file type representing contents as Synopsys Design Constraints (SDC)."""
+ + +313@export
+314class PythonContent(HumanReadableContent, mixin=True):
+315 """A file type representing contents as Python source code."""
+ + +318@export
+319class TextFile(File, HumanReadableContent):
+320 """A text file (``*.txt``)."""
+ + +323@export
+324class LogFile(File, HumanReadableContent):
+325 """A log file (``*.log``)."""
+ + +328@export
+329class XMLFile(File, XMLContent):
+330 """An XML file (``*.xml``)."""
+ + +333@export
+334class SourceFile(File):
+335 """Base-class of all source files."""
+ + +338@export
+339class HDLSourceFile(SourceFile):
+340 """Base-class of all HDL source files."""
+ + +343@export
+344class RDLSourceFile(SourceFile):
+345 """Base-class of all RDL source files."""
+ + +348@export
+349class NetlistFile(SourceFile):
+350 """Base-class of all netlist source files."""
+ + +353@export
+354class EDIFNetlistFile(NetlistFile):
+355 """Netlist file in EDIF (Electronic Design Interchange Format)."""
+ + +358@export
+359class TCLSourceFile(SourceFile, TCLContent):
+360 """A TCL source file."""
+ + +363@export
+364class VHDLSourceFile(HDLSourceFile, HumanReadableContent):
+365 """
+366 A VHDL source file (of any language version).
+ +368 :arg path: Relative or absolute path to the file.
+369 :arg vhdlLibrary: VHDLLibrary this VHDL source file is associated wih.
+370 :arg vhdlVersion: VHDLVersion this VHDL source file is associated wih.
+371 :arg project: Project the file is associated with.
+372 :arg design: Design the file is associated with.
+373 :arg fileSet: Fileset the file is associated with.
+374 """
+ +376 _vhdlLibrary: 'VHDLLibrary'
+377 _vhdlVersion: VHDLVersion
+ +379 def __init__(self, path: pathlib_Path, vhdlLibrary: Union[str, 'VHDLLibrary'] = None, vhdlVersion: VHDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+380 super().__init__(path, project, design, fileSet)
+ +382 if isinstance(vhdlLibrary, str): 382 ↛ 383line 382 didn't jump to line 383, because the condition on line 382 was never true
+383 if design is not None:
+384 try:
+385 vhdlLibrary = design.VHDLLibraries[vhdlLibrary]
+386 except KeyError as ex:
+387 raise Exception(f"VHDL library '{vhdlLibrary}' not found in design '{design.Name}'.") from ex
+388 elif project is not None:
+389 try:
+390 vhdlLibrary = project.DefaultDesign.VHDLLibraries[vhdlLibrary]
+391 except KeyError as ex:
+392 raise Exception(f"VHDL library '{vhdlLibrary}' not found in default design '{project.DefaultDesign.Name}'.") from ex
+393 else:
+394 raise Exception(f"Can't lookup VHDL library because neither 'project' nor 'design' is given as a parameter.")
+395 elif isinstance(vhdlLibrary, VHDLLibrary):
+396 self._vhdlLibrary = vhdlLibrary
+397 vhdlLibrary.AddFile(self)
+398 elif vhdlLibrary is None: 398 ↛ 401line 398 didn't jump to line 401, because the condition on line 398 was never false
+399 self._vhdlLibrary = None
+400 else:
+401 raise TypeError(f"Parameter 'vhdlLibrary' is neither a 'str' nor 'VHDLibrary'.")
+ +403 self._vhdlVersion = vhdlVersion
+ +405 def Validate(self) -> None:
+406 """Validate this VHDL source file."""
+407 super().Validate()
+ +409 try:
+410 _ = self.VHDLLibrary
+411 except Exception as ex:
+412 raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLLibrary assigned.") from ex
+413 try:
+414 _ = self.VHDLVersion
+415 except Exception as ex:
+416 raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLVersion assigned.") from ex
+ +418 @property
+419 def VHDLLibrary(self) -> 'VHDLLibrary':
+420 """Property setting or returning the VHDL library this VHDL source file is used in."""
+421 if self._vhdlLibrary is not None:
+422 return self._vhdlLibrary
+423 elif self._fileSet is not None:
+424 return self._fileSet.VHDLLibrary
+425 else:
+426 raise Exception("VHDLLibrary was neither set locally nor globally.")
+ +428 @VHDLLibrary.setter
+429 def VHDLLibrary(self, value: 'VHDLLibrary') -> None:
+430 self._vhdlLibrary = value
+431 value._files.append(self)
+ +433 @property
+434 def VHDLVersion(self) -> VHDLVersion:
+435 """Property setting or returning the VHDL version this VHDL source file is used in."""
+436 if self._vhdlVersion is not None:
+437 return self._vhdlVersion
+438 elif self._fileSet is not None:
+439 return self._fileSet.VHDLVersion
+440 else:
+441 raise Exception("VHDLVersion was neither set locally nor globally.")
+ +443 @VHDLVersion.setter
+444 def VHDLVersion(self, value: VHDLVersion) -> None:
+445 self._vhdlVersion = value
+ +447 def __repr__(self) -> str:
+448 return f"<VHDL file: '{self.ResolvedPath}'; lib: '{self.VHDLLibrary}'; version: {self.VHDLVersion}>"
+ + +451class VerilogMixIn(metaclass=ExtendedType, mixin=True):
+452 @property
+453 def VerilogVersion(self) -> SystemVerilogVersion:
+454 """Property setting or returning the Verilog version this Verilog source file is used in."""
+455 if self._version is not None:
+456 return self._version
+457 elif self._fileSet is not None:
+458 return self._fileSet.VerilogVersion
+459 else:
+460 raise Exception("VerilogVersion was neither set locally nor globally.")
+ +462 @VerilogVersion.setter
+463 def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+464 self._version = value
+ + +467class SystemVerilogMixIn(metaclass=ExtendedType, mixin=True):
+468 @property
+469 def SVVersion(self) -> SystemVerilogVersion:
+470 """Property setting or returning the SystemVerilog version this SystemVerilog source file is used in."""
+471 if self._version is not None:
+472 return self._version
+473 elif self._fileSet is not None:
+474 return self._fileSet.SVVersion
+475 else:
+476 raise Exception("SVVersion was neither set locally nor globally.")
+ +478 @SVVersion.setter
+479 def SVVersion(self, value: SystemVerilogVersion) -> None:
+480 self._version = value
+ + +483@export
+484class VerilogBaseFile(HDLSourceFile, HumanReadableContent):
+485 _version: SystemVerilogVersion
+ +487 def __init__(self, path: pathlib_Path, version: SystemVerilogVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+488 super().__init__(path, project, design, fileSet)
+ +490 self._version = version
+ + +493@export
+494class VerilogSourceFile(VerilogBaseFile, VerilogMixIn):
+495 """A Verilog source file (of any language version)."""
+ + +498@export
+499class VerilogHeaderFile(VerilogBaseFile, VerilogMixIn):
+500 """A Verilog header file (of any language version)."""
+ + +503@export
+504class SystemVerilogBaseFile(VerilogBaseFile):
+505 ...
+ + +508@export
+509class SystemVerilogSourceFile(SystemVerilogBaseFile, SystemVerilogMixIn):
+510 """A SystemVerilog source file (of any language version)."""
+ + +513@export
+514class SystemVerilogHeaderFile(SystemVerilogBaseFile, SystemVerilogMixIn):
+515 """A SystemVerilog header file (of any language version)."""
+ + +518@export
+519class SystemRDLSourceFile(RDLSourceFile, HumanReadableContent):
+520 """A SystemRDL source file (of any language version)."""
+ +522 _srdlVersion: SystemRDLVersion
+ +524 def __init__(self, path: pathlib_Path, srdlVersion: SystemRDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None):
+525 super().__init__(path, project, design, fileSet)
+ +527 self._srdlVersion = srdlVersion
+ +529 @property
+530 def SystemRDLVersion(self) -> SystemRDLVersion:
+531 """Property setting or returning the SystemRDL version this SystemRDL source file is used in."""
+532 if self._srdlVersion is not None:
+533 return self._srdlVersion
+534 elif self._fileSet is not None:
+535 return self._fileSet.SRDLVersion
+536 else:
+537 raise Exception("SRDLVersion was neither set locally nor globally.")
+ +539 @SystemRDLVersion.setter
+540 def SystemRDLVersion(self, value: SystemRDLVersion) -> None:
+541 self._srdlVersion = value
+ + +544@export
+545class PythonSourceFile(SourceFile, PythonContent):
+546 """A Python source file."""
+ + +549# TODO: move to a Cocotb module
+550@export
+551class CocotbPythonFile(PythonSourceFile):
+552 """A Python source file used by Cocotb."""
+ + +555@export
+556class ConstraintFile(File, HumanReadableContent):
+557 """Base-class of all constraint files."""
+ + +560@export
+561class ProjectFile(File):
+562 """Base-class of all tool-specific project files."""
+ + +565@export
+566class CSourceFile(SourceFile):
+567 """Base-class of all ANSI-C source files."""
+ + +570@export
+571class CppSourceFile(SourceFile):
+572 """Base-class of all ANSI-C++ source files."""
+ + +575@export
+576class SettingFile(File):
+577 """Base-class of all tool-specific setting files."""
+ + +580@export
+581class SimulationAnalysisFile(File):
+582 """Base-class of all tool-specific analysis files."""
+ + +585@export
+586class SimulationElaborationFile(File):
+587 """Base-class of all tool-specific elaboration files."""
+ + +590@export
+591class SimulationStartFile(File):
+592 """Base-class of all tool-specific simulation start-up files."""
+ + +595@export
+596class SimulationRunFile(File):
+597 """Base-class of all tool-specific simulation run (execution) files."""
+ + +600@export
+601class WaveformConfigFile(File):
+602 """Base-class of all tool-specific waveform configuration files."""
+ + +605@export
+606class WaveformDatabaseFile(File):
+607 """Base-class of all tool-specific waveform database files."""
+ + +610@export
+611class WaveformExchangeFile(File):
+612 """Base-class of all tool-independent waveform exchange files."""
+ + +615@export
+616class FileSet(metaclass=ExtendedType, slots=True):
+617 """
+618 A :term:`FileSet` represents a group of files. Filesets can have sub-filesets.
+ +620 The order of insertion is preserved. A fileset can be created standalone and
+621 later associated to another fileset, design and/or project. Or a fileset,
+622 design and/or project can be associated immediately while creating the
+623 fileset.
+ +625 :arg name: Name of this fileset.
+626 :arg topLevel: Name of the fileset's toplevel.
+627 :arg directory: Path of this fileset (absolute or relative to a parent fileset or design).
+628 :arg project: Project the file is associated with.
+629 :arg design: Design the file is associated with.
+630 :arg parent: Parent fileset if this fileset is nested.
+631 :arg vhdlLibrary: Default VHDL library for files in this fileset, if not specified for the file itself.
+632 :arg vhdlVersion: Default VHDL version for files in this fileset, if not specified for the file itself.
+633 :arg verilogVersion: Default Verilog version for files in this fileset, if not specified for the file itself.
+634 :arg svVersion: Default SystemVerilog version for files in this fileset, if not specified for the file itself.
+635 :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself.
+636 """
+ +638 _name: str
+639 _topLevel: Nullable[str]
+640 _project: Nullable['Project']
+641 _design: Nullable['Design']
+642 _directory: pathlib_Path
+643 _parent: Nullable['FileSet']
+644 _fileSets: Dict[str, 'FileSet']
+645 _files: List[File]
+646 _set: Set
+647 _attributes: Dict[Type[Attribute], typing_Any]
+648 _vhdlLibraries: Dict[str, 'VHDLLibrary']
+649 _vhdlLibrary: 'VHDLLibrary'
+650 _vhdlVersion: VHDLVersion
+651 _verilogVersion: SystemVerilogVersion
+652 _svVersion: SystemVerilogVersion
+653 _srdlVersion: SystemRDLVersion
+ +655 def __init__(
+656 self,
+657 name: str,
+658 topLevel: str = None,
+659 directory: pathlib_Path = pathlib_Path("."),
+660 project: 'Project' = None,
+661 design: 'Design' = None,
+662 parent: Nullable['FileSet'] = None,
+663 vhdlLibrary: Union[str, 'VHDLLibrary'] = None,
+664 vhdlVersion: VHDLVersion = None,
+665 verilogVersion: SystemVerilogVersion = None,
+666 svVersion: SystemVerilogVersion = None,
+667 srdlVersion: SystemRDLVersion = None
+668 ):
+669 self._name = name
+670 self._topLevel = topLevel
+671 if project is not None:
+672 self._project = project
+673 self._design = design if design is not None else project.DefaultDesign
+ +675 elif design is not None:
+676 self._project = design._project
+677 self._design = design
+678 else:
+679 self._project = None
+680 self._design = None
+681 self._directory = directory
+682 self._parent = parent
+683 self._fileSets = {}
+684 self._files = []
+685 self._set = set()
+ +687 if design is not None:
+688 design._fileSets[name] = self
+ +690 self._attributes = {}
+691 self._vhdlLibraries = {}
+ +693 # TODO: handle if vhdlLibrary is a string
+694 self._vhdlLibrary = vhdlLibrary
+695 self._vhdlVersion = vhdlVersion
+696 self._verilogVersion = verilogVersion
+697 self._svVersion = svVersion
+698 self._srdlVersion = srdlVersion
+ +700 @property
+701 def Name(self) -> str:
+702 """Property setting or returning the fileset's name."""
+703 return self._name
+ +705 @Name.setter
+706 def Name(self, value: str) -> None:
+707 self._name = value
+ +709 @property
+710 def TopLevel(self) -> str:
+711 """Property setting or returning the fileset's toplevel."""
+712 return self._topLevel
+ +714 @TopLevel.setter
+715 def TopLevel(self, value: str) -> None:
+716 self._topLevel = value
+ +718 @property
+719 def Project(self) -> Nullable['Project']:
+720 """Property setting or returning the project this fileset is used in."""
+721 return self._project
+ +723 @Project.setter
+724 def Project(self, value: 'Project') -> None:
+725 self._project = value
+ +727 @property
+728 def Design(self) -> Nullable['Design']:
+729 """Property setting or returning the design this fileset is used in."""
+730 if self._design is not None:
+731 return self._design
+732 elif self._parent is not None: 732 ↛ 733line 732 didn't jump to line 733, because the condition on line 732 was never true
+733 return self._parent.Design
+734 else:
+735 return None
+736 # TODO: raise exception instead
+737 # QUESTION: how to handle if design and parent is set?
+ +739 @Design.setter
+740 def Design(self, value: 'Design') -> None:
+741 self._design = value
+742 if self._project is None: 742 ↛ 744line 742 didn't jump to line 744, because the condition on line 742 was never false
+743 self._project = value._project
+744 elif self._project is not value._project:
+745 raise Exception("The design's project is not identical to the already assigned project.")
+ +747 @property
+748 def Directory(self) -> pathlib_Path:
+749 """Property setting or returning the directory this fileset is located in."""
+750 return self._directory
+ +752 @Directory.setter
+753 def Directory(self, value: pathlib_Path) -> None:
+754 self._directory = value
+ +756 @property
+757 def ResolvedPath(self) -> pathlib_Path:
+758 """Read-only property returning the resolved path of this fileset."""
+759 if self._directory.is_absolute(): 759 ↛ 760line 759 didn't jump to line 760, because the condition on line 759 was never true
+760 return self._directory.resolve()
+761 else:
+762 if self._parent is not None: 762 ↛ 763line 762 didn't jump to line 763, because the condition on line 762 was never true
+763 directory = self._parent.ResolvedPath
+764 elif self._design is not None: 764 ↛ 766line 764 didn't jump to line 766, because the condition on line 764 was never false
+765 directory = self._design.ResolvedPath
+766 elif self._project is not None:
+767 directory = self._project.ResolvedPath
+768 else:
+769 # TODO: message and exception type
+770 raise Exception("")
+ +772 directory = (directory / self._directory).resolve()
+773 if directory.is_absolute(): 773 ↛ 777line 773 didn't jump to line 777, because the condition on line 773 was never false
+774 return directory
+775 else:
+776 # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+777 return pathlib_Path(path_relpath(directory, pathlib_Path.cwd()))
+ +779 @property
+780 def Parent(self) -> Nullable['FileSet']:
+781 """Property setting or returning the parent fileset this fileset is used in."""
+782 return self._parent
+ +784 @Parent.setter
+785 def Parent(self, value: 'FileSet') -> None:
+786 self._parent = value
+787 value._fileSets[self._name] = self
+788 # TODO: check it it already exists
+789 # QUESTION: make an Add fileset method?
+ +791 @property
+792 def FileSets(self) -> Dict[str, 'FileSet']:
+793 """Read-only property returning the dictionary of sub-filesets."""
+794 return self._fileSets
+ +796 def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[bool, str, 'FileSet'] = None) -> Generator[File, None, None]:
+797 """
+798 Method returning the files of this fileset.
+ +800 :arg fileType: A filter for file types. Default: ``Any``.
+801 :arg fileSet: Specifies how to handle sub-filesets.
+802 """
+803 if fileSet is False: 803 ↛ 804line 803 didn't jump to line 804, because the condition on line 803 was never true
+804 for file in self._files:
+805 if file.FileType in fileType:
+806 yield file
+807 elif fileSet is None: 807 ↛ 815line 807 didn't jump to line 815, because the condition on line 807 was never false
+808 for fileSet in self._fileSets.values(): 808 ↛ 809line 808 didn't jump to line 809, because the loop on line 808 never started
+809 for file in fileSet.Files(fileType):
+810 yield file
+811 for file in self._files:
+812 if file.FileType in fileType:
+813 yield file
+814 else:
+815 if isinstance(fileSet, str):
+816 fileSetName = fileSet
+817 try:
+818 fileSet = self._fileSets[fileSetName]
+819 except KeyError as ex:
+820 raise Exception(f"Fileset {fileSetName} not bound to fileset {self.Name}.") from ex
+821 elif not isinstance(fileSet, FileSet):
+822 raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.")
+ +824 for file in fileSet.Files(fileType):
+825 yield file
+ +827 def AddFileSet(self, fileSet: "FileSet") -> None:
+828 """
+829 Method to add a single sub-fileset to this fileset.
+ +831 :arg fileSet: A fileset to add to this fileset as sub-fileset.
+832 """
+833 if not isinstance(fileSet, FileSet): 833 ↛ 834line 833 didn't jump to line 834, because the condition on line 833 was never true
+834 raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.")
+835 elif fileSet in self._fileSets: 835 ↛ 836line 835 didn't jump to line 836, because the condition on line 835 was never true
+836 raise Exception("Sub-fileset already contains this fileset.")
+837 elif fileSet.Name in self._fileSets.keys(): 837 ↛ 838line 837 didn't jump to line 838, because the condition on line 837 was never true
+838 raise Exception(f"Fileset already contains a sub-fileset named '{fileSet.Name}'.")
+ +840 self._fileSets[fileSet.Name] = fileSet
+841 fileSet._parent = self
+ +843 def AddFileSets(self, fileSets: Iterable["FileSet"]) -> None:
+844 """
+845 Method to add a multiple sub-filesets to this fileset.
+ +847 :arg fileSets: An iterable of filesets to add each to the fileset.
+848 """
+849 for fileSet in fileSets:
+850 self.AddFileSet(fileSet)
+ +852 @property
+853 def FileSetCount(self) -> int:
+854 """Returns number of file sets excl. sub-filesets."""
+855 return len(self._fileSets)
+ +857 @property
+858 def TotalFileSetCount(self) -> int:
+859 """Returns number of file sets incl. sub-filesets."""
+860 fileSetCount = len(self._fileSets)
+861 for fileSet in self._fileSets.values():
+862 fileSetCount += fileSet.TotalFileSetCount
+ +864 return fileSetCount
+ +866 def AddFile(self, file: File) -> None:
+867 """
+868 Method to add a single file to this fileset.
+ +870 :arg file: A file to add to this fileset.
+871 """
+872 if not isinstance(file, File): 872 ↛ 873line 872 didn't jump to line 873, because the condition on line 872 was never true
+873 raise TypeError("Parameter 'file' is not of type ProjectModel.File.")
+874 elif file._fileSet is not None: 874 ↛ 875line 874 didn't jump to line 875, because the condition on line 874 was never true
+875 ex = ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}'.")
+876 ex.add_note(f"A file can't be assigned to another fileset.")
+877 raise ex
+878 elif file in self._set: 878 ↛ 879line 878 didn't jump to line 879, because the condition on line 878 was never true
+879 ex = ValueError(f"File '{file.Path!s}' is already part of this fileset.")
+880 ex.add_note(f"A file can't be added twice to a fileset.")
+881 raise ex
+ +883 self._files.append(file)
+884 self._set.add(file)
+885 file._fileSet = self
+ +887 def AddFiles(self, files: Iterable[File]) -> None:
+888 """
+889 Method to add a multiple files to this fileset.
+ +891 :arg files: An iterable of files to add each to the fileset.
+892 """
+893 for file in files:
+894 self.AddFile(file)
+ +896 @property
+897 def FileCount(self) -> int:
+898 """Returns number of files excl. sub-filesets."""
+899 return len(self._files)
+ +901 @property
+902 def TotalFileCount(self) -> int:
+903 """Returns number of files incl. the files in sub-filesets."""
+904 fileCount = len(self._files)
+905 for fileSet in self._fileSets.values():
+906 fileCount += fileSet.FileCount
+ +908 return fileCount
+ +910 def Validate(self) -> None:
+911 """Validate this fileset."""
+912 if self._name is None or self._name == "": 912 ↛ 913line 912 didn't jump to line 913, because the condition on line 912 was never true
+913 raise Exception("Validation: FileSet has no name.")
+ +915 if self._directory is None: 915 ↛ 916line 915 didn't jump to line 916, because the condition on line 915 was never true
+916 raise Exception(f"Validation: FileSet '{self._name}' has no directory.")
+917 try:
+918 path = self.ResolvedPath
+919 except Exception as ex:
+920 raise Exception(f"Validation: FileSet '{self._name}' could not compute resolved path.") from ex
+921 if not path.exists(): 921 ↛ 922line 921 didn't jump to line 922, because the condition on line 921 was never true
+922 raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' does not exist.")
+923 if not path.is_dir(): 923 ↛ 924line 923 didn't jump to line 924, because the condition on line 923 was never true
+924 raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' is not a directory.")
+ +926 if self._design is None: 926 ↛ 927line 926 didn't jump to line 927, because the condition on line 926 was never true
+927 raise Exception(f"Validation: FileSet '{self._path}' has no design.")
+928 if self._project is None: 928 ↛ 929line 928 didn't jump to line 929, because the condition on line 928 was never true
+929 raise Exception(f"Validation: FileSet '{self._path}' has no project.")
+ +931 for fileSet in self._fileSets.values(): 931 ↛ 932line 931 didn't jump to line 932, because the loop on line 931 never started
+932 fileSet.Validate()
+933 for file in self._files: 933 ↛ 934line 933 didn't jump to line 934, because the loop on line 933 never started
+934 file.Validate()
+ +936 def __len__(self) -> int:
+937 """Returns number of attributes set on the file set."""
+938 return len(self._attributes)
+ +940 def __getitem__(self, key: Type[Attribute]) -> Any:
+941 """Index access for returning attributes on this file."""
+942 if not issubclass(key, Attribute): 942 ↛ 943line 942 didn't jump to line 943, because the condition on line 942 was never true
+943 raise TypeError("Parameter 'key' is not an 'Attribute'.")
+ +945 try:
+946 return self._attributes[key]
+947 except KeyError:
+948 return key.resolve(self, key)
+ +950 def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+951 """Index access for setting attributes on this file."""
+952 self._attributes[key] = value
+ +954 def GetOrCreateVHDLLibrary(self, name) -> None:
+955 if name in self._vhdlLibraries:
+956 return self._vhdlLibraries[name]
+957 elif name in self._design._vhdlLibraries:
+958 library = self._design._vhdlLibraries[name]
+959 self._vhdlLibraries[name] = library
+960 return library
+961 else:
+962 library = VHDLLibrary(name, design=self._design, vhdlVersion=self._vhdlVersion)
+963 self._vhdlLibraries[name] = library
+964 return library
+ +966 @property
+967 def VHDLLibrary(self) -> 'VHDLLibrary':
+968 """Property setting or returning the VHDL library of this fileset."""
+969 if self._vhdlLibrary is not None:
+970 return self._vhdlLibrary
+971 elif self._parent is not None: 971 ↛ 973line 971 didn't jump to line 973, because the condition on line 971 was never false
+972 return self._parent.VHDLLibrary
+973 elif self._design is not None:
+974 return self._design.VHDLLibrary
+975 else:
+976 raise Exception("VHDLLibrary was neither set locally nor globally.")
+ +978 @VHDLLibrary.setter
+979 def VHDLLibrary(self, value: 'VHDLLibrary') -> None:
+980 self._vhdlLibrary = value
+ +982 @property
+983 def VHDLVersion(self) -> VHDLVersion:
+984 """Property setting or returning the VHDL version of this fileset."""
+985 if self._vhdlVersion is not None:
+986 return self._vhdlVersion
+987 elif self._parent is not None:
+988 return self._parent.VHDLVersion
+989 elif self._design is not None: 989 ↛ 992line 989 didn't jump to line 992, because the condition on line 989 was never false
+990 return self._design.VHDLVersion
+991 else:
+992 raise Exception("VHDLVersion was neither set locally nor globally.")
+ +994 @VHDLVersion.setter
+995 def VHDLVersion(self, value: VHDLVersion) -> None:
+996 self._vhdlVersion = value
+ +998 @property
+999 def VerilogVersion(self) -> SystemVerilogVersion:
+1000 """Property setting or returning the Verilog version of this fileset."""
+1001 if self._verilogVersion is not None:
+1002 return self._verilogVersion
+1003 elif self._parent is not None:
+1004 return self._parent.VerilogVersion
+1005 elif self._design is not None: 1005 ↛ 1008line 1005 didn't jump to line 1008, because the condition on line 1005 was never false
+1006 return self._design.VerilogVersion
+1007 else:
+1008 raise Exception("VerilogVersion was neither set locally nor globally.")
+ +1010 @VerilogVersion.setter
+1011 def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+1012 self._verilogVersion = value
+ +1014 @property
+1015 def SVVersion(self) -> SystemVerilogVersion:
+1016 """Property setting or returning the SystemVerilog version of this fileset."""
+1017 if self._svVersion is not None:
+1018 return self._svVersion
+1019 elif self._parent is not None:
+1020 return self._parent.SVVersion
+1021 elif self._design is not None: 1021 ↛ 1024line 1021 didn't jump to line 1024, because the condition on line 1021 was never false
+1022 return self._design.SVVersion
+1023 else:
+1024 raise Exception("SVVersion was neither set locally nor globally.")
+ +1026 @SVVersion.setter
+1027 def SVVersion(self, value: SystemVerilogVersion) -> None:
+1028 self._svVersion = value
+ +1030 @property
+1031 def SRDLVersion(self) -> SystemRDLVersion:
+1032 if self._srdlVersion is not None:
+1033 return self._srdlVersion
+1034 elif self._parent is not None:
+1035 return self._parent.SRDLVersion
+1036 elif self._design is not None:
+1037 return self._design.SRDLVersion
+1038 else:
+1039 raise Exception("SRDLVersion was neither set locally nor globally.")
+ +1041 @SRDLVersion.setter
+1042 def SRDLVersion(self, value: SystemRDLVersion) -> None:
+1043 self._srdlVersion = value
+ +1045 def __str__(self) -> str:
+1046 """Returns the fileset's name."""
+1047 return self._name
+ + +1050@export
+1051class VHDLLibrary(metaclass=ExtendedType, slots=True):
+1052 """
+1053 A :term:`VHDLLibrary` represents a group of VHDL source files compiled into the same VHDL library.
+ +1055 :arg name: The VHDL libraries' name.
+1056 :arg project: Project the VHDL library is associated with.
+1057 :arg design: Design the VHDL library is associated with.
+1058 :arg vhdlVersion: Default VHDL version for files in this VHDL library, if not specified for the file itself.
+1059 """
+ +1061 _name: str
+1062 _project: Nullable['Project']
+1063 _design: Nullable['Design']
+1064 _files: List[File]
+1065 _vhdlVersion: VHDLVersion
+ +1067 _dependencyNode: Vertex
+ +1069 def __init__(
+1070 self,
+1071 name: str,
+1072 project: 'Project' = None,
+1073 design: 'Design' = None,
+1074 vhdlVersion: VHDLVersion = None
+1075 ):
+1076 self._name = name
+1077 if project is not None:
+1078 self._project = project
+1079 self._design = project._defaultDesign if design is None else design
+1080 self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph)
+ +1082 if name in self._design._vhdlLibraries: 1082 ↛ 1083line 1082 didn't jump to line 1083, because the condition on line 1082 was never true
+1083 raise Exception(f"Library '{name}' already in design '{self._design.Name}'.")
+1084 else:
+1085 self._design._vhdlLibraries[name] = self
+ +1087 elif design is not None:
+1088 self._project = design._project
+1089 self._design = design
+1090 self._dependencyNode = Vertex(value=self, graph=design._vhdlLibraryDependencyGraph)
+ +1092 if name in design._vhdlLibraries: 1092 ↛ 1093line 1092 didn't jump to line 1093, because the condition on line 1092 was never true
+1093 raise Exception(f"Library '{name}' already in design '{design.Name}'.")
+1094 else:
+1095 design._vhdlLibraries[name] = self
+ +1097 else:
+1098 self._project = None
+1099 self._design = None
+1100 self._dependencyNode = None
+ +1102 self._files = []
+1103 self._vhdlVersion = vhdlVersion
+ +1105 @property
+1106 def Name(self) -> str:
+1107 return self._name
+ +1109 @property
+1110 def Project(self) -> Nullable['Project']:
+1111 """Property setting or returning the project this VHDL library is used in."""
+1112 return self._project
+ +1114 @Project.setter
+1115 def Project(self, value: 'Project') -> None:
+1116 if not isinstance(value, Project): 1116 ↛ 1117line 1116 didn't jump to line 1117, because the condition on line 1116 was never true
+1117 raise TypeError("Parameter 'value' is not of type 'Project'.")
+ +1119 if value is None: 1119 ↛ 1121line 1119 didn't jump to line 1121, because the condition on line 1119 was never true
+1120 # TODO: unlink VHDLLibrary from project
+1121 self._project = None
+1122 else:
+1123 self._project = value
+1124 if self._design is None: 1124 ↛ exitline 1124 didn't return from function 'Project', because the condition on line 1124 was never false
+1125 self._design = value._defaultDesign
+ +1127 @property
+1128 def Design(self) -> Nullable['Design']:
+1129 """Property setting or returning the design this VHDL library is used in."""
+1130 return self._design
+ +1132 @Design.setter
+1133 def Design(self, value: 'Design') -> None:
+1134 if not isinstance(value, Design):
+1135 raise TypeError("Parameter 'value' is not of type 'Design'.")
+ +1137 if value is None:
+1138 # TODO: unlink VHDLLibrary from design
+1139 self._design = None
+1140 else:
+1141 if self._design is None:
+1142 self._design = value
+1143 self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph)
+1144 elif self._design is not value:
+1145 # TODO: move VHDLLibrary to other design
+1146 # TODO: create new vertex in dependency graph and remove vertex from old graph
+1147 self._design = value
+1148 else:
+1149 pass
+ +1151 if self._project is None:
+1152 self._project = value._project
+1153 elif self._project is not value._project:
+1154 raise Exception("The design's project is not identical to the already assigned project.")
+ +1156 @property
+1157 def Files(self) -> Generator[File, None, None]:
+1158 """Read-only property to return all files in this VHDL library."""
+1159 for file in self._files:
+1160 yield file
+ +1162 @property
+1163 def VHDLVersion(self) -> VHDLVersion:
+1164 """Property setting or returning the VHDL version of this VHDL library."""
+1165 if self._vhdlVersion is not None:
+1166 return self._vhdlVersion
+1167 elif self._design is not None: 1167 ↛ 1170line 1167 didn't jump to line 1170, because the condition on line 1167 was never false
+1168 return self._design.VHDLVersion
+1169 else:
+1170 raise Exception("VHDLVersion is not set on VHDLLibrary nor parent object.")
+ +1172 @VHDLVersion.setter
+1173 def VHDLVersion(self, value: VHDLVersion) -> None:
+1174 self._vhdlVersion = value
+ +1176 def AddDependency(self, library: 'VHDLLibrary') -> None:
+1177 library.parent = self
+ +1179 def AddFile(self, vhdlFile: VHDLSourceFile) -> None:
+1180 if not isinstance(vhdlFile, VHDLSourceFile): 1180 ↛ 1181line 1180 didn't jump to line 1181, because the condition on line 1180 was never true
+1181 raise TypeError(f"Parameter 'vhdlFile' is not a 'VHDLSourceFile'.")
+ +1183 self._files.append(vhdlFile)
+ +1185 def AddFiles(self, vhdlFiles: Iterable[VHDLSourceFile]) -> None:
+1186 for vhdlFile in vhdlFiles:
+1187 if not isinstance(vhdlFile, VHDLSourceFile):
+1188 raise TypeError(f"Item '{vhdlFile}' in parameter 'vhdlFiles' is not a 'VHDLSourceFile'.")
+ +1190 self._files.append(vhdlFile)
+ +1192 @property
+1193 def FileCount(self) -> int:
+1194 """Returns number of files."""
+1195 return len(self._files)
+ +1197 def __str__(self) -> str:
+1198 """Returns the VHDL library's name."""
+1199 return self._name
+ + +1202@export
+1203class Design(metaclass=ExtendedType, slots=True):
+1204 """
+1205 A :term:`Design` represents a group of filesets and the source files therein.
+ +1207 Each design contains at least one fileset - the :term:`default fileset`. For
+1208 designs with VHDL source files, a independent `VHDLLibraries` overlay structure
+1209 exists.
+ +1211 :arg name: The design's name.
+1212 :arg topLevel: Name of the design's toplevel.
+1213 :arg directory: Path of this design (absolute or relative to the project).
+1214 :arg project: Project the design is associated with.
+1215 :arg vhdlVersion: Default VHDL version for files in this design, if not specified for the file itself.
+1216 :arg verilogVersion: Default Verilog version for files in this design, if not specified for the file itself.
+1217 :arg svVersion: Default SystemVerilog version for files in this design, if not specified for the file itself.
+1218 :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself.
+1219 """
+ +1221 _name: str
+1222 _topLevel: Nullable[str]
+1223 _project: Nullable['Project']
+1224 _directory: pathlib_Path
+1225 _fileSets: Dict[str, FileSet]
+1226 _defaultFileSet: Nullable[FileSet]
+1227 _attributes: Dict[Type[Attribute], typing_Any]
+ +1229 _vhdlLibraries: Dict[str, VHDLLibrary]
+1230 _vhdlVersion: VHDLVersion
+1231 _verilogVersion: SystemVerilogVersion
+1232 _svVersion: SystemVerilogVersion
+1233 _srdlVersion: SystemRDLVersion
+1234 _externalVHDLLibraries: List
+ +1236 _vhdlLibraryDependencyGraph: Graph
+1237 _fileDependencyGraph: Graph
+ +1239 def __init__(
+1240 self,
+1241 name: str,
+1242 topLevel: str = None,
+1243 directory: pathlib_Path = pathlib_Path("."),
+1244 project: 'Project' = None,
+1245 vhdlVersion: VHDLVersion = None,
+1246 verilogVersion: SystemVerilogVersion = None,
+1247 svVersion: SystemVerilogVersion = None,
+1248 srdlVersion: SystemRDLVersion = None
+1249 ):
+1250 self._name = name
+1251 self._topLevel = topLevel
+1252 self._project = project
+1253 if project is not None:
+1254 project._designs[name] = self
+1255 self._directory = directory
+1256 self._fileSets = {}
+1257 self._defaultFileSet = FileSet("default", project=project, design=self)
+1258 self._attributes = {}
+1259 self._vhdlLibraries = {}
+1260 self._vhdlVersion = vhdlVersion
+1261 self._verilogVersion = verilogVersion
+1262 self._svVersion = svVersion
+1263 self._srdlVersion = srdlVersion
+1264 self._externalVHDLLibraries = []
+ +1266 self._vhdlLibraryDependencyGraph = Graph()
+1267 self._fileDependencyGraph = Graph()
+ +1269 @property
+1270 def Name(self) -> str:
+1271 """Property setting or returning the design's name."""
+1272 return self._name
+ +1274 @Name.setter
+1275 def Name(self, value: str) -> None:
+1276 self._name = value
+ +1278 @property
+1279 def TopLevel(self) -> str:
+1280 """Property setting or returning the fileset's toplevel."""
+1281 return self._topLevel
+ +1283 @TopLevel.setter
+1284 def TopLevel(self, value: str) -> None:
+1285 self._topLevel = value
+ +1287 @property
+1288 def Project(self) -> Nullable['Project']:
+1289 """Property setting or returning the project this design is used in."""
+1290 return self._project
+ +1292 @Project.setter
+1293 def Project(self, value: 'Project') -> None:
+1294 self._project = value
+ +1296 @property
+1297 def Directory(self) -> pathlib_Path:
+1298 """Property setting or returning the directory this design is located in."""
+1299 return self._directory
+ +1301 @Directory.setter
+1302 def Directory(self, value: pathlib_Path) -> None:
+1303 self._directory = value
+ +1305 @property
+1306 def ResolvedPath(self) -> pathlib_Path:
+1307 """Read-only property returning the resolved path of this fileset."""
+1308 if self._directory.is_absolute(): 1308 ↛ 1309line 1308 didn't jump to line 1309, because the condition on line 1308 was never true
+1309 return self._directory.resolve()
+1310 elif self._project is not None: 1310 ↛ 1320line 1310 didn't jump to line 1320, because the condition on line 1310 was never false
+1311 path = (self._project.ResolvedPath / self._directory).resolve()
+ +1313 if path.is_absolute(): 1313 ↛ 1317line 1313 didn't jump to line 1317, because the condition on line 1313 was never false
+1314 return path
+1315 else:
+1316 # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+1317 return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+1318 else:
+1319 # TODO: message and exception type
+1320 raise Exception("")
+ +1322 @property
+1323 def DefaultFileSet(self) -> FileSet:
+1324 """Property setting or returning the default fileset of this design."""
+1325 return self._defaultFileSet
+ +1327 @DefaultFileSet.setter
+1328 def DefaultFileSet(self, value: Union[str, FileSet]) -> None:
+1329 if isinstance(value, str):
+1330 if value not in self._fileSets.keys():
+1331 raise Exception(f"Fileset '{value}' is not in this design.")
+ +1333 self._defaultFileSet = self._fileSets[value]
+1334 elif isinstance(value, FileSet):
+1335 if value not in self.FileSets:
+1336 raise Exception(f"Fileset '{value}' is not associated to this design.")
+ +1338 self._defaultFileSet = value
+1339 else:
+1340 raise ValueError("Unsupported parameter type for 'value'.")
+ +1342 # TODO: return generator with another method
+1343 @property
+1344 def FileSets(self) -> Dict[str, FileSet]:
+1345 """Read-only property returning the dictionary of filesets."""
+1346 return self._fileSets
+ +1348 def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[str, FileSet] = None) -> Generator[File, None, None]:
+1349 """
+1350 Method returning the files of this design.
+ +1352 :arg fileType: A filter for file types. Default: ``Any``.
+1353 :arg fileSet: Specifies if all files from all filesets (``fileSet=None``) are files from a single fileset are returned.
+1354 """
+1355 if fileSet is None:
+1356 for fileSet in self._fileSets.values():
+1357 for file in fileSet.Files(fileType):
+1358 yield file
+1359 else:
+1360 if isinstance(fileSet, str): 1360 ↛ 1365line 1360 didn't jump to line 1365, because the condition on line 1360 was never false
+1361 try:
+1362 fileSet = self._fileSets[fileSet]
+1363 except KeyError as ex:
+1364 raise Exception(f"Fileset {fileSet.Name} not bound to design {self.Name}.") from ex
+1365 elif not isinstance(fileSet, FileSet):
+1366 raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.")
+ +1368 for file in fileSet.Files(fileType):
+1369 yield file
+ + + +1373 def Validate(self) -> None:
+1374 """Validate this design."""
+1375 if self._name is None or self._name == "": 1375 ↛ 1376line 1375 didn't jump to line 1376, because the condition on line 1375 was never true
+1376 raise Exception("Validation: Design has no name.")
+ +1378 if self._directory is None: 1378 ↛ 1379line 1378 didn't jump to line 1379, because the condition on line 1378 was never true
+1379 raise Exception(f"Validation: Design '{self._name}' has no directory.")
+1380 try:
+1381 path = self.ResolvedPath
+1382 except Exception as ex:
+1383 raise Exception(f"Validation: Design '{self._name}' could not compute resolved path.") from ex
+1384 if not path.exists(): 1384 ↛ 1385line 1384 didn't jump to line 1385, because the condition on line 1384 was never true
+1385 raise Exception(f"Validation: Design '{self._name}'s directory '{path}' does not exist.")
+1386 if not path.is_dir(): 1386 ↛ 1387line 1386 didn't jump to line 1387, because the condition on line 1386 was never true
+1387 raise Exception(f"Validation: Design '{self._name}'s directory '{path}' is not a directory.")
+ +1389 if len(self._fileSets) == 0: 1389 ↛ 1390line 1389 didn't jump to line 1390, because the condition on line 1389 was never true
+1390 raise Exception(f"Validation: Design '{self._name}' has no fileset.")
+1391 try:
+1392 if self._defaultFileSet is not self._fileSets[self._defaultFileSet.Name]: 1392 ↛ 1393line 1392 didn't jump to line 1393, because the condition on line 1392 was never true
+1393 raise Exception(f"Validation: Design '{self._name}'s default fileset is the same as listed in filesets.")
+1394 except KeyError as ex:
+1395 raise Exception(f"Validation: Design '{self._name}'s default fileset is not in list of filesets.") from ex
+1396 if self._project is None: 1396 ↛ 1397line 1396 didn't jump to line 1397, because the condition on line 1396 was never true
+1397 raise Exception(f"Validation: Design '{self._path}' has no project.")
+ +1399 for fileSet in self._fileSets.values():
+1400 fileSet.Validate()
+ +1402 def __len__(self) -> int:
+1403 """Returns number of attributes set on the file set."""
+1404 return len(self._attributes)
+ +1406 def __getitem__(self, key: Type[Attribute]) -> Any:
+1407 if not issubclass(key, Attribute):
+1408 raise TypeError("Parameter 'key' is not an 'Attribute'.")
+ +1410 try:
+1411 return self._attributes[key]
+1412 except KeyError:
+1413 return key.resolve(self, key)
+ +1415 def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+1416 self._attributes[key] = value
+ +1418 @property
+1419 def VHDLLibraries(self) -> Dict[str, VHDLLibrary]:
+1420 return self._vhdlLibraries
+ +1422 @property
+1423 def VHDLVersion(self) -> VHDLVersion:
+1424 if self._vhdlVersion is not None:
+1425 return self._vhdlVersion
+1426 elif self._project is not None: 1426 ↛ 1429line 1426 didn't jump to line 1429, because the condition on line 1426 was never false
+1427 return self._project.VHDLVersion
+1428 else:
+1429 raise Exception("VHDLVersion was neither set locally nor globally.")
+ +1431 @VHDLVersion.setter
+1432 def VHDLVersion(self, value: VHDLVersion) -> None:
+1433 self._vhdlVersion = value
+ +1435 @property
+1436 def VerilogVersion(self) -> SystemVerilogVersion:
+1437 if self._verilogVersion is not None:
+1438 return self._verilogVersion
+1439 elif self._project is not None: 1439 ↛ 1442line 1439 didn't jump to line 1442, because the condition on line 1439 was never false
+1440 return self._project.VerilogVersion
+1441 else:
+1442 raise Exception("VerilogVersion was neither set locally nor globally.")
+ +1444 @VerilogVersion.setter
+1445 def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+1446 self._verilogVersion = value
+ +1448 @property
+1449 def SVVersion(self) -> SystemVerilogVersion:
+1450 if self._svVersion is not None:
+1451 return self._svVersion
+1452 elif self._project is not None: 1452 ↛ 1455line 1452 didn't jump to line 1455, because the condition on line 1452 was never false
+1453 return self._project.SVVersion
+1454 else:
+1455 raise Exception("SVVersion was neither set locally nor globally.")
+ +1457 @SVVersion.setter
+1458 def SVVersion(self, value: SystemVerilogVersion) -> None:
+1459 self._svVersion = value
+ +1461 @property
+1462 def SRDLVersion(self) -> SystemRDLVersion:
+1463 if self._srdlVersion is not None:
+1464 return self._srdlVersion
+1465 elif self._project is not None:
+1466 return self._project.SRDLVersion
+1467 else:
+1468 raise Exception("SRDLVersion was neither set locally nor globally.")
+ +1470 @SRDLVersion.setter
+1471 def SRDLVersion(self, value: SystemRDLVersion) -> None:
+1472 self._srdlVersion = value
+ +1474 @property
+1475 def ExternalVHDLLibraries(self) -> List:
+1476 return self._externalVHDLLibraries
+ +1478 def AddFileSet(self, fileSet: FileSet) -> None:
+1479 if not isinstance(fileSet, FileSet):
+1480 raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.")
+1481 elif fileSet in self._fileSets:
+1482 raise Exception("Design already contains this fileset.")
+1483 elif fileSet.Name in self._fileSets.keys():
+1484 raise Exception(f"Design already contains a fileset named '{fileSet.Name}'.")
+ +1486 self._fileSets[fileSet.Name] = fileSet
+1487 fileSet.Design = self
+1488 fileSet._parent = self
+ +1490 def AddFileSets(self, fileSets: Iterable[FileSet]) -> None:
+1491 for fileSet in fileSets:
+1492 self.AddFileSet(fileSet)
+ +1494 @property
+1495 def FileSetCount(self) -> int:
+1496 """Returns number of file sets excl. sub-filesets."""
+1497 return len(self._fileSets)
+ +1499 @property
+1500 def TotalFileSetCount(self) -> int:
+1501 """Returns number of file sets incl. sub-filesets."""
+1502 fileSetCount = len(self._fileSets)
+1503 for fileSet in self._fileSets.values():
+1504 fileSetCount += fileSet.TotalFileSetCount
+ +1506 return fileSetCount
+ +1508 def AddFile(self, file: File) -> None:
+1509 if file.FileSet is None: 1509 ↛ 1512line 1509 didn't jump to line 1512, because the condition on line 1509 was never false
+1510 self._defaultFileSet.AddFile(file)
+1511 else:
+1512 raise ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}' and can't be assigned via Design to a default fileset.")
+ +1514 def AddFiles(self, files: Iterable[File]) -> None:
+1515 for file in files:
+1516 self.AddFile(file)
+ +1518 def AddVHDLLibrary(self, vhdlLibrary: VHDLLibrary) -> None:
+1519 if vhdlLibrary.Name in self._vhdlLibraries:
+1520 if self._vhdlLibraries[vhdlLibrary.Name] is vhdlLibrary:
+1521 raise Exception(f"The VHDLLibrary '{vhdlLibrary.Name}' was already added to the design.")
+1522 else:
+1523 raise Exception(f"A VHDLLibrary with same name ('{vhdlLibrary.Name}') already exists for this design.")
+ +1525 def __str__(self) -> str:
+1526 return self._name
+ + +1529@export
+1530class Project(metaclass=ExtendedType, slots=True):
+1531 """
+1532 A :term:`Project` represents a group of designs and the source files therein.
+ +1534 :arg name: The project's name.
+1535 :arg rootDirectory: Base-path to the project.
+1536 :arg vhdlVersion: Default VHDL version for files in this project, if not specified for the file itself.
+1537 :arg verilogVersion: Default Verilog version for files in this project, if not specified for the file itself.
+1538 :arg svVersion: Default SystemVerilog version for files in this project, if not specified for the file itself.
+1539 """
+ +1541 _name: str
+1542 _rootDirectory: pathlib_Path
+1543 _designs: Dict[str, Design]
+1544 _defaultDesign: Design
+1545 _attributes: Dict[Type[Attribute], typing_Any]
+ +1547 _vhdlVersion: VHDLVersion
+1548 _verilogVersion: SystemVerilogVersion
+1549 _svVersion: SystemVerilogVersion
+1550 _srdlVersion: SystemRDLVersion
+ +1552 def __init__(
+1553 self,
+1554 name: str,
+1555 rootDirectory: pathlib_Path = pathlib_Path("."),
+1556 vhdlVersion: VHDLVersion = None,
+1557 verilogVersion: SystemVerilogVersion = None,
+1558 svVersion: SystemVerilogVersion = None
+1559 ):
+1560 self._name = name
+1561 self._rootDirectory = rootDirectory
+1562 self._designs = {}
+1563 self._defaultDesign = Design("default", project=self)
+1564 self._attributes = {}
+1565 self._vhdlVersion = vhdlVersion
+1566 self._verilogVersion = verilogVersion
+1567 self._svVersion = svVersion
+ +1569 @property
+1570 def Name(self) -> str:
+1571 """Property setting or returning the project's name."""
+1572 return self._name
+ +1574 @property
+1575 def RootDirectory(self) -> pathlib_Path:
+1576 """Property setting or returning the root directory this project is located in."""
+1577 return self._rootDirectory
+ +1579 @RootDirectory.setter
+1580 def RootDirectory(self, value: pathlib_Path) -> None:
+1581 self._rootDirectory = value
+ +1583 @property
+1584 def ResolvedPath(self) -> pathlib_Path:
+1585 """Read-only property returning the resolved path of this fileset."""
+1586 path = self._rootDirectory.resolve()
+1587 if self._rootDirectory.is_absolute():
+1588 return path
+1589 else:
+1590 # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath
+1591 return pathlib_Path(path_relpath(path, pathlib_Path.cwd()))
+ +1593 # TODO: return generator with another method
+1594 @property
+1595 def Designs(self) -> Dict[str, Design]:
+1596 return self._designs
+ +1598 @property
+1599 def DefaultDesign(self) -> Design:
+1600 return self._defaultDesign
+ +1602 def Validate(self) -> None:
+1603 """Validate this project."""
+1604 if self._name is None or self._name == "": 1604 ↛ 1605line 1604 didn't jump to line 1605, because the condition on line 1604 was never true
+1605 raise Exception("Validation: Project has no name.")
+ +1607 if self._rootDirectory is None: 1607 ↛ 1608line 1607 didn't jump to line 1608, because the condition on line 1607 was never true
+1608 raise Exception(f"Validation: Project '{self._name}' has no root directory.")
+1609 try:
+1610 path = self.ResolvedPath
+1611 except Exception as ex:
+1612 raise Exception(f"Validation: Project '{self._name}' could not compute resolved path.") from ex
+1613 if not path.exists(): 1613 ↛ 1614line 1613 didn't jump to line 1614, because the condition on line 1613 was never true
+1614 raise Exception(f"Validation: Project '{self._name}'s directory '{path}' does not exist.")
+1615 if not path.is_dir(): 1615 ↛ 1616line 1615 didn't jump to line 1616, because the condition on line 1615 was never true
+1616 raise Exception(f"Validation: Project '{self._name}'s directory '{path}' is not a directory.")
+ +1618 if len(self._designs) == 0: 1618 ↛ 1619line 1618 didn't jump to line 1619, because the condition on line 1618 was never true
+1619 raise Exception(f"Validation: Project '{self._name}' has no design.")
+1620 try:
+1621 if self._defaultDesign is not self._designs[self._defaultDesign.Name]: 1621 ↛ 1622line 1621 didn't jump to line 1622, because the condition on line 1621 was never true
+1622 raise Exception(f"Validation: Project '{self._name}'s default design is the same as listed in designs.")
+1623 except KeyError as ex:
+1624 raise Exception(f"Validation: Project '{self._name}'s default design is not in list of designs.") from ex
+ +1626 for design in self._designs.values():
+1627 design.Validate()
+ +1629 @property
+1630 def DesignCount(self) -> int:
+1631 """Returns number of designs."""
+1632 return len(self._designs)
+ +1634 def __len__(self) -> int:
+1635 """Returns number of attributes set on the file set."""
+1636 return len(self._attributes)
+ +1638 def __getitem__(self, key: Type[Attribute]) -> Any:
+1639 if not issubclass(key, Attribute):
+1640 raise TypeError("Parameter 'key' is not an 'Attribute'.")
+ +1642 try:
+1643 return self._attributes[key]
+1644 except KeyError:
+1645 return key.resolve(self, key)
+ +1647 def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None:
+1648 self._attributes[key] = value
+ +1650 @property
+1651 def VHDLVersion(self) -> VHDLVersion:
+1652 # TODO: check for None and return exception
+1653 return self._vhdlVersion
+ +1655 @VHDLVersion.setter
+1656 def VHDLVersion(self, value: VHDLVersion) -> None:
+1657 self._vhdlVersion = value
+ +1659 @property
+1660 def VerilogVersion(self) -> SystemVerilogVersion:
+1661 # TODO: check for None and return exception
+1662 return self._verilogVersion
+ +1664 @VerilogVersion.setter
+1665 def VerilogVersion(self, value: SystemVerilogVersion) -> None:
+1666 self._verilogVersion = value
+ +1668 @property
+1669 def SVVersion(self) -> SystemVerilogVersion:
+1670 # TODO: check for None and return exception
+1671 return self._svVersion
+ +1673 @SVVersion.setter
+1674 def SVVersion(self, value: SystemVerilogVersion) -> None:
+1675 self._svVersion = value
+ +1677 @property
+1678 def SRDLVersion(self) -> SystemRDLVersion:
+1679 # TODO: check for None and return exception
+1680 return self._srdlVersion
+ +1682 @SRDLVersion.setter
+1683 def SRDLVersion(self, value: SystemRDLVersion) -> None:
+1684 self._srdlVersion = value
+ +1686 def __str__(self) -> str:
+1687 return self._name
++ « prev + ^ index + » next + + coverage.py v7.3.0, + created at 2023-08-13 23:53 +0000 +
+ +1# ==================================================================================================================== #
+2# _____ ____ _ _ ____ _ _ __ __ _ _ #
+3# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+4# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+5# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+6# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+7# |_| |___/ |__/ #
+8# ==================================================================================================================== #
+9# Authors: #
+10# Patrick Lehmann #
+11# #
+12# License: #
+13# ==================================================================================================================== #
+14# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+15# #
+16# Licensed under the Apache License, Version 2.0 (the "License"); #
+17# you may not use this file except in compliance with the License. #
+18# You may obtain a copy of the License at #
+19# #
+20# http://www.apache.org/licenses/LICENSE-2.0 #
+21# #
+22# Unless required by applicable law or agreed to in writing, software #
+23# distributed under the License is distributed on an "AS IS" BASIS, #
+24# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+25# See the License for the specific language governing permissions and #
+26# limitations under the License. #
+27# #
+28# SPDX-License-Identifier: Apache-2.0 #
+29# ==================================================================================================================== #
+30#
+31"""Specific file types and attributes for Xilinx Vivado."""
+32from pathlib import Path
+33from typing import Iterable
+ +35from xml.dom import minidom, Node
+ +37from pyTooling.MetaClasses import ExtendedType
+38from pyVHDLModel import VHDLVersion
+39from pyTooling.Decorators import export
+ +41from pyEDAA.ProjectModel import ProjectFile, XMLFile, XMLContent, SDCContent, Project, FileSet, Attribute, Design
+42from pyEDAA.ProjectModel import File as Model_File
+43from pyEDAA.ProjectModel import ConstraintFile as Model_ConstraintFile
+44from pyEDAA.ProjectModel import VerilogSourceFile as Model_VerilogSourceFile
+45from pyEDAA.ProjectModel import VHDLSourceFile as Model_VHDLSourceFile
+ + +48@export
+49class UsedInAttribute(Attribute):
+50 KEY = "UsedIn"
+51 VALUE_TYPE = Iterable[str]
+ + +54@export
+55class File(Model_File):
+56 pass
+ + +59class VivadoFileMixIn(metaclass=ExtendedType, mixin=True):
+60 def _registerAttributes(self):
+61 self._attributes[UsedInAttribute] = []
+ + +64@export
+65class ConstraintFile(Model_ConstraintFile, VivadoFileMixIn):
+66 def _registerAttributes(self):
+67 super()._registerAttributes()
+68 VivadoFileMixIn._registerAttributes(self)
+ + +71@export
+72class VerilogSourceFile(Model_VerilogSourceFile):
+73 def _registerAttributes(self):
+74 super()._registerAttributes()
+75 VivadoFileMixIn._registerAttributes(self)
+ + +78@export
+79class VHDLSourceFile(Model_VHDLSourceFile):
+80 def _registerAttributes(self):
+81 super()._registerAttributes()
+82 VivadoFileMixIn._registerAttributes(self)
+ + +85@export
+86class VivadoProjectFile(ProjectFile, XMLContent):
+87 """A Vivado project file (``*.xpr``)."""
+ +89 _xprProject: Project
+ +91 def __init__(
+92 self,
+93 path: Path,
+94 project: Project = None,
+95 design: Design = None,
+96 fileSet: FileSet = None
+97 ):
+98 super().__init__(path, project, design, fileSet)
+ +100 self._xprProject = None
+ +102 @property
+103 def ProjectModel(self) -> Project:
+104 return self._xprProject
+ +106 def Parse(self):
+107 if not self._path.exists(): 107 ↛ 108line 107 didn't jump to line 108, because the condition on line 107 was never true
+108 raise Exception(f"Vivado project file '{self._path!s}' not found.") from FileNotFoundError(f"File '{self._path!s}' not found.")
+ +110 try:
+111 root = minidom.parse(str(self._path)).documentElement
+112 except Exception as ex:
+113 raise Exception(f"Couldn't open '{self._path!s}'.") from ex
+ +115 self._xprProject = Project(self._path.stem, rootDirectory=self._path.parent)
+116 self._ParseRootElement(root)
+ +118 def _ParseRootElement(self, root):
+119 for rootNode in root.childNodes: 119 ↛ exitline 119 didn't return from function '_ParseRootElement', because the loop on line 119 didn't complete
+120 if rootNode.nodeName == "FileSets":
+121 self._ParseFileSets(rootNode)
+122 break
+ +124 def _ParseFileSets(self, filesetsNode):
+125 for fileSetsNode in filesetsNode.childNodes:
+126 if fileSetsNode.nodeType == Node.ELEMENT_NODE and fileSetsNode.tagName == "FileSet":
+127 self._ParseFileSet(fileSetsNode)
+ +129 def _ParseFileSet(self, filesetNode):
+130 filesetName = filesetNode.getAttribute("Name")
+131 fileset = FileSet(filesetName, design=self._xprProject.DefaultDesign)
+ +133 for fileNode in filesetNode.childNodes:
+134 if fileNode.nodeType == Node.ELEMENT_NODE:
+135 if fileNode.tagName == "File":
+136 self._ParseFile(fileNode, fileset)
+137 elif fileNode.nodeType == Node.ELEMENT_NODE and fileNode.tagName == "Config":
+138 self._ParseFileSetConfig(fileNode, fileset)
+ +140 def _ParseFile(self, fileNode, fileset):
+141 croppedPath = fileNode.getAttribute("Path").replace("$PPRDIR/", "")
+142 filePath = Path(croppedPath)
+143 if filePath.suffix in (".vhd", ".vhdl"):
+144 self._ParseVHDLFile(fileNode, filePath, fileset)
+145 elif filePath.suffix == ".xdc": 145 ↛ 147line 145 didn't jump to line 147, because the condition on line 145 was never false
+146 self._ParseXDCFile(fileNode, filePath, fileset)
+147 elif filePath.suffix == ".v":
+148 self._ParseVerilogFile(fileNode, filePath, fileset)
+149 elif filePath.suffix == ".xci":
+150 self._ParseXCIFile(fileNode, filePath, fileset)
+151 else:
+152 self._ParseDefaultFile(fileNode, filePath, fileset)
+ +154 def _ParseVHDLFile(self, fileNode, path, fileset):
+155 vhdlFile = VHDLSourceFile(path)
+156 fileset.AddFile(vhdlFile)
+157 usedInAttr = vhdlFile[UsedInAttribute]
+ +159 for childNode in fileNode.childNodes:
+160 if childNode.nodeType == Node.ELEMENT_NODE and childNode.tagName == "FileInfo":
+161 if childNode.getAttribute("SFType") == "VHDL2008":
+162 vhdlFile.VHDLVersion = VHDLVersion.VHDL2008
+163 else:
+164 vhdlFile.VHDLVersion = VHDLVersion.VHDL93
+ +166 for fileAttribute in childNode.childNodes:
+167 if fileAttribute.nodeType == Node.ELEMENT_NODE and fileAttribute.tagName == "Attr":
+168 if fileAttribute.getAttribute("Name") == "Library":
+169 libraryName = fileAttribute.getAttribute("Val")
+170 vhdlFile.VHDLLibrary = fileset.GetOrCreateVHDLLibrary(libraryName)
+171 elif fileAttribute.getAttribute("Val") == "UsedIn": 171 ↛ 172line 171 didn't jump to line 172, because the condition on line 171 was never true
+172 usedInAttr.append(fileAttribute.getAttribute("Val"))
+ +174 def _ParseDefaultFile(self, _, path, fileset):
+175 File(path, fileSet=fileset)
+ +177 def _ParseXDCFile(self, _, path, fileset):
+178 XDCConstraintFile(path, fileSet=fileset)
+ +180 def _ParseVerilogFile(self, _, path, fileset):
+181 VerilogSourceFile(path, fileSet=fileset)
+ +183 def _ParseXCIFile(self, _, path, fileset):
+184 IPCoreInstantiationFile(path, fileSet=fileset)
+ +186 def _ParseFileSetConfig(self, fileNode, fileset):
+187 for option in fileNode.childNodes:
+188 if option.nodeType == Node.ELEMENT_NODE and option.tagName == "Option":
+189 if option.getAttribute("Name") == "TopModule":
+190 fileset.TopLevel = option.getAttribute("Val")
+ + +193@export
+194class XDCConstraintFile(ConstraintFile, SDCContent):
+195 """A Vivado constraint file (Xilinx Design Constraints; ``*.xdc``)."""
+ + +198@export
+199class IPCoreDescriptionFile(XMLFile):
+200 pass
+ + +203@export
+204class IPCoreInstantiationFile(XMLFile):
+205 """A Vivado IP core instantiation file (Xilinx IPCore Instance; ``*.xci``)."""
++ « prev + ^ index + » next + + coverage.py v7.3.0, + created at 2023-08-13 23:53 +0000 +
+ +1# ==================================================================================================================== #
+2# _____ ____ _ _ ____ _ _ __ __ _ _ #
+3# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | #
+4# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | #
+5# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | #
+6# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| #
+7# |_| |___/ |__/ #
+8# ==================================================================================================================== #
+9# Authors: #
+10# Patrick Lehmann #
+11# #
+12# License: #
+13# ==================================================================================================================== #
+14# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany #
+15# #
+16# Licensed under the Apache License, Version 2.0 (the "License"); #
+17# you may not use this file except in compliance with the License. #
+18# You may obtain a copy of the License at #
+19# #
+20# http://www.apache.org/licenses/LICENSE-2.0 #
+21# #
+22# Unless required by applicable law or agreed to in writing, software #
+23# distributed under the License is distributed on an "AS IS" BASIS, #
+24# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. #
+25# See the License for the specific language governing permissions and #
+26# limitations under the License. #
+27# #
+28# SPDX-License-Identifier: Apache-2.0 #
+29# ==================================================================================================================== #
+30#
+31"""A vendor specific package for Xilinx."""
++ coverage.py v7.3.0, + created at 2023-08-13 23:53 +0000 +
+| Module | +statements | +missing | +excluded | +branches | +partial | +coverage | +
|---|---|---|---|---|---|---|
| pyEDAA/ProjectModel/Attributes.py | +15 | +0 | +0 | +2 | +0 | +100% | +
| pyEDAA/ProjectModel/Xilinx/Vivado.py | +121 | +14 | +0 | +66 | +4 | +88% | +
| pyEDAA/ProjectModel/Xilinx/__init__.py | +1 | +0 | +0 | +0 | +0 | +100% | +
| pyEDAA/ProjectModel/__init__.py | +1023 | +246 | +0 | +618 | +74 | +75% | +
| Total | +1160 | +260 | +0 | +686 | +78 | +76% | +
+ No items found using the specified filter. +
+| + | + |
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+
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| + | + |
| + |
| + |
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+
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+
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+
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| + |
| + | + |
| + |
| + |
+
An abstract model of HDL design projects and EDA tooling.
+This package provides a unified abstract project model for HDL designs and EDA tools. +Third-party frameworks can derive own classes and implement additional logic to create a concrete project model for +their tools.
+Frameworks consuming this model can build higher level features and services on top of such a model, while supporting +multiple input sources.
+Describing HDL projects for open source simulation and synthesis tools: +GHDL, +Icarus Verilog, +Verilator, +Yosys, +Verilog to Routing (VTR), +nextpnr, +etc.
Managing IP cores and projects with pyIPCMI.
*.xpr and *.pro Files¶Xilinx Vivado’s *.xpr and OSVVM’s *.pro files can now be read.
Filesets can be nested.
The dataset can be validated.
Patrick Lehmann (Maintainer)
Unai Martinez-Corral (Maintainer)
This Python package (source code) is licensed under Apache License 2.0.
+The accompanying documentation is licensed under Creative Commons - Attribution 4.0 (CC-BY 4.0).
This document was generated on 13.Aug 2023 - 23:53.
+| + p | ||
| + |
+ pyEDAA | + |
| + |
+ pyEDAA.ProjectModel | + |
| + |
+ pyEDAA.ProjectModel.Altera | + |
| + |
+ pyEDAA.ProjectModel.Altera.Quartus | + |
| + |
+ pyEDAA.ProjectModel.Attributes | + |
| + |
+ pyEDAA.ProjectModel.GHDL | + |
| + |
+ pyEDAA.ProjectModel.Intel | + |
| + |
+ pyEDAA.ProjectModel.Intel.QuartusPrime | + |
| + |
+ pyEDAA.ProjectModel.MentorGraphics | + |
| + |
+ pyEDAA.ProjectModel.MentorGraphics.ModelSim | + |
| + |
+ pyEDAA.ProjectModel.MentorGraphics.QuestaSim | + |
| + |
+ pyEDAA.ProjectModel.OSVVM | + |
| + |
+ pyEDAA.ProjectModel.Verilog | + |
| + |
+ pyEDAA.ProjectModel.VHDL | + |
| + |
+ pyEDAA.ProjectModel.Xilinx | + |
| + |
+ pyEDAA.ProjectModel.Xilinx.ISE | + |
| + |
+ pyEDAA.ProjectModel.Xilinx.Vivado | + |
Reference of all packages and modules:
+
pyEDAA.ProjectModelpyEDAA.ProjectModel.Altera
+pyEDAA.ProjectModel.Attributes
+pyEDAA.ProjectModel.GHDLpyEDAA.ProjectModel.Intel
+pyEDAA.ProjectModel.MentorGraphics
+pyEDAA.ProjectModel.OSVVMpyEDAA.ProjectModel.VHDLpyEDAA.ProjectModel.VerilogpyEDAA.ProjectModel.Xilinx
+AttributeFileTypeFileType.FileTypesFileType.__init__()FileType.__new__()FileType.__base__FileType.__call__()FileType.__delattr__()FileType.__dir__()FileType.__getattribute__()FileType.__instancecheck__()FileType.__or__()FileType.__prepare__()FileType.__repr__()FileType.__ror__()FileType.__setattr__()FileType.__sizeof__()FileType.__subclasscheck__()FileType.__subclasses__()FileType.__text_signature__FileType._checkForAbstractMethods()FileType._iterateBaseClassPaths()FileType._wrapNewMethodIfAbstract()FileType._wrapNewMethodIfSingleton()FileType.mro()HumanReadableContentXMLContentYAMLContentJSONContentINIContentTOMLContentTCLContentSDCContentPythonContentFileSetFileSet.__init__()FileSet.NameFileSet.TopLevelFileSet.ProjectFileSet.DesignFileSet.DirectoryFileSet.ResolvedPathFileSet.ParentFileSet.FileSetsFileSet.Files()FileSet.AddFileSet()FileSet.AddFileSets()FileSet.FileSetCountFileSet.TotalFileSetCountFileSet.AddFile()FileSet.AddFiles()FileSet.FileCountFileSet.TotalFileCountFileSet.Validate()FileSet.__len__()FileSet.__getitem__()FileSet.__setitem__()FileSet.VHDLLibraryFileSet.VHDLVersionFileSet.VerilogVersionFileSet.SVVersionFileSet.__str__()VHDLLibrary
+Design
+Project
+pyEDAA.ProjectModel.Altera.Quartus¶Classes
+QuartusProjectFile:
+A Quartus project file (*.qpf).
SDCConstraintFile:
+A Quartus constraint file (Synopsys Design Constraints; *.sdc).
pyEDAA.ProjectModel.Altera¶Submodules
+ +pyEDAA.ProjectModel.GHDL¶Classes
+GHDLWaveformFile:
+GHDL’s waveform file (*.ghw) supporting VHDL and Verilog simulation results.
pyEDAA.ProjectModel.Intel.QuartusPrime¶Classes
+QuartusProjectFile:
+A Quartus project file (*.qpf).
SDCConstraintFile:
+A Quartus constraint file (Synopsys Design Constraints; *.sdc).
pyEDAA.ProjectModel.Intel¶Submodules
+ +pyEDAA.ProjectModel.MentorGraphics.ModelSim¶Classes
+ModelSimProjectFile:
+Base-class of all tool-specific project files.
ModelSimINIFile:
+Base-class of all tool-specific setting files.
WaveDoFile:
+Base-class of all tool-specific waveform configuration files.
pyEDAA.ProjectModel.MentorGraphics.QuestaSim¶Classes
+ModelSimProjectFile:
+Base-class of all tool-specific project files.
ModelSimINIFile:
+Base-class of all tool-specific setting files.
WaveDoFile:
+Base-class of all tool-specific waveform configuration files.
pyEDAA.ProjectModel.MentorGraphics¶Submodules
+ +pyEDAA.ProjectModel.OSVVM¶Classes
+OSVVMProjectFile:
+An OSVVM project file (*.pro).
pyEDAA.ProjectModel.VHDL¶pyEDAA.ProjectModel.Verilog¶Classes
+ValueChangeDumpFile:
+Verilog’s waveform file (*.vcd) for exchanging value changes as defined by IEEE Std. 1364.
pyEDAA.ProjectModel.Xilinx.ISE¶Classes
+ISEProjectFile:
+Base-class of all tool-specific project files.
UCFConstraintFile:
+Base-class of all constraint files.
pyEDAA.ProjectModel.Xilinx.Vivado¶Classes
+UsedInAttribute:
+Undocumented.
File:
+A File represents a file in a design. This base-class is used
ConstraintFile:
+Base-class of all constraint files.
VerilogSourceFile:
+A Verilog source file (of any language version).
VHDLSourceFile:
+A VHDL source file (of any language version).
VivadoProjectFile:
+A Vivado project file (*.xpr).
XDCConstraintFile:
+A Vivado constraint file (Xilinx Design Constraints; *.xdc).
IPCoreDescriptionFile:
+An XML file (*.xml).
IPCoreInstantiationFile:
+A Vivado IP core instantiation file (Xilinx IPCore Instance; *.xci).
pyEDAA.ProjectModel.Xilinx¶Submodules
+ +pyEDAA.ProjectModel¶Submodules
+Classes
+Attribute:
+Undocumented.
FileType:
+A meta-class to construct FileType classes.
File:
+A File represents a file in a design. This base-class is used
HumanReadableContent:
+A file type representing human-readable contents.
XMLContent:
+A file type representing XML contents.
YAMLContent:
+A file type representing YAML contents.
JSONContent:
+A file type representing JSON contents.
INIContent:
+A file type representing INI contents.
TOMLContent:
+A file type representing TOML contents.
TCLContent:
+A file type representing content in TCL code.
SDCContent:
+A file type representing contents as Synopsys Design Constraints (SDC).
PythonContent:
+A file type representing contents as Python source code.
TextFile:
+A text file (*.txt).
LogFile:
+A log file (*.log).
XMLFile:
+An XML file (*.xml).
SourceFile:
+Base-class of all source files.
HDLSourceFile:
+Base-class of all HDL source files.
RDLSourceFile:
+Base-class of all RDL source files.
NetlistFile:
+Base-class of all netlist source files.
EDIFNetlistFile:
+Netlist file in EDIF (Electronic Design Interchange Format).
TCLSourceFile:
+A TCL source file.
VHDLSourceFile:
+A VHDL source file (of any language version).
VerilogBaseFile:
+Base-class of all HDL source files.
VerilogSourceFile:
+A Verilog source file (of any language version).
VerilogHeaderFile:
+A Verilog header file (of any language version).
SystemVerilogBaseFile:
+Base-class of all HDL source files.
SystemVerilogSourceFile:
+A SystemVerilog source file (of any language version).
SystemVerilogHeaderFile:
+A SystemVerilog header file (of any language version).
SystemRDLSourceFile:
+A SystemRDL source file (of any language version).
PythonSourceFile:
+A Python source file.
CocotbPythonFile:
+A Python source file used by Cocotb.
ConstraintFile:
+Base-class of all constraint files.
ProjectFile:
+Base-class of all tool-specific project files.
CSourceFile:
+Base-class of all ANSI-C source files.
CppSourceFile:
+Base-class of all ANSI-C++ source files.
SettingFile:
+Base-class of all tool-specific setting files.
SimulationAnalysisFile:
+Base-class of all tool-specific analysis files.
SimulationElaborationFile:
+Base-class of all tool-specific elaboration files.
SimulationStartFile:
+Base-class of all tool-specific simulation start-up files.
SimulationRunFile:
+Base-class of all tool-specific simulation run (execution) files.
WaveformConfigFile:
+Base-class of all tool-specific waveform configuration files.
WaveformDatabaseFile:
+Base-class of all tool-specific waveform database files.
WaveformExchangeFile:
+Base-class of all tool-independent waveform exchange files.
FileSet:
+A FileSet represents a group of files. Filesets can have sub-filesets.
VHDLLibrary:
+A VHDLLibrary represents a group of VHDL source files compiled into the same VHDL library.
Design:
+A Design represents a group of filesets and the source files therein.
Project:
+A Project represents a group of designs and the source files therein.
A meta-class to construct FileType classes.
+Modifications done by this meta-class:
+* Register all classes of type FileType or derived variants in a class field FileType.FileTypes in this meta-class.
Inheritance
+ +classMembers (Dict) –
+Dict[str, FileType] = {'CSourceFile': <class 'pyEDAA.ProjectModel.CSourceFile'>, 'CocotbPythonFile': <class 'pyEDAA.ProjectModel.CocotbPythonFile'>, 'ConstraintFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.ConstraintFile'>, 'CppSourceFile': <class 'pyEDAA.ProjectModel.CppSourceFile'>, 'EDIFNetlistFile': <class 'pyEDAA.ProjectModel.EDIFNetlistFile'>, 'File': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.File'>, 'GHDLWaveformFile': <class 'pyEDAA.ProjectModel.GHDL.GHDLWaveformFile'>, 'HDLSourceFile': <class 'pyEDAA.ProjectModel.HDLSourceFile'>, 'IPCoreDescriptionFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.IPCoreDescriptionFile'>, 'IPCoreInstantiationFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.IPCoreInstantiationFile'>, 'ISEProjectFile': <class 'pyEDAA.ProjectModel.Xilinx.ISE.ISEProjectFile'>, 'LogFile': <class 'pyEDAA.ProjectModel.LogFile'>, 'ModelSimINIFile': <class 'pyEDAA.ProjectModel.MentorGraphics.QuestaSim.ModelSimINIFile'>, 'ModelSimProjectFile': <class 'pyEDAA.ProjectModel.MentorGraphics.QuestaSim.ModelSimProjectFile'>, 'NetlistFile': <class 'pyEDAA.ProjectModel.NetlistFile'>, 'OSVVMProjectFile': <class 'pyEDAA.ProjectModel.OSVVM.OSVVMProjectFile'>, 'ProjectFile': <class 'pyEDAA.ProjectModel.ProjectFile'>, 'PythonSourceFile': <class 'pyEDAA.ProjectModel.PythonSourceFile'>, 'QuartusProjectFile': <class 'pyEDAA.ProjectModel.Intel.QuartusPrime.QuartusProjectFile'>, 'RDLSourceFile': <class 'pyEDAA.ProjectModel.RDLSourceFile'>, 'SDCConstraintFile': <class 'pyEDAA.ProjectModel.Intel.QuartusPrime.SDCConstraintFile'>, 'SettingFile': <class 'pyEDAA.ProjectModel.SettingFile'>, 'SimulationAnalysisFile': <class 'pyEDAA.ProjectModel.SimulationAnalysisFile'>, 'SimulationElaborationFile': <class 'pyEDAA.ProjectModel.SimulationElaborationFile'>, 'SimulationRunFile': <class 'pyEDAA.ProjectModel.SimulationRunFile'>, 'SimulationStartFile': <class 'pyEDAA.ProjectModel.SimulationStartFile'>, 'SourceFile': <class 'pyEDAA.ProjectModel.SourceFile'>, 'SystemRDLSourceFile': <class 'pyEDAA.ProjectModel.SystemRDLSourceFile'>, 'SystemVerilogBaseFile': <class 'pyEDAA.ProjectModel.SystemVerilogBaseFile'>, 'SystemVerilogHeaderFile': <class 'pyEDAA.ProjectModel.SystemVerilogHeaderFile'>, 'SystemVerilogSourceFile': <class 'pyEDAA.ProjectModel.SystemVerilogSourceFile'>, 'TCLSourceFile': <class 'pyEDAA.ProjectModel.TCLSourceFile'>, 'TextFile': <class 'pyEDAA.ProjectModel.TextFile'>, 'UCFConstraintFile': <class 'pyEDAA.ProjectModel.Xilinx.ISE.UCFConstraintFile'>, 'VHDLSourceFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.VHDLSourceFile'>, 'ValueChangeDumpFile': <class 'pyEDAA.ProjectModel.Verilog.ValueChangeDumpFile'>, 'VerilogBaseFile': <class 'pyEDAA.ProjectModel.VerilogBaseFile'>, 'VerilogHeaderFile': <class 'pyEDAA.ProjectModel.VerilogHeaderFile'>, 'VerilogSourceFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.VerilogSourceFile'>, 'VivadoProjectFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.VivadoProjectFile'>, 'WaveDoFile': <class 'pyEDAA.ProjectModel.MentorGraphics.QuestaSim.WaveDoFile'>, 'WaveformConfigFile': <class 'pyEDAA.ProjectModel.WaveformConfigFile'>, 'WaveformDatabaseFile': <class 'pyEDAA.ProjectModel.WaveformDatabaseFile'>, 'WaveformExchangeFile': <class 'pyEDAA.ProjectModel.WaveformExchangeFile'>, 'XDCConstraintFile': <class 'pyEDAA.ProjectModel.Xilinx.Vivado.XDCConstraintFile'>, 'XMLFile': <class 'pyEDAA.ProjectModel.XMLFile'>}¶Dictionary of all classes of type FileType or derived variants
Construct a new class using this meta-class.
+className – The name of the class to construct.
baseClasses – The tuple of base-classes the class is derived from.
members – The dictionary of members for the constructed class.
slots – If true, store object attributes in __slots__ instead of __dict__.
mixin – If true, make the class a Mixin-Class.
+If false, create slots if slots is true.
+If none, preserve behavior of primary base-class.
singleton – If true, make the class a Singleton.
classMembers (Dict) –
The new class.
+AttributeError – If base-class has no ‘__slots__’ attribute.
AttributeError – If slot already exists in base-class.
alias of ExtendedType
Call self as a function.
+Implement delattr(self, name).
+Specialized __dir__ implementation for types.
+Return getattr(self, name).
+Check if an object is an instance.
+Return self|value.
+used to create the namespace for the class statement
+ +Return repr(self).
+Return value|self.
+Implement setattr(self, name, value).
+Return memory consumption of the type object.
+Check if a class is a subclass.
+Return a list of immediate subclasses.
+Check if the current class contains abstract methods and return a tuple of them.
+These abstract methods might be inherited from any base-class. If there are inherited abstract methods, check if +they are now implemented (overridden) by the current class that’s right now constructed.
+ +Return a generator to iterate all possible inheritance paths for a given list of base-classes.
+An inheritance path is expressed as a tuple of base-classes from current base-class (left-most item) to
+object (right-most item).
If the class has abstract methods, replace the _new__ method, so it raises an exception.
newClass – The newly constructed class for further modifications.
+True, if the class is abstract.
AbstractClassError – If the class is abstract and can’t be instantiated.
+If a class is a singleton, wrap the _new__ method, so it returns a cached object, if a first object was created.
Only the first object creation initializes the object.
+This implementation is threadsafe.
+ +Return a type’s method resolution order.
+A file type representing human-readable contents.
+Inheritance
+ +A file type representing XML contents.
+Inheritance
+ +A file type representing YAML contents.
+Inheritance
+ +A file type representing JSON contents.
+Inheritance
+ +A file type representing INI contents.
+Inheritance
+ +A file type representing TOML contents.
+Inheritance
+ +A file type representing content in TCL code.
+Inheritance
+ +A file type representing contents as Synopsys Design Constraints (SDC).
+Inheritance
+ +A file type representing contents as Python source code.
+Inheritance
+ +A FileSet represents a group of files. Filesets can have sub-filesets.
+The order of insertion is preserved. A fileset can be created standalone and +later associated to another fileset, design and/or project. Or a fileset, +design and/or project can be associated immediately while creating the +fileset.
+name (str) – Name of this fileset.
topLevel (str) – Name of the fileset’s toplevel.
directory (Path) – Path of this fileset (absolute or relative to a parent fileset or design).
project (Project) – Project the file is associated with.
design (Design) – Design the file is associated with.
parent (Optional[FileSet]) – Parent fileset if this fileset is nested.
vhdlLibrary (Union[str, VHDLLibrary]) – Default VHDL library for files in this fileset, if not specified for the file itself.
vhdlVersion (VHDLVersion) – Default VHDL version for files in this fileset, if not specified for the file itself.
verilogVersion (SystemVerilogVersion) – Default Verilog version for files in this fileset, if not specified for the file itself.
svVersion (SystemVerilogVersion) – Default SystemVerilog version for files in this fileset, if not specified for the file itself.
srdlVersion (SystemRDLVersion) – Default SystemRDL version for files in this fileset, if not specified for the file itself.
name –
topLevel –
directory –
project –
design –
parent –
vhdlLibrary –
vhdlVersion –
verilogVersion –
svVersion –
srdlVersion –
Inheritance
+ +Property setting or returning the project this fileset is used in.
+Property setting or returning the design this fileset is used in.
+Property setting or returning the directory this fileset is located in.
+Property setting or returning the parent fileset this fileset is used in.
+Read-only property returning the dictionary of sub-filesets.
+Method returning the files of this fileset.
+ +Method to add a single file to this fileset.
+file (File) – A file to add to this fileset.
file –
Property setting or returning the VHDL library of this fileset.
+Property setting or returning the VHDL version of this fileset.
+Property setting or returning the Verilog version of this fileset.
+Property setting or returning the SystemVerilog version of this fileset.
+A VHDLLibrary represents a group of VHDL source files compiled into the same VHDL library.
+name (str) – The VHDL libraries’ name.
project (Project) – Project the VHDL library is associated with.
design (Design) – Design the VHDL library is associated with.
vhdlVersion (VHDLVersion) – Default VHDL version for files in this VHDL library, if not specified for the file itself.
name –
project –
design –
vhdlVersion –
Inheritance
+ + + +Property setting or returning the project this VHDL library is used in.
+Property setting or returning the design this VHDL library is used in.
+Read-only property to return all files in this VHDL library.
+Property setting or returning the VHDL version of this VHDL library.
+A Design represents a group of filesets and the source files therein.
+Each design contains at least one fileset - the default fileset. For +designs with VHDL source files, a independent VHDLLibraries overlay structure +exists.
+name (str) – The design’s name.
topLevel (str) – Name of the design’s toplevel.
directory (Path) – Path of this design (absolute or relative to the project).
project (Project) – Project the design is associated with.
vhdlVersion (VHDLVersion) – Default VHDL version for files in this design, if not specified for the file itself.
verilogVersion (SystemVerilogVersion) – Default Verilog version for files in this design, if not specified for the file itself.
svVersion (SystemVerilogVersion) – Default SystemVerilog version for files in this design, if not specified for the file itself.
srdlVersion (SystemRDLVersion) – Default SystemRDL version for files in this fileset, if not specified for the file itself.
name –
topLevel –
directory –
project –
vhdlVersion –
verilogVersion –
svVersion –
srdlVersion –
Inheritance
+ +Property setting or returning the project this design is used in.
+Property setting or returning the directory this design is located in.
+Property setting or returning the default fileset of this design.
+Read-only property returning the dictionary of filesets.
+A Project represents a group of designs and the source files therein.
+name (str) – The project’s name.
rootDirectory (Path) – Base-path to the project.
vhdlVersion (VHDLVersion) – Default VHDL version for files in this project, if not specified for the file itself.
verilogVersion (SystemVerilogVersion) – Default Verilog version for files in this project, if not specified for the file itself.
svVersion (SystemVerilogVersion) – Default SystemVerilog version for files in this project, if not specified for the file itself.
name –
rootDirectory –
vhdlVersion –
verilogVersion –
svVersion –
Inheritance
+ +pyEDAA.ProjectModel", "pyEDAA.ProjectModel.Altera", "pyEDAA.ProjectModel.Altera.Quartus", "pyEDAA.ProjectModel.Attributes", "pyEDAA.ProjectModel.GHDL", "pyEDAA.ProjectModel.Intel", "pyEDAA.ProjectModel.Intel.QuartusPrime", "pyEDAA.ProjectModel.MentorGraphics", "pyEDAA.ProjectModel.MentorGraphics.ModelSim", "pyEDAA.ProjectModel.MentorGraphics.QuestaSim", "pyEDAA.ProjectModel.OSVVM", "pyEDAA.ProjectModel.VHDL", "pyEDAA.ProjectModel.Verilog", "pyEDAA.ProjectModel.Xilinx", "pyEDAA.ProjectModel.Xilinx.ISE", "pyEDAA.ProjectModel.Xilinx.Vivado", "Static Type Checking Report"], "terms": {"\u00bd": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34], "\u00bc": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34], "\u215b": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 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"overall-hierarchy"]], "Glossary": [[4, "glossary"]], "Installation/Updates": [[5, "installation-updates"]], "Using PIP": [[5, "using-pip"]], "Installation from PyPI using PIP": [[5, "installation-from-pypi-using-pip"]], "Updating from PyPI using PIP": [[5, "updating-from-pypi-using-pip"]], "Uninstallation using PIP": [[5, "uninstallation-using-pip"]], "Installation from local directory using PIP": [[5, "installation-from-local-directory-using-pip"]], "Using setup.py (legacy)": [[5, "using-setup-py-legacy"]], "Installation using setup.py": [[5, "installation-using-setup-py"]], "Apache License 2.0": [[6, "apache-license-2-0"]], "1. Definitions.": [[6, "definitions"]], "2. Grant of Copyright License.": [[6, "grant-of-copyright-license"]], "3. Grant of Patent License.": [[6, "grant-of-patent-license"]], "4. Redistribution.": [[6, "redistribution"]], "5. Submission of Contributions.": [[6, "submission-of-contributions"]], "6. Trademarks.": [[6, "trademarks"]], "7. Disclaimer of Warranty.": [[6, "disclaimer-of-warranty"]], "8. Limitation of Liability.": [[6, "limitation-of-liability"]], "9. Accepting Warranty or Additional Liability.": [[6, "accepting-warranty-or-additional-liability"]], "Design": [[7, "design"]], "Todo": [[7, "id1"], [8, "id1"], [9, "id1"], [10, "id1"], [11, "id1"]], "Condensed definition of class Design": [[7, "condensed-definition-of-class-design"]], "File": [[8, "file"]], "Condensed definition of class File": [[8, "condensed-definition-of-class-file"]], "FileSet": [[9, "fileset"]], "Condensed definition of class FileSet": [[9, "condensed-definition-of-class-fileset"]], "Project": [[10, "project"]], "Condensed definition of class Project": [[10, "condensed-definition-of-class-project"]], "VHDL Library": [[11, "vhdl-library"]], "Condensed definition of class VHDLLibrary": [[11, "condensed-definition-of-class-vhdllibrary"]], "Project Model": [[12, "project-model"]], "Coverage Report": [[13, "coverage-report"]], "Index": [[14, "index"]], "The pyEDAA.ProjectModel Documentation": [[15, "the-pyedaa-projectmodel-documentation"]], "Main Goals": [[15, "main-goals"]], "Use Cases": [[15, "use-cases"]], "News": [[15, "news"]], "Oct. 2021 - Reading *.xpr and *.pro Files": [[15, "oct-2021-reading-xpr-and-pro-files"]], "Sep. 2021 - Extracted ProjectModel from pyIPCMI": [[15, "sep-2021-extracted-projectmodel-from-pyipcmi"]], "Contributors": [[15, "contributors"]], "License": [[15, "license"]], "Module Index": [[16, "module-index"]], "Python Class Reference": [[17, "python-class-reference"]], "pyEDAA.ProjectModel": [[18, "module-pyEDAA.ProjectModel"]], "pyEDAA.ProjectModel.Altera": [[19, "module-pyEDAA.ProjectModel.Altera"]], "pyEDAA.ProjectModel.Altera.Quartus": [[20, "module-pyEDAA.ProjectModel.Altera.Quartus"]], "pyEDAA.ProjectModel.Attributes": [[21, "module-pyEDAA.ProjectModel.Attributes"]], "pyEDAA.ProjectModel.GHDL": [[22, "module-pyEDAA.ProjectModel.GHDL"]], "pyEDAA.ProjectModel.Intel": [[23, "module-pyEDAA.ProjectModel.Intel"]], "pyEDAA.ProjectModel.Intel.QuartusPrime": [[24, "module-pyEDAA.ProjectModel.Intel.QuartusPrime"]], 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"module-pyEDAA.ProjectModel.Xilinx"]], "pyedaa.projectmodel.xilinx.ise": [[32, "module-pyEDAA.ProjectModel.Xilinx.ISE"]], "usedinattribute (class in pyedaa.projectmodel.xilinx.vivado)": [[33, "pyEDAA.ProjectModel.Xilinx.Vivado.UsedInAttribute"]], "pyedaa.projectmodel.xilinx.vivado": [[33, "module-pyEDAA.ProjectModel.Xilinx.Vivado"]]}})
\ No newline at end of file
diff --git a/typing/html/ProjectModel/Altera/Quartus.py.html b/typing/html/ProjectModel/Altera/Quartus.py.html
new file mode 100644
index 00000000..f1b492ae
--- /dev/null
+++ b/typing/html/ProjectModel/Altera/Quartus.py.html
@@ -0,0 +1,106 @@
+
+
+
+
+
+
+1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +30 +31 +32 +33 +34 +35 +36 +37 +38 +39 +40 +41 +42 +43 +44 + |
+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Altera Quartus.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ConstraintFile, ProjectFile, SDCContent, TCLContent + + +@export +class QuartusProjectFile(ProjectFile, TCLContent): + """A Quartus project file (``*.qpf``).""" + + +@export +class SDCConstraintFile(ConstraintFile, SDCContent): + """A Quartus constraint file (Synopsys Design Constraints; ``*.sdc``).""" + |
+
1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +30 +31 + |
+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""A vendor specific package for Altera (now Intel FPGA).""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""A set of common attributes to store meta information on ProjectModel entities (project, design, fileset, file, ...).""" +from typing import Dict +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import Attribute + + +@export +class KeyValueAttribute(Attribute): + KEY = "ID" + + _keyValuePairs: Dict[str, str] + + def __init__(self): + super().__init__() + + self._keyValuePairs = {} + + def __getitem__(self, item: str) -> str: + return self._keyValuePairs[item] + + def __setitem__(self, key: str, value: str) -> None: + self._keyValuePairs[key] = value + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for `GHDL <https://github.com/ghdl>`__.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import WaveformExchangeFile + + +@export +class GHDLWaveformFile(WaveformExchangeFile): + """GHDL's waveform file (``*.ghw``) supporting VHDL and Verilog simulation results.""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Intel FPGA Quartus Prime.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ConstraintFile, ProjectFile, SDCContent, TCLContent + + +@export +class QuartusProjectFile(ProjectFile, TCLContent): + """A Quartus project file (``*.qpf``).""" + + +@export +class SDCConstraintFile(ConstraintFile, SDCContent): + """A Quartus constraint file (Synopsys Design Constraints; ``*.sdc``).""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""A vendor specific package for Intel FPGA (formerly Altera).""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Mentor Graphics ModelSim.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ProjectFile, SettingFile, INIContent, WaveformConfigFile, TCLContent + + +@export +class ModelSimProjectFile(ProjectFile): + pass + + +@export +class ModelSimINIFile(SettingFile, INIContent): + pass + + +@export +class WaveDoFile(WaveformConfigFile, TCLContent): + pass + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Mentor Graphics QuestaSim.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ProjectFile, SettingFile, INIContent, WaveformConfigFile, TCLContent + + +@export +class ModelSimProjectFile(ProjectFile): + pass + + +@export +class ModelSimINIFile(SettingFile, INIContent): + pass + + +@export +class WaveDoFile(WaveformConfigFile, TCLContent): + pass + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""A vendor specific package for Mentor Graphics (now Siemens EDA).""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for `OSVVM <https://github.com/OSVVM>`__.""" +from pathlib import Path + +from pyTooling.Decorators import export +from typing import Optional as Nullable, List + +from pyEDAA.ProjectModel import ProjectFile, TCLContent, Project, Design, FileSet, VHDLLibrary, VHDLSourceFile + + +@export +class OSVVMProjectFile(ProjectFile, TCLContent): + """An OSVVM project file (``*.pro``).""" + + _osvvmProject: Nullable[Project] + + def __init__( + self, + path: Path, + project: Project = None, + design: Design = None, + fileSet: FileSet = None + ): + super().__init__(path, project, design, fileSet) + + self._osvvmProject = None + + @property + def ProjectModel(self) -> Project: + return self._osvvmProject + + class Instruction: + _line: int + + def __init__(self, line: int): + self._line = line + + class Empty(Instruction): + def __init__(self, line: int): + super().__init__(line) + + class Comment(Instruction): + _commentText: str + + def __init__(self, line: int, commentText: str): + super().__init__(line) + self._commentText = commentText.rstrip() + + @property + def CommentText(self) -> str: + return self._commentText + + class Analyze(Instruction): + _vhdlSourceFile: VHDLSourceFile + + def __init__(self, line: int, parameterText: str): + super().__init__(line) + self._vhdlSourceFile = VHDLSourceFile(Path(parameterText.strip())) + + @property + def VHDLSourceFile(self) -> VHDLSourceFile: + return self._vhdlSourceFile + + class Library(Instruction): + _vhdlLibrary: VHDLLibrary + + def __init__(self, line: int, parameterText: str): + super().__init__(line) + self._vhdlLibrary = VHDLLibrary(parameterText.strip()) + + @property + def VHDLLibrary(self) -> VHDLLibrary: + return self._vhdlLibrary + + class Include(Instruction): + _osvvmProjectFile: 'OSVVMProjectFile' + _fileSet: FileSet + + def __init__(self, line: int, workingDirectory: Path, parameterText: str): + super().__init__(line) + + includeFile = Path(parameterText.strip()) + includePath = (workingDirectory / includeFile).resolve() + + self._fileSet = FileSet(includeFile.name, directory=includeFile.parent) + self._osvvmProjectFile = OSVVMProjectFile(includePath) + + @property + def OSVVMProjectFile(self) -> 'OSVVMProjectFile': + return self._osvvmProjectFile + + def Parse(self, fileSet: FileSet): + self._fileSet.Parent = fileSet + + for instruction in self._osvvmProjectFile._Parse(): + if isinstance(instruction, OSVVMProjectFile.Include): + instruction.Parse(self._fileSet) + elif isinstance(instruction, OSVVMProjectFile.Analyze): + self._fileSet.AddFile(instruction.VHDLSourceFile) + elif isinstance(instruction, OSVVMProjectFile.Library): + self._fileSet.Design.AddVHDLLibrary(instruction.VHDLLibrary) +# elif isinstance(instruction, OSVVMProjectFile.Build): + + elif not isinstance(instruction, (OSVVMProjectFile.Empty, OSVVMProjectFile.Comment)): + raise Exception(f"Unknown instruction '{instruction.__class__.__name__}' in OSVVM project file '{self._osvvmProjectFile.ResolvedPath}'") + + def Parse(self): + projectName = self._path.name + self._osvvmProject = Project(projectName, rootDirectory=self._path.parent) + + fileSet = self._osvvmProject.DefaultDesign.DefaultFileSet + + for instruction in self._Parse(): + if isinstance(instruction, OSVVMProjectFile.Include): + instruction.Parse(fileSet) + elif isinstance(instruction, OSVVMProjectFile.Analyze): + fileSet.AddFile(instruction.VHDLSourceFile) + elif not isinstance(instruction, (OSVVMProjectFile.Empty, OSVVMProjectFile.Comment)): + raise Exception(f"Unknown instruction '{instruction.__class__.__name__}' in OSVVM project file '{self.ResolvedPath}'") + + def _Parse(self): + path = self.ResolvedPath + if not path.exists(): + raise Exception(f"OSVVM project file '{path}' not found.") from FileNotFoundError(f"File '{path}' not found.") + + instructions: List = [] + print() + with path.open("r") as file: + i = 1 + for line in file: + line = line.lstrip() + + if line.startswith("#"): + comment = OSVVMProjectFile.Comment(i, line[1:]) + instructions.append(comment) + + elif line.startswith("analyze"): + vhdlFile = OSVVMProjectFile.Analyze(i, line[8:]) + instructions.append(vhdlFile) + + elif line.startswith("library"): + vhdlLibrary = OSVVMProjectFile.Library(i, line[8:]) + instructions.append(vhdlLibrary) + + elif line.startswith("include"): + include = OSVVMProjectFile.Include(i, path.parent, line[8:]) + instructions.append(include) + + elif line.startswith("build"): + parameter = line[6:] + print(f"BUILD: {parameter}") + elif line.startswith("if"): + print(f"IF (line={i}): {line[3:].rstrip()}") + elif line.startswith("}"): + print(f"}} (line={i}): {line[2:].rstrip()}") + elif len(line) == 0: + instructions.append(OSVVMProjectFile.Empty(i)) + else: + print(f"UNKNOWN (line={i}): '{line.rstrip()}'") + + i += 1 + + return instructions + |
+
| + | + |
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Verilog.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import WaveformExchangeFile + + +@export +class ValueChangeDumpFile(WaveformExchangeFile): + """Verilog's waveform file (``*.vcd``) for exchanging value changes as defined by IEEE Std. 1364.""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Xilinx ISE.""" +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ConstraintFile, ProjectFile, HumanReadableContent + + +@export +class ISEProjectFile(ProjectFile): + pass + + +@export +class UCFConstraintFile(ConstraintFile, HumanReadableContent): + pass + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""Specific file types and attributes for Xilinx Vivado.""" +from pathlib import Path +from typing import Iterable + +from xml.dom import minidom, Node + +from pyTooling.MetaClasses import ExtendedType +from pyVHDLModel import VHDLVersion +from pyTooling.Decorators import export + +from pyEDAA.ProjectModel import ProjectFile, XMLFile, XMLContent, SDCContent, Project, FileSet, Attribute, Design +from pyEDAA.ProjectModel import File as Model_File +from pyEDAA.ProjectModel import ConstraintFile as Model_ConstraintFile +from pyEDAA.ProjectModel import VerilogSourceFile as Model_VerilogSourceFile +from pyEDAA.ProjectModel import VHDLSourceFile as Model_VHDLSourceFile + + +@export +class UsedInAttribute(Attribute): + KEY = "UsedIn" + VALUE_TYPE = Iterable[str] + + +@export +class File(Model_File): + pass + + +class VivadoFileMixIn(metaclass=ExtendedType, mixin=True): + def _registerAttributes(self): + self._attributes[UsedInAttribute] = [] + + +@export +class ConstraintFile(Model_ConstraintFile, VivadoFileMixIn): + def _registerAttributes(self): + super()._registerAttributes() + VivadoFileMixIn._registerAttributes(self) + + +@export +class VerilogSourceFile(Model_VerilogSourceFile): + def _registerAttributes(self): + super()._registerAttributes() + VivadoFileMixIn._registerAttributes(self) + + +@export +class VHDLSourceFile(Model_VHDLSourceFile): + def _registerAttributes(self): + super()._registerAttributes() + VivadoFileMixIn._registerAttributes(self) + + +@export +class VivadoProjectFile(ProjectFile, XMLContent): + """A Vivado project file (``*.xpr``).""" + + _xprProject: Project + + def __init__( + self, + path: Path, + project: Project = None, + design: Design = None, + fileSet: FileSet = None + ): + super().__init__(path, project, design, fileSet) + + self._xprProject = None + + @property + def ProjectModel(self) -> Project: + return self._xprProject + + def Parse(self): + if not self._path.exists(): + raise Exception(f"Vivado project file '{self._path!s}' not found.") from FileNotFoundError(f"File '{self._path!s}' not found.") + + try: + root = minidom.parse(str(self._path)).documentElement + except Exception as ex: + raise Exception(f"Couldn't open '{self._path!s}'.") from ex + + self._xprProject = Project(self._path.stem, rootDirectory=self._path.parent) + self._ParseRootElement(root) + + def _ParseRootElement(self, root): + for rootNode in root.childNodes: + if rootNode.nodeName == "FileSets": + self._ParseFileSets(rootNode) + break + + def _ParseFileSets(self, filesetsNode): + for fileSetsNode in filesetsNode.childNodes: + if fileSetsNode.nodeType == Node.ELEMENT_NODE and fileSetsNode.tagName == "FileSet": + self._ParseFileSet(fileSetsNode) + + def _ParseFileSet(self, filesetNode): + filesetName = filesetNode.getAttribute("Name") + fileset = FileSet(filesetName, design=self._xprProject.DefaultDesign) + + for fileNode in filesetNode.childNodes: + if fileNode.nodeType == Node.ELEMENT_NODE: + if fileNode.tagName == "File": + self._ParseFile(fileNode, fileset) + elif fileNode.nodeType == Node.ELEMENT_NODE and fileNode.tagName == "Config": + self._ParseFileSetConfig(fileNode, fileset) + + def _ParseFile(self, fileNode, fileset): + croppedPath = fileNode.getAttribute("Path").replace("$PPRDIR/", "") + filePath = Path(croppedPath) + if filePath.suffix in (".vhd", ".vhdl"): + self._ParseVHDLFile(fileNode, filePath, fileset) + elif filePath.suffix == ".xdc": + self._ParseXDCFile(fileNode, filePath, fileset) + elif filePath.suffix == ".v": + self._ParseVerilogFile(fileNode, filePath, fileset) + elif filePath.suffix == ".xci": + self._ParseXCIFile(fileNode, filePath, fileset) + else: + self._ParseDefaultFile(fileNode, filePath, fileset) + + def _ParseVHDLFile(self, fileNode, path, fileset): + vhdlFile = VHDLSourceFile(path) + fileset.AddFile(vhdlFile) + usedInAttr = vhdlFile[UsedInAttribute] + + for childNode in fileNode.childNodes: + if childNode.nodeType == Node.ELEMENT_NODE and childNode.tagName == "FileInfo": + if childNode.getAttribute("SFType") == "VHDL2008": + vhdlFile.VHDLVersion = VHDLVersion.VHDL2008 + else: + vhdlFile.VHDLVersion = VHDLVersion.VHDL93 + + for fileAttribute in childNode.childNodes: + if fileAttribute.nodeType == Node.ELEMENT_NODE and fileAttribute.tagName == "Attr": + if fileAttribute.getAttribute("Name") == "Library": + libraryName = fileAttribute.getAttribute("Val") + vhdlFile.VHDLLibrary = fileset.GetOrCreateVHDLLibrary(libraryName) + elif fileAttribute.getAttribute("Val") == "UsedIn": + usedInAttr.append(fileAttribute.getAttribute("Val")) + + def _ParseDefaultFile(self, _, path, fileset): + File(path, fileSet=fileset) + + def _ParseXDCFile(self, _, path, fileset): + XDCConstraintFile(path, fileSet=fileset) + + def _ParseVerilogFile(self, _, path, fileset): + VerilogSourceFile(path, fileSet=fileset) + + def _ParseXCIFile(self, _, path, fileset): + IPCoreInstantiationFile(path, fileSet=fileset) + + def _ParseFileSetConfig(self, fileNode, fileset): + for option in fileNode.childNodes: + if option.nodeType == Node.ELEMENT_NODE and option.tagName == "Option": + if option.getAttribute("Name") == "TopModule": + fileset.TopLevel = option.getAttribute("Val") + + +@export +class XDCConstraintFile(ConstraintFile, SDCContent): + """A Vivado constraint file (Xilinx Design Constraints; ``*.xdc``).""" + + +@export +class IPCoreDescriptionFile(XMLFile): + pass + + +@export +class IPCoreInstantiationFile(XMLFile): + """A Vivado IP core instantiation file (Xilinx IPCore Instance; ``*.xci``).""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""A vendor specific package for Xilinx.""" + |
+
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+# ==================================================================================================================== # +# _____ ____ _ _ ____ _ _ __ __ _ _ # +# _ __ _ _| ____| _ \ / \ / \ | _ \ _ __ ___ (_) ___ ___| |_| \/ | ___ __| | ___| | # +# | '_ \| | | | _| | | | |/ _ \ / _ \ | |_) | '__/ _ \| |/ _ \/ __| __| |\/| |/ _ \ / _` |/ _ \ | # +# | |_) | |_| | |___| |_| / ___ \ / ___ \ _| __/| | | (_) | | __/ (__| |_| | | | (_) | (_| | __/ | # +# | .__/ \__, |_____|____/_/ \_\/_/ \_(_)_| |_| \___// |\___|\___|\__|_| |_|\___/ \__,_|\___|_| # +# |_| |___/ |__/ # +# ==================================================================================================================== # +# Authors: # +# Patrick Lehmann # +# # +# License: # +# ==================================================================================================================== # +# Copyright 2017-2023 Patrick Lehmann - Boetzingen, Germany # +# Copyright 2014-2016 Technische Universität Dresden - Germany, Chair of VLSI-Design, Diagnostics and Architecture # +# # +# Licensed under the Apache License, Version 2.0 (the "License"); # +# you may not use this file except in compliance with the License. # +# You may obtain a copy of the License at # +# # +# http://www.apache.org/licenses/LICENSE-2.0 # +# # +# Unless required by applicable law or agreed to in writing, software # +# distributed under the License is distributed on an "AS IS" BASIS, # +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # +# See the License for the specific language governing permissions and # +# limitations under the License. # +# # +# SPDX-License-Identifier: Apache-2.0 # +# ==================================================================================================================== # +# +"""An abstract model of EDA tool projects.""" +__author__ = "Patrick Lehmann" +__email__ = "Paebbels@gmail.com" +__copyright__ = "2014-2023, Patrick Lehmann, Unai Martinez-Corral" +__license__ = "Apache License, Version 2.0" +__version__ = "0.5.0" +__keywords__ = ["eda project", "model", "abstract", "xilinx", "vivado", "osvvm", "file set", "file group", "test bench", "test harness"] + +from os.path import relpath as path_relpath +from pathlib import Path as pathlib_Path +from typing import Dict, Union, Optional as Nullable, List, Iterable, Generator, Tuple, Any as typing_Any, Type, Set, \ + Any + +from pyTooling.Decorators import export +from pyTooling.MetaClasses import ExtendedType +from pyTooling.Graph import Graph, Vertex +from pySVModel import SystemVerilogVersion +from pyVHDLModel import VHDLVersion +from pySystemRDLModel import SystemRDLVersion + + +@export +class Attribute(metaclass=ExtendedType): + KEY: str + VALUE_TYPE: typing_Any + + @staticmethod + def resolve(obj: typing_Any, key: Type['Attribute']): + if isinstance(obj, File): + return obj._fileSet[key] + elif isinstance(obj, FileSet): + return obj._design[key] + elif isinstance(obj, Design): + return obj._project[key] + else: + raise Exception("Resolution error") + + +@export +class FileType(ExtendedType): + """ + A :term:`meta-class` to construct *FileType* classes. + + Modifications done by this meta-class: + * Register all classes of type :class:`FileType` or derived variants in a class field :attr:`FileType.FileTypes` in this meta-class. + """ + + FileTypes: Dict[str, 'FileType'] = {} #: Dictionary of all classes of type :class:`FileType` or derived variants + Any: 'FileType' + + def __init__(cls, name: str, bases: Tuple[type, ...], dictionary: Dict[str, typing_Any], **kwargs): + super().__init__(name, bases, dictionary, **kwargs) + cls.Any = cls + + def __new__(cls, className, baseClasses, classMembers: Dict, *args, **kwargs): + fileType = super().__new__(cls, className, baseClasses, classMembers, *args, **kwargs) + cls.FileTypes[className] = fileType + return fileType + + def __getattr__(cls, item) -> 'FileType': + if item[:2] != "__" and item[-2:] != "__": + return cls.FileTypes[item] + else: + return super().__getattribute__(item) + + def __contains__(cls, item) -> bool: + return issubclass(item, cls) + + +@export +class File(metaclass=FileType, slots=True): + """ + A :term:`File` represents a file in a design. This :term:`base-class` is used + for all derived file classes. + + A file can be created standalone and later associated to a fileset, design and + project. Or a fileset, design and/or project can be associated immediately + while creating a file. + + :arg path: Relative or absolute path to the file. + :arg project: Project the file is associated with. + :arg design: Design the file is associated with. + :arg fileSet: Fileset the file is associated with. + """ + + _path: pathlib_Path + _fileType: 'FileType' + _project: Nullable['Project'] + _design: Nullable['Design'] + _fileSet: Nullable['FileSet'] + _attributes: Dict[Type[Attribute], typing_Any] + + def __init__( + self, + path: pathlib_Path, + project: 'Project' = None, + design: 'Design' = None, + fileSet: 'FileSet' = None + ): + self._fileType = getattr(FileTypes, self.__class__.__name__) + self._path = path + if project is not None: + self._project = project + self._design = design + if fileSet is not None: + self.FileSet = fileSet + elif design is not None: + self._project = design._project + self._design = design + self.FileSet = design.DefaultFileSet if fileSet is None else fileSet + elif fileSet is not None: + design = fileSet._design + if design is not None: + self._project = design._project + else: + self._project = None + self._design = design + self.FileSet = fileSet + else: + self._project = None + self._design = None + self._fileSet = None + + self._attributes = {} + self._registerAttributes() + + def _registerAttributes(self): + pass + + @property + def FileType(self) -> 'FileType': + """Read-only property to return the file type of this file.""" + return self._fileType + + @property + def Path(self) -> pathlib_Path: + """Read-only property returning the path of this file.""" + return self._path + + # TODO: setter? + + @property + def ResolvedPath(self) -> pathlib_Path: + """Read-only property returning the resolved path of this file.""" + if self._path.is_absolute(): + return self._path.resolve() + elif self._fileSet is not None: + path = (self._fileSet.ResolvedPath / self._path).resolve() + + if path.is_absolute(): + return path + else: + # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath + return pathlib_Path(path_relpath(path, pathlib_Path.cwd())) + else: + # TODO: message and exception type + raise Exception("") + + @property + def Project(self) -> Nullable['Project']: + """Property setting or returning the project this file is used in.""" + return self._project + + @Project.setter + def Project(self, value: 'Project') -> None: + self._project = value + + if self._fileSet is None: + self._project.DefaultDesign.DefaultFileSet.AddFile(self) + + @property + def Design(self) -> Nullable['Design']: + """Property setting or returning the design this file is used in.""" + return self._design + + @Design.setter + def Design(self, value: 'Design') -> None: + self._design = value + + if self._fileSet is None: + self._design.DefaultFileSet.AddFile(self) + + if self._project is None: + self._project = value._project + elif self._project is not value._project: + raise Exception("The design's project is not identical to the already assigned project.") + + @property + def FileSet(self) -> Nullable['FileSet']: + """Property setting or returning the fileset this file is used in.""" + return self._fileSet + + @FileSet.setter + def FileSet(self, value: 'FileSet') -> None: + self._fileSet = value + value._files.append(self) + + def Validate(self): + """Validate this file.""" + if self._path is None: + raise Exception("Validation: File has no path.") + try: + path = self.ResolvedPath + except Exception as ex: + raise Exception(f"Validation: File '{self._path}' could not compute resolved path.") from ex + if not path.exists(): + raise Exception(f"Validation: File '{self._path}' (={path}) does not exist.") + if not path.is_file(): + raise Exception(f"Validation: File '{self._path}' (={path}) is not a file.") + + if self._fileSet is None: + raise Exception(f"Validation: File '{self._path}' has no fileset.") + if self._design is None: + raise Exception(f"Validation: File '{self._path}' has no design.") + if self._project is None: + raise Exception(f"Validation: File '{self._path}' has no project.") + + def __len__(self) -> int: + return len(self._attributes) + + def __getitem__(self, key: Type[Attribute]) -> Any: + """Index access for returning attributes on this file.""" + if not issubclass(key, Attribute): + raise TypeError("Parameter 'key' is not an 'Attribute'.") + + try: + return self._attributes[key] + except KeyError: + return key.resolve(self, key) + + def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None: + """Index access for setting attributes on this file.""" + if not issubclass(key, Attribute): + raise TypeError("Parameter 'key' is not an 'Attribute'.") + + self._attributes[key] = value + + +FileTypes = File + + +@export +class HumanReadableContent(metaclass=ExtendedType, mixin=True): + """A file type representing human-readable contents.""" + + +@export +class XMLContent(HumanReadableContent, mixin=True): + """A file type representing XML contents.""" + + +@export +class YAMLContent(HumanReadableContent, mixin=True): + """A file type representing YAML contents.""" + + +@export +class JSONContent(HumanReadableContent, mixin=True): + """A file type representing JSON contents.""" + + +@export +class INIContent(HumanReadableContent, mixin=True): + """A file type representing INI contents.""" + + +@export +class TOMLContent(HumanReadableContent, mixin=True): + """A file type representing TOML contents.""" + + +@export +class TCLContent(HumanReadableContent, mixin=True): + """A file type representing content in TCL code.""" + + +@export +class SDCContent(TCLContent, mixin=True): + """A file type representing contents as Synopsys Design Constraints (SDC).""" + + +@export +class PythonContent(HumanReadableContent, mixin=True): + """A file type representing contents as Python source code.""" + + +@export +class TextFile(File, HumanReadableContent): + """A text file (``*.txt``).""" + + +@export +class LogFile(File, HumanReadableContent): + """A log file (``*.log``).""" + + +@export +class XMLFile(File, XMLContent): + """An XML file (``*.xml``).""" + + +@export +class SourceFile(File): + """Base-class of all source files.""" + + +@export +class HDLSourceFile(SourceFile): + """Base-class of all HDL source files.""" + + +@export +class RDLSourceFile(SourceFile): + """Base-class of all RDL source files.""" + + +@export +class NetlistFile(SourceFile): + """Base-class of all netlist source files.""" + + +@export +class EDIFNetlistFile(NetlistFile): + """Netlist file in EDIF (Electronic Design Interchange Format).""" + + +@export +class TCLSourceFile(SourceFile, TCLContent): + """A TCL source file.""" + + +@export +class VHDLSourceFile(HDLSourceFile, HumanReadableContent): + """ + A VHDL source file (of any language version). + + :arg path: Relative or absolute path to the file. + :arg vhdlLibrary: VHDLLibrary this VHDL source file is associated wih. + :arg vhdlVersion: VHDLVersion this VHDL source file is associated wih. + :arg project: Project the file is associated with. + :arg design: Design the file is associated with. + :arg fileSet: Fileset the file is associated with. + """ + + _vhdlLibrary: 'VHDLLibrary' + _vhdlVersion: VHDLVersion + + def __init__(self, path: pathlib_Path, vhdlLibrary: Union[str, 'VHDLLibrary'] = None, vhdlVersion: VHDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None): + super().__init__(path, project, design, fileSet) + + if isinstance(vhdlLibrary, str): + if design is not None: + try: + vhdlLibrary = design.VHDLLibraries[vhdlLibrary] + except KeyError as ex: + raise Exception(f"VHDL library '{vhdlLibrary}' not found in design '{design.Name}'.") from ex + elif project is not None: + try: + vhdlLibrary = project.DefaultDesign.VHDLLibraries[vhdlLibrary] + except KeyError as ex: + raise Exception(f"VHDL library '{vhdlLibrary}' not found in default design '{project.DefaultDesign.Name}'.") from ex + else: + raise Exception(f"Can't lookup VHDL library because neither 'project' nor 'design' is given as a parameter.") + elif isinstance(vhdlLibrary, VHDLLibrary): + self._vhdlLibrary = vhdlLibrary + vhdlLibrary.AddFile(self) + elif vhdlLibrary is None: + self._vhdlLibrary = None + else: + raise TypeError(f"Parameter 'vhdlLibrary' is neither a 'str' nor 'VHDLibrary'.") + + self._vhdlVersion = vhdlVersion + + def Validate(self) -> None: + """Validate this VHDL source file.""" + super().Validate() + + try: + _ = self.VHDLLibrary + except Exception as ex: + raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLLibrary assigned.") from ex + try: + _ = self.VHDLVersion + except Exception as ex: + raise Exception(f"Validation: VHDLSourceFile '{self._path}' (={self.ResolvedPath}) has no VHDLVersion assigned.") from ex + + @property + def VHDLLibrary(self) -> 'VHDLLibrary': + """Property setting or returning the VHDL library this VHDL source file is used in.""" + if self._vhdlLibrary is not None: + return self._vhdlLibrary + elif self._fileSet is not None: + return self._fileSet.VHDLLibrary + else: + raise Exception("VHDLLibrary was neither set locally nor globally.") + + @VHDLLibrary.setter + def VHDLLibrary(self, value: 'VHDLLibrary') -> None: + self._vhdlLibrary = value + value._files.append(self) + + @property + def VHDLVersion(self) -> VHDLVersion: + """Property setting or returning the VHDL version this VHDL source file is used in.""" + if self._vhdlVersion is not None: + return self._vhdlVersion + elif self._fileSet is not None: + return self._fileSet.VHDLVersion + else: + raise Exception("VHDLVersion was neither set locally nor globally.") + + @VHDLVersion.setter + def VHDLVersion(self, value: VHDLVersion) -> None: + self._vhdlVersion = value + + def __repr__(self) -> str: + return f"<VHDL file: '{self.ResolvedPath}'; lib: '{self.VHDLLibrary}'; version: {self.VHDLVersion}>" + + +class VerilogMixIn(metaclass=ExtendedType, mixin=True): + @property + def VerilogVersion(self) -> SystemVerilogVersion: + """Property setting or returning the Verilog version this Verilog source file is used in.""" + if self._version is not None: + return self._version + elif self._fileSet is not None: + return self._fileSet.VerilogVersion + else: + raise Exception("VerilogVersion was neither set locally nor globally.") + + @VerilogVersion.setter + def VerilogVersion(self, value: SystemVerilogVersion) -> None: + self._version = value + + +class SystemVerilogMixIn(metaclass=ExtendedType, mixin=True): + @property + def SVVersion(self) -> SystemVerilogVersion: + """Property setting or returning the SystemVerilog version this SystemVerilog source file is used in.""" + if self._version is not None: + return self._version + elif self._fileSet is not None: + return self._fileSet.SVVersion + else: + raise Exception("SVVersion was neither set locally nor globally.") + + @SVVersion.setter + def SVVersion(self, value: SystemVerilogVersion) -> None: + self._version = value + + +@export +class VerilogBaseFile(HDLSourceFile, HumanReadableContent): + _version: SystemVerilogVersion + + def __init__(self, path: pathlib_Path, version: SystemVerilogVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None): + super().__init__(path, project, design, fileSet) + + self._version = version + + +@export +class VerilogSourceFile(VerilogBaseFile, VerilogMixIn): + """A Verilog source file (of any language version).""" + + +@export +class VerilogHeaderFile(VerilogBaseFile, VerilogMixIn): + """A Verilog header file (of any language version).""" + + +@export +class SystemVerilogBaseFile(VerilogBaseFile): + ... + + +@export +class SystemVerilogSourceFile(SystemVerilogBaseFile, SystemVerilogMixIn): + """A SystemVerilog source file (of any language version).""" + + +@export +class SystemVerilogHeaderFile(SystemVerilogBaseFile, SystemVerilogMixIn): + """A SystemVerilog header file (of any language version).""" + + +@export +class SystemRDLSourceFile(RDLSourceFile, HumanReadableContent): + """A SystemRDL source file (of any language version).""" + + _srdlVersion: SystemRDLVersion + + def __init__(self, path: pathlib_Path, srdlVersion: SystemRDLVersion = None, project: 'Project' = None, design: 'Design' = None, fileSet: 'FileSet' = None): + super().__init__(path, project, design, fileSet) + + self._srdlVersion = srdlVersion + + @property + def SystemRDLVersion(self) -> SystemRDLVersion: + """Property setting or returning the SystemRDL version this SystemRDL source file is used in.""" + if self._srdlVersion is not None: + return self._srdlVersion + elif self._fileSet is not None: + return self._fileSet.SRDLVersion + else: + raise Exception("SRDLVersion was neither set locally nor globally.") + + @SystemRDLVersion.setter + def SystemRDLVersion(self, value: SystemRDLVersion) -> None: + self._srdlVersion = value + + +@export +class PythonSourceFile(SourceFile, PythonContent): + """A Python source file.""" + + +# TODO: move to a Cocotb module +@export +class CocotbPythonFile(PythonSourceFile): + """A Python source file used by Cocotb.""" + + +@export +class ConstraintFile(File, HumanReadableContent): + """Base-class of all constraint files.""" + + +@export +class ProjectFile(File): + """Base-class of all tool-specific project files.""" + + +@export +class CSourceFile(SourceFile): + """Base-class of all ANSI-C source files.""" + + +@export +class CppSourceFile(SourceFile): + """Base-class of all ANSI-C++ source files.""" + + +@export +class SettingFile(File): + """Base-class of all tool-specific setting files.""" + + +@export +class SimulationAnalysisFile(File): + """Base-class of all tool-specific analysis files.""" + + +@export +class SimulationElaborationFile(File): + """Base-class of all tool-specific elaboration files.""" + + +@export +class SimulationStartFile(File): + """Base-class of all tool-specific simulation start-up files.""" + + +@export +class SimulationRunFile(File): + """Base-class of all tool-specific simulation run (execution) files.""" + + +@export +class WaveformConfigFile(File): + """Base-class of all tool-specific waveform configuration files.""" + + +@export +class WaveformDatabaseFile(File): + """Base-class of all tool-specific waveform database files.""" + + +@export +class WaveformExchangeFile(File): + """Base-class of all tool-independent waveform exchange files.""" + + +@export +class FileSet(metaclass=ExtendedType, slots=True): + """ + A :term:`FileSet` represents a group of files. Filesets can have sub-filesets. + + The order of insertion is preserved. A fileset can be created standalone and + later associated to another fileset, design and/or project. Or a fileset, + design and/or project can be associated immediately while creating the + fileset. + + :arg name: Name of this fileset. + :arg topLevel: Name of the fileset's toplevel. + :arg directory: Path of this fileset (absolute or relative to a parent fileset or design). + :arg project: Project the file is associated with. + :arg design: Design the file is associated with. + :arg parent: Parent fileset if this fileset is nested. + :arg vhdlLibrary: Default VHDL library for files in this fileset, if not specified for the file itself. + :arg vhdlVersion: Default VHDL version for files in this fileset, if not specified for the file itself. + :arg verilogVersion: Default Verilog version for files in this fileset, if not specified for the file itself. + :arg svVersion: Default SystemVerilog version for files in this fileset, if not specified for the file itself. + :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself. + """ + + _name: str + _topLevel: Nullable[str] + _project: Nullable['Project'] + _design: Nullable['Design'] + _directory: pathlib_Path + _parent: Nullable['FileSet'] + _fileSets: Dict[str, 'FileSet'] + _files: List[File] + _set: Set + _attributes: Dict[Type[Attribute], typing_Any] + _vhdlLibraries: Dict[str, 'VHDLLibrary'] + _vhdlLibrary: 'VHDLLibrary' + _vhdlVersion: VHDLVersion + _verilogVersion: SystemVerilogVersion + _svVersion: SystemVerilogVersion + _srdlVersion: SystemRDLVersion + + def __init__( + self, + name: str, + topLevel: str = None, + directory: pathlib_Path = pathlib_Path("."), + project: 'Project' = None, + design: 'Design' = None, + parent: Nullable['FileSet'] = None, + vhdlLibrary: Union[str, 'VHDLLibrary'] = None, + vhdlVersion: VHDLVersion = None, + verilogVersion: SystemVerilogVersion = None, + svVersion: SystemVerilogVersion = None, + srdlVersion: SystemRDLVersion = None + ): + self._name = name + self._topLevel = topLevel + if project is not None: + self._project = project + self._design = design if design is not None else project.DefaultDesign + + elif design is not None: + self._project = design._project + self._design = design + else: + self._project = None + self._design = None + self._directory = directory + self._parent = parent + self._fileSets = {} + self._files = [] + self._set = set() + + if design is not None: + design._fileSets[name] = self + + self._attributes = {} + self._vhdlLibraries = {} + + # TODO: handle if vhdlLibrary is a string + self._vhdlLibrary = vhdlLibrary + self._vhdlVersion = vhdlVersion + self._verilogVersion = verilogVersion + self._svVersion = svVersion + self._srdlVersion = srdlVersion + + @property + def Name(self) -> str: + """Property setting or returning the fileset's name.""" + return self._name + + @Name.setter + def Name(self, value: str) -> None: + self._name = value + + @property + def TopLevel(self) -> str: + """Property setting or returning the fileset's toplevel.""" + return self._topLevel + + @TopLevel.setter + def TopLevel(self, value: str) -> None: + self._topLevel = value + + @property + def Project(self) -> Nullable['Project']: + """Property setting or returning the project this fileset is used in.""" + return self._project + + @Project.setter + def Project(self, value: 'Project') -> None: + self._project = value + + @property + def Design(self) -> Nullable['Design']: + """Property setting or returning the design this fileset is used in.""" + if self._design is not None: + return self._design + elif self._parent is not None: + return self._parent.Design + else: + return None + # TODO: raise exception instead + # QUESTION: how to handle if design and parent is set? + + @Design.setter + def Design(self, value: 'Design') -> None: + self._design = value + if self._project is None: + self._project = value._project + elif self._project is not value._project: + raise Exception("The design's project is not identical to the already assigned project.") + + @property + def Directory(self) -> pathlib_Path: + """Property setting or returning the directory this fileset is located in.""" + return self._directory + + @Directory.setter + def Directory(self, value: pathlib_Path) -> None: + self._directory = value + + @property + def ResolvedPath(self) -> pathlib_Path: + """Read-only property returning the resolved path of this fileset.""" + if self._directory.is_absolute(): + return self._directory.resolve() + else: + if self._parent is not None: + directory = self._parent.ResolvedPath + elif self._design is not None: + directory = self._design.ResolvedPath + elif self._project is not None: + directory = self._project.ResolvedPath + else: + # TODO: message and exception type + raise Exception("") + + directory = (directory / self._directory).resolve() + if directory.is_absolute(): + return directory + else: + # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath + return pathlib_Path(path_relpath(directory, pathlib_Path.cwd())) + + @property + def Parent(self) -> Nullable['FileSet']: + """Property setting or returning the parent fileset this fileset is used in.""" + return self._parent + + @Parent.setter + def Parent(self, value: 'FileSet') -> None: + self._parent = value + value._fileSets[self._name] = self + # TODO: check it it already exists + # QUESTION: make an Add fileset method? + + @property + def FileSets(self) -> Dict[str, 'FileSet']: + """Read-only property returning the dictionary of sub-filesets.""" + return self._fileSets + + def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[bool, str, 'FileSet'] = None) -> Generator[File, None, None]: + """ + Method returning the files of this fileset. + + :arg fileType: A filter for file types. Default: ``Any``. + :arg fileSet: Specifies how to handle sub-filesets. + """ + if fileSet is False: + for file in self._files: + if file.FileType in fileType: + yield file + elif fileSet is None: + for fileSet in self._fileSets.values(): + for file in fileSet.Files(fileType): + yield file + for file in self._files: + if file.FileType in fileType: + yield file + else: + if isinstance(fileSet, str): + fileSetName = fileSet + try: + fileSet = self._fileSets[fileSetName] + except KeyError as ex: + raise Exception(f"Fileset {fileSetName} not bound to fileset {self.Name}.") from ex + elif not isinstance(fileSet, FileSet): + raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.") + + for file in fileSet.Files(fileType): + yield file + + def AddFileSet(self, fileSet: "FileSet") -> None: + """ + Method to add a single sub-fileset to this fileset. + + :arg fileSet: A fileset to add to this fileset as sub-fileset. + """ + if not isinstance(fileSet, FileSet): + raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.") + elif fileSet in self._fileSets: + raise Exception("Sub-fileset already contains this fileset.") + elif fileSet.Name in self._fileSets.keys(): + raise Exception(f"Fileset already contains a sub-fileset named '{fileSet.Name}'.") + + self._fileSets[fileSet.Name] = fileSet + fileSet._parent = self + + def AddFileSets(self, fileSets: Iterable["FileSet"]) -> None: + """ + Method to add a multiple sub-filesets to this fileset. + + :arg fileSets: An iterable of filesets to add each to the fileset. + """ + for fileSet in fileSets: + self.AddFileSet(fileSet) + + @property + def FileSetCount(self) -> int: + """Returns number of file sets excl. sub-filesets.""" + return len(self._fileSets) + + @property + def TotalFileSetCount(self) -> int: + """Returns number of file sets incl. sub-filesets.""" + fileSetCount = len(self._fileSets) + for fileSet in self._fileSets.values(): + fileSetCount += fileSet.TotalFileSetCount + + return fileSetCount + + def AddFile(self, file: File) -> None: + """ + Method to add a single file to this fileset. + + :arg file: A file to add to this fileset. + """ + if not isinstance(file, File): + raise TypeError("Parameter 'file' is not of type ProjectModel.File.") + elif file._fileSet is not None: + ex = ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}'.") + ex.add_note(f"A file can't be assigned to another fileset.") + raise ex + elif file in self._set: + ex = ValueError(f"File '{file.Path!s}' is already part of this fileset.") + ex.add_note(f"A file can't be added twice to a fileset.") + raise ex + + self._files.append(file) + self._set.add(file) + file._fileSet = self + + def AddFiles(self, files: Iterable[File]) -> None: + """ + Method to add a multiple files to this fileset. + + :arg files: An iterable of files to add each to the fileset. + """ + for file in files: + self.AddFile(file) + + @property + def FileCount(self) -> int: + """Returns number of files excl. sub-filesets.""" + return len(self._files) + + @property + def TotalFileCount(self) -> int: + """Returns number of files incl. the files in sub-filesets.""" + fileCount = len(self._files) + for fileSet in self._fileSets.values(): + fileCount += fileSet.FileCount + + return fileCount + + def Validate(self) -> None: + """Validate this fileset.""" + if self._name is None or self._name == "": + raise Exception("Validation: FileSet has no name.") + + if self._directory is None: + raise Exception(f"Validation: FileSet '{self._name}' has no directory.") + try: + path = self.ResolvedPath + except Exception as ex: + raise Exception(f"Validation: FileSet '{self._name}' could not compute resolved path.") from ex + if not path.exists(): + raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' does not exist.") + if not path.is_dir(): + raise Exception(f"Validation: FileSet '{self._name}'s directory '{path}' is not a directory.") + + if self._design is None: + raise Exception(f"Validation: FileSet '{self._path}' has no design.") + if self._project is None: + raise Exception(f"Validation: FileSet '{self._path}' has no project.") + + for fileSet in self._fileSets.values(): + fileSet.Validate() + for file in self._files: + file.Validate() + + def __len__(self) -> int: + """Returns number of attributes set on the file set.""" + return len(self._attributes) + + def __getitem__(self, key: Type[Attribute]) -> Any: + """Index access for returning attributes on this file.""" + if not issubclass(key, Attribute): + raise TypeError("Parameter 'key' is not an 'Attribute'.") + + try: + return self._attributes[key] + except KeyError: + return key.resolve(self, key) + + def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None: + """Index access for setting attributes on this file.""" + self._attributes[key] = value + + def GetOrCreateVHDLLibrary(self, name) -> None: + if name in self._vhdlLibraries: + return self._vhdlLibraries[name] + elif name in self._design._vhdlLibraries: + library = self._design._vhdlLibraries[name] + self._vhdlLibraries[name] = library + return library + else: + library = VHDLLibrary(name, design=self._design, vhdlVersion=self._vhdlVersion) + self._vhdlLibraries[name] = library + return library + + @property + def VHDLLibrary(self) -> 'VHDLLibrary': + """Property setting or returning the VHDL library of this fileset.""" + if self._vhdlLibrary is not None: + return self._vhdlLibrary + elif self._parent is not None: + return self._parent.VHDLLibrary + elif self._design is not None: + return self._design.VHDLLibrary + else: + raise Exception("VHDLLibrary was neither set locally nor globally.") + + @VHDLLibrary.setter + def VHDLLibrary(self, value: 'VHDLLibrary') -> None: + self._vhdlLibrary = value + + @property + def VHDLVersion(self) -> VHDLVersion: + """Property setting or returning the VHDL version of this fileset.""" + if self._vhdlVersion is not None: + return self._vhdlVersion + elif self._parent is not None: + return self._parent.VHDLVersion + elif self._design is not None: + return self._design.VHDLVersion + else: + raise Exception("VHDLVersion was neither set locally nor globally.") + + @VHDLVersion.setter + def VHDLVersion(self, value: VHDLVersion) -> None: + self._vhdlVersion = value + + @property + def VerilogVersion(self) -> SystemVerilogVersion: + """Property setting or returning the Verilog version of this fileset.""" + if self._verilogVersion is not None: + return self._verilogVersion + elif self._parent is not None: + return self._parent.VerilogVersion + elif self._design is not None: + return self._design.VerilogVersion + else: + raise Exception("VerilogVersion was neither set locally nor globally.") + + @VerilogVersion.setter + def VerilogVersion(self, value: SystemVerilogVersion) -> None: + self._verilogVersion = value + + @property + def SVVersion(self) -> SystemVerilogVersion: + """Property setting or returning the SystemVerilog version of this fileset.""" + if self._svVersion is not None: + return self._svVersion + elif self._parent is not None: + return self._parent.SVVersion + elif self._design is not None: + return self._design.SVVersion + else: + raise Exception("SVVersion was neither set locally nor globally.") + + @SVVersion.setter + def SVVersion(self, value: SystemVerilogVersion) -> None: + self._svVersion = value + + @property + def SRDLVersion(self) -> SystemRDLVersion: + if self._srdlVersion is not None: + return self._srdlVersion + elif self._parent is not None: + return self._parent.SRDLVersion + elif self._design is not None: + return self._design.SRDLVersion + else: + raise Exception("SRDLVersion was neither set locally nor globally.") + + @SRDLVersion.setter + def SRDLVersion(self, value: SystemRDLVersion) -> None: + self._srdlVersion = value + + def __str__(self) -> str: + """Returns the fileset's name.""" + return self._name + + +@export +class VHDLLibrary(metaclass=ExtendedType, slots=True): + """ + A :term:`VHDLLibrary` represents a group of VHDL source files compiled into the same VHDL library. + + :arg name: The VHDL libraries' name. + :arg project: Project the VHDL library is associated with. + :arg design: Design the VHDL library is associated with. + :arg vhdlVersion: Default VHDL version for files in this VHDL library, if not specified for the file itself. + """ + + _name: str + _project: Nullable['Project'] + _design: Nullable['Design'] + _files: List[File] + _vhdlVersion: VHDLVersion + + _dependencyNode: Vertex + + def __init__( + self, + name: str, + project: 'Project' = None, + design: 'Design' = None, + vhdlVersion: VHDLVersion = None + ): + self._name = name + if project is not None: + self._project = project + self._design = project._defaultDesign if design is None else design + self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph) + + if name in self._design._vhdlLibraries: + raise Exception(f"Library '{name}' already in design '{self._design.Name}'.") + else: + self._design._vhdlLibraries[name] = self + + elif design is not None: + self._project = design._project + self._design = design + self._dependencyNode = Vertex(value=self, graph=design._vhdlLibraryDependencyGraph) + + if name in design._vhdlLibraries: + raise Exception(f"Library '{name}' already in design '{design.Name}'.") + else: + design._vhdlLibraries[name] = self + + else: + self._project = None + self._design = None + self._dependencyNode = None + + self._files = [] + self._vhdlVersion = vhdlVersion + + @property + def Name(self) -> str: + return self._name + + @property + def Project(self) -> Nullable['Project']: + """Property setting or returning the project this VHDL library is used in.""" + return self._project + + @Project.setter + def Project(self, value: 'Project') -> None: + if not isinstance(value, Project): + raise TypeError("Parameter 'value' is not of type 'Project'.") + + if value is None: + # TODO: unlink VHDLLibrary from project + self._project = None + else: + self._project = value + if self._design is None: + self._design = value._defaultDesign + + @property + def Design(self) -> Nullable['Design']: + """Property setting or returning the design this VHDL library is used in.""" + return self._design + + @Design.setter + def Design(self, value: 'Design') -> None: + if not isinstance(value, Design): + raise TypeError("Parameter 'value' is not of type 'Design'.") + + if value is None: + # TODO: unlink VHDLLibrary from design + self._design = None + else: + if self._design is None: + self._design = value + self._dependencyNode = Vertex(value=self, graph=self._design._vhdlLibraryDependencyGraph) + elif self._design is not value: + # TODO: move VHDLLibrary to other design + # TODO: create new vertex in dependency graph and remove vertex from old graph + self._design = value + else: + pass + + if self._project is None: + self._project = value._project + elif self._project is not value._project: + raise Exception("The design's project is not identical to the already assigned project.") + + @property + def Files(self) -> Generator[File, None, None]: + """Read-only property to return all files in this VHDL library.""" + for file in self._files: + yield file + + @property + def VHDLVersion(self) -> VHDLVersion: + """Property setting or returning the VHDL version of this VHDL library.""" + if self._vhdlVersion is not None: + return self._vhdlVersion + elif self._design is not None: + return self._design.VHDLVersion + else: + raise Exception("VHDLVersion is not set on VHDLLibrary nor parent object.") + + @VHDLVersion.setter + def VHDLVersion(self, value: VHDLVersion) -> None: + self._vhdlVersion = value + + def AddDependency(self, library: 'VHDLLibrary') -> None: + library.parent = self + + def AddFile(self, vhdlFile: VHDLSourceFile) -> None: + if not isinstance(vhdlFile, VHDLSourceFile): + raise TypeError(f"Parameter 'vhdlFile' is not a 'VHDLSourceFile'.") + + self._files.append(vhdlFile) + + def AddFiles(self, vhdlFiles: Iterable[VHDLSourceFile]) -> None: + for vhdlFile in vhdlFiles: + if not isinstance(vhdlFile, VHDLSourceFile): + raise TypeError(f"Item '{vhdlFile}' in parameter 'vhdlFiles' is not a 'VHDLSourceFile'.") + + self._files.append(vhdlFile) + + @property + def FileCount(self) -> int: + """Returns number of files.""" + return len(self._files) + + def __str__(self) -> str: + """Returns the VHDL library's name.""" + return self._name + + +@export +class Design(metaclass=ExtendedType, slots=True): + """ + A :term:`Design` represents a group of filesets and the source files therein. + + Each design contains at least one fileset - the :term:`default fileset`. For + designs with VHDL source files, a independent `VHDLLibraries` overlay structure + exists. + + :arg name: The design's name. + :arg topLevel: Name of the design's toplevel. + :arg directory: Path of this design (absolute or relative to the project). + :arg project: Project the design is associated with. + :arg vhdlVersion: Default VHDL version for files in this design, if not specified for the file itself. + :arg verilogVersion: Default Verilog version for files in this design, if not specified for the file itself. + :arg svVersion: Default SystemVerilog version for files in this design, if not specified for the file itself. + :arg srdlVersion: Default SystemRDL version for files in this fileset, if not specified for the file itself. + """ + + _name: str + _topLevel: Nullable[str] + _project: Nullable['Project'] + _directory: pathlib_Path + _fileSets: Dict[str, FileSet] + _defaultFileSet: Nullable[FileSet] + _attributes: Dict[Type[Attribute], typing_Any] + + _vhdlLibraries: Dict[str, VHDLLibrary] + _vhdlVersion: VHDLVersion + _verilogVersion: SystemVerilogVersion + _svVersion: SystemVerilogVersion + _srdlVersion: SystemRDLVersion + _externalVHDLLibraries: List + + _vhdlLibraryDependencyGraph: Graph + _fileDependencyGraph: Graph + + def __init__( + self, + name: str, + topLevel: str = None, + directory: pathlib_Path = pathlib_Path("."), + project: 'Project' = None, + vhdlVersion: VHDLVersion = None, + verilogVersion: SystemVerilogVersion = None, + svVersion: SystemVerilogVersion = None, + srdlVersion: SystemRDLVersion = None + ): + self._name = name + self._topLevel = topLevel + self._project = project + if project is not None: + project._designs[name] = self + self._directory = directory + self._fileSets = {} + self._defaultFileSet = FileSet("default", project=project, design=self) + self._attributes = {} + self._vhdlLibraries = {} + self._vhdlVersion = vhdlVersion + self._verilogVersion = verilogVersion + self._svVersion = svVersion + self._srdlVersion = srdlVersion + self._externalVHDLLibraries = [] + + self._vhdlLibraryDependencyGraph = Graph() + self._fileDependencyGraph = Graph() + + @property + def Name(self) -> str: + """Property setting or returning the design's name.""" + return self._name + + @Name.setter + def Name(self, value: str) -> None: + self._name = value + + @property + def TopLevel(self) -> str: + """Property setting or returning the fileset's toplevel.""" + return self._topLevel + + @TopLevel.setter + def TopLevel(self, value: str) -> None: + self._topLevel = value + + @property + def Project(self) -> Nullable['Project']: + """Property setting or returning the project this design is used in.""" + return self._project + + @Project.setter + def Project(self, value: 'Project') -> None: + self._project = value + + @property + def Directory(self) -> pathlib_Path: + """Property setting or returning the directory this design is located in.""" + return self._directory + + @Directory.setter + def Directory(self, value: pathlib_Path) -> None: + self._directory = value + + @property + def ResolvedPath(self) -> pathlib_Path: + """Read-only property returning the resolved path of this fileset.""" + if self._directory.is_absolute(): + return self._directory.resolve() + elif self._project is not None: + path = (self._project.ResolvedPath / self._directory).resolve() + + if path.is_absolute(): + return path + else: + # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath + return pathlib_Path(path_relpath(path, pathlib_Path.cwd())) + else: + # TODO: message and exception type + raise Exception("") + + @property + def DefaultFileSet(self) -> FileSet: + """Property setting or returning the default fileset of this design.""" + return self._defaultFileSet + + @DefaultFileSet.setter + def DefaultFileSet(self, value: Union[str, FileSet]) -> None: + if isinstance(value, str): + if value not in self._fileSets.keys(): + raise Exception(f"Fileset '{value}' is not in this design.") + + self._defaultFileSet = self._fileSets[value] + elif isinstance(value, FileSet): + if value not in self.FileSets: + raise Exception(f"Fileset '{value}' is not associated to this design.") + + self._defaultFileSet = value + else: + raise ValueError("Unsupported parameter type for 'value'.") + + # TODO: return generator with another method + @property + def FileSets(self) -> Dict[str, FileSet]: + """Read-only property returning the dictionary of filesets.""" + return self._fileSets + + def Files(self, fileType: FileType = FileTypes.Any, fileSet: Union[str, FileSet] = None) -> Generator[File, None, None]: + """ + Method returning the files of this design. + + :arg fileType: A filter for file types. Default: ``Any``. + :arg fileSet: Specifies if all files from all filesets (``fileSet=None``) are files from a single fileset are returned. + """ + if fileSet is None: + for fileSet in self._fileSets.values(): + for file in fileSet.Files(fileType): + yield file + else: + if isinstance(fileSet, str): + try: + fileSet = self._fileSets[fileSet] + except KeyError as ex: + raise Exception(f"Fileset {fileSet.Name} not bound to design {self.Name}.") from ex + elif not isinstance(fileSet, FileSet): + raise TypeError("Parameter 'fileSet' is not of type 'str' or 'FileSet' nor value 'None'.") + + for file in fileSet.Files(fileType): + yield file + + + + def Validate(self) -> None: + """Validate this design.""" + if self._name is None or self._name == "": + raise Exception("Validation: Design has no name.") + + if self._directory is None: + raise Exception(f"Validation: Design '{self._name}' has no directory.") + try: + path = self.ResolvedPath + except Exception as ex: + raise Exception(f"Validation: Design '{self._name}' could not compute resolved path.") from ex + if not path.exists(): + raise Exception(f"Validation: Design '{self._name}'s directory '{path}' does not exist.") + if not path.is_dir(): + raise Exception(f"Validation: Design '{self._name}'s directory '{path}' is not a directory.") + + if len(self._fileSets) == 0: + raise Exception(f"Validation: Design '{self._name}' has no fileset.") + try: + if self._defaultFileSet is not self._fileSets[self._defaultFileSet.Name]: + raise Exception(f"Validation: Design '{self._name}'s default fileset is the same as listed in filesets.") + except KeyError as ex: + raise Exception(f"Validation: Design '{self._name}'s default fileset is not in list of filesets.") from ex + if self._project is None: + raise Exception(f"Validation: Design '{self._path}' has no project.") + + for fileSet in self._fileSets.values(): + fileSet.Validate() + + def __len__(self) -> int: + """Returns number of attributes set on the file set.""" + return len(self._attributes) + + def __getitem__(self, key: Type[Attribute]) -> Any: + if not issubclass(key, Attribute): + raise TypeError("Parameter 'key' is not an 'Attribute'.") + + try: + return self._attributes[key] + except KeyError: + return key.resolve(self, key) + + def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None: + self._attributes[key] = value + + @property + def VHDLLibraries(self) -> Dict[str, VHDLLibrary]: + return self._vhdlLibraries + + @property + def VHDLVersion(self) -> VHDLVersion: + if self._vhdlVersion is not None: + return self._vhdlVersion + elif self._project is not None: + return self._project.VHDLVersion + else: + raise Exception("VHDLVersion was neither set locally nor globally.") + + @VHDLVersion.setter + def VHDLVersion(self, value: VHDLVersion) -> None: + self._vhdlVersion = value + + @property + def VerilogVersion(self) -> SystemVerilogVersion: + if self._verilogVersion is not None: + return self._verilogVersion + elif self._project is not None: + return self._project.VerilogVersion + else: + raise Exception("VerilogVersion was neither set locally nor globally.") + + @VerilogVersion.setter + def VerilogVersion(self, value: SystemVerilogVersion) -> None: + self._verilogVersion = value + + @property + def SVVersion(self) -> SystemVerilogVersion: + if self._svVersion is not None: + return self._svVersion + elif self._project is not None: + return self._project.SVVersion + else: + raise Exception("SVVersion was neither set locally nor globally.") + + @SVVersion.setter + def SVVersion(self, value: SystemVerilogVersion) -> None: + self._svVersion = value + + @property + def SRDLVersion(self) -> SystemRDLVersion: + if self._srdlVersion is not None: + return self._srdlVersion + elif self._project is not None: + return self._project.SRDLVersion + else: + raise Exception("SRDLVersion was neither set locally nor globally.") + + @SRDLVersion.setter + def SRDLVersion(self, value: SystemRDLVersion) -> None: + self._srdlVersion = value + + @property + def ExternalVHDLLibraries(self) -> List: + return self._externalVHDLLibraries + + def AddFileSet(self, fileSet: FileSet) -> None: + if not isinstance(fileSet, FileSet): + raise ValueError("Parameter 'fileSet' is not of type ProjectModel.FileSet.") + elif fileSet in self._fileSets: + raise Exception("Design already contains this fileset.") + elif fileSet.Name in self._fileSets.keys(): + raise Exception(f"Design already contains a fileset named '{fileSet.Name}'.") + + self._fileSets[fileSet.Name] = fileSet + fileSet.Design = self + fileSet._parent = self + + def AddFileSets(self, fileSets: Iterable[FileSet]) -> None: + for fileSet in fileSets: + self.AddFileSet(fileSet) + + @property + def FileSetCount(self) -> int: + """Returns number of file sets excl. sub-filesets.""" + return len(self._fileSets) + + @property + def TotalFileSetCount(self) -> int: + """Returns number of file sets incl. sub-filesets.""" + fileSetCount = len(self._fileSets) + for fileSet in self._fileSets.values(): + fileSetCount += fileSet.TotalFileSetCount + + return fileSetCount + + def AddFile(self, file: File) -> None: + if file.FileSet is None: + self._defaultFileSet.AddFile(file) + else: + raise ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}' and can't be assigned via Design to a default fileset.") + + def AddFiles(self, files: Iterable[File]) -> None: + for file in files: + self.AddFile(file) + + def AddVHDLLibrary(self, vhdlLibrary: VHDLLibrary) -> None: + if vhdlLibrary.Name in self._vhdlLibraries: + if self._vhdlLibraries[vhdlLibrary.Name] is vhdlLibrary: + raise Exception(f"The VHDLLibrary '{vhdlLibrary.Name}' was already added to the design.") + else: + raise Exception(f"A VHDLLibrary with same name ('{vhdlLibrary.Name}') already exists for this design.") + + def __str__(self) -> str: + return self._name + + +@export +class Project(metaclass=ExtendedType, slots=True): + """ + A :term:`Project` represents a group of designs and the source files therein. + + :arg name: The project's name. + :arg rootDirectory: Base-path to the project. + :arg vhdlVersion: Default VHDL version for files in this project, if not specified for the file itself. + :arg verilogVersion: Default Verilog version for files in this project, if not specified for the file itself. + :arg svVersion: Default SystemVerilog version for files in this project, if not specified for the file itself. + """ + + _name: str + _rootDirectory: pathlib_Path + _designs: Dict[str, Design] + _defaultDesign: Design + _attributes: Dict[Type[Attribute], typing_Any] + + _vhdlVersion: VHDLVersion + _verilogVersion: SystemVerilogVersion + _svVersion: SystemVerilogVersion + _srdlVersion: SystemRDLVersion + + def __init__( + self, + name: str, + rootDirectory: pathlib_Path = pathlib_Path("."), + vhdlVersion: VHDLVersion = None, + verilogVersion: SystemVerilogVersion = None, + svVersion: SystemVerilogVersion = None + ): + self._name = name + self._rootDirectory = rootDirectory + self._designs = {} + self._defaultDesign = Design("default", project=self) + self._attributes = {} + self._vhdlVersion = vhdlVersion + self._verilogVersion = verilogVersion + self._svVersion = svVersion + + @property + def Name(self) -> str: + """Property setting or returning the project's name.""" + return self._name + + @property + def RootDirectory(self) -> pathlib_Path: + """Property setting or returning the root directory this project is located in.""" + return self._rootDirectory + + @RootDirectory.setter + def RootDirectory(self, value: pathlib_Path) -> None: + self._rootDirectory = value + + @property + def ResolvedPath(self) -> pathlib_Path: + """Read-only property returning the resolved path of this fileset.""" + path = self._rootDirectory.resolve() + if self._rootDirectory.is_absolute(): + return path + else: + # WORKAROUND: https://stackoverflow.com/questions/67452690/pathlib-path-relative-to-vs-os-path-relpath + return pathlib_Path(path_relpath(path, pathlib_Path.cwd())) + + # TODO: return generator with another method + @property + def Designs(self) -> Dict[str, Design]: + return self._designs + + @property + def DefaultDesign(self) -> Design: + return self._defaultDesign + + def Validate(self) -> None: + """Validate this project.""" + if self._name is None or self._name == "": + raise Exception("Validation: Project has no name.") + + if self._rootDirectory is None: + raise Exception(f"Validation: Project '{self._name}' has no root directory.") + try: + path = self.ResolvedPath + except Exception as ex: + raise Exception(f"Validation: Project '{self._name}' could not compute resolved path.") from ex + if not path.exists(): + raise Exception(f"Validation: Project '{self._name}'s directory '{path}' does not exist.") + if not path.is_dir(): + raise Exception(f"Validation: Project '{self._name}'s directory '{path}' is not a directory.") + + if len(self._designs) == 0: + raise Exception(f"Validation: Project '{self._name}' has no design.") + try: + if self._defaultDesign is not self._designs[self._defaultDesign.Name]: + raise Exception(f"Validation: Project '{self._name}'s default design is the same as listed in designs.") + except KeyError as ex: + raise Exception(f"Validation: Project '{self._name}'s default design is not in list of designs.") from ex + + for design in self._designs.values(): + design.Validate() + + @property + def DesignCount(self) -> int: + """Returns number of designs.""" + return len(self._designs) + + def __len__(self) -> int: + """Returns number of attributes set on the file set.""" + return len(self._attributes) + + def __getitem__(self, key: Type[Attribute]) -> Any: + if not issubclass(key, Attribute): + raise TypeError("Parameter 'key' is not an 'Attribute'.") + + try: + return self._attributes[key] + except KeyError: + return key.resolve(self, key) + + def __setitem__(self, key: Type[Attribute], value: typing_Any) -> None: + self._attributes[key] = value + + @property + def VHDLVersion(self) -> VHDLVersion: + # TODO: check for None and return exception + return self._vhdlVersion + + @VHDLVersion.setter + def VHDLVersion(self, value: VHDLVersion) -> None: + self._vhdlVersion = value + + @property + def VerilogVersion(self) -> SystemVerilogVersion: + # TODO: check for None and return exception + return self._verilogVersion + + @VerilogVersion.setter + def VerilogVersion(self, value: SystemVerilogVersion) -> None: + self._verilogVersion = value + + @property + def SVVersion(self) -> SystemVerilogVersion: + # TODO: check for None and return exception + return self._svVersion + + @SVVersion.setter + def SVVersion(self, value: SystemVerilogVersion) -> None: + self._svVersion = value + + @property + def SRDLVersion(self) -> SystemRDLVersion: + # TODO: check for None and return exception + return self._srdlVersion + + @SRDLVersion.setter + def SRDLVersion(self, value: SystemRDLVersion) -> None: + self._srdlVersion = value + + def __str__(self) -> str: + return self._name + |
+
| File | +Imprecision | +Lines | +
|---|---|---|
| Total | +14.67% imprecise | +2569 LOC | +
| ProjectModel | +12.09% imprecise | +1687 LOC | +
| ProjectModel.Altera | +0.00% imprecise | +31 LOC | +
| ProjectModel.Altera.Quartus | +2.27% imprecise | +44 LOC | +
| ProjectModel.Attributes | +7.55% imprecise | +53 LOC | +
| ProjectModel.GHDL | +2.56% imprecise | +39 LOC | +
| ProjectModel.Intel | +0.00% imprecise | +31 LOC | +
| ProjectModel.Intel.QuartusPrime | +2.27% imprecise | +44 LOC | +
| ProjectModel.MentorGraphics | +0.00% imprecise | +31 LOC | +
| ProjectModel.MentorGraphics.ModelSim | +2.04% imprecise | +49 LOC | +
| ProjectModel.MentorGraphics.QuestaSim | +2.04% imprecise | +49 LOC | +
| ProjectModel.OSVVM | +38.02% imprecise | +192 LOC | +
| ProjectModel.VHDL | +0.00% imprecise | +0 LOC | +
| ProjectModel.Verilog | +2.56% imprecise | +39 LOC | +
| ProjectModel.Xilinx | +0.00% imprecise | +31 LOC | +
| ProjectModel.Xilinx.ISE | +2.27% imprecise | +44 LOC | +
| ProjectModel.Xilinx.Vivado | +43.41% imprecise | +205 LOC | +