diff --git a/Platform/EFI_Binaries b/Platform/EFI_Binaries index 439bf4154..d542f8a96 160000 --- a/Platform/EFI_Binaries +++ b/Platform/EFI_Binaries @@ -1 +1 @@ -Subproject commit 439bf415463f09eaf14fbbfc73c1a66141f1ba70 +Subproject commit d542f8a969890b2f0d856be87e3d315768201853 diff --git a/Platform/LG/sm8150/AcpiTables/mh2lm5g/DSDT.aml b/Platform/LG/sm8150/AcpiTables/mh2lm5g/DSDT.aml new file mode 100644 index 000000000..acf1b12f9 Binary files /dev/null and b/Platform/LG/sm8150/AcpiTables/mh2lm5g/DSDT.aml differ diff --git a/Platform/LG/sm8150/FdtBlob_compat/mh2lm5g.dtb b/Platform/LG/sm8150/FdtBlob_compat/mh2lm5g.dtb new file mode 100644 index 000000000..83946926e Binary files /dev/null and b/Platform/LG/sm8150/FdtBlob_compat/mh2lm5g.dtb differ diff --git a/Platform/LG/sm8150/mh2lm5g.dsc b/Platform/LG/sm8150/mh2lm5g.dsc new file mode 100644 index 000000000..93ecfd363 --- /dev/null +++ b/Platform/LG/sm8150/mh2lm5g.dsc @@ -0,0 +1,39 @@ +[Defines] + VENDOR_NAME = LG + PLATFORM_NAME = mh2lm5g + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Qualcomm/sm8150/sm8150.fdf + DEVICE_DXE_FV_COMPONENTS = Platform/LG/sm8150/mh2lm.fdf.inc + +!include Platform/Qualcomm/sm8150/sm8150.dsc + +[BuildOptions.common] + GCC:*_*_AARCH64_CC_FLAGS = -DENABLE_SIMPLE_INIT -DMEMMAP_LG_HACKS + +[PcdsFixedAtBuild.common] + gQcomTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gQcomTokenSpaceGuid.PcdMipiFrameBufferHeight|2340 + gQcomTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9D200000 + + # Simple Init + gSimpleInitTokenSpaceGuid.PcdGuiDefaultDPI|355 + + gRenegadePkgTokenSpaceGuid.PcdDeviceVendor|"LG" + gRenegadePkgTokenSpaceGuid.PcdDeviceProduct|"V50s ThinQ" + gRenegadePkgTokenSpaceGuid.PcdDeviceCodeName|"mh2lm5G" + + # Synaptics Touchscren + gQcomTokenSpaceGuid.PcdTouchCtlrAddress|0x20 + gQcomTokenSpaceGuid.PcdTouchCtlrResetPin|54 + gQcomTokenSpaceGuid.PcdTouchCtlrIntPin|122 + gQcomTokenSpaceGuid.PcdTouchCtlrI2cDevice|18 + gQcomTokenSpaceGuid.PcdTouchMaxX|1080 + gQcomTokenSpaceGuid.PcdTouchMaxY|2340 + gQcomTokenSpaceGuid.PcdTouchCtlrVddPin|59 + gQcomTokenSpaceGuid.PcdTouchCtlrVddIoPin|152 diff --git a/Platform/LG/sm8150/mh2lm5g.fdf.inc b/Platform/LG/sm8150/mh2lm5g.fdf.inc new file mode 100644 index 000000000..0d0966ecb --- /dev/null +++ b/Platform/LG/sm8150/mh2lm5g.fdf.inc @@ -0,0 +1,57 @@ +// per-device BSP DXEs + +FILE DRIVER = 8e9bd160-b184-11df-94e2-0800200c9a66 { + SECTION DXE_DEPEX = Platform/EFI_Binaries/Drivers/sm8150/DALSys/DALSys.depex + SECTION PE32 = Platform/EFI_Binaries/Drivers/Devices/mh2lm/DALSys/DALSys.efi + SECTION UI = "DALSys" +} + +FILE DRIVER = 5bd181db-0487-4f1a-ae73-820e165611b3 { + SECTION DXE_DEPEX = Platform/EFI_Binaries/Drivers/sm8150/ButtonsDxe/ButtonsDxe.depex + SECTION PE32 = Platform/EFI_Binaries/Drivers/Devices/mh2lm/ButtonsDxe/ButtonsDxe.efi + SECTION UI = "ButtonsDxe" +} + +FILE DRIVER = f10f76db-42c1-533f-34a8-69be24653110 { + SECTION DXE_DEPEX = Platform/EFI_Binaries/Drivers/sm8150/SdccDxe/SdccDxe.depex + SECTION PE32 = Platform/EFI_Binaries/Drivers/sm8150/SdccDxe/SdccDxe.efi + SECTION UI = "SdccDxe" + } + +FILE DRIVER = 11faed4c-b21f-4d88-8e48-c4c28a1e50df { + SECTION DXE_DEPEX = Platform/EFI_Binaries/Drivers/sm8150/WP_Binaries/UsbPwrCtrlDxe/UsbPwrCtrlDxe.depex + SECTION PE32 = Platform/EFI_Binaries/Drivers/sm8150/WP_Binaries/UsbPwrCtrlDxe/UsbPwrCtrlDxe.efi + SECTION UI = "UsbPwrCtrlDxe" +} + +// ACPI Tables +FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { + +# Customized DSDT + SECTION RAW = Platform/LG/sm8150/AcpiTables/mh2lm/DSDT.aml +# Common Tables + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/APIC.aml +# SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/BERT.aml +# SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/BGRT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/CSRT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/DBG2.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/FACP.aml +# SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/FPDT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/GTDT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/IORT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/MCFG.aml +# SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/MSDM.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/PPTT.aml + SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/TPM2.aml +# SECTION RAW = Silicon/Qualcomm/sm8150/AcpiTables/BuiltIn/XSDT.aml + SECTION UI = "AcpiTables" +} + +// Mainline device tree blob + + + # + # Touchscreen + # + # INF Silicon/Qualcomm/QcomPkg/Drivers/SynapticsTCMDxe/SynapticsTCMDevice.inf + # INF Silicon/Qualcomm/QcomPkg/Drivers/SynapticsTCMDxe/SynapticsTCMDxe.inf \ No newline at end of file diff --git a/Platform/Qualcomm/sdm845/sdm845.fdf b/Platform/Qualcomm/sdm845/sdm845.fdf index 60a05b55b..8bb9b5f57 100644 --- a/Platform/Qualcomm/sdm845/sdm845.fdf +++ b/Platform/Qualcomm/sdm845/sdm845.fdf @@ -31,7 +31,7 @@ ErasePolarity = 1 # This one is tricky, it must be: BlockSize * NumBlocks = Size BlockSize = 0x00001000 -NumBlocks = 0x2000 +NumBlocks = 0x700 ################################################################################ # @@ -49,7 +49,7 @@ NumBlocks = 0x2000 # ################################################################################ -0x00000000|0x02000000 +0x00000000|0x00700000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT @@ -214,6 +214,15 @@ READ_LOCK_STATUS = TRUE INF GPLDrivers/Application/SwitchSlotsApp/SwitchSlotsApp.inf !endif +!if $(ENABLE_LINUX_UTILS) == 1 + FILE FREEFORM = 4b0364cf-1c5b-47aa-9073-d7b5039ce49b { + SECTION RAW = tools/simpleinit.static.uefi.cfg + SECTION UI = "simpleinit.static.uefi.cfg" + } + + INF Platform/RenegadePkg/Application/Reboot2PayloadApp/Reboot2PayloadApp.inf +!endif + # Device specific fdf !include $(DEVICE_DXE_FV_COMPONENTS) diff --git a/Platform/Qualcomm/sm7125/sm7125.fdf b/Platform/Qualcomm/sm7125/sm7125.fdf index 9d3fe0c64..01fcd7339 100644 --- a/Platform/Qualcomm/sm7125/sm7125.fdf +++ b/Platform/Qualcomm/sm7125/sm7125.fdf @@ -31,7 +31,7 @@ ErasePolarity = 1 # This one is tricky, it must be: BlockSize * NumBlocks = Size BlockSize = 0x00001000 -NumBlocks = 0x2000 +NumBlocks = 0x700 ################################################################################ # @@ -49,7 +49,7 @@ NumBlocks = 0x2000 # ################################################################################ -0x00000000|0x02000000 +0x00000000|0x00700000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT @@ -208,6 +208,15 @@ READ_LOCK_STATUS = TRUE INF GPLDrivers/Application/SwitchSlotsApp/SwitchSlotsApp.inf !endif +!if $(ENABLE_LINUX_UTILS) == 1 + FILE FREEFORM = 4b0364cf-1c5b-47aa-9073-d7b5039ce49b { + SECTION RAW = tools/simpleinit.static.uefi.cfg + SECTION UI = "simpleinit.static.uefi.cfg" + } + + INF Platform/RenegadePkg/Application/Reboot2PayloadApp/Reboot2PayloadApp.inf +!endif + # Device specific fdf !include $(DEVICE_DXE_FV_COMPONENTS) diff --git a/Platform/Samsung/sm7150/FdtBlob_compat/a71.dtb b/Platform/Samsung/sm7150/FdtBlob_compat/a71.dtb new file mode 100644 index 000000000..2dc552bf1 Binary files /dev/null and b/Platform/Samsung/sm7150/FdtBlob_compat/a71.dtb differ diff --git a/Platform/Samsung/sm7150/a71.dsc b/Platform/Samsung/sm7150/a71.dsc new file mode 100644 index 000000000..15d39bec2 --- /dev/null +++ b/Platform/Samsung/sm7150/a71.dsc @@ -0,0 +1,29 @@ +[Defines] + VENDOR_NAME = Samsung + PLATFORM_NAME = a71 + PLATFORM_GUID = 28f1a3bf-193a-47e3-a7b9-5a435eaab2ee + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010019 + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME) + SUPPORTED_ARCHITECTURES = AARCH64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = Platform/Qualcomm/sm7150/sm7150.fdf + DEVICE_DXE_FV_COMPONENTS = Platform/Samsung/sm7150/a71.fdf.inc + +!include Platform/Qualcomm/sm7150/sm7150.dsc + +[BuildOptions.common] + GCC:*_*_AARCH64_CC_FLAGS = -DENABLE_SIMPLE_INIT -DENABLE_LINUX_SIMPLE_MASS_STORAGE + +[PcdsFixedAtBuild.common] + gQcomTokenSpaceGuid.PcdMipiFrameBufferWidth|1080 + gQcomTokenSpaceGuid.PcdMipiFrameBufferHeight|2400 + # gQcomTokenSpaceGuid.PcdMipiFrameBufferAddress|0x9c400000 + + # Simple Init + gSimpleInitTokenSpaceGuid.PcdGuiDefaultDPI|350 + + gRenegadePkgTokenSpaceGuid.PcdDeviceVendor|"Samsung" + gRenegadePkgTokenSpaceGuid.PcdDeviceProduct|"Galaxy A71" + gRenegadePkgTokenSpaceGuid.PcdDeviceCodeName|"a71" diff --git a/Platform/Samsung/sm7150/a71.fdf.inc b/Platform/Samsung/sm7150/a71.fdf.inc new file mode 100644 index 000000000..4b78b3cf1 --- /dev/null +++ b/Platform/Samsung/sm7150/a71.fdf.inc @@ -0,0 +1,5 @@ +// per-device BSP DXEs + +//FILE FREEFORM = 25462CDA-221F-47DF-AC1D-259CFAA4E326 { + //SECTION RAW = Platform/Samsung/sm7150/FdtBlob/a71.dtb +//} diff --git a/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml b/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_HUAXING.aml similarity index 71% rename from Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml rename to Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_HUAXING.aml index 6e73bd0f4..3ce1bf531 100644 Binary files a/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml and b/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_HUAXING.aml differ diff --git a/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_TIANMA.aml b/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_TIANMA.aml new file mode 100644 index 000000000..ace096f86 Binary files /dev/null and b/Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_TIANMA.aml differ diff --git a/Platform/Xiaomi/sm7125/miatoll-huaxing.sh.inc b/Platform/Xiaomi/sm7125/miatoll-huaxing.sh.inc new file mode 100644 index 000000000..0a99d85be --- /dev/null +++ b/Platform/Xiaomi/sm7125/miatoll-huaxing.sh.inc @@ -0,0 +1,5 @@ +function platform_pre_acpi(){ + cp Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_HUAXING.aml Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml + DEVICE="miatoll" + EXT="-huaxing" +} diff --git a/Platform/Xiaomi/sm7125/miatoll-tianma.sh.inc b/Platform/Xiaomi/sm7125/miatoll-tianma.sh.inc new file mode 100644 index 000000000..53ba8b732 --- /dev/null +++ b/Platform/Xiaomi/sm7125/miatoll-tianma.sh.inc @@ -0,0 +1,5 @@ +function platform_pre_acpi(){ + cp Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT_TIANMA.aml Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml + DEVICE="miatoll" + EXT="-tianma" +} diff --git a/Platform/Xiaomi/sm7125/miatoll.fdf.inc b/Platform/Xiaomi/sm7125/miatoll.fdf.inc index de601d33e..38e57800b 100644 --- a/Platform/Xiaomi/sm7125/miatoll.fdf.inc +++ b/Platform/Xiaomi/sm7125/miatoll.fdf.inc @@ -1,16 +1,23 @@ + + // ACPI Tables FILE FREEFORM = 7E374E25-8E01-4FEE-87F2-390C23C606CD { # Customized DSDT SECTION RAW = Platform/Xiaomi/sm7125/AcpiTables/miatoll/DSDT.aml # Common Tables -# SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/DBG2.aml - SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACP.aml - SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/GTDT.aml -# SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/IORT.aml - SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MADT.aml - SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/PPTT.aml - SECTION UI = "AcpiTables" + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/APIC.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/CSRT.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/DBG2.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACP.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACS.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/GTDT.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/IORT.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MCFG.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/PPTT.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/SPCR.aml + SECTION RAW = Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/TPM2.aml + SECTION UI = "AcpiTables" } diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MADT.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/APIC.aml similarity index 100% rename from Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MADT.aml rename to Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/APIC.aml diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/CSRT.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/CSRT.aml new file mode 100644 index 000000000..354500ce2 Binary files /dev/null and b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/CSRT.aml differ diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACS.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACS.aml new file mode 100644 index 000000000..1e0249676 Binary files /dev/null and b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/FACS.aml differ diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MCFG.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MCFG.aml new file mode 100644 index 000000000..bf8334b8d Binary files /dev/null and b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/MCFG.aml differ diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/SPCR.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/SPCR.aml new file mode 100644 index 000000000..89d386891 Binary files /dev/null and b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/SPCR.aml differ diff --git a/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/TPM2.aml b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/TPM2.aml new file mode 100644 index 000000000..f74d05dd5 Binary files /dev/null and b/Silicon/Qualcomm/sm7125/AcpiTables/BuiltIn/TPM2.aml differ diff --git a/Silicon/Qualcomm/sm7125/Library/PlatformMemoryMapLib/PlatformMemoryMapLib.c b/Silicon/Qualcomm/sm7125/Library/PlatformMemoryMapLib/PlatformMemoryMapLib.c index ed70feafe..20798e610 100644 --- a/Silicon/Qualcomm/sm7125/Library/PlatformMemoryMapLib/PlatformMemoryMapLib.c +++ b/Silicon/Qualcomm/sm7125/Library/PlatformMemoryMapLib/PlatformMemoryMapLib.c @@ -4,60 +4,73 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { /* Name Address Length HobOption ResourceAttribute ArmAttributes ResourceType MemoryType */ - - /* DDR Regions */ - {"Hypervisor", 0x80000000, 0x00600000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, /* Added */ - // Check: RFSLocateAndProtectSharedArea will get called + /* DDR Regions */ + {"HYP", 0x80000000, 0x00600000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, /* Added */ {"MPSS_EFS", 0x80600000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, - {"AOP Image", 0x80800000, 0x00020000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, + {"AOP Image", 0x80800000, 0x00020000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, /* Added */ {"AOP CMD DB", 0x80820000, 0x00020000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, {"GPU PRR", 0x80840000, 0x00010000, AddMem, MEM_RES, WRITE_COMBINEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, - {"HLOS 1", 0x80850000, 0x000AF000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, - {"SEC APPs", 0x808FF000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, - {"SMEM", 0x80900000, 0x00200000, AddMem, MEM_RES, WRITE_COMBINEABLE, Reserv, UNCACHED_UNBUFFERED}, - {"TZ", 0x80B00000, 0x01700000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, - // secapp-region - {"TZApps", 0x82200000, 0x02200000, NoHob, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, - {"PIL_REGION", 0x84400000, 0x0F800000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, - {"HLOS 2", 0x93C00000, 0x08400000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + {"RAM Partition", 0x80850000, 0x000AF000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"TZApps", 0x808ff000, 0x00001000, NoHob, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"SMEM", 0x80900000, 0x00200000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED}, + {"QSEE", 0x80B00000, 0x03900000, NoHob, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, + {"HLOS Entry1", 0x84400000, 0x01700000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, + {"PIL Reserved", 0x85B00000, 0x0EB00000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, + {"DXE Heap", 0x94600000, 0x04500000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"DBI Dump", 0x98B00000, 0x00D70000, NoHob, MMAP_IO, INITIALIZED, Conv, UNCACHED_UNBUFFERED_XN}, + {"HLOS Entry2", 0x99870000, 0x01F90000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"Sched Heap", 0x9B800000, 0x00400000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"RAM Partition", 0x9BC00000, 0x00400000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, {"Display Reserved", 0x9C000000, 0x01800000, AddMem, MEM_RES, SYS_MEM_CAP, Reserv, WRITE_THROUGH_XN}, - {"Runtime Data", 0x9D800000, 0x00080000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, - {"Runtime Code", 0x9D880000, 0x00080000, AddMem, SYS_MEM, SYS_MEM_CAP, RtCode, WRITE_BACK_XN}, - {"HLOS 3", 0x9D900000, 0x00700000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, - // qseecom_mem - {"TGCM", 0x9E000000, 0x01400000, AddMem, MEM_RES, WRITE_COMBINEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, - {"HLOS 4", 0x9F400000, 0x00400000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, - {"FV Region", 0x9F800000, 0x00400000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"RAM Partition", 0x9D800000, 0x00400000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"ADSP RPC", 0x9DC00000, 0x00800000, AddMem, MEM_RES, UNCACHEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, + {"TGCM", 0x9E400000, 0x01400000, AddMem, MEM_RES, WRITE_COMBINEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, + {"FV Region", 0x9F800000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"RAM Partition", 0x9FA00000, 0x00200000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, {"UEFI FD", 0x9FC00000, 0x00300000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK}, {"SEC Heap", 0x9FF00000, 0x0008C000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, {"CPU Vectors", 0x9FF8C000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK}, {"MMU PageTables", 0x9FF8D000, 0x00003000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, - {"UEFI Stack", 0x9FF90000, 0x00040000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"USB UCSI Temp", 0x9FF90000, 0x00002000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, + {"RAM Partition", 0x9FF92000, 0x0001E000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, + {"UEFI Stack", 0x9FFB0000, 0x00020000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK_XN}, + {"RSRV1", 0x9FFD0000, 0x0000A000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"TPMControl", 0x9FFDA000, 0x00003000, AddMem, MEM_RES, WRITE_COMBINEABLE, RtData, UNCACHED_UNBUFFERED_XN}, + {"Reset Data", 0x9FFDD000, 0x00004000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, UNCACHED_UNBUFFERED_XN}, + {"RSRV3", 0x9FFE1000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Capsule Header", 0x9FFE2000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, UNCACHED_UNBUFFERED_XN}, + {"RSRV2", 0x9FFE3000, 0x00014000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Log Buffer", 0x9FFF7000, 0x00008000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + {"Info Blk", 0x9FFFF000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, RtData, WRITE_BACK_XN}, + + + /************************************************** + * * + * RamPartitionDXE will add MLVM regions Later. * + * 0xA0000000 to MEMORY_HOLE_START_ADDR * + * * + **************************************************/ +// {"Hypervisor", 0x85700000, 0x00600000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, /* Added */ +// {"TZ", 0x86200000, 0x01800000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, NS_DEVICE}, /* Added */ +// {"RAM Partition", 0x89B00000, 0x01C00000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, +// {"RAM Partition", 0x9FF92000, 0x0001E000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - // Note: Runtime memory has to be on an alignment of 0x10000 - {"RSRV1", 0x9FFD0000, 0x0000A000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, - {"TPMControl", 0x9FFDA000, 0x00003000, AddMem, MEM_RES, WRITE_COMBINEABLE, Reserv, UNCACHED_UNBUFFERED_XN}, - {"Reset Data", 0x9FFDD000, 0x00004000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, - {"RSRV3", 0x9FFE1000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, - {"Capsule Header", 0x9FFE2000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, UNCACHED_UNBUFFERED_XN}, - {"RSRV2", 0x9FFE3000, 0x00014000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, - {"Log Buffer", 0x9FFF7000, 0x00008000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, - {"Info Blk", 0x9FFFF000, 0x00001000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, +// {"Secure DSP", 0xA0000000, 0x01200000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, +// {"Kernel", 0xA1200000, 0x08000000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, +// {"MLVM_APSS", 0xA9200000, 0x03A00000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, +// {"MLVM_1", 0xACC00000, 0x0FC00000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + + //6GB + // Memory hole: 0xBC800000 - 0xBFFFFFFF BC800000 + // Size: 0x33FFFFF /* RAM partition regions */ - {"Secure DSP", 0xA0000000, 0x01200000, AddMem, SYS_MEM, SYS_MEM_CAP, Reserv, WRITE_BACK_XN}, - {"DXE Heap", 0xA1200000, 0x1B700000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - /* Memory hole */ - /* 0xBC900000 - 0xBFFFFFFF */ - {"DBI Dump", 0xC0000000, 0x00F00000, NoHob, MMAP_IO, INITIALIZED, Reserv, UNCACHED_UNBUFFERED_XN}, - {"RAM Partition", 0xC0F00000, 0x0D100000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - {"UEFI FD", 0xCE000000, 0x02000000, AddMem, SYS_MEM, SYS_MEM_CAP, BsData, WRITE_BACK}, - {"RAM Partition", 0xD0000000, 0xB0000000, Mem6G, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + {"RAM Partition", 0x0C0000000, 0x40000000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + {"RAM Partition", 0x100000000, 0x80000000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, + + /* Only need to map 4GB */ - {"RAM Partition", 0x180000000, 0x20000000, Mem6G, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - {"RAM Partition", 0x1a0000000, 0x20000000, Mem6G, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - {"RAM Partition", 0x1c0000000, 0x20000000, Mem6G, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, - {"RAM Partition", 0x1e0000000, 0x20000000, Mem6G, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, +// {"RAM Partition", 0x180000000, 0x80000000, AddMem, SYS_MEM, SYS_MEM_CAP, Conv, WRITE_BACK_XN}, /* Other memory regions */ {"AOP_SS_MSG_RAM", 0x0C300000, 0x00100000, NoHob, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, @@ -65,7 +78,7 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { {"IMEM Cookie Base", 0x146AA000, 0x00001000, AddDev, MMAP_IO, INITIALIZED, Conv, NS_DEVICE}, /* Register regions */ - {"GCC_CLK_CTL", 0x00100000, 0x00200000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"GCC CLK CTL", 0x00100000, 0x00200000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"SECURITY CONTROL", 0x00780000, 0x00007000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"PRNG_CFG_PRNG", 0x00790000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"SDC1_REG", 0x007C0000, 0x00020000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, @@ -74,7 +87,7 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { {"UFS UFS REGS", 0x01D80000, 0x00020000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"CRYPTO0 CRYPTO", 0x01DC0000, 0x00040000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"TCSR_TCSR_REGS", 0x01FC0000, 0x00040000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, - {"TLMM_EAST", 0x03500000, 0x00300000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"TLMM_WEST", 0x03500000, 0x00300000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"TLMM_NORTH", 0x03900000, 0x00300000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"TLMM_SOUTH", 0x03D00000, 0x00300000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"GPU_CC", 0x05090000, 0x00009000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, @@ -89,6 +102,7 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { {"PDC_DISP_SEQ", 0x0B4A0000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"RPMH_BCM_BCM_TOP", 0x0BA00000, 0x00200000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"SLP_CNTR_TSENS", 0x0C221000, 0x00003000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"TSENS0_TM_PSHOLD", 0x0C263000, 0x00003000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"PMIC ARB SPMI", 0x0C400000, 0x02800000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"VIDEO_CC", 0x0AB00000, 0x00020000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"NPU_CC", 0x09980000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, @@ -100,7 +114,7 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { {"APSS_RSC_RSCCR", 0x18200000, 0x00030000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"APSS_GIC500_GICD", 0x17A00000, 0x00010000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"APSS_GIC500_GICR", 0x17A60000, 0x00100000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, - {"QTIMER", 0x17C00000, 0x00110000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, + {"QTIMER", 0x17C20000, 0x00110000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"APSS_ACTPM_WRAP", 0x18300000, 0x000B0000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"MDSS", 0x0AE00000, 0x00134000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, {"SMMU", 0x15000000, 0x000D0000, AddDev, MMAP_IO, UNCACHEABLE, MmIO, NS_DEVICE}, @@ -111,4 +125,4 @@ static ARM_MEMORY_REGION_DESCRIPTOR_EX gDeviceMemoryDescriptorEx[] = { ARM_MEMORY_REGION_DESCRIPTOR_EX *GetPlatformMemoryMap() { return gDeviceMemoryDescriptorEx; -} \ No newline at end of file +} diff --git a/configs/devices/a71.conf b/configs/devices/a71.conf new file mode 100644 index 000000000..6affc125d --- /dev/null +++ b/configs/devices/a71.conf @@ -0,0 +1,7 @@ +SOC_PLATFORM="SM7150" +VENDOR_NAME="Samsung" +PLATFORM_NAME="a71" + +# mkbootimg config +BOOTIMG_OS_PATCH_LEVEL="2022-10" +BOOTIMG_OS_VERSION=13.0.0 diff --git a/configs/devices/mh2lm5g.conf b/configs/devices/mh2lm5g.conf new file mode 100644 index 000000000..1343d8cd3 --- /dev/null +++ b/configs/devices/mh2lm5g.conf @@ -0,0 +1,7 @@ +SOC_PLATFORM="SM8150" +VENDOR_NAME="LG" +PLATFORM_NAME="mh2lm5g" + +# mkbootimg config +BOOTIMG_OS_PATCH_LEVEL="2022-06" +BOOTIMG_OS_VERSION=12.0.0 diff --git a/configs/devices/miatoll.conf b/configs/devices/miatoll-huaxing.conf similarity index 100% rename from configs/devices/miatoll.conf rename to configs/devices/miatoll-huaxing.conf diff --git a/configs/devices/miatoll-tianma.conf b/configs/devices/miatoll-tianma.conf new file mode 100644 index 000000000..e03ce08af --- /dev/null +++ b/configs/devices/miatoll-tianma.conf @@ -0,0 +1,7 @@ +SOC_PLATFORM="SM7125" +VENDOR_NAME="Xiaomi" +PLATFORM_NAME="miatoll" + +# mkbootimg config +BOOTIMG_OS_PATCH_LEVEL="2022-06" +BOOTIMG_OS_VERSION=11.0.0 diff --git a/configs/sdm845.conf b/configs/sdm845.conf index a476a66a5..c6bd2dd53 100644 --- a/configs/sdm845.conf +++ b/configs/sdm845.conf @@ -1,2 +1,2 @@ FD_BASE=0xCE000000 -FD_SIZE=0x02000000 \ No newline at end of file +FD_SIZE=0x00700000 diff --git a/configs/sm7125.conf b/configs/sm7125.conf index a476a66a5..c6bd2dd53 100644 --- a/configs/sm7125.conf +++ b/configs/sm7125.conf @@ -1,2 +1,2 @@ FD_BASE=0xCE000000 -FD_SIZE=0x02000000 \ No newline at end of file +FD_SIZE=0x00700000