diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Mcfg.aslc b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Mcfg.aslc index 1dfe09281..930ba829d 100644 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Mcfg.aslc +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/AcpiTables/Mcfg.aslc @@ -9,27 +9,17 @@ * **/ -#include -#include #include "AcpiTables.h" -#pragma pack(push, 1) - // -// The root port config is not part of ECAM. -// OSes can parse additional config spaces in MCFG, but we'll hide it for now. +// MCFG may get patched by AcpiPlatformDxe. // -typedef struct { - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header; - EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Entry[5]; -} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE; - -EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = { +RK3588_MCFG_TABLE Mcfg = { { ACPI_HEADER ( EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE, + RK3588_MCFG_TABLE, EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION ), }, @@ -72,6 +62,4 @@ EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = { } }; -#pragma pack(pop) - VOID* CONST ReferenceAcpiTable = &Mcfg; diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c index 32a50cfca..7382e6b86 100644 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include STATIC CONST EFI_GUID mAcpiTableFile = { @@ -153,12 +155,26 @@ AcpiVerifyUpdateTable ( return Result; } -// -// Monitor the ACPI tables being installed and when -// a DSDT/SSDT is detected validate that we want to -// install it, and if so update any "NameOp" defined -// variables contained in the table from PCD values -// +STATIC +BOOLEAN +AcpiFixupMcfg ( + IN EFI_ACPI_DESCRIPTION_HEADER *AcpiHeader + ) +{ + RK3588_MCFG_TABLE *Table; + UINT32 Seg; + + Table = (RK3588_MCFG_TABLE *) AcpiHeader; + + for (Seg = 0; Seg < ARRAY_SIZE (Table->Entry); Seg++) { + if ((PcdGet32 (PcdPcieEcamCompliantSegmentsMask) & (1 << Seg)) != 0) { + Table->Entry[Seg].BaseAddress -= 0x8000; + } + } + + return TRUE; +} + STATIC BOOLEAN AcpiHandleDynamicNamespace ( @@ -169,11 +185,30 @@ AcpiHandleDynamicNamespace ( case SIGNATURE_32 ('D', 'S', 'D', 'T'): case SIGNATURE_32 ('S', 'S', 'D', 'T'): return AcpiVerifyUpdateTable (AcpiHeader); + case SIGNATURE_32 ('M', 'C', 'F', 'G'): + return AcpiFixupMcfg (AcpiHeader); } return TRUE; } +STATIC +VOID +EFIAPI +NotifyEndOfDxeEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_STATUS Status; + + Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, &AcpiHandleDynamicNamespace); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "AcpiPlatform: Failed to install firmware ACPI as config table. Status=%r\n", + Status)); + } +} + EFI_STATUS EFIAPI AcpiPlatformDxeInitialize ( @@ -182,18 +217,22 @@ AcpiPlatformDxeInitialize ( ) { EFI_STATUS Status; + EFI_EVENT Event; if ((PcdGet32 (PcdConfigTableMode) & CONFIG_TABLE_MODE_ACPI) == 0) { DEBUG ((DEBUG_WARN, "AcpiPlatform: ACPI support is disabled by the settings.\n")); return EFI_UNSUPPORTED; } - Status = LocateAndInstallAcpiFromFvConditional (&mAcpiTableFile, &AcpiHandleDynamicNamespace); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "AcpiPlatform: Failed to install firmware ACPI as config table. Status=%r\n", - Status)); - return Status; - } + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, // Type + TPL_CALLBACK, // NotifyTpl + NotifyEndOfDxeEvent, // NotifyFunction + NULL, // NotifyContext + &gEfiEndOfDxeEventGroupGuid, // EventGroup + &Event // Event + ); + ASSERT_EFI_ERROR (Status); return EFI_SUCCESS; } diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf index efba2f3b7..9e22052e8 100644 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf @@ -30,9 +30,11 @@ AcpiLib BaseMemoryLib DebugLib + UefiBootServicesTableLib UefiDriverEntryPoint [Guids] + gEfiEndOfDxeEventGroupGuid [Protocols] @@ -44,6 +46,7 @@ gRK3588TokenSpaceGuid.PcdComboPhy2Mode gRK3588TokenSpaceGuid.PcdPcie30Supported gRK3588TokenSpaceGuid.PcdPcie30State + gRK3588TokenSpaceGuid.PcdPcieEcamCompliantSegmentsMask [Depex] gRockchipPlatformConfigAppliedProtocolGuid diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Include/AcpiTables.h b/edk2-rockchip/Silicon/Rockchip/RK3588/Include/AcpiTables.h index bfcccdcfd..e1d5ee98f 100644 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/Include/AcpiTables.h +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Include/AcpiTables.h @@ -15,6 +15,7 @@ #define __ACPITABLES_H__ #include +#include #define EFI_ACPI_OEM_ID {'R','K','C','P',' ',' '} @@ -58,4 +59,11 @@ 0 \ } +#pragma pack(push, 1) +typedef struct { + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header; + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE Entry[5]; +} RK3588_MCFG_TABLE; +#pragma pack(pop) + #endif // __ACPITABLES_H__ diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/PciHostBridgeInit.c b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/PciHostBridgeInit.c index 47615d3da..b077c231f 100755 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/PciHostBridgeInit.c +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/PciHostBridgeInit.c @@ -197,7 +197,7 @@ PciePinmuxInit( ASSERT(MuxNum < 2); GpioSetIomuxConfig(&mPcie20x1_2_IomuxConfigs[MuxNum][0], 3); break; - + default: return; } @@ -255,7 +255,7 @@ PciSetupClocks ( default: break; } - + } STATIC @@ -448,6 +448,29 @@ PciSetupAtu ( gBS->Stall (10000); } +STATIC +VOID +PciValidateCfg0 ( + IN UINT32 Segment, + IN EFI_PHYSICAL_ADDRESS Cfg0Base + ) +{ + EFI_STATUS Status; + + // + // If the downstream device doesn't appear mirrored, config accesses + // must not be shifted by 0x8000 anymore. + // + if (MmioRead32 (Cfg0Base) != 0xffffffff + && MmioRead32 (Cfg0Base + 0x8000) == 0xffffffff) { + Status = PcdSet32S (PcdPcieEcamCompliantSegmentsMask, + PcdGet32 (PcdPcieEcamCompliantSegmentsMask) | (1 << Segment)); + ASSERT_EFI_ERROR (Status); + + DEBUG((DEBUG_INFO, "PCIe: Working CFG0 TLP filtering for connected device!\n")); + } +} + EFI_STATUS InitializePciHost ( UINT32 Segment @@ -564,5 +587,7 @@ InitializePciHost ( PciGetLinkSpeedWidth (DbiBase, &LinkSpeed, &LinkWidth); PciPrintLinkSpeedWidth (LinkSpeed, LinkWidth); + PciValidateCfg0 (Segment, PcieBase + Cfg0Base); + return EFI_SUCCESS; } diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/Rk3588PciHostBridgeLib.inf b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/Rk3588PciHostBridgeLib.inf index 6dbd27e9b..e92b7ae8f 100755 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/Rk3588PciHostBridgeLib.inf +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/Library/Rk3588PciHostBridgeLib/Rk3588PciHostBridgeLib.inf @@ -51,3 +51,5 @@ gRK3588TokenSpaceGuid.PcdComboPhy2Mode gRK3588TokenSpaceGuid.PcdPcie30State + + gRK3588TokenSpaceGuid.PcdPcieEcamCompliantSegmentsMask diff --git a/edk2-rockchip/Silicon/Rockchip/RK3588/RK3588.dec b/edk2-rockchip/Silicon/Rockchip/RK3588/RK3588.dec index 8ab606add..fce6b832f 100644 --- a/edk2-rockchip/Silicon/Rockchip/RK3588/RK3588.dec +++ b/edk2-rockchip/Silicon/Rockchip/RK3588/RK3588.dec @@ -88,3 +88,6 @@ gRK3588TokenSpaceGuid.PcdUsbDpPhy0Usb3State|0|UINT32|0x00000501 gRK3588TokenSpaceGuid.PcdUsbDpPhy1Usb3State|0|UINT32|0x00000502 + +[PcdsDynamicEx] + gRK3588TokenSpaceGuid.PcdPcieEcamCompliantSegmentsMask|0|UINT32|0x20000001