From 0e84466a8c70c0227ad9d489dc5490deaa36ee9b Mon Sep 17 00:00:00 2001 From: NouranAbdelaziz Date: Mon, 8 Jul 2024 16:08:40 +0300 Subject: [PATCH] change power ports direction to inout --- EF_TMR32.yaml | 2 +- hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v | 4 ++-- hdl/rtl/bus_wrappers/EF_TMR32_APB.v | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/EF_TMR32.yaml b/EF_TMR32.yaml index 0f2e167..90befa3 100644 --- a/EF_TMR32.yaml +++ b/EF_TMR32.yaml @@ -23,7 +23,7 @@ A 32-bit timer and PWM generator with the following features: license: APACHE 2.0 author: Mohamed Shalan email: mshalan@efabless.com - version: v1.0.6 + version: v1.0.7 date: 08-07-2024 category: digital tags: diff --git a/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v b/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v index 332508c..7b14958 100644 --- a/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v +++ b/hdl/rtl/bus_wrappers/EF_TMR32_APB.pp.v @@ -28,8 +28,8 @@ module EF_TMR32_APB #( PRW = 16 ) ( `ifdef USE_POWER_PINS - input wire VPWR, - input wire VGND, + inout VPWR, + inout VGND, `endif input wire PCLK, input wire PRESETn, diff --git a/hdl/rtl/bus_wrappers/EF_TMR32_APB.v b/hdl/rtl/bus_wrappers/EF_TMR32_APB.v index f4f2806..4af689a 100644 --- a/hdl/rtl/bus_wrappers/EF_TMR32_APB.v +++ b/hdl/rtl/bus_wrappers/EF_TMR32_APB.v @@ -31,8 +31,8 @@ module EF_TMR32_APB #( PRW = 16 ) ( `ifdef USE_POWER_PINS - input wire VPWR, - input wire VGND, + inout VPWR, + inout VGND, `endif `APB_SLAVE_PORTS, output wire [1-1:0] pwm0,