HAL in Academia

Historically, HAL has been developed as an academic tool to make netlist reverse engineering research more comparable and reproducible and to encourage open-source publications. Although the tool gained some traction among practitioners more recently, it is still primarily developed by and for academics.

Using HAL for Publications

If you intend to use HAL for your project or publication but struggle getting started, please reach out to us before giving up. Despite our best efforts, it is impossible for us to maintain a fully up-to-date documentation and user guide for HAL given our schedules as researchers. Still, we want to make HAL as accessible as possible to research groups around the world.

If you use HAL in an academic context, please cite the framework using the reference below:

@misc{hal,
    author = {{Embedded Security Group}},
    publisher = {{Max Planck Institute for Security and Privacy}},
    title = {{HAL - The Hardware Analyzer}},
    year = {2019},
    howpublished = {\url{https://github.com/emsec/hal}},
}

You can also include the original publication, for example by using its DBLP reference. However, HAL has massively progressed in recent years and has barely anything to do with the prototype described in this original work.

To get an overview on the challenges we set out to solve with HAL, feel free to watch our [talk](https://media.ccc.de/v/36c3-10879-hal_-_the_open-source_hardware_analyzer) at 36C3.

# Publications Using HAL

HAL has been used in the context of numerous academic publications so far, some of them even made it into plugins that are now part of this repository. A non-exhaustive list of publications is provided below, please feel free to make us aware of any publication we might have missed.

* Gregor Leander et al. "[HAWKEYE - Recovering Symmetric Cryptography From Hardware Circuits](https://eprint.iacr.org/2024/860.pdf)." *IACR Annual International Cryptology Conference (Crypto)*, 2024
* Leonid Azriel et al. "[Towards Open Scan for the Open-source Hardware](https://eprint.iacr.org/2023/1178.pdf).", Cryptology ePrint Archive, 2023
* Simon Klix et al. "[Stealing Maggie's Secrets - On the Challenges of IP Theft Through FPGA Reverse Engineering](https://arxiv.org/pdf/2312.06195)." *arXiv*, 2023
* Sundarakumar Muthukumaran et al. "Reverse Engineering of RTL Controllers from Look-Up Table Netlists", *IEEE Computer Society Annual Symposium on VLSI (ISVLSI)*, 2023
* Ram Venkat Narayanan et al. "[Reverse Engineering Word-Level Models from Look-Up Table Netlists](https://arxiv.org/pdf/2303.02762)", *IEEE International Symposium on Quality Electronic Design (ISQED)*, 2023
* Aparajithan Nathamuni-Venkatesan et al. "[Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information](https://arxiv.org/pdf/2303.07405).", *IEEE International Conference on VLSI Design and International Conference on Embedded Systems (VLSID)*, 2023
* Carina Wiesen et al. "The Anatomy of Hardware Reverse Engineering: An Exploration of Human Factors During Problem Solving." *ACM Transactions on Computer-Human Interaction*, 2023
* Susanne Engels et al. "A critical view on the real-world security of logic locking." *Journal of Cryptographic Engineering (JCEN)*, 2022 
* Florian Stolz et al. "[LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security](https://eprint.iacr.org/2021/1277.pdf)." *IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)*, 2021
* Nils Albartus et al. "[DANA Universal Dataflow Analysis for Gate-Level Netlist Reverse Engineering](https://eprint.iacr.org/2020/751.pdf)." *IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)*, 2020
* Steffen Becker et al. "[An Exploratory Study of Hardware Reverse Engineering — Technical and Cognitive Processes](https://arxiv.org/pdf/2105.14943)." *Symposium on Usable Privacy and Security (SOUPS)*, 2020
* Max Hoffmann et al. "[Doppelganger Obfuscation — Exploring the Defensive and Offensive Aspects of Hardware Camouflaging](https://eprint.iacr.org/2020/750.pdf)." *IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)*, 2020
* Maik Ender et al. "[Insights into the Mind of a Trojan Designer - The Challenge to Integrate a Trojan into the Bitstream](https://arxiv.org/pdf/1910.01517)." *ACM Asia and South Pacific Design Automation Conference (ASP-DAC)*, 2019
* Marc Farbiak et al. "[HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion](https://eprint.iacr.org/2017/783.pdf)." *IEEE Transactions on Dependable and Secure Computing*, 2019
* Sebastian Wallat et al. *"[Highway to HAL: Open-Sourcing the First Extendable Gate-Level Netlist Reverse Engineering Framework](https://arxiv.org/pdf/1910.00350)."* *ACM International Conference on Computing Frontiers (CF)*, 2019
* Carina Wiesen et al. "[Towards Cognitive Obfuscation Impeding Hardware Reverse Engineering Based on Psychological Insights](https://arxiv.org/pdf/1910.00323)." *ACM Asia and South Pacific Design Automation Conference (ASP-DAC)*, 2019
* Carina Wiesen et al. "[Promoting the Acquisition of Hardware Reverse Engineering Skills](https://arxiv.org/pdf/2105.13725)." *IEEE Frontiers in Education Conference (FIE)*, 2019
* Marc Fyrbiak et al. "[On the Difficulty of FSM-based Hardware Obfuscation](https://eprint.iacr.org/2019/1163.pdf)." *IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES)*, 2018
* Carina Wiesen et al. "[Teaching Hardware Reverse Engineering: Educational Guidelines and Practical Insights](https://arxiv.org/pdf/1910.00312)." *IEEE International Conference on Teaching, Assessment, and Learning for Engineering (TALE)*, 2018