block

block(name, blocks, vhdl_files, vlog_files)

Gathers source files of a block ands it's dependencies.

ATTRIBUTES

Name	Description	Type	Mandatory	Default
name	A unique name for this target.	Name	required
blocks	List of blocks this block depends on.	List of labels	optional	[]
vhdl_files	List fo .vhdl files.	List of labels	optional	[]
vlog_files	List of .sv files	List of labels	optional	[]

sim_test

sim_test(name, blocks, data, defines, seed, timescale, top, vhdl_top, vlog_top)

Runs a test.

ATTRIBUTES

Name	Description	Type	Mandatory	Default
name	A unique name for this target.	Name	required
blocks	List of blocks this test depends on. Any target which provides a `BlockInfo` provider can be in this list.	List of labels	optional	[]
data	Runtime dependencies of this test.	List of labels	optional	[]
defines	Compiler defines. Formatted as string keyed dict of strings.	Dictionary: String -> String	optional	{}
seed	-	Integer	optional	1
timescale	Elaboration timescale flag	String	optional	"1ns/1ns"
top	Name of top level module.	String	required
vhdl_top	`.vhd` file which contains the top level module declared in `top`. `vlog_top` and `vhdl_top` are mutually exclusive.	Label	optional	None
vlog_top	`.v` / `.sv` file which contains the top level module declared in `top`. `vlog_top` and `vhdl_top` are mutually exclusive.	Label	optional	None

testbench(name, blocks, data, defines, seed, timescale, top, vhdl_top, vlog_top)

Testbench. Identical to sim_test but is not regarded as a test.

ATTRIBUTES

Name	Description	Type	Mandatory	Default
name	A unique name for this target.	Name	required
blocks	List of blocks this test depends on. Any target which provides a `BlockInfo` provider can be in this list.	List of labels	optional	[]
data	Runtime dependencies of this test.	List of labels	optional	[]
defines	Compiler defines. Formatted as string keyed dict of strings.	Dictionary: String -> String	optional	{}
seed	-	Integer	optional	1
timescale	Elaboration timescale flag	String	optional	"1ns/1ns"
top	Name of top level module.	String	required
vhdl_top	`.vhd` file which contains the top level module declared in `top`. `vlog_top` and `vhdl_top` are mutually exclusive.	Label	optional	None
vlog_top	`.v` / `.sv` file which contains the top level module declared in `top`. `vlog_top` and `vhdl_top` are mutually exclusive.	Label	optional	None

BlockInfo(vlog_files, vhdl_files)

Provides structure of source files for compiling a block

FIELDS

Name	Description
vlog_files	A depset of SystemVerilog / Verilog files, required to build the target.
vhdl_files	A depset of VHDL files.required to build the target.

regression_test(kwargs)

Runs a regression test.

This macro creates sim_test targets for every permutation of defines, and a test suite which includes them all.

PARAMETERS

Name	Description	Default Value
kwargs	The rest of the parameters will simply be passed the the sim_test targets.	none