From 7f8e7de861ffa48a205cbdb2e32bc5844be8212c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Mon, 4 Nov 2024 13:38:29 +0100 Subject: [PATCH] SetConfig --- esp-hal/CHANGELOG.md | 1 + esp-hal/Cargo.toml | 1 + esp-hal/MIGRATING-0.21.md | 14 +++++ esp-hal/src/dma/mod.rs | 11 ++-- esp-hal/src/spi/master.rs | 61 ++++++++++++++++--- esp-hal/src/spi/slave.rs | 3 +- examples/src/bin/embassy_spi.rs | 28 ++++++--- examples/src/bin/qspi_flash.rs | 25 +++++--- .../spi_halfduplex_read_manufacturer_id.rs | 23 ++++--- examples/src/bin/spi_loopback.rs | 22 +++++-- examples/src/bin/spi_loopback_dma.rs | 24 +++++--- examples/src/bin/spi_loopback_dma_psram.rs | 24 +++++--- hil-test/tests/embassy_interrupt_spi_dma.rs | 55 +++++++++++------ hil-test/tests/qspi.rs | 59 ++++++++---------- hil-test/tests/spi_full_duplex.rs | 31 +++++++--- hil-test/tests/spi_half_duplex_read.rs | 17 ++++-- hil-test/tests/spi_half_duplex_write.rs | 17 ++++-- hil-test/tests/spi_half_duplex_write_psram.rs | 17 ++++-- 18 files changed, 302 insertions(+), 131 deletions(-) diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index f026a0f10cc..37fd48d791b 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -30,6 +30,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - `gpio::Input::{split(), into_peripheral_output()}` when used with output pins. (#2418) - `gpio::Output::peripheral_input()` (#2418) - `spi::master::Config` and `{Spi, SpiDma, SpiDmaBus}::apply_config` (#2448) +- `embassy_embedded_hal::SetConfig` is now implemented for `{Spi, SpiDma, SpiDmaBus}` (#2448) ### Changed diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index 71f0a184cc8..307ec0c9181 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -25,6 +25,7 @@ defmt = { version = "0.3.8", optional = true } delegate = "0.12.0" digest = { version = "0.10.7", default-features = false, optional = true } document-features = "0.2.10" +embassy-embedded-hal = "0.2.0" embassy-futures = "0.1.1" embassy-sync = "0.6.0" embassy-usb-driver = { version = "0.1.0", optional = true } diff --git a/esp-hal/MIGRATING-0.21.md b/esp-hal/MIGRATING-0.21.md index 8a93bfcccdb..0331339d069 100644 --- a/esp-hal/MIGRATING-0.21.md +++ b/esp-hal/MIGRATING-0.21.md @@ -242,3 +242,17 @@ the GPIO drivers (`Input`, `Output`, `OutputOpenDrain` and `Flex`) instead. - bit order: MSB first - mode: SPI mode 0 - There are new constructors (`new_with_config`, `new_typed_with_config`) and a new `apply_config` method to apply custom configuration. + +```diff +-use esp_hal::spi::{master::Spi, SpiMode}; ++use esp_hal::spi::{master::{Config, Spi}, SpiMode}; +-Spi::new(SPI2, 100.kHz(), SpiMode::Mode1); ++Spi::new_with_config( ++ SPI2, ++ Config { ++ frequency: 100.kHz(), ++ mode: SpiMode::Mode0, ++ ..Config::default() ++ }, ++) +``` \ No newline at end of file diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs index df652f9ff2b..f91b18d1dad 100644 --- a/esp-hal/src/dma/mod.rs +++ b/esp-hal/src/dma/mod.rs @@ -19,7 +19,7 @@ #![doc = crate::before_snippet!()] //! # use esp_hal::dma_buffers; //! # use esp_hal::gpio::Io; -//! # use esp_hal::spi::{master::Spi, SpiMode}; +//! # use esp_hal::spi::{master::{Config, Spi}, SpiMode}; //! # use esp_hal::dma::{Dma, DmaPriority}; //! let dma = Dma::new(peripherals.DMA); #![cfg_attr(any(esp32, esp32s2), doc = "let dma_channel = dma.spi2channel;")] @@ -30,10 +30,13 @@ //! let mosi = io.pins.gpio4; //! let cs = io.pins.gpio5; //! -//! let mut spi = Spi::new( +//! let mut spi = Spi::new_with_config( //! peripherals.SPI2, -//! 100.kHz(), -//! SpiMode::Mode0, +//! Config { +//! frequency: 100.kHz(), +//! mode: SpiMode::Mode0, +//! ..Config::default() +//! }, //! ) //! .with_sck(sclk) //! .with_mosi(mosi) diff --git a/esp-hal/src/spi/master.rs b/esp-hal/src/spi/master.rs index d66fd7f3a0b..39fba48009b 100644 --- a/esp-hal/src/spi/master.rs +++ b/esp-hal/src/spi/master.rs @@ -24,8 +24,9 @@ //! ### Shared SPI access //! //! If you have multiple devices on the same SPI bus that each have their own CS -//! line, you may want to have a look at the implementations provided by -//! [`embedded-hal-bus`] and [`embassy-embedded-hal`]. +//! line (and optionally, configuration), you may want to have a look at the +//! implementations provided by [`embedded-hal-bus`] and +//! [`embassy-embedded-hal`]. //! //! ## Usage //! @@ -38,7 +39,7 @@ //! ```rust, no_run #![doc = crate::before_snippet!()] //! # use esp_hal::spi::SpiMode; -//! # use esp_hal::spi::master::Spi; +//! # use esp_hal::spi::master::{Config, Spi}; //! # use esp_hal::gpio::Io; //! # let io = Io::new(peripherals.GPIO, peripherals.IO_MUX); //! let sclk = io.pins.gpio0; @@ -46,10 +47,13 @@ //! let mosi = io.pins.gpio1; //! let cs = io.pins.gpio5; //! -//! let mut spi = Spi::new( +//! let mut spi = Spi::new_with_config( //! peripherals.SPI2, -//! 100.kHz(), -//! SpiMode::Mode0, +//! Config { +//! frequency: 100.kHz(), +//! mode: SpiMode::Mode0, +//! ..Config::default() +//! }, //! ) //! .with_sck(sclk) //! .with_mosi(mosi) @@ -61,9 +65,10 @@ //! [`embedded-hal-bus`]: https://docs.rs/embedded-hal-bus/latest/embedded_hal_bus/spi/index.html //! [`embassy-embedded-hal`]: https://docs.embassy.dev/embassy-embedded-hal/git/default/shared_bus/index.html -use core::marker::PhantomData; +use core::{convert::Infallible, marker::PhantomData}; pub use dma::*; +use embassy_embedded_hal::SetConfig; #[cfg(gdma)] use enumset::EnumSet; #[cfg(gdma)] @@ -677,6 +682,20 @@ where } } +impl SetConfig for Spi<'_, M, T> +where + T: Instance, + M: Mode, +{ + type Config = Config; + type ConfigError = Infallible; + + fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> { + self.apply_config(config); + Ok(()) + } +} + impl<'d, M, T> Spi<'d, M, T> where T: QspiInstance, @@ -1204,6 +1223,20 @@ mod dma { } } + impl SetConfig for SpiDma<'_, M, T> + where + T: Instance, + M: Mode, + { + type Config = Config; + type ConfigError = Infallible; + + fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> { + self.apply_config(config); + Ok(()) + } + } + /// A structure representing a DMA transfer for SPI. /// /// This structure holds references to the SPI instance, DMA buffers, and @@ -1767,6 +1800,20 @@ mod dma { } } + impl SetConfig for SpiDmaBus<'_, M, T> + where + T: Instance, + M: Mode, + { + type Config = Config; + type ConfigError = Infallible; + + fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> { + self.apply_config(config); + Ok(()) + } + } + impl embedded_hal_02::blocking::spi::Transfer for SpiDmaBus<'_, Blocking, T> where T: Instance, diff --git a/esp-hal/src/spi/slave.rs b/esp-hal/src/spi/slave.rs index 8bea967bda6..a4e190ecd5a 100644 --- a/esp-hal/src/spi/slave.rs +++ b/esp-hal/src/spi/slave.rs @@ -31,7 +31,8 @@ //! let cs = io.pins.gpio3; //! //! let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = -//! dma_buffers!(32000); let mut spi = Spi::new( +//! dma_buffers!(32000); +//! let mut spi = Spi::new( //! peripherals.SPI2, //! sclk, //! mosi, diff --git a/examples/src/bin/embassy_spi.rs b/examples/src/bin/embassy_spi.rs index 2ae0afe977a..702b30046de 100644 --- a/examples/src/bin/embassy_spi.rs +++ b/examples/src/bin/embassy_spi.rs @@ -26,7 +26,10 @@ use esp_hal::{ dma_buffers, gpio::Io, prelude::*, - spi::{master::Spi, SpiMode}, + spi::{ + master::{Config, Spi}, + SpiMode, + }, timer::timg::TimerGroup, }; @@ -58,14 +61,21 @@ async fn main(_spawner: Spawner) { let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_miso(miso) - .with_cs(cs) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)) - .with_buffers(dma_rx_buf, dma_tx_buf) - .into_async(); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_miso(miso) + .with_cs(cs) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)) + .with_buffers(dma_rx_buf, dma_tx_buf) + .into_async(); let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7]; loop { diff --git a/examples/src/bin/qspi_flash.rs b/examples/src/bin/qspi_flash.rs index 687b28ba18f..cd901df7c31 100644 --- a/examples/src/bin/qspi_flash.rs +++ b/examples/src/bin/qspi_flash.rs @@ -35,7 +35,7 @@ use esp_hal::{ gpio::Io, prelude::*, spi::{ - master::{Address, Command, Spi}, + master::{Address, Command, Config, Spi}, SpiDataMode, SpiMode, }, @@ -79,14 +79,21 @@ fn main() -> ! { let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_miso(miso) - .with_sio2(sio2) - .with_sio3(sio3) - .with_cs(cs) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_miso(miso) + .with_sio2(sio2) + .with_sio3(sio3) + .with_cs(cs) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); let delay = Delay::new(); diff --git a/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs b/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs index c6dba002afc..28266b67e93 100644 --- a/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs +++ b/examples/src/bin/spi_halfduplex_read_manufacturer_id.rs @@ -33,7 +33,7 @@ use esp_hal::{ gpio::Io, prelude::*, spi::{ - master::{Address, Command, Spi}, + master::{Address, Command, Config, Spi}, SpiDataMode, SpiMode, }, @@ -63,13 +63,20 @@ fn main() -> ! { } } - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_miso(miso) - .with_sio2(sio2) - .with_sio3(sio3) - .with_cs(cs); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_miso(miso) + .with_sio2(sio2) + .with_sio3(sio3) + .with_cs(cs); let delay = Delay::new(); diff --git a/examples/src/bin/spi_loopback.rs b/examples/src/bin/spi_loopback.rs index 0900d031d9f..38e9d6f1ed6 100644 --- a/examples/src/bin/spi_loopback.rs +++ b/examples/src/bin/spi_loopback.rs @@ -21,7 +21,10 @@ use esp_hal::{ gpio::Io, peripheral::Peripheral, prelude::*, - spi::{master::Spi, SpiMode}, + spi::{ + master::{Config, Spi}, + SpiMode, + }, }; use esp_println::println; @@ -36,11 +39,18 @@ fn main() -> ! { let miso = unsafe { miso_mosi.clone_unchecked() }; - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(miso_mosi) - .with_miso(miso) - .with_cs(cs); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(miso_mosi) + .with_miso(miso) + .with_cs(cs); let delay = Delay::new(); diff --git a/examples/src/bin/spi_loopback_dma.rs b/examples/src/bin/spi_loopback_dma.rs index f081478da36..e9bc827ff7a 100644 --- a/examples/src/bin/spi_loopback_dma.rs +++ b/examples/src/bin/spi_loopback_dma.rs @@ -25,7 +25,10 @@ use esp_hal::{ dma_buffers, gpio::Io, prelude::*, - spi::{master::Spi, SpiMode}, + spi::{ + master::{Config, Spi}, + SpiMode, + }, }; use esp_println::println; @@ -53,12 +56,19 @@ fn main() -> ! { let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_miso(miso) - .with_cs(cs) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_miso(miso) + .with_cs(cs) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); let delay = Delay::new(); diff --git a/examples/src/bin/spi_loopback_dma_psram.rs b/examples/src/bin/spi_loopback_dma_psram.rs index 1ae30408518..0ee76893cd8 100644 --- a/examples/src/bin/spi_loopback_dma_psram.rs +++ b/examples/src/bin/spi_loopback_dma_psram.rs @@ -29,7 +29,10 @@ use esp_hal::{ gpio::Io, peripheral::Peripheral, prelude::*, - spi::{master::Spi, SpiMode}, + spi::{ + master::{Config, Spi}, + SpiMode, + }, }; extern crate alloc; use log::*; @@ -90,12 +93,19 @@ fn main() -> ! { let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); // Need to set miso first so that mosi can overwrite the // output connection (because we are using the same pin to loop back) - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_miso(miso) - .with_mosi(mosi) - .with_cs(cs) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_miso(miso) + .with_mosi(mosi) + .with_cs(cs) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); delay.delay_millis(100); // delay to let the above messages display diff --git a/hil-test/tests/embassy_interrupt_spi_dma.rs b/hil-test/tests/embassy_interrupt_spi_dma.rs index fc6580a12f8..85dc6edacf8 100644 --- a/hil-test/tests/embassy_interrupt_spi_dma.rs +++ b/hil-test/tests/embassy_interrupt_spi_dma.rs @@ -14,7 +14,7 @@ use esp_hal::{ interrupt::{software::SoftwareInterruptControl, Priority}, prelude::*, spi::{ - master::{Spi, SpiDma}, + master::{Config, Spi, SpiDma}, SpiMode, }, timer::AnyTimer, @@ -94,14 +94,28 @@ mod test { let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); - let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_dma(dma_channel1.configure(false, DmaPriority::Priority0)) - .with_buffers(dma_rx_buf, dma_tx_buf) - .into_async(); - - let spi2 = Spi::new(peripherals.SPI3, 100.kHz(), SpiMode::Mode0) - .with_dma(dma_channel2.configure(false, DmaPriority::Priority0)) - .into_async(); + let mut spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_dma(dma_channel1.configure(false, DmaPriority::Priority0)) + .with_buffers(dma_rx_buf, dma_tx_buf) + .into_async(); + + let spi2 = Spi::new_with_config( + peripherals.SPI3, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_dma(dma_channel2.configure(false, DmaPriority::Priority0)) + .into_async(); let sw_ints = SoftwareInterruptControl::new(peripherals.SW_INTERRUPT); @@ -156,14 +170,21 @@ mod test { let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap(); let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap(); - let mut spi = Spi::new(peripherals.spi, 100.kHz(), SpiMode::Mode0) - .with_dma( - peripherals - .dma_channel - .configure(false, DmaPriority::Priority0), - ) - .with_buffers(dma_rx_buf, dma_tx_buf) - .into_async(); + let mut spi = Spi::new_with_config( + peripherals.spi, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_dma( + peripherals + .dma_channel + .configure(false, DmaPriority::Priority0), + ) + .with_buffers(dma_rx_buf, dma_tx_buf) + .into_async(); let send_buffer = mk_static!([u8; BUFFER_SIZE], [0u8; BUFFER_SIZE]); loop { diff --git a/hil-test/tests/qspi.rs b/hil-test/tests/qspi.rs index 9322a7b052d..8b61a26dd57 100644 --- a/hil-test/tests/qspi.rs +++ b/hil-test/tests/qspi.rs @@ -13,7 +13,7 @@ use esp_hal::{ gpio::{AnyPin, Input, Io, Level, Output, Pull}, prelude::*, spi::{ - master::{Address, Command, Spi, SpiDma}, + master::{Address, Command, Config, Spi, SpiDma}, SpiDataMode, SpiMode, }, @@ -40,7 +40,7 @@ cfg_if::cfg_if! { type SpiUnderTest = SpiDma<'static, Blocking>; struct Context { - spi: esp_hal::peripherals::SPI2, + spi: Spi<'static, Blocking>, #[cfg(pcnt)] pcnt: esp_hal::peripherals::PCNT, dma_channel: Channel<'static, DmaChannel0, Blocking>, @@ -205,9 +205,17 @@ mod tests { } let dma_channel = dma_channel.configure(false, DmaPriority::Priority0); + let spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ); Context { - spi: peripherals.SPI2, + spi, #[cfg(pcnt)] pcnt: peripherals.PCNT, dma_channel, @@ -225,9 +233,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_mosi(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_mosi(pin).with_dma(ctx.dma_channel); super::execute_read(spi, pin_mirror, 0b0001_0001); } @@ -238,9 +244,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_miso(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_miso(pin).with_dma(ctx.dma_channel); super::execute_read(spi, pin_mirror, 0b0010_0010); } @@ -251,9 +255,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_sio2(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_sio2(pin).with_dma(ctx.dma_channel); super::execute_read(spi, pin_mirror, 0b0100_0100); } @@ -264,9 +266,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_sio3(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_sio3(pin).with_dma(ctx.dma_channel); super::execute_read(spi, pin_mirror, 0b1000_1000); } @@ -277,9 +277,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_mosi(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_mosi(pin).with_dma(ctx.dma_channel); super::execute_write_read(spi, pin_mirror, 0b0001_0001); } @@ -290,9 +288,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_miso(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_miso(pin).with_dma(ctx.dma_channel); super::execute_write_read(spi, pin_mirror, 0b0010_0010); } @@ -303,9 +299,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_sio2(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_sio2(pin).with_dma(ctx.dma_channel); super::execute_write_read(spi, pin_mirror, 0b0100_0100); } @@ -316,9 +310,7 @@ mod tests { let [pin, pin_mirror, _] = ctx.gpios; let pin_mirror = Output::new(pin_mirror, Level::High); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_sio3(pin) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_sio3(pin).with_dma(ctx.dma_channel); super::execute_write_read(spi, pin_mirror, 0b1000_1000); } @@ -342,9 +334,7 @@ mod tests { .channel0 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) - .with_mosi(mosi) - .with_dma(ctx.dma_channel); + let spi = ctx.spi.with_mosi(mosi).with_dma(ctx.dma_channel); super::execute_write(unit0, unit1, spi, 0b0000_0001, false); } @@ -374,7 +364,8 @@ mod tests { .channel0 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) + let spi = ctx + .spi .with_mosi(mosi) .with_miso(gpio) .with_dma(ctx.dma_channel); @@ -407,7 +398,8 @@ mod tests { .channel0 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) + let spi = ctx + .spi .with_mosi(mosi) .with_sio2(gpio) .with_dma(ctx.dma_channel); @@ -440,7 +432,8 @@ mod tests { .channel0 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment); - let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0) + let spi = ctx + .spi .with_mosi(mosi) .with_sio3(gpio) .with_dma(ctx.dma_channel); diff --git a/hil-test/tests/spi_full_duplex.rs b/hil-test/tests/spi_full_duplex.rs index 2d465a25b86..a4211f71991 100644 --- a/hil-test/tests/spi_full_duplex.rs +++ b/hil-test/tests/spi_full_duplex.rs @@ -17,7 +17,7 @@ use esp_hal::{ gpio::{Io, Level, NoPin}, peripheral::Peripheral, prelude::*, - spi::{master::Spi, SpiMode}, + spi::master::{Config, Spi}, Blocking, }; #[cfg(pcnt)] @@ -76,10 +76,16 @@ mod tests { let (mosi_loopback_pcnt, mosi) = mosi.split(); // Need to set miso first so that mosi can overwrite the // output connection (because we are using the same pin to loop back) - let spi = Spi::new(peripherals.SPI2, 10000.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_miso(unsafe { mosi.clone_unchecked() }) - .with_mosi(mosi); + let spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 10.MHz(), + ..Config::default() + }, + ) + .with_sck(sclk) + .with_miso(unsafe { mosi.clone_unchecked() }) + .with_mosi(mosi); let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000); @@ -491,7 +497,10 @@ mod tests { // Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds. // This means that without working cancellation, the test case should // fail. - ctx.spi.change_bus_frequency(80.kHz()); + ctx.spi.apply_config(&Config { + frequency: 80.kHz(), + ..Config::default() + }); // Set up a large buffer that would trigger a timeout let dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap(); @@ -514,7 +523,10 @@ mod tests { #[timeout(3)] fn can_transmit_after_cancel(mut ctx: Context) { // Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds. - ctx.spi.change_bus_frequency(80.kHz()); + ctx.spi.apply_config(&Config { + frequency: 80.kHz(), + ..Config::default() + }); // Set up a large buffer that would trigger a timeout let mut dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap(); @@ -532,7 +544,10 @@ mod tests { transfer.cancel(); (spi, (dma_rx_buf, dma_tx_buf)) = transfer.wait(); - spi.change_bus_frequency(10000.kHz()); + spi.apply_config(&Config { + frequency: 10.MHz(), + ..Config::default() + }); let transfer = spi .transfer(dma_rx_buf, dma_tx_buf) diff --git a/hil-test/tests/spi_half_duplex_read.rs b/hil-test/tests/spi_half_duplex_read.rs index a50fa0dc807..dc83a638ce0 100644 --- a/hil-test/tests/spi_half_duplex_read.rs +++ b/hil-test/tests/spi_half_duplex_read.rs @@ -11,7 +11,7 @@ use esp_hal::{ gpio::{Io, Level, Output}, prelude::*, spi::{ - master::{Address, Command, Spi, SpiDma}, + master::{Address, Command, Config, Spi, SpiDma}, SpiDataMode, SpiMode, }, @@ -49,10 +49,17 @@ mod tests { } } - let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_miso(miso) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_miso(miso) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); Context { spi, miso_mirror } } diff --git a/hil-test/tests/spi_half_duplex_write.rs b/hil-test/tests/spi_half_duplex_write.rs index f06a80f3eaf..88a51641e41 100644 --- a/hil-test/tests/spi_half_duplex_write.rs +++ b/hil-test/tests/spi_half_duplex_write.rs @@ -12,7 +12,7 @@ use esp_hal::{ pcnt::{channel::EdgeMode, unit::Unit, Pcnt}, prelude::*, spi::{ - master::{Address, Command, Spi, SpiDma}, + master::{Address, Command, Config, Spi, SpiDma}, SpiDataMode, SpiMode, }, @@ -52,10 +52,17 @@ mod tests { let (mosi_loopback, mosi) = mosi.split(); - let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); Context { spi, diff --git a/hil-test/tests/spi_half_duplex_write_psram.rs b/hil-test/tests/spi_half_duplex_write_psram.rs index f40f81dc2db..aaf9fb7b979 100644 --- a/hil-test/tests/spi_half_duplex_write_psram.rs +++ b/hil-test/tests/spi_half_duplex_write_psram.rs @@ -14,7 +14,7 @@ use esp_hal::{ pcnt::{channel::EdgeMode, unit::Unit, Pcnt}, prelude::*, spi::{ - master::{Address, Command, Spi, SpiDma}, + master::{Address, Command, Config, Spi, SpiDma}, SpiDataMode, SpiMode, }, @@ -64,10 +64,17 @@ mod tests { let (mosi_loopback, mosi) = mosi.split(); - let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0) - .with_sck(sclk) - .with_mosi(mosi) - .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); + let spi = Spi::new_with_config( + peripherals.SPI2, + Config { + frequency: 100.kHz(), + mode: SpiMode::Mode0, + ..Config::default() + }, + ) + .with_sck(sclk) + .with_mosi(mosi) + .with_dma(dma_channel.configure(false, DmaPriority::Priority0)); Context { spi,