diff --git a/.circleci/config.yml b/.circleci/config.yml index 25679b320e9a..fac0abf60f01 100644 --- a/.circleci/config.yml +++ b/.circleci/config.yml @@ -188,8 +188,12 @@ workflows: greatlakes, inspirationpoint, halfdome, + janga, # lightning, Rocko + tahan, + meru, minipack, + morgan800cc, northdome, qemux86, # wedge, Rocko diff --git a/.jfconfig b/.jfconfig index 0b17f8b72197..83841e47c5cb 100644 --- a/.jfconfig +++ b/.jfconfig @@ -764,6 +764,39 @@ "openbmc_git" ] }, + { + "alias": "openbmc-cit-harma-determinator", + "args": { + "name": "openbmc-cit-harma-determinator", + "oncall": "openbmc", + "steps": [ + { + "determinator": true, + "name": "openbmc-cit-harma-determinator", + "shell": "facebook/sandcastle/job.py cit-diff --platform harma" + } + ] + }, + "capabilities": { + "tenant": "openbmc", + "type": "lego", + "vcs": "openbmc-git" + }, + "command": "SandcastleUniversalCommand", + "description": "Yocto diff listener", + "jellyfish_conditions": [ + { + "type": "some_file_matches_some_regexp", + "value": [ + "^meta-facebook/meta-harma/.*" + ] + } + ], + "scheduleType": "diff", + "tags": [ + "openbmc_git" + ] + }, { "alias": "openbmc-cit-inspirationpoint-determinator", "args": { @@ -897,6 +930,39 @@ "openbmc_git" ] }, + { + "alias": "openbmc-cit-minerva-determinator", + "args": { + "name": "openbmc-cit-minerva-determinator", + "oncall": "openbmc", + "steps": [ + { + "determinator": true, + "name": "openbmc-cit-minerva-determinator", + "shell": "facebook/sandcastle/job.py cit-diff --platform minerva" + } + ] + }, + "capabilities": { + "tenant": "openbmc", + "type": "lego", + "vcs": "openbmc-git" + }, + "command": "SandcastleUniversalCommand", + "description": "Yocto diff listener", + "jellyfish_conditions": [ + { + "type": "some_file_matches_some_regexp", + "value": [ + "^meta-facebook/meta-minerva/.*" + ] + } + ], + "scheduleType": "diff", + "tags": [ + "openbmc_git" + ] + }, { "alias": "openbmc-cit-minipack-determinator", "args": { @@ -963,6 +1029,39 @@ "openbmc_git" ] }, + { + "alias": "openbmc-cit-morgan800cc-determinator", + "args": { + "name": "openbmc-cit-morgan800cc-determinator", + "oncall": "openbmc", + "steps": [ + { + "determinator": true, + "name": "openbmc-cit-morgan800cc-determinator", + "shell": "facebook/sandcastle/job.py cit-diff --platform morgan800cc" + } + ] + }, + "capabilities": { + "tenant": "openbmc", + "type": "lego", + "vcs": "openbmc-git" + }, + "command": "SandcastleUniversalCommand", + "description": "Yocto diff listener", + "jellyfish_conditions": [ + { + "type": "some_file_matches_some_regexp", + "value": [ + "^meta-facebook/meta-morgan800cc/.*" + ] + } + ], + "scheduleType": "diff", + "tags": [ + "openbmc_git" + ] + }, { "alias": "openbmc-cit-northdome-determinator", "args": { @@ -998,6 +1097,39 @@ "openbmc_git" ] }, + { + "alias": "openbmc-cit-tahan-determinator", + "args": { + "name": "openbmc-cit-tahan-determinator", + "oncall": "openbmc", + "steps": [ + { + "determinator": true, + "name": "openbmc-cit-tahan-determinator", + "shell": "facebook/sandcastle/job.py cit-diff --platform tahan" + } + ] + }, + "capabilities": { + "tenant": "openbmc", + "type": "lego", + "vcs": "openbmc-git" + }, + "command": "SandcastleUniversalCommand", + "description": "Yocto diff listener", + "jellyfish_conditions": [ + { + "type": "some_file_matches_some_regexp", + "value": [ + "^meta-facebook/meta-tahan/.*" + ] + } + ], + "scheduleType": "diff", + "tags": [ + "openbmc_git" + ] + }, { "alias": "openbmc-cit-wedge100-determinator", "args": { diff --git a/classes/python3flakes.bbclass b/classes/python3flakes.bbclass index 1772a7611ec3..38e5a01715c5 100644 --- a/classes/python3flakes.bbclass +++ b/classes/python3flakes.bbclass @@ -1,7 +1,7 @@ inherit python3native def flakes_add_if_avail(d): distro = d.getVar('DISTRO_CODENAME', True) - if distro in [ 'rocko' ]: + if distro in [ 'rocko', 'dunfell', 'kirkstone' ]: return "" else: return "python3-flake8" diff --git a/common/images/fb-openbmc-image.inc b/common/images/fb-openbmc-image.inc index 01af4ff210e1..3c474c0c2a66 100644 --- a/common/images/fb-openbmc-image.inc +++ b/common/images/fb-openbmc-image.inc @@ -5,3 +5,6 @@ require common/images/fb-openbmc-common.inc # Include the package group that enables tests2 support. IMAGE_INSTALL += "packagegroup-openbmc-tests2" + +# Add the mfgtool. +IMAGE_INSTALL += "mfg-tool" diff --git a/common/recipes-connectivity/lldp-util/lldp-util/src/lldp_util.c b/common/recipes-connectivity/lldp-util/lldp-util/src/lldp_util.c index bff7551ea71d..3f689b355f35 100644 --- a/common/recipes-connectivity/lldp-util/lldp-util/src/lldp_util.c +++ b/common/recipes-connectivity/lldp-util/lldp-util/src/lldp_util.c @@ -475,10 +475,17 @@ int lldp_process_packet(const uint8_t* buf, buf += 6; uint16_t ethertype = lldp_read_u16(&buf); - if (ethertype == ETHERTYPE_VLAN) { - uint16_t vlan __attribute__((unused)) = lldp_read_u16(&buf); - ethertype = lldp_read_u16(&buf); - } + /* + * For now, don't decode or print VLAN tagged packets. Doing this + * properly is tricky (e.g. recursion) and we don't have a use case + * internally for it at Meta. When we do, it might be more useful + * to move to a 3rd party tool that does this better. + * + * if (ethertype == ETHERTYPE_VLAN) { + * uint16_t vlan __attribute__((unused)) = lldp_read_u16(&buf); + * ethertype = lldp_read_u16(&buf); + * } + */ if (ethertype == ETHERTYPE_LLDP) { lldp_neighbor_t neighbor; diff --git a/common/recipes-core/cfg-util/files/cfg-util.cpp b/common/recipes-core/cfg-util/files/cfg-util.cpp index f50914cc790b..54a3621874dd 100644 --- a/common/recipes-core/cfg-util/files/cfg-util.cpp +++ b/common/recipes-core/cfg-util/files/cfg-util.cpp @@ -120,6 +120,11 @@ main(int argc, char **argv) { return -1; } + // Prevent important information from being cleared + // leading to the loss of some functionalities. + // Store the kv and restore after clear. + pal_store_key_value(); + printf("Reset BMC data to default factory settings and BMC will be reset...\n"); if(system("rm /mnt/data/* -rf > /dev/null 2>&1") != 0) { printf("Cleaning persistent storage failed!\n"); @@ -127,6 +132,8 @@ main(int argc, char **argv) { } sync(); + pal_restore_key_value(); + // Set the flag to identify the reboot is caused by cfg-util mem_fd = open("/dev/mem", O_RDWR | O_SYNC); if (mem_fd >= 0) { diff --git a/common/recipes-core/fscd3/fscd/fsc_zone.py b/common/recipes-core/fscd3/fscd/fsc_zone.py index 814f48c950e8..8789ad46a49f 100755 --- a/common/recipes-core/fscd3/fscd/fsc_zone.py +++ b/common/recipes-core/fscd3/fscd/fsc_zone.py @@ -557,7 +557,7 @@ def run(self, sensors, ctx, ignore_mode): if not exprout: exprout = 0 - if exprout < outmin: + if (exprout < outmin) or (mode == fan_mode["boost_mode"]): exprout = outmin else: if (no_sane_flag != 1) and (display_progressive_flag != 1): diff --git a/common/recipes-core/fw-util/files/bios.cpp b/common/recipes-core/fw-util/files/bios.cpp index cf94c316c00e..45a5cb6a3e00 100644 --- a/common/recipes-core/fw-util/files/bios.cpp +++ b/common/recipes-core/fw-util/files/bios.cpp @@ -233,7 +233,7 @@ int BiosComponent::get_version(json& j) { string sver((char *)ver + 3); j["VERSION"] = sver.substr(0, end - 3); } else { - j["VERISON"] = "NA"; + j["VERSION"] = "NA"; } return 0; diff --git a/common/recipes-core/fw-util/files/pldm_comp.cpp b/common/recipes-core/fw-util/files/pldm_comp.cpp index 0af9909b4920..7c90e292d744 100644 --- a/common/recipes-core/fw-util/files/pldm_comp.cpp +++ b/common/recipes-core/fw-util/files/pldm_comp.cpp @@ -87,13 +87,14 @@ int PldmComponent::del_raw_image() const return remove(raw_image.c_str()); } -int PldmComponent::pldm_update(const string& image, uint8_t specified_comp) { +int PldmComponent::pldm_update(const string& image, bool is_standard_descriptor, uint8_t specified_comp) { int ret; syslog(LOG_CRIT, "FRU %s Component %s upgrade initiated", fru.c_str(), component.c_str()); - ret = oem_pldm_fw_update(bus, eid, (char *)image.c_str(), specified_comp); + ret = oem_pldm_fw_update(bus, eid, (char *)image.c_str(), is_standard_descriptor, + component, wait_apply_time, specified_comp); if (ret) syslog(LOG_CRIT, "FRU %s Component %s upgrade fail", fru.c_str(), component.c_str()); diff --git a/common/recipes-core/fw-util/files/pldm_comp.hpp b/common/recipes-core/fw-util/files/pldm_comp.hpp index eabfa3eae29b..2bfb5cc8f049 100644 --- a/common/recipes-core/fw-util/files/pldm_comp.hpp +++ b/common/recipes-core/fw-util/files/pldm_comp.hpp @@ -3,6 +3,8 @@ #include "signed_decoder.hpp" #define PLDM_VER_MAX_LENGTH 256 +#define PLDM_COMPONENT_IDENTIFIER_DEFAULT 0 +#define PLDM_APPLY_DELAY_TIME_DAFAULT 0 class PldmComponent : public InfoChecker { @@ -10,19 +12,26 @@ class PldmComponent : public InfoChecker // Basic info to be record std::string fru; std::string component; - uint8_t bus, eid; + uint8_t bus, eid, component_identifier; + int wait_apply_time; int find_image_index(uint8_t /*target_id*/) const; int get_raw_image(const std::string& /*image*/, std::string& /*raw_image*/); int del_raw_image() const; + const signed_header_t unuse_info; public: PldmComponent(const signed_header_t& info, const std::string &fru, const std::string &comp, uint8_t bus, uint8_t eid): InfoChecker(info), - fru(fru), component(comp), bus(bus), eid(eid) {} + fru(fru), component(comp), bus(bus), eid(eid), component_identifier(PLDM_COMPONENT_IDENTIFIER_DEFAULT), + wait_apply_time(PLDM_APPLY_DELAY_TIME_DAFAULT) {} + PldmComponent(const std::string &fru, const std::string &comp, uint8_t bus, uint8_t eid, + uint8_t component_identifier, int wait_apply_time): InfoChecker(unuse_info), + fru(fru), component(comp), bus(bus), eid(eid), component_identifier(component_identifier), + wait_apply_time(wait_apply_time) {} virtual ~PldmComponent() = default; - int pldm_update(const std::string& /*image*/, uint8_t specified_comp = 0xFF); + int pldm_update(const std::string& /*image*/, bool is_standard_descriptor, uint8_t specified_comp = 0xFF); virtual int pldm_version(json& /*json*/) { return FW_STATUS_NOT_SUPPORTED; } virtual int comp_update(const std::string& /*image*/) { return FW_STATUS_NOT_SUPPORTED; } virtual int comp_fupdate(const std::string& /*image*/) { return FW_STATUS_NOT_SUPPORTED; } virtual int comp_version(json& /*json*/) { return FW_STATUS_NOT_SUPPORTED; } -}; \ No newline at end of file +}; diff --git a/common/recipes-core/fw-util/files/scheduler.cpp b/common/recipes-core/fw-util/files/scheduler.cpp index 6b28375d5386..df38b459f552 100644 --- a/common/recipes-core/fw-util/files/scheduler.cpp +++ b/common/recipes-core/fw-util/files/scheduler.cpp @@ -52,7 +52,8 @@ bool Scheduler::is_number(const string& task_id) const { string Scheduler::exec_and_print(const string& cmd) const { //use unique_ptr so it can be automatically closed when we leave the scope. - unique_ptr pipe(popen(cmd.c_str(), "r"), pclose); + auto pipe_close = [](auto fd) { (void)pclose(fd); }; + unique_ptr pipe(popen(cmd.c_str(), "r"), pipe_close); if ( pipe == nullptr ) { throw std::runtime_error("Failed to run popen function!"); diff --git a/common/recipes-core/healthd/files/healthd/healthd.c b/common/recipes-core/healthd/files/healthd/healthd.c index 09b546ec013d..a3f5d11fbaa4 100755 --- a/common/recipes-core/healthd/files/healthd/healthd.c +++ b/common/recipes-core/healthd/files/healthd/healthd.c @@ -162,7 +162,7 @@ enum ASSERT_BIT { enum BIC_ERROR { BIC_HB_ERR = 0, - BIC_IPMB_ERR, + BIC_IPMB_PLDM_ERR, BIC_READY_ERR, BIC_ERR_TYPE_CNT, }; @@ -229,7 +229,8 @@ static bool bmc_timestamp_enabled = false; /* BIC health monitor */ static bool bic_health_enabled = false; -static uint8_t bic_fru = 0; +static size_t bic_num_fru = 0; +static uint8_t bic_fru[MAX_NUM_FRUS] = {0}; static int bic_monitor_interval = BIC_HEALTH_INTERVAL; /* healthd log rearm monitor */ @@ -614,6 +615,7 @@ static void initialize_bmc_timestamp_config(json_t *obj) { static void initialize_bic_health_config(json_t *obj) { json_t *tmp = NULL; + size_t i; if (obj == NULL) { return; @@ -625,10 +627,21 @@ static void initialize_bic_health_config(json_t *obj) { bic_health_enabled = json_is_true(tmp); tmp = json_object_get(obj, "fru"); - if (!tmp || !json_is_number(tmp)) { - return; + if (!tmp || !json_is_array(tmp)) { + goto error; + } + bic_num_fru = json_array_size(tmp); + if (!bic_num_fru) { + /* Nothing to monitor */ + goto error; + } + for (i = 0; i < bic_num_fru; i++) { + json_t *ind = json_array_get(tmp, i); + if (!ind || !json_is_number(ind)) { + goto error; + } + bic_fru[i] = json_integer_value(ind); } - bic_fru = json_integer_value(tmp); tmp = json_object_get(obj, "monitor_interval"); if (tmp && json_is_number(tmp)) { @@ -637,6 +650,9 @@ static void initialize_bic_health_config(json_t *obj) { bic_monitor_interval = BIC_HEALTH_INTERVAL; } } + return; +error: + bic_health_enabled = false; } static void initialize_ubifs_health_config(json_t *obj) { @@ -1802,48 +1818,53 @@ timestamp_handler() } static void * -bic_health_monitor() { +bic_health_monitor(void* bic_fru_id) { int err_cnt = 0; int i = 0; uint8_t status = 0; uint8_t err_type[BIC_RESET_ERR_CNT] = {0}; uint8_t type = 0; const char* err_str[BIC_ERR_TYPE_CNT] = { - "heartbeat", "IPMB", "BIC ready" + "heartbeat", "IPMB/PLDM", "BIC ready" }; char err_log[MAX_LOG_SIZE] = "\0"; + char bic_health_key[MAX_KEY_LEN] = "\0"; bool is_already_reset = false; + bool is_log = false; + + uint8_t fru = *((uint8_t *) bic_fru_id); // set flag to notice BMC healthd bic_health_monitor is ready - kv_set("flag_healthd_bic_health", "1", 0, 0); + snprintf(bic_health_key, sizeof(bic_health_key), "flag_healthd_bic_fru%u_health", fru); + kv_set(bic_health_key, "1", 0, 0); while (1) { - if ((pal_get_server_12v_power(bic_fru, &status) < 0) || (status == SERVER_12V_OFF)) { + if ((pal_get_server_12v_power(fru, &status) < 0) || (status == SERVER_12V_OFF)) { goto next_run; } // Check if bic is updating - if (pal_is_fw_update_ongoing(bic_fru) == true) { + if (pal_is_fw_update_ongoing(fru) == true) { err_cnt = 0; sleep(bic_monitor_interval); continue; } // Read BIC ready pin to check BIC boots up completely - if ((pal_is_bic_ready(bic_fru, &status) < 0) || (status == false)) { + if ((pal_is_bic_ready(fru, &status) == PAL_EOK) && (status == false)) { err_type[err_cnt++] = BIC_READY_ERR; goto next_run; } // Check whether BIC heartbeat works - if (pal_is_bic_heartbeat_ok(bic_fru) == false) { + if (pal_is_bic_heartbeat_ok(fru) == false) { err_type[err_cnt++] = BIC_HB_ERR; goto next_run; } - // Send a IPMB command to check IPMB service works normal - if (pal_bic_self_test() < 0) { - err_type[err_cnt++] = BIC_IPMB_ERR; + // Send a IPMB/PLDM command to check IPMB/PLDM service works normal + if (pal_bic_self_test(fru) < 0) { + err_type[err_cnt++] = BIC_IPMB_PLDM_ERR; goto next_run; } // if all check pass, clear error counter and reset flag @@ -1852,24 +1873,31 @@ bic_health_monitor() { // The ME commands are transmit via BIC on Grand Canyon, so check ME health when BIC health is good. if ((nm_monitor_enabled == true) && (nm_transmission_via_bic == true)) { - nm_selftest(bic_fru); + nm_selftest(fru); } next_run: - if ((err_cnt >= BIC_RESET_ERR_CNT) && (is_already_reset == false)) { + if ((err_cnt >= BIC_RESET_ERR_CNT) && (is_already_reset == false) && (is_log == false)) { // if error counter over 3, reset BIC by hardware - if (pal_bic_hw_reset() == 0) { - memset(err_log, 0, sizeof(err_log)); - for (i = 0; i < BIC_RESET_ERR_CNT; i++) { - type = err_type[i]; - strcat(err_log, err_str[type]); - if (i != BIC_RESET_ERR_CNT - 1) { // last one - strcat(err_log, ", "); - } + memset(err_log, 0, sizeof(err_log)); + strcat(err_log, "ERR Order: "); + for (i = 0; i < BIC_RESET_ERR_CNT; i++) { + type = err_type[i]; + strcat(err_log, err_str[type]); + if (i != BIC_RESET_ERR_CNT - 1) { // last one + strcat(err_log, ", "); } - syslog(LOG_CRIT, "FRU %d BIC reset by BIC health monitor due to health check failed in following order: %s", - bic_fru, err_log); + } + // Support BIC HW RESET + if (pal_bic_hw_reset() == PAL_EOK) { + syslog(LOG_CRIT, "ASSERT: FRU: %u BIC_HEALTH, BIC HW RESET, %s", fru, err_log); err_cnt = 0; is_already_reset = true; + // Not Support BIC HW RESET, Print SEL + } else if (pal_bic_hw_reset() == PAL_ENOTSUP) { + syslog(LOG_CRIT, "ASSERT: FRU: %u BIC_HEALTH, %s", fru, err_log); + is_log = true; + } else { + syslog(LOG_CRIT, "ASSERT: FRU: %u BIC_HEALTH, BIC HW RESET Failed, %s", fru, err_log); } } sleep(bic_monitor_interval); @@ -1991,7 +2019,7 @@ int main() { pthread_t tid_bmc_health_monitor; pthread_t tid_nm_monitor; pthread_t tid_timestamp_handler; - pthread_t tid_bic_health_monitor; + pthread_t tid_bic_health_monitor[MAX_NUM_FRUS]; pthread_t tid_log_rearm_check; pthread_t tid_ubifs_health_monitor; @@ -2080,9 +2108,11 @@ int main() { } if (bic_health_enabled) { - if (pthread_create(&tid_bic_health_monitor, NULL, bic_health_monitor, NULL)) { - syslog(LOG_WARNING, "pthread_create for bic health monitor error\n"); - exit(1); + for (size_t i = 0; i < bic_num_fru; i ++) { + if (pthread_create(&tid_bic_health_monitor[i], NULL, bic_health_monitor, &bic_fru[i])) { + syslog(LOG_WARNING, "pthread_create for bic health monitor error\n"); + exit(1); + } } } if (pthread_create(&tid_log_rearm_check, NULL, log_rearm_check, NULL)) { @@ -2130,7 +2160,9 @@ int main() { } if (bic_health_enabled) { - pthread_join(tid_bic_health_monitor, NULL); + for (size_t i = 0; i < bic_num_fru; i ++) { + pthread_join(tid_bic_health_monitor[i], NULL); + } } if (log_rearm_enabled){ diff --git a/common/recipes-core/log-util-v2/files/log-util/selformat.cpp b/common/recipes-core/log-util-v2/files/log-util/selformat.cpp index a78042114336..283f870ae6d1 100644 --- a/common/recipes-core/log-util-v2/files/log-util/selformat.cpp +++ b/common/recipes-core/log-util-v2/files/log-util/selformat.cpp @@ -237,7 +237,8 @@ std::ostream& operator<<(std::ostream& os, const SELFormat& s) { std::string get_output(const std::string& cmd) { char buffer[128]; std::string output; - std::unique_ptr pipe(popen(cmd.c_str(), "r"), pclose); + auto pipe_close = [](auto fd) { (void)pclose(fd); }; + std::unique_ptr pipe(popen(cmd.c_str(), "r"), pipe_close); if (!pipe) { std::cerr << "Failed to open a pipe" << std::endl; return "Error"; diff --git a/common/recipes-core/ncsi-util/files/meson.build b/common/recipes-core/ncsi-util/files/meson.build index 2a508256ddbb..bbf927d59be4 100644 --- a/common/recipes-core/ncsi-util/files/meson.build +++ b/common/recipes-core/ncsi-util/files/meson.build @@ -13,6 +13,7 @@ sources = [ 'brcm-ncsi-util.c', 'ncsi-util.c', 'nvidia-ncsi-util.c', + 'meta-ncsi-util.c', ] deps = [ diff --git a/common/recipes-core/ncsi-util/files/meta-ncsi-util.c b/common/recipes-core/ncsi-util/files/meta-ncsi-util.c new file mode 100644 index 000000000000..75789d6b9fb4 --- /dev/null +++ b/common/recipes-core/ncsi-util/files/meta-ncsi-util.c @@ -0,0 +1,302 @@ +/* + * + * Copyright 2020-present Facebook. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "meta-ncsi-util.h" + +/* + * GetDebugData transaction data + */ +typedef struct { + NCSI_Meta_Get_Debug_Data_Request req; + FILE *fp; + uint16_t type; + uint32_t crc; + uint32_t total_len; + uint32_t recv_len; +} Get_Debug_Data_Txn_t; + +static int get_debug_data_name_to_type(const char *name) +{ + if (!strcasecmp(name, "coredump")) + return NCSI_META_GET_DEBUG_DATA_TYPE_CORE_DUMP; + else if (!strcasecmp(name, "crashdump")) + return NCSI_META_GET_DEBUG_DATA_TYPE_CRASH_DUMP; + else + return -1; +} + +static void init_get_debug_data_txn(Get_Debug_Data_Txn_t *gdd_txn, + uint16_t type) +{ + memset(gdd_txn, 0, sizeof(*gdd_txn)); + + gdd_txn->type = type; + gdd_txn->crc = crc32(0L, Z_NULL, 0); + + gdd_txn->req.type = htons(type); + gdd_txn->req.op = NCSI_META_GET_DEBUG_DATA_REQ_OP_START_XFER; +} + +static NCSI_NL_RSP_T *send_get_debug_data_req(NCSI_NL_MSG_T *nl_msg, + Get_Debug_Data_Txn_t *gdd_txn, + ncsi_util_args_t *util_args) +{ + if (ncsi_meta_create_req_pkt(nl_msg, util_args->channel_id, + NCSI_META_GET_DEBUG_DATA, + sizeof(gdd_txn->req), &gdd_txn->req)) { + printf("Error: failed to create packet\n"); + return NULL; + } + + /* Override the netdev if user has specified one */ + ncsi_util_set_pkt_dev(nl_msg, util_args, NULL); + + /* Send */ + return send_nl_msg(nl_msg); +} + +static int handle_get_debug_data_resp(NCSI_NL_RSP_T *nl_resp, + Get_Debug_Data_Txn_t *gdd_txn, + bool *txn_completed) +{ + NCSI_Meta_Get_Debug_Data_Response *gdd_resp = ncsi_get_meta_resp(nl_resp); + bool is_first; + uint8_t *data; + size_t data_len; + uint32_t resp_crc = 0; + + /* + * Check response + */ + /* Check NC-SI response code */ + if (get_cmd_status(nl_resp) != RESP_COMMAND_COMPLETED) { + print_ncsi_completion_codes(nl_resp); + return -1; + } + + /* Check Meta OEM response */ + if (ncsi_meta_check_resp(nl_resp, NCSI_META_GET_DEBUG_DATA, + sizeof(*gdd_resp))) { + ncsi_meta_print_resp_meta_hdr(nl_resp); + return -1; + } + + /* Check GetDebugData response */ + is_first = (gdd_txn->req.op == NCSI_META_GET_DEBUG_DATA_REQ_OP_START_XFER); + if (ncsi_meta_check_get_debug_data(nl_resp, gdd_txn->type, is_first)) { + ncsi_meta_print_get_debug_data(nl_resp); + return -1; + } + + /* + * Process response data + */ + data = gdd_resp->debug_data; + data_len = nl_resp->hdr.payload_length - sizeof(*gdd_resp); + + if (gdd_resp->op & NCSI_META_GET_DEBUG_DATA_RESP_OP_START) { + /* First response, get total debug data length */ + gdd_txn->total_len = ntohl(*(uint32_t *)data); + data += sizeof(uint32_t); + data_len -= sizeof(uint32_t); + printf("Debug data length: %u\n", gdd_txn->total_len); + + /* Change request op for next packet */ + gdd_txn->req.op = NCSI_META_GET_DEBUG_DATA_REQ_OP_GET_NEXT; + } + gdd_txn->req.data_handle = gdd_resp->next_data_handle; + + if (gdd_resp->op & NCSI_META_GET_DEBUG_DATA_RESP_OP_END) { + /* Last response, get CRC32 checksum */ + data_len -= sizeof(uint32_t); + resp_crc = ntohl(*(uint32_t *)(data + data_len)); + } + + if (data_len > 0) { + size_t n; + + /* Debug data received */ + gdd_txn->recv_len += data_len; + gdd_txn->crc = crc32(gdd_txn->crc, data, data_len); + + /* Save data to file */ + n = fwrite(data, 1, data_len, gdd_txn->fp); + if (n < data_len) { + printf("Error: failed to write %zu data bytes to file, rv %zu\n", + data_len, n); + return -1; + } + } + + /* + * Check if transaction is completed + */ + if (gdd_resp->op & NCSI_META_GET_DEBUG_DATA_RESP_OP_END) { + if (gdd_txn->recv_len < gdd_txn->total_len) { + printf("Warning: transfer ended with %u data received, shorter than " + "debug data length %u\n", gdd_txn->recv_len, gdd_txn->total_len); + } + if (gdd_txn->crc != resp_crc) { + printf("Error: calculated crc32 0x%x not match response's 0x%x\n", + gdd_txn->crc, resp_crc); + return -1; + } + *txn_completed = true; + + } else if (gdd_txn->recv_len >= gdd_txn->total_len) { + printf("Warning: total data received %u exceeds debug data length %u, " + "terminate transfer!\n", gdd_txn->recv_len, gdd_txn->total_len); + *txn_completed = true; + } + + return 0; +} + +static int get_debug_data(int type, const char *file_name, + ncsi_util_args_t *util_args) +{ + Get_Debug_Data_Txn_t gdd_txn; + NCSI_NL_MSG_T *nl_msg = NULL; + NCSI_NL_RSP_T *nl_resp = NULL; + bool txn_completed = false; + uint32_t percent = 0; + int ret = -1; + + init_get_debug_data_txn(&gdd_txn, type); + + /* Open the file */ + gdd_txn.fp = fopen(file_name, "w+"); + if (!gdd_txn.fp) { + printf("Error: cannot create file %s\n", file_name); + goto done; + } + + nl_msg = calloc(1, sizeof(*nl_msg)); + if (!nl_msg) { + printf("Error: failed to allocate nl_msg of %zu bytes\n", sizeof(*nl_msg)); + goto done; + } + + while (!txn_completed) { + + /* Send and receive */ + nl_resp = send_get_debug_data_req(nl_msg, &gdd_txn, util_args); + if (!nl_resp) + break; + + /* Handle response */ + if (handle_get_debug_data_resp(nl_resp, &gdd_txn, &txn_completed)) + break; + + /* Print receive progress */ + percent = ncsi_util_print_progress(gdd_txn.recv_len, gdd_txn.total_len, + percent, "Received:"); + + free(nl_resp); + nl_resp = NULL; + } + + if (txn_completed) { + printf("GetDebugData completed\n"); + ret = 0; + } + +done: + if (gdd_txn.fp) + fclose(gdd_txn.fp); + if (nl_msg) + free(nl_msg); + if (nl_resp) + free(nl_resp); + + return ret; +} + +static void meta_ncsi_util_usage(void) +{ + printf("Usage: ncsi-util -m meta [options]\n\n"); + printf(" -h This help\n"); + ncsi_util_common_usage(); + printf(" -d [type] GetDebugData\n"); + printf(" coredump - Core dump\n"); + printf(" crashdump - Crash dump\n"); + printf(" -o [file] Output file\n"); + printf("\nSample commands:\n"); + printf(" ncsi-util -m meta -d coredump -o /tmp/nic.core\n"); + printf(" ncsi-util -m meta -n eth0 -c 0 -d crashdump -o /tmp/nic.crash\n"); + printf("\n"); +} + +int meta_ncsi_util_handler(int argc, char **argv, ncsi_util_args_t *util_args) +{ + int getdbgdata_type = -1; + const char *ofile_name = NULL; + int ret = -1; + int argflag; + + while ((argflag = getopt(argc, argv, "hd:o:" NCSI_UTIL_COMMON_OPT_STR)) != -1) + { + switch(argflag) { + case 'h': + meta_ncsi_util_usage(); + return 0; + case 'd': + getdbgdata_type = get_debug_data_name_to_type(optarg); + if (getdbgdata_type < 0) { + printf("Error: invalid GetDebugData type %s\n", optarg); + goto err_exit; + } + break; + case 'o': + ofile_name = optarg; + break; + case NCSI_UTIL_GETOPT_COMMON_OPT_CHARS: + // Already handled + break; + default : + goto err_exit; + } + } + + if (getdbgdata_type >= 0) { + if (!ofile_name) { + printf("Error: missing output file argument\n"); + goto err_exit; + } + return get_debug_data(getdbgdata_type, ofile_name, util_args); + } + + /* No command was done. Fall through to show the usage */ + +err_exit: + meta_ncsi_util_usage(); + return ret; +} diff --git a/common/recipes-core/ncsi-util/files/meta-ncsi-util.h b/common/recipes-core/ncsi-util/files/meta-ncsi-util.h new file mode 100644 index 000000000000..0d3b46371d00 --- /dev/null +++ b/common/recipes-core/ncsi-util/files/meta-ncsi-util.h @@ -0,0 +1,27 @@ +/* + * meta-ncsi-util.h + * + * Copyright 2020-present Facebook. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#ifndef _META_NCSI_UTIL_H_ +#define _META_NCSI_UTIL_H_ + +#include "ncsi-util.h" + +int meta_ncsi_util_handler(int argc, char **argv, ncsi_util_args_t *util_args); + +#endif /* _META_NCSI_UTIL_H_ */ diff --git a/common/recipes-core/ncsi-util/files/ncsi-util.c b/common/recipes-core/ncsi-util/files/ncsi-util.c index 56113c9151f9..67b83a5718e1 100644 --- a/common/recipes-core/ncsi-util/files/ncsi-util.c +++ b/common/recipes-core/ncsi-util/files/ncsi-util.c @@ -43,6 +43,7 @@ #include "ncsi-util.h" #include "brcm-ncsi-util.h" #include "nvidia-ncsi-util.h" +#include "meta-ncsi-util.h" #include #ifndef max @@ -793,6 +794,10 @@ static ncsi_util_vendor_t vendors[NCSI_UTIL_VENDOR_MAX] = { .name = "nvidia", .handler = nvidia_ncsi_util_handler, }, + [NCSI_UTIL_VENDOR_META] = { + .name = "meta", + .handler = meta_ncsi_util_handler, + }, }; // Find vendor by name @@ -874,5 +879,3 @@ int main(int argc, char **argv) default_ncsi_util_usage(); return -1; } - - diff --git a/common/recipes-core/ncsi-util/files/ncsi-util.h b/common/recipes-core/ncsi-util/files/ncsi-util.h index da6a95055692..1bcbdafda820 100644 --- a/common/recipes-core/ncsi-util/files/ncsi-util.h +++ b/common/recipes-core/ncsi-util/files/ncsi-util.h @@ -41,6 +41,7 @@ enum { NCSI_UTIL_VENDOR_DMTF = 0, /* DMTF defined command */ NCSI_UTIL_VENDOR_BRCM, /* Broadcom OEM command */ NCSI_UTIL_VENDOR_NVIDIA, /* Nvidia OEM command */ + NCSI_UTIL_VENDOR_META, /* Meta OEM command */ NCSI_UTIL_VENDOR_MAX, }; diff --git a/common/recipes-core/ncsi-util/ncsi-util_0.1.bb b/common/recipes-core/ncsi-util/ncsi-util_0.1.bb index f29521ff9a25..702406edeced 100644 --- a/common/recipes-core/ncsi-util/ncsi-util_0.1.bb +++ b/common/recipes-core/ncsi-util/ncsi-util_0.1.bb @@ -14,6 +14,8 @@ LOCAL_URI = " \ file://brcm-ncsi-util.h \ file://nvidia-ncsi-util.c \ file://nvidia-ncsi-util.h \ + file://meta-ncsi-util.c \ + file://meta-ncsi-util.h \ " inherit meson pkgconfig @@ -22,4 +24,3 @@ inherit legacy-packages pkgdir = "ncsi-util" DEPENDS += "libpal libncsi obmc-libpldm libnl-wrapper libkv zlib" - diff --git a/common/recipes-core/rackmon2/rackmon/ModbusDevice.cpp b/common/recipes-core/rackmon2/rackmon/ModbusDevice.cpp index 7dcdcb219702..fd6334e83dd9 100644 --- a/common/recipes-core/rackmon2/rackmon/ModbusDevice.cpp +++ b/common/recipes-core/rackmon2/rackmon/ModbusDevice.cpp @@ -282,8 +282,9 @@ ModbusDeviceValueData ModbusDevice::getValueData( static std::string commandOutput(const std::string& shell) { std::array buffer; std::string result; - std::unique_ptr pipe( - popen(shell.c_str(), "r"), pclose); + auto pipe_close = [](auto fd) { (void)pclose(fd); }; + std::unique_ptr pipe( + popen(shell.c_str(), "r"), pipe_close); if (!pipe) { throw std::runtime_error("popen() failed!"); } diff --git a/common/recipes-core/rackmon2/rackmon/Rackmon.cpp b/common/recipes-core/rackmon2/rackmon/Rackmon.cpp index 11d7de123382..1c76eddb4313 100644 --- a/common/recipes-core/rackmon2/rackmon/Rackmon.cpp +++ b/common/recipes-core/rackmon2/rackmon/Rackmon.cpp @@ -43,10 +43,10 @@ void Rackmon::loadRegisterMap(const nlohmann::json& config) { // Precomputing this makes our scan soooo much easier. // its 256 bytes wasted. but worth it. TODO use a // interval list with an iterator to waste less bytes. - for (uint16_t addr = config["address_range"][0]; - addr <= config["address_range"][1]; - ++addr) { - allPossibleDevAddrs_.push_back(uint8_t(addr)); + for (auto range : config["address_range"]) { + for (uint16_t addr = range[0]; addr <= range[1]; ++addr) { + allPossibleDevAddrs_.push_back(uint8_t(addr)); + } } nextDeviceToProbe_ = allPossibleDevAddrs_.begin(); monitorInterval_ = std::chrono::seconds(registerMapDB_.minMonitorInterval()); diff --git a/common/recipes-core/rackmon2/rackmon/RackmonSvcUnix.cpp b/common/recipes-core/rackmon2/rackmon/RackmonSvcUnix.cpp index b586e61a74af..b2da5cb291ad 100644 --- a/common/recipes-core/rackmon2/rackmon/RackmonSvcUnix.cpp +++ b/common/recipes-core/rackmon2/rackmon/RackmonSvcUnix.cpp @@ -169,7 +169,8 @@ void RackmonUNIXSocketService::handleJSONCommand( } try { - std::string resp_s = resp.dump(-1, ' ', false, json::error_handler_t::replace); + std::string resp_s = + resp.dump(-1, ' ', false, json::error_handler_t::replace); cli->send(resp_s.c_str(), resp_s.length()); } catch (std::exception& e) { logError << "Unable to send response: " << e.what() << std::endl; diff --git a/common/recipes-core/rackmon2/rackmon/Register.cpp b/common/recipes-core/rackmon2/rackmon/Register.cpp index 97b140834bac..8431d7674e5d 100644 --- a/common/recipes-core/rackmon2/rackmon/Register.cpp +++ b/common/recipes-core/rackmon2/rackmon/Register.cpp @@ -10,7 +10,12 @@ using nlohmann::json; namespace rackmon { bool AddrRange::contains(uint8_t addr) const { - return addr >= range.first && addr <= range.second; + for (auto item : range) { + if (addr >= item.first && addr <= item.second) { + return true; + } + } + return false; } void RegisterValue::makeString(const std::vector& reg) { @@ -275,8 +280,11 @@ time_t RegisterMapDatabase::minMonitorInterval() const { } void from_json(const json& j, AddrRange& a) { - a.range = j; + for (auto& r : j) { + a.range.emplace_back(r); + } } + void to_json(json& j, const AddrRange& a) { j = a.range; } diff --git a/common/recipes-core/rackmon2/rackmon/Register.h b/common/recipes-core/rackmon2/rackmon/Register.h index 14b6fa8cd62f..c62faa0f1bbf 100644 --- a/common/recipes-core/rackmon2/rackmon/Register.h +++ b/common/recipes-core/rackmon2/rackmon/Register.h @@ -294,11 +294,11 @@ void from_json(const nlohmann::json& j, BaudrateConfig& m); // to allow for it to be used as a key in a map --> This allows // for us to do quick lookups of addr to register map to use. struct AddrRange { - // pair of start and end address. - std::pair range{}; + // vector of pair of start and end address. + std::vector> range{}; AddrRange() = default; - explicit AddrRange(uint8_t a, uint8_t b) : range(a, b) {} - explicit AddrRange(uint8_t a) : range(a, a) {} + explicit AddrRange(const std::vector>& addrRange) + : range(addrRange) {} bool contains(uint8_t) const; }; diff --git a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv2_psu.json b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv2_psu.json index 5fa64ccae64a..fc446443693b 100644 --- a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv2_psu.json +++ b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv2_psu.json @@ -1,8 +1,7 @@ { "name": "ORV2_PSU", "address_range": [ - 160, - 191 + [160, 191] ], "probe_register": 104, "default_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_bbu.json b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_bbu.json index 022488ad16e9..8cc64914838d 100644 --- a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_bbu.json +++ b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_bbu.json @@ -1,8 +1,7 @@ { "name": "ORV3_BBU", "address_range": [ - 64, - 127 + [64, 127] ], "probe_register": 8, "default_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_power_recv.json b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_power_recv.json index b02449811915..c695efabbb85 100644 --- a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_power_recv.json +++ b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_power_recv.json @@ -1,8 +1,7 @@ { "name": "ORV3_POWER_TETHER", "address_range": [ - 8, - 9 + [8, 9] ], "probe_register": 8, "default_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_psu.json b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_psu.json index 4d6c45520f4d..c03f833b2080 100644 --- a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_psu.json +++ b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_psu.json @@ -1,8 +1,7 @@ { "name": "ORV3_PSU", "address_range": [ - 192, - 255 + [192, 255] ], "probe_register": 8, "default_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_rpu.json b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_rpu.json index 9386dc6f534d..5437e1c30f60 100644 --- a/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_rpu.json +++ b/common/recipes-core/rackmon2/rackmon/configs/register_map/orv3_rpu.json @@ -1,8 +1,7 @@ { "name": "ORV3_RPU", "address_range": [ - 12, - 12 + [12, 12] ], "probe_register": 36864, "default_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/schemas/RegisterMapConfigSchema.json b/common/recipes-core/rackmon2/rackmon/schemas/RegisterMapConfigSchema.json index eaf11d11779f..e05e144c5696 100644 --- a/common/recipes-core/rackmon2/rackmon/schemas/RegisterMapConfigSchema.json +++ b/common/recipes-core/rackmon2/rackmon/schemas/RegisterMapConfigSchema.json @@ -13,12 +13,17 @@ }, "address_range": { "type": "array", - "minItems": 2, - "maxItems": 2, + "minItems": 1, + "maxItems": 256, "items": { - "type": "integer", - "minimum": 0, - "maximum": 255 + "type": "array", + "minItems": 2, + "maxItems": 2, + "items": { + "type": "integer", + "minimum": 0, + "maximum": 255 + } } }, "probe_register": { diff --git a/common/recipes-core/rackmon2/rackmon/tests/ModbusDeviceTest.cpp b/common/recipes-core/rackmon2/rackmon/tests/ModbusDeviceTest.cpp index 1a349164b240..0498159e23f3 100644 --- a/common/recipes-core/rackmon2/rackmon/tests/ModbusDeviceTest.cpp +++ b/common/recipes-core/rackmon2/rackmon/tests/ModbusDeviceTest.cpp @@ -41,7 +41,7 @@ class ModbusDeviceTest : public ::testing::Test { RegisterMap regmap; std::string regmap_s = R"({ "name": "orv3_psu", - "address_range": [110, 140], + "address_range": [[110, 140]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -628,7 +628,7 @@ TEST(ModbusSpecialHandler, BasicHandlingStringValuePeriodic) { Modbus mock_modbus{}; RegisterMap mock_rmap = R"({ "name": "orv3_psu", - "address_range": [110, 140], + "address_range": [[110, 140]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -686,7 +686,7 @@ TEST(ModbusSpecialHandler, BasicHandlingIntegerOneShot) { Modbus mock_modbus{}; RegisterMap mock_rmap = R"({ "name": "orv3_psu", - "address_range": [110, 140], + "address_range": [[110, 140]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -742,7 +742,7 @@ TEST(ModbusSpecialHandler, BasicHandlingIntegerOneShot) { static nlohmann::json getBaudrateRegmap() { std::string regmap_s = R"({ "name": "orv3_psu", - "address_range": [5, 7], + "address_range": [[5, 7]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 115200, diff --git a/common/recipes-core/rackmon2/rackmon/tests/RackmonTest.cpp b/common/recipes-core/rackmon2/rackmon/tests/RackmonTest.cpp index 121df1ac6758..649cb27b79ab 100644 --- a/common/recipes-core/rackmon2/rackmon/tests/RackmonTest.cpp +++ b/common/recipes-core/rackmon2/rackmon/tests/RackmonTest.cpp @@ -121,7 +121,7 @@ class RackmonTest : public ::testing::Test { std::string json1 = R"({ "name": "orv2_psu", - "address_range": [160, 162], + "address_range": [[160, 162]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -174,7 +174,7 @@ class RackmonTest : public ::testing::Test { TEST_F(RackmonTest, BasicLoad) { std::string json2 = R"({ "name": "orv3_psu", - "address_range": [110, 112], + "address_range": [[110, 112]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -390,7 +390,7 @@ TEST_F(RackmonTest, DormantRecovery) { })"_json; json regmapConfig = R"({ "name": "orv2_psu", - "address_range": [161, 161], + "address_range": [[161, 161]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, diff --git a/common/recipes-core/rackmon2/rackmon/tests/RegisterMapTest.cpp b/common/recipes-core/rackmon2/rackmon/tests/RegisterMapTest.cpp index 133bcbac6b67..d9c685e66681 100644 --- a/common/recipes-core/rackmon2/rackmon/tests/RegisterMapTest.cpp +++ b/common/recipes-core/rackmon2/rackmon/tests/RegisterMapTest.cpp @@ -22,19 +22,23 @@ using namespace rackmon; //-------------------------------------------------------- TEST(AddrRangeTest, Basic) { - AddrRange a(10, 20); + AddrRange a({{10, 20}, {25, 30}}); EXPECT_TRUE(a.contains(10)); EXPECT_TRUE(a.contains(11)); EXPECT_TRUE(a.contains(20)); EXPECT_TRUE(a.contains(19)); + EXPECT_TRUE(a.contains(25)); + EXPECT_TRUE(a.contains(30)); EXPECT_FALSE(a.contains(9)); EXPECT_FALSE(a.contains(21)); + EXPECT_FALSE(a.contains(24)); + EXPECT_FALSE(a.contains(31)); } TEST(RegisterMapTest, JSONCoversion) { std::string inp = R"({ "name": "orv2_psu", - "address_range": [160, 191], + "address_range": [[160, 191]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -57,8 +61,10 @@ TEST(RegisterMapTest, JSONCoversion) { })"; nlohmann::json j = nlohmann::json::parse(inp); RegisterMap rmap = j; - EXPECT_EQ(rmap.applicableAddresses.range.first, 160); - EXPECT_EQ(rmap.applicableAddresses.range.second, 191); + EXPECT_TRUE(std::any_of( + rmap.applicableAddresses.range.cbegin(), + rmap.applicableAddresses.range.cend(), + [](auto const& ent) { return (ent.first == 160 && ent.second == 191); })); EXPECT_EQ(rmap.probeRegister, 104); EXPECT_EQ(rmap.defaultBaudrate, 19200); EXPECT_EQ(rmap.preferredBaudrate, 19200); @@ -84,7 +90,7 @@ TEST(RegisterMapTest, JSONCoversion) { TEST(RegisterMapTest, JSONCoversionBaudrate) { std::string inp = R"({ "name": "orv2_psu", - "address_range": [160, 191], + "address_range": [[160, 191]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -107,8 +113,10 @@ TEST(RegisterMapTest, JSONCoversionBaudrate) { })"; nlohmann::json j = nlohmann::json::parse(inp); RegisterMap rmap = j; - EXPECT_EQ(rmap.applicableAddresses.range.first, 160); - EXPECT_EQ(rmap.applicableAddresses.range.second, 191); + EXPECT_TRUE(std::any_of( + rmap.applicableAddresses.range.cbegin(), + rmap.applicableAddresses.range.cend(), + [](auto const& ent) { return (ent.first == 160 && ent.second == 191); })); EXPECT_EQ(rmap.probeRegister, 104); EXPECT_EQ(rmap.defaultBaudrate, 19200); EXPECT_EQ(rmap.preferredBaudrate, 19200); @@ -126,7 +134,7 @@ TEST(RegisterMapTest, JSONCoversionBaudrate) { TEST(RegisterMapTest, JSONCoversionSpecial) { std::string inp = R"({ "name": "orv2_psu", - "address_range": [160, 191], + "address_range": [[160, 191]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -161,8 +169,10 @@ TEST(RegisterMapTest, JSONCoversionSpecial) { })"; nlohmann::json j = nlohmann::json::parse(inp); RegisterMap rmap = j; - EXPECT_EQ(rmap.applicableAddresses.range.first, 160); - EXPECT_EQ(rmap.applicableAddresses.range.second, 191); + EXPECT_TRUE(std::any_of( + rmap.applicableAddresses.range.cbegin(), + rmap.applicableAddresses.range.cend(), + [](auto const& ent) { return (ent.first == 160 && ent.second == 191); })); EXPECT_EQ(rmap.probeRegister, 104); EXPECT_EQ(rmap.defaultBaudrate, 19200); EXPECT_EQ(rmap.preferredBaudrate, 19200); @@ -192,7 +202,7 @@ class RegisterMapDatabaseTest : public ::testing::Test { mkdir(r_test_dir.c_str(), 0755); json1 = R"({ "name": "orv2_psu", - "address_range": [160, 191], + "address_range": [[160, 191]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, @@ -208,7 +218,7 @@ class RegisterMapDatabaseTest : public ::testing::Test { })"; json2 = R"({ "name": "orv3_psu", - "address_range": [110, 140], + "address_range": [[110, 140]], "probe_register": 104, "default_baudrate": 19200, "preferred_baudrate": 19200, diff --git a/common/recipes-core/redfish-events/files/redfish-events.py b/common/recipes-core/redfish-events/files/redfish-events.py index 5ce642366d3c..126d395968fd 100755 --- a/common/recipes-core/redfish-events/files/redfish-events.py +++ b/common/recipes-core/redfish-events/files/redfish-events.py @@ -25,7 +25,7 @@ def __init__( timeout: int, ): super().__init__() - self.subscriber_url = f"http://{sub_host}:{sub_port}" + self.subscriber_url = f"http://{sub_host}:{sub_port}/" self.target_url = f"http://{target_host}" self.target_fruid = fru_id self.target_name = fru_name diff --git a/common/recipes-devtools/flake8/python3-flake8_4.0.1.bb b/common/recipes-devtools/flake8/python3-flake8_7.0.0.bb similarity index 69% rename from common/recipes-devtools/flake8/python3-flake8_4.0.1.bb rename to common/recipes-devtools/flake8/python3-flake8_7.0.0.bb index 5d7108b2a26d..3ee2e222b2c3 100644 --- a/common/recipes-devtools/flake8/python3-flake8_4.0.1.bb +++ b/common/recipes-devtools/flake8/python3-flake8_7.0.0.bb @@ -7,12 +7,12 @@ PYPI_PACKAGE = "flake8" inherit pypi setuptools3 -SRC_URI[sha256sum] = "806e034dda44114815e23c16ef92f95c91e4c71100ff52813adf7132a6ad870d" +SRC_URI[sha256sum] = "33f96621059e65eec474169085dc92bf26e7b2d47366b70be2f67ab80dc25132" BBCLASSEXTEND = "native nativesdk" RDEPENDS:${PN} += " \ - ${PYTHON_PN}-pip-pyflakes \ - ${PYTHON_PN}-pip-pycodestyle \ - ${PYTHON_PN}-pip-mccabe \ + ${PYTHON_PN}-pyflakes \ + ${PYTHON_PN}-pycodestyle \ + ${PYTHON_PN}-mccabe \ " diff --git a/common/recipes-devtools/flake8/python3-pip-mccabe/0001-python-mccabe-remove-unnecessary-setup_requires-pyte.patch b/common/recipes-devtools/flake8/python3-pip-mccabe/0001-python-mccabe-remove-unnecessary-setup_requires-pyte.patch deleted file mode 100644 index 9fac28e3c2a7..000000000000 --- a/common/recipes-devtools/flake8/python3-pip-mccabe/0001-python-mccabe-remove-unnecessary-setup_requires-pyte.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 3484bdfa7adbaebcf8bb8e7d4820f64b12717932 Mon Sep 17 00:00:00 2001 -From: Mingli Yu -Date: Fri, 29 Jul 2016 15:37:18 +0800 -Subject: [PATCH] python-mccabe: remove unnecessary setup_requires - pytest-runner - -* Remove setup_requires pytest-runner as the - setup_requires pytest-runner actually is not - used for pytest which only in do_compile phase - via setup.py build - -Upstream-Status: Pending - -Signed-off-by: Mingli Yu ---- - setup.py | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/setup.py b/setup.py -index e59903d..bf2aaba 100644 ---- a/setup.py -+++ b/setup.py -@@ -33,7 +33,6 @@ setup( - license='Expat license', - py_modules=['mccabe'], - zip_safe=False, -- setup_requires=['pytest-runner'], - tests_require=['pytest'], - entry_points={ - 'flake8.extension': [ --- -2.8.1 diff --git a/common/recipes-devtools/flake8/python3-pip-mccabe_0.6.1.bb b/common/recipes-devtools/flake8/python3-pip-mccabe_0.6.1.bb deleted file mode 100644 index f4818c94a2d9..000000000000 --- a/common/recipes-devtools/flake8/python3-pip-mccabe_0.6.1.bb +++ /dev/null @@ -1,14 +0,0 @@ -SUMMARY = "Simple Python style checker in one Python file" -HOMEPAGE = "https://github.com/pycqa/mccabe" -LICENSE = "MIT & Python-2.0" -LIC_FILES_CHKSUM = "file://LICENSE;md5=a489dc62bacbdad3335c0f160a974f0f" - -PYPI_PACKAGE = "mccabe" - -inherit pypi setuptools3 -SRC_URI:append = " \ - file://0001-python-mccabe-remove-unnecessary-setup_requires-pyte.patch \ -" -SRC_URI[sha256sum] = "dd8d182285a0fe56bace7f45b5e7d1a6ebcbf524e8f3bd87eb0f125271b8831f" - -BBCLASSEXTEND = "native nativesdk" diff --git a/common/recipes-devtools/flake8/python3-pip-pycodestyle_2.8.0.bb b/common/recipes-devtools/flake8/python3-pip-pycodestyle_2.8.0.bb deleted file mode 100644 index 228dbcab4b7a..000000000000 --- a/common/recipes-devtools/flake8/python3-pip-pycodestyle_2.8.0.bb +++ /dev/null @@ -1,12 +0,0 @@ -SUMMARY = "Simple Python style checker in one Python file" -HOMEPAGE = "https://github.com/pycqa/mccabe" -LICENSE = "MIT & Python-2.0" -LIC_FILES_CHKSUM = "file://LICENSE;md5=a8546d0e77f416fb05a26acd89c8b3bd" - -PYPI_PACKAGE = "pycodestyle" - -inherit pypi setuptools3 - -SRC_URI[sha256sum] = "eddd5847ef438ea1c7870ca7eb78a9d47ce0cdb4851a5523949f2601d0cbbe7f" - -BBCLASSEXTEND = "native nativesdk" diff --git a/common/recipes-devtools/flake8/python3-pip-pyflakes_2.4.0.bb b/common/recipes-devtools/flake8/python3-pip-pyflakes_2.4.0.bb deleted file mode 100644 index 8fb29efae7e5..000000000000 --- a/common/recipes-devtools/flake8/python3-pip-pyflakes_2.4.0.bb +++ /dev/null @@ -1,17 +0,0 @@ -SUMMARY = "flake8 is a python tool that glues together pycodestyle, pyflakes, mccabe, and third-party plugins to check the style and quality of some python code." -HOMEPAGE = "https://github.com/pycqa/flake8" -LICENSE = "MIT & Python-2.0" -LIC_FILES_CHKSUM = "file://LICENSE;md5=690c2d09203dc9e07c4083fc45ea981f" - -PYPI_PACKAGE = "pyflakes" - -SRC_URI[sha256sum] = "05a85c2872edf37a4ed30b0cce2f6093e1d0581f8c19d7393122da7e25b2b24c" -inherit pypi setuptools3 - -RDEPENDS_${PN} += " \ - ${PYTHON_PN}-prettytable \ - ${PYTHON_PN}-cmd2 \ - ${PYTHON_PN}-pyparsing \ -" - -BBCLASSEXTEND = "native nativesdk" diff --git a/common/recipes-devtools/qemu/libslirp%.bbappend b/common/recipes-devtools/qemu/libslirp%.bbappend deleted file mode 100644 index 2efaef542de0..000000000000 --- a/common/recipes-devtools/qemu/libslirp%.bbappend +++ /dev/null @@ -1,3 +0,0 @@ -# For qemu-system-native we need some libslirp commits that aren't in the -# recipe SRCREV yet. Just override it. -SRCREV="c7c151fe3a2700bcabfc07235176fcedf7e9b089" diff --git a/common/recipes-devtools/qemu/qemu/0001-aspeed-Zero-extend-flash-files-to-128MB.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0001-aspeed-Zero-extend-flash-files-to-128MB.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0001-aspeed-Zero-extend-flash-files-to-128MB.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0001-aspeed-Zero-extend-flash-files-to-128MB.patch diff --git a/common/recipes-devtools/qemu/qemu/0004-hw-aspeed_vic-Add-heartbeat-LED-registers.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0004-hw-aspeed_vic-Add-heartbeat-LED-registers.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0004-hw-aspeed_vic-Add-heartbeat-LED-registers.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0004-hw-aspeed_vic-Add-heartbeat-LED-registers.patch diff --git a/common/recipes-devtools/qemu/qemu/0005-hw-arm-aspeed-Add-fb_machine_class_init.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0005-hw-arm-aspeed-Add-fb_machine_class_init.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0005-hw-arm-aspeed-Add-fb_machine_class_init.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0005-hw-arm-aspeed-Add-fb_machine_class_init.patch diff --git a/common/recipes-devtools/qemu/qemu/0006-hw-misc-Add-i2c-netdev-device.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0006-hw-misc-Add-i2c-netdev-device.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0006-hw-misc-Add-i2c-netdev-device.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0006-hw-misc-Add-i2c-netdev-device.patch diff --git a/common/recipes-devtools/qemu/qemu/0007-tests-avocado-Add-fb-boot-tests.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0007-tests-avocado-Add-fb-boot-tests.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0007-tests-avocado-Add-fb-boot-tests.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0007-tests-avocado-Add-fb-boot-tests.patch diff --git a/common/recipes-devtools/qemu/qemu/0008-tests-avocado-Disable-raspi2-initrd.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0008-tests-avocado-Disable-raspi2-initrd.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0008-tests-avocado-Disable-raspi2-initrd.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0008-tests-avocado-Disable-raspi2-initrd.patch diff --git a/common/recipes-devtools/qemu/qemu/0009-hw-misc-Add-byte-by-byte-i2c-network-device.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0009-hw-misc-Add-byte-by-byte-i2c-network-device.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0009-hw-misc-Add-byte-by-byte-i2c-network-device.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0009-hw-misc-Add-byte-by-byte-i2c-network-device.patch diff --git a/common/recipes-devtools/qemu/qemu/0010-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0010-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0010-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0010-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch diff --git a/common/recipes-devtools/qemu/qemu/0011-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0011-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0011-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0011-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch diff --git a/common/recipes-devtools/qemu/qemu/0012-hw-ssi-add-new-spi-gpio-controller.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0012-hw-ssi-add-new-spi-gpio-controller.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0012-hw-ssi-add-new-spi-gpio-controller.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0012-hw-ssi-add-new-spi-gpio-controller.patch diff --git a/common/recipes-devtools/qemu/qemu/0013-hw-nvram-at24c-Add-static-memory-init-option.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0013-hw-nvram-at24c-Add-static-memory-init-option.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0013-hw-nvram-at24c-Add-static-memory-init-option.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0013-hw-nvram-at24c-Add-static-memory-init-option.patch diff --git a/common/recipes-devtools/qemu/qemu/0014-scripts-Add-redact-util.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0014-scripts-Add-redact-util.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0014-scripts-Add-redact-util.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0014-scripts-Add-redact-util.patch diff --git a/common/recipes-devtools/qemu/qemu/0015-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0015-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0015-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0015-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch diff --git a/common/recipes-devtools/qemu/qemu/0016-hw-ssi-encoding-decoding-for-spi-gpio-driver.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0016-hw-ssi-encoding-decoding-for-spi-gpio-driver.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0016-hw-ssi-encoding-decoding-for-spi-gpio-driver.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0016-hw-ssi-encoding-decoding-for-spi-gpio-driver.patch diff --git a/common/recipes-devtools/qemu/qemu/0017-aspeed-Reload-boot-rom-on-reset.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0017-aspeed-Reload-boot-rom-on-reset.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0017-aspeed-Reload-boot-rom-on-reset.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0017-aspeed-Reload-boot-rom-on-reset.patch diff --git a/common/recipes-devtools/qemu/qemu/0018-hw-m25p80-spi-gpio-Fixing-miso-is-being-cleared-issu.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0018-hw-m25p80-spi-gpio-Fixing-miso-is-being-cleared-issu.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0018-hw-m25p80-spi-gpio-Fixing-miso-is-being-cleared-issu.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0018-hw-m25p80-spi-gpio-Fixing-miso-is-being-cleared-issu.patch diff --git a/common/recipes-devtools/qemu/qemu/0019-hw-m25p80-spi-gpio-add-device-reset.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0019-hw-m25p80-spi-gpio-add-device-reset.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0019-hw-m25p80-spi-gpio-add-device-reset.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0019-hw-m25p80-spi-gpio-add-device-reset.patch diff --git a/common/recipes-devtools/qemu/qemu/0020-hw-m25p80-spi-gpio-fix-prereading-logic-for-controll.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0020-hw-m25p80-spi-gpio-fix-prereading-logic-for-controll.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0020-hw-m25p80-spi-gpio-fix-prereading-logic-for-controll.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0020-hw-m25p80-spi-gpio-fix-prereading-logic-for-controll.patch diff --git a/common/recipes-devtools/qemu/qemu/0021-hw-adding-tpm-tis-spi.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0021-hw-adding-tpm-tis-spi.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0021-hw-adding-tpm-tis-spi.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0021-hw-adding-tpm-tis-spi.patch diff --git a/common/recipes-devtools/qemu/qemu/0022-aspeed-Add-grandteton-bmc.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0022-aspeed-Add-grandteton-bmc.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0022-aspeed-Add-grandteton-bmc.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0022-aspeed-Add-grandteton-bmc.patch diff --git a/common/recipes-devtools/qemu/qemu/0023-docs-system-arm-Add-Description-for-NPCM8XX-SoC.patch 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a/common/recipes-devtools/qemu/qemu/0059-hw-misc-add-a-toy-i2c-echo-device.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0059-hw-misc-add-a-toy-i2c-echo-device.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0059-hw-misc-add-a-toy-i2c-echo-device.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0059-hw-misc-add-a-toy-i2c-echo-device.patch diff --git a/common/recipes-devtools/qemu/qemu/0060-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0060-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0060-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0060-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch diff --git a/common/recipes-devtools/qemu/qemu/0061-tests-Create-qtest-for-Aspeed-I2C-controller.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0061-tests-Create-qtest-for-Aspeed-I2C-controller.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0061-tests-Create-qtest-for-Aspeed-I2C-controller.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0061-tests-Create-qtest-for-Aspeed-I2C-controller.patch diff --git a/common/recipes-devtools/qemu/qemu/0062-aspeed-Add-Sandia.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0062-aspeed-Add-Sandia.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0062-aspeed-Add-Sandia.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0062-aspeed-Add-Sandia.patch diff --git a/common/recipes-devtools/qemu/qemu/0063-npcm8xx-Enable-EL3.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0063-npcm8xx-Enable-EL3.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0063-npcm8xx-Enable-EL3.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0063-npcm8xx-Enable-EL3.patch diff --git a/common/recipes-devtools/qemu/qemu/0064-npcm8xx-Allow-bios-to-be-omitted.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0064-npcm8xx-Allow-bios-to-be-omitted.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0064-npcm8xx-Allow-bios-to-be-omitted.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0064-npcm8xx-Allow-bios-to-be-omitted.patch diff --git a/common/recipes-devtools/qemu/qemu/0065-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0065-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0065-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0065-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch diff --git a/common/recipes-devtools/qemu/qemu/0066-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0066-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0066-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0066-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch diff --git a/common/recipes-devtools/qemu/qemu/0067-aspeed-add-montblanc-bmc.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0067-aspeed-add-montblanc-bmc.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0067-aspeed-add-montblanc-bmc.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0067-aspeed-add-montblanc-bmc.patch diff --git a/common/recipes-devtools/qemu/qemu/0068-hw-eeprom-at24c-for-1-byte-address.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0068-hw-eeprom-at24c-for-1-byte-address.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0068-hw-eeprom-at24c-for-1-byte-address.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0068-hw-eeprom-at24c-for-1-byte-address.patch diff --git a/common/recipes-devtools/qemu/qemu/0069-aspeed-add-janga-bmc.patch b/common/recipes-devtools/qemu/qemu-7.2.0-patches/0069-aspeed-add-janga-bmc.patch similarity index 100% rename from common/recipes-devtools/qemu/qemu/0069-aspeed-add-janga-bmc.patch rename to common/recipes-devtools/qemu/qemu-7.2.0-patches/0069-aspeed-add-janga-bmc.patch diff --git a/common/recipes-devtools/qemu/qemu-system-native_%.bbappend b/common/recipes-devtools/qemu/qemu-system-native_%.bbappend new file mode 100644 index 000000000000..9dfd6b001678 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu-system-native_%.bbappend @@ -0,0 +1,41 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/${BPN}:" + +SRC_URI += " \ + file://0500-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch \ + file://0501-aspeed-Zero-extend-flash-files-to-128MB.patch \ + file://0502-hw-aspeed_vic-Add-heartbeat-LED-registers.patch \ + file://0503-hw-misc-Add-i2c-netdev-device.patch \ + file://0504-hw-misc-Add-byte-by-byte-i2c-network-device.patch \ + file://0505-hw-intc-Add-a-property-to-allow-GIC-to-reset-into-no.patch \ + file://0506-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch \ + file://0507-hw-i2c-pca954x-Add-method-to-get-channels.patch \ + file://0508-hw-arm-aspeed-Add-fb_machine_class_init.patch \ + file://0509-fbttn-Add-I2C-SCL-timeout-property.patch \ + file://0510-hw-i2c-aspeed-Add-bus-ID-to-all-trace-events.patch \ + file://0511-hw-i2c-aspeed-Add-slave-event-traces.patch \ + file://0512-hw-i2c-aspeed-Fix-bus-derivation-for-slave-events.patch \ + file://0513-tests-Rename-aspeed_i2c-test-to-i2c-netdev2-test.patch \ + file://0514-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch \ + file://0515-tests-Create-qtest-for-Aspeed-I2C-controller.patch \ + file://0516-scripts-Add-redact-util.patch \ + file://0517-aspeed-Expose-i2c-buses-to-machine.patch \ + file://0518-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch \ + file://0519-hw-misc-aspeed-Add-fby35-sb-cpld.patch \ + file://0520-hw-misc-aspeed-Add-intel-me.patch \ + file://0521-hw-misc-aspeed-Add-fby35-server-board-bridge-IC.patch \ + file://0522-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch \ + file://0523-fby35-Add-CPLD-and-BIC-as-I2C-devices.patch \ + file://0524-fby35-Setup-I2C-devices-and-GPIO-s.patch \ + file://0525-fby35-Add-motherboard-fru-EEPROM-to-BIC.patch \ + file://0526-qemu-Add-i2c-devices-to-oby35-cl.patch \ + file://0527-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch \ + file://0528-aspeed-Add-grandteton-bmc.patch \ + file://0529-aspeed-Add-greatlakes-bmc.patch \ + file://0530-aspeed-Add-Sandia.patch \ + file://0531-aspeed-add-montblanc-bmc-reference-from-fuji.patch \ + file://0532-aspeed-add-janga-bmc.patch \ + " + +PACKAGECONFIG:remove = "alsa" +PACKAGECONFIG:remove = "kvm" +PACKAGECONFIG:remove = "png" diff --git a/common/recipes-devtools/qemu/qemu-system-native_git.bb b/common/recipes-devtools/qemu/qemu-system-native_git.bb deleted file mode 100644 index 6ae2557960b1..000000000000 --- a/common/recipes-devtools/qemu/qemu-system-native_git.bb +++ /dev/null @@ -1,117 +0,0 @@ -BPN = "qemu" - -require recipes-devtools/qemu/qemu-native.inc - -DEPENDS = "glib-2.0-native \ - zlib-native \ - pixman-native \ - qemu-native \ - bison-native \ - ninja-native \ - " - -S = "${WORKDIR}/git" - -SRCREV_FORMAT = "dtc_meson_berkeley-softfloat-3_berkeley-testfloat-3_keycodemapdb" -SRCREV_dtc = "b6910bec11614980a21e46fbccc35934b671bd81" -SRCREV_meson = "3a9b285a55b91b53b2acda987192274352ecb5be" -SRCREV_berkeley-softfloat-3 = "b64af41c3276f97f0e181920400ee056b9c88037" -SRCREV_berkeley-testfloat-3 = "5a59dcec19327396a011a17fd924aed4fec416b3" -SRCREV_keycodemapdb = "d21009b1c9f94b740ea66be8e48a1d8ad8124023" -SRCREV = "b67b00e6b4c7831a3f5bc684bc0df7a9bfd1bd56" - -SRC_URI = " \ - git://gitlab.com/qemu-project/qemu.git;branch=master;protocol=https \ - git://gitlab.com/qemu-project/dtc.git;destsuffix=git/dtc;protocol=https;name=dtc;nobranch=1 \ - git://gitlab.com/qemu-project/meson.git;destsuffix=git/meson;nobranch=1;protocol=https;name=meson;nobranch=1 \ - git://gitlab.com/qemu-project/berkeley-softfloat-3.git;destsuffix=git/tests/fp/berkeley-softfloat-3;nobranch=1;protocol=https;name=berkeley-softfloat-3;nobranch=1 \ - git://gitlab.com/qemu-project/berkeley-testfloat-3.git;destsuffix=git/tests/fp/berkeley-testfloat-3;nobranch=1;protocol=https;name=berkeley-testfloat-3;nobranch=1 \ - git://gitlab.com/qemu-project/keycodemapdb.git;destsuffix=git/ui/keycodemapdb;nobranch=1;protocol=https;name=keycodemapdb;nobranch=1 \ - file://0001-aspeed-Zero-extend-flash-files-to-128MB.patch \ - file://0004-hw-aspeed_vic-Add-heartbeat-LED-registers.patch \ - file://0005-hw-arm-aspeed-Add-fb_machine_class_init.patch \ - file://0006-hw-misc-Add-i2c-netdev-device.patch \ - file://0007-tests-avocado-Add-fb-boot-tests.patch \ - file://0008-tests-avocado-Disable-raspi2-initrd.patch \ - file://0009-hw-misc-Add-byte-by-byte-i2c-network-device.patch \ - file://0010-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch \ - file://0011-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch \ - file://0012-hw-ssi-add-new-spi-gpio-controller.patch \ - file://0013-hw-nvram-at24c-Add-static-memory-init-option.patch \ - file://0014-scripts-Add-redact-util.patch \ - file://0015-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch \ - file://0016-hw-ssi-encoding-decoding-for-spi-gpio-driver.patch \ - file://0017-aspeed-Reload-boot-rom-on-reset.patch \ - file://0018-hw-m25p80-spi-gpio-Fixing-miso-is-being-cleared-issu.patch \ - file://0019-hw-m25p80-spi-gpio-add-device-reset.patch \ - file://0020-hw-m25p80-spi-gpio-fix-prereading-logic-for-controll.patch \ - file://0021-hw-adding-tpm-tis-spi.patch \ - file://0022-aspeed-Add-grandteton-bmc.patch \ - file://0023-docs-system-arm-Add-Description-for-NPCM8XX-SoC.patch \ - file://0024-hw-ssi-Make-flash-size-a-property-in-NPCM7XX-FIU.patch \ - file://0025-hw-misc-Support-NPCM8XX-GCR-module.patch \ - file://0026-hw-misc-Support-NPCM8XX-CLK-Module-Registers.patch \ - file://0027-hw-misc-Store-DRAM-size-in-NPCM8XX-GCR-Module.patch \ - file://0028-hw-intc-Add-a-property-to-allow-GIC-to-reset-into-no.patch \ - file://0029-hw-misc-Support-8-bytes-memop-in-NPCM-GCR-module.patch \ - file://0030-hw-net-Add-NPCM8XX-PCS-Module.patch \ - file://0031-hw-arm-Add-NPCM8XX-SoC.patch \ - file://0032-hw-arm-Add-NPCM845-Evaluation-board.patch \ - file://0033-hw-arm-npcm8xx-Remove-qemu-common.h-include.patch \ - file://0034-npcm7xx-Change-flash_size-to-uint64.patch \ - file://0035-hw-tpm_tis_spi-fix-the-read-write-mmio-logic-fix-the.patch \ - file://0036-hw-tpm_tis_spi-connect-the-cs-line-remove-m25p80-dev.patch \ - file://0037-npcm8xx-Fix-flash-device-part-number.patch \ - file://0038-npcm8xx-Increase-ram-to-2GB.patch \ - file://0039-npcm8xx-Change-default-bios-path-to-pc-bios-npcm8xx_.patch \ - file://0040-npcm8xx-Init-INTCR4-GMMAP0-to-0x7F00_0000.patch \ - file://0041-npcm8xx-Auto-zero-extend-flash-images.patch \ - file://0042-hw-spi_gpio-remove-MOSI-pin.patch \ - file://0043-tests-avocado-boot_linux_console-Add-NPCM845-EVB.patch \ - file://0044-fbttn-Add-I2C-SCL-timeout-property.patch \ - file://0045-aspeed-Add-greatlakes-bmc.patch \ - file://0046-hw-misc-aspeed-Add-fby35-sb-cpld.patch \ - file://0047-hw-misc-aspeed-Add-intel-me.patch \ - file://0048-hw-misc-aspeed-Add-fby35-server-board-bridge-IC.patch \ - file://0049-fby35-Add-CPLD-and-BIC-as-I2C-devices.patch \ - file://0050-hw-i2c-pca954x-Add-method-to-get-channels.patch \ - file://0051-aspeed-Expose-i2c-buses-to-machine.patch \ - file://0052-fby35-Setup-I2C-devices-and-GPIO-s.patch \ - file://0053-fby35-Add-motherboard-fru-EEPROM-to-BIC.patch \ - file://0054-hw-i2c-aspeed-Add-bus-ID-to-all-trace-events.patch \ - file://0055-hw-i2c-aspeed-Add-slave-event-traces.patch \ - file://0056-hw-i2c-aspeed-Fix-bus-derivation-for-slave-events.patch \ - file://0057-qemu-Add-i2c-devices-to-oby35-cl.patch \ - file://0058-tests-Rename-aspeed_i2c-test-to-i2c-netdev2-test.patch \ - file://0059-hw-misc-add-a-toy-i2c-echo-device.patch \ - file://0060-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch \ - file://0061-tests-Create-qtest-for-Aspeed-I2C-controller.patch \ - file://0062-aspeed-Add-Sandia.patch \ - file://0063-npcm8xx-Enable-EL3.patch \ - file://0064-npcm8xx-Allow-bios-to-be-omitted.patch \ - file://0065-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch \ - file://0066-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch \ - file://0067-aspeed-add-montblanc-bmc.patch \ - file://0068-hw-eeprom-at24c-for-1-byte-address.patch \ - file://0069-aspeed-add-janga-bmc.patch \ - " -PV = "7.2.0+git${SRCPV}" - -PACKAGECONFIG ??= "fdt slirp pie " - -EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}" -EXTRA_OECONF:append = " --disable-guest-agent" -EXTRA_OECONF:remove = "--meson=meson" -EXTRA_OECONF:remove = "--disable-libdw" -EXTRA_OECONF:remove = "--disable-download" -EXTRA_OECONF:remove = "--disable-docs" -EXTRA_OECONF:remove = "--disable-pipewire" - -do_install:append() { - # The following is also installed by qemu-native - rm -f ${D}${datadir}/qemu/trace-events-all - rm -rf ${D}${datadir}/qemu/keymaps - rm -rf ${D}${datadir}/icons/ - rm -rf ${D}${includedir}/qemu-plugin.h -} - diff --git a/common/recipes-devtools/qemu/qemu/0500-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch b/common/recipes-devtools/qemu/qemu/0500-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch new file mode 100644 index 000000000000..82a6638290e4 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0500-net-slirp-Add-mfr-id-and-oob-eth-addr-parameters.patch @@ -0,0 +1,110 @@ +From ec4456b2ea7bf66e91c2f52c5ae1239ffb2f2c0f Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Thu, 5 Jan 2023 01:13:45 -0800 +Subject: [PATCH 500/532] net/slirp: Add mfr-id and oob-eth-addr parameters + +This adds mfr-id and oob-eth-addr parameters to the userspace netdev backend. + + -netdev user,id=[str],mfr-id=[uint32],oob-eth-addr=[MAC address] + +Signed-off-by: Peter Delevoryas +--- + net/slirp.c | 19 ++++++++++++++++--- + qapi/net.json | 9 ++++++++- + 2 files changed, 24 insertions(+), 4 deletions(-) + +diff --git a/net/slirp.c b/net/slirp.c +index 25b49c4526..2512d2519b 100644 +--- a/net/slirp.c ++++ b/net/slirp.c +@@ -426,7 +426,8 @@ static int net_slirp_init(NetClientState *peer, const char *model, + const char *vnameserver, const char *vnameserver6, + const char *smb_export, const char *vsmbserver, + const char **dnssearch, const char *vdomainname, +- const char *tftp_server_name, ++ const char *tftp_server_name, uint32_t mfr_id, ++ const char *oob_eth_addr_str, + Error **errp) + { + /* default settings according to historic slirp */ +@@ -449,6 +450,7 @@ static int net_slirp_init(NetClientState *peer, const char *model, + int shift; + char *end; + struct slirp_config_str *config; ++ MACAddr oob_eth_addr = {}; + + if (!ipv4 && (vnetwork || vhost || vnameserver)) { + error_setg(errp, "IPv4 disabled but netmask/host/dns provided"); +@@ -622,6 +624,12 @@ static int net_slirp_init(NetClientState *peer, const char *model, + return -1; + } + ++ if (oob_eth_addr_str && ++ net_parse_macaddr(oob_eth_addr.a, oob_eth_addr_str) < 0) { ++ error_setg(errp, "'oob-eth-addr' invalid syntax for MAC address"); ++ return -1; ++ } ++ + nc = qemu_new_net_client(&net_slirp_info, peer, model, name); + + qemu_set_info_str(nc, "net=%s,restrict=%s", inet_ntoa(net), +@@ -629,7 +637,7 @@ static int net_slirp_init(NetClientState *peer, const char *model, + + s = DO_UPCAST(SlirpState, nc, nc); + +- cfg.version = SLIRP_CHECK_VERSION(4,7,0) ? 4 : 1; ++ cfg.version = SLIRP_CONFIG_VERSION_MAX; + cfg.restricted = restricted; + cfg.in_enabled = ipv4; + cfg.vnetwork = net; +@@ -648,6 +656,10 @@ static int net_slirp_init(NetClientState *peer, const char *model, + cfg.vnameserver6 = ip6_dns; + cfg.vdnssearch = dnssearch; + cfg.vdomainname = vdomainname; ++#if SLIRP_CONFIG_VERSION_MAX >= 5 ++ cfg.mfr_id = mfr_id; ++ memcpy(cfg.oob_eth_addr, oob_eth_addr.a, sizeof(cfg.oob_eth_addr)); ++#endif + s->slirp = slirp_new(&cfg, &slirp_cb, s); + QTAILQ_INSERT_TAIL(&slirp_stacks, s, entry); + +@@ -1184,7 +1196,8 @@ int net_init_slirp(const Netdev *netdev, const char *name, + user->bootfile, user->dhcpstart, + user->dns, user->ipv6_dns, user->smb, + user->smbserver, dnssearch, user->domainname, +- user->tftp_server_name, errp); ++ user->tftp_server_name, user->mfr_id, ++ user->oob_eth_addr, errp); + + while (slirp_configs) { + config = slirp_configs; +diff --git a/qapi/net.json b/qapi/net.json +index 8095b68fa8..8d785dbed7 100644 +--- a/qapi/net.json ++++ b/qapi/net.json +@@ -163,6 +163,11 @@ + # + # @tftp-server-name: RFC2132 "TFTP server name" string (Since 3.1) + # ++# @mfr-id: Manufacturer ID (IANA Private Enterprise Number) ++# ++# @oob-eth-addr: MAC Address allocated for an out-of-band management ++# controller, to be retrieved through NC-SI. ++# + # Since: 1.2 + ## + { 'struct': 'NetdevUserOptions', +@@ -188,7 +193,9 @@ + '*smbserver': 'str', + '*hostfwd': ['String'], + '*guestfwd': ['String'], +- '*tftp-server-name': 'str' } } ++ '*tftp-server-name': 'str', ++ '*mfr-id': 'uint32', ++ '*oob-eth-addr': 'str' } } + + ## + # @NetdevTapOptions: +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0501-aspeed-Zero-extend-flash-files-to-128MB.patch b/common/recipes-devtools/qemu/qemu/0501-aspeed-Zero-extend-flash-files-to-128MB.patch new file mode 100644 index 000000000000..583201c13578 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0501-aspeed-Zero-extend-flash-files-to-128MB.patch @@ -0,0 +1,74 @@ +From b6cef4fbf160755fa5fbc27edcc6fa3f68009bd7 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 17 Jun 2022 12:21:22 -0700 +Subject: [PATCH 501/532] aspeed: Zero extend flash files to 128MB + +This finally removes the requirement that you have to pad your QEMU +flash images with zeroes. + +Now QEMU will automatically zero-extend your flash device file to the +Aspeed FMC's segment size if it is smaller than it should be. + +For example: + + $ ls -lh flash-yosemite35 + -rw-r--r-- 2 pdel users 30M Jun 17 12:23 flash-yosemite35 + $ qemu-system-arm -machine fby35-bmc -drive file=flash-yosemite35,format=raw,if=mtd -nographic + $ ls -lh flash-yosemite35 + -rw-r--r-- 2 pdel users 128M Jun 17 12:25 flash-yosemite35 + +If your file is large enough already, then QEMU will not truncate it. + +For example, if your image is 256MB, it won't truncate to 128MB. + + $ dd if=/dev/zero of=tmp.mtd bs=1M count=256 + 256+0 records in + 256+0 records out + 268435456 bytes (268 MB, 256 MiB) copied, 0.125099 s, 2.1 GB/s + pdel@devvm9194:~/local/qemu (blk) + $ ./build/qemu-system-arm -machine fby35-bmc -drive file=tmp.mtd,format=raw,if=mtd -nographic + QEMU 7.0.50 monitor - type 'help' for more information + (qemu) q + pdel@devvm9194:~/local/qemu (blk) + $ ls -lh tmp.mtd + -rw-r--r-- 1 pdel users 256M Jun 17 15:46 tmp.mtd + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index cc59176563..744441b5cc 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -307,12 +307,25 @@ void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, + } + + for (i = 0; i < count; ++i) { ++ AspeedSMCFlash *flash = &s->flashes[i]; + DriveInfo *dinfo = drive_get(IF_MTD, 0, unit0 + i); ++ BlockBackend *blk; + DeviceState *dev; ++ uint64_t flash_size, blk_size, perm, shared_perm; + + dev = qdev_new(flashtype); ++ flash_size = memory_region_size(&flash->mmio); + if (dinfo) { +- qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(dinfo)); ++ blk = blk_by_legacy_dinfo(dinfo); ++ blk_size = blk_getlength(blk); ++ if (blk_size < flash_size) { ++ blk_get_perm(blk, &perm, &shared_perm); ++ blk_set_perm(blk, BLK_PERM_ALL, BLK_PERM_ALL, &error_abort); ++ blk_truncate(blk, flash_size, true, PREALLOC_MODE_OFF, ++ BDRV_REQ_ZERO_WRITE, &error_abort); ++ blk_set_perm(blk, perm, shared_perm, &error_abort); ++ } ++ qdev_prop_set_drive(dev, "drive", blk); + } + qdev_prop_set_uint8(dev, "cs", i); + qdev_realize_and_unref(dev, BUS(s->spi), &error_fatal); +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0502-hw-aspeed_vic-Add-heartbeat-LED-registers.patch b/common/recipes-devtools/qemu/qemu/0502-hw-aspeed_vic-Add-heartbeat-LED-registers.patch new file mode 100644 index 000000000000..3142e856d2b3 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0502-hw-aspeed_vic-Add-heartbeat-LED-registers.patch @@ -0,0 +1,70 @@ +From 1c9d9b8214792b86097567e9444549145bd54434 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 23 Nov 2021 09:22:10 -0800 +Subject: [PATCH 502/532] hw: aspeed_vic: Add heartbeat LED registers + +Signed-off-by: Peter Delevoryas +--- + hw/intc/aspeed_vic.c | 15 +++++++++++++++ + include/hw/intc/aspeed_vic.h | 5 +++++ + 2 files changed, 20 insertions(+) + +diff --git a/hw/intc/aspeed_vic.c b/hw/intc/aspeed_vic.c +index 5ba06c5262..13c700d4f6 100644 +--- a/hw/intc/aspeed_vic.c ++++ b/hw/intc/aspeed_vic.c +@@ -168,6 +168,12 @@ static uint64_t aspeed_vic_read(void *opaque, hwaddr offset, unsigned size) + HWADDR_PRIx "\n", __func__, offset); + val = 0; + break; ++ case 0x60: /* Hardware Heart Beat Status Register */ ++ val = s->heartbeat_status & 0x1f; ++ break; ++ case 0x64: /* Heart Beat LED Output */ ++ val = s->heartbeat_output & 1; ++ break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "%s: Bad register at offset 0x%" HWADDR_PRIx "\n", +@@ -272,6 +278,13 @@ static void aspeed_vic_write(void *opaque, hwaddr offset, uint64_t data, + "%s: Write of read-only register with offset 0x%" + HWADDR_PRIx "\n", __func__, offset); + break; ++ case 0x60: /* Hardware Heart Beat Status Register */ ++ /* Only the first 5 bits are RW */ ++ s->heartbeat_status = data & 0x1f; ++ break; ++ case 0x64: /* Heart Beat LED Output */ ++ s->heartbeat_output = data & 1; ++ break; + + default: + qemu_log_mask(LOG_GUEST_ERROR, +@@ -303,6 +316,8 @@ static void aspeed_vic_reset(DeviceState *dev) + s->sense = 0x1F07FFF8FFFFULL; + s->dual_edge = 0xF800070000ULL; + s->event = 0x5F07FFF8FFFFULL; ++ s->heartbeat_status = 0x03; ++ s->heartbeat_output = 0x00; + } + + #define AVIC_IO_REGION_SIZE 0x20000 +diff --git a/include/hw/intc/aspeed_vic.h b/include/hw/intc/aspeed_vic.h +index 68d6ab997a..d162d2da07 100644 +--- a/include/hw/intc/aspeed_vic.h ++++ b/include/hw/intc/aspeed_vic.h +@@ -44,6 +44,11 @@ struct AspeedVICState { + + /* 0=low-sensitive/falling-edge, 1=high-sensitive/rising-edge */ + uint64_t event; ++ ++ /* Configure heartbeat LED mode, either hardware or software based */ ++ uint64_t heartbeat_status; ++ /* Register for controlling heartbeat LED output in software mode */ ++ uint64_t heartbeat_output; + }; + + #endif /* ASPEED_VIC_H */ +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0503-hw-misc-Add-i2c-netdev-device.patch b/common/recipes-devtools/qemu/qemu/0503-hw-misc-Add-i2c-netdev-device.patch new file mode 100644 index 000000000000..d7896f195a7e --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0503-hw-misc-Add-i2c-netdev-device.patch @@ -0,0 +1,305 @@ +From 801db18de3173a4a2e25a9a3e5ff7cec26a9c92d Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 27 Apr 2022 16:23:48 -0700 +Subject: [PATCH 503/532] hw/misc: Add i2c-netdev device + +First, create a script to respond to MCTP commands: + +mctp.py: + from socket import * + import sys + + fd = socket(AF_INET, SOCK_DGRAM); + assert fd != -1 + + tx = socket(AF_INET, SOCK_DGRAM, 0) + + fd.setsockopt(SOL_SOCKET, SO_REUSEADDR, 1) + fd.bind(('', 5557)) + + message = bytearray([int(arg, 16) for arg in sys.argv[1:]]) + + while 1: + pkt = fd.recv(1024) + sys.stdout.write('Received: ') + for b in pkt: + sys.stdout.write('%02x ' % ord(b)) + sys.stdout.write('\n') + sys.stdout.flush() + tx.sendto(message, ("localhost", 5556)) + +Usage: + ./build/qemu-system-arm -machine clearcreek-bmc \ + -drive file=flash-clearcreek,if=mtd,format=raw \ + -nographic \ + -netdev socket,id=terminus-i2c,udp=localhost:5557,localaddr=localhost:5556 \ + -device i2c-netdev,bus=aspeed.i2c.bus.8,address=0x32,netdev=terminus-i2c \ + // Within clearcreek console, disable ipmbd_0 and ipmbd_8 + bmc-oob:~# sv stop ipmbd_0 + bmc-oob:~# sv stop ipmbd_8 + // Send a test command, run mctp.py outside QEMU to generate a response + bmc-oob:~# mctp-util -d 8 0x64 0 0 0x80 3 + core: Generating packets for transmission of 3 byte message from 8 to 0 + core: Enqueued 1 packets + smbus: >TX> 0F 08 21 01 00 08 C8 00 80 03 C9 + smbus: +--- + hw/misc/i2c-netdev.c | 217 +++++++++++++++++++++++++++++++++++++++++++ + hw/misc/meson.build | 1 + + 2 files changed, 218 insertions(+) + create mode 100644 hw/misc/i2c-netdev.c + +diff --git a/hw/misc/i2c-netdev.c b/hw/misc/i2c-netdev.c +new file mode 100644 +index 0000000000..83faa942b1 +--- /dev/null ++++ b/hw/misc/i2c-netdev.c +@@ -0,0 +1,217 @@ ++#include "qemu/osdep.h" ++#include "qemu/main-loop.h" ++#include "qapi/error.h" ++#include "hw/i2c/i2c.h" ++#include "hw/qdev-properties.h" ++#include "net/net.h" ++#include "net/eth.h" ++#include "block/aio.h" ++ ++#define TYPE_I2C_NETDEV "i2c-netdev" ++OBJECT_DECLARE_SIMPLE_TYPE(I2CNetdev, I2C_NETDEV) ++ ++typedef enum AsyncState AsyncState; ++enum AsyncState { ++ ASYNC_NONE, ++ ASYNC_WAITING, ++ ASYNC_DONE, ++}; ++ ++typedef struct I2CNetdev I2CNetdev; ++struct I2CNetdev { ++ I2CSlave parent; ++ ++ I2CBus *bus; ++ NICConf nic_conf; ++ NICState *nic; ++ QEMUBH *bh; ++ AsyncState bh_bus_master; ++ AsyncState bh_transmit; ++ ++ uint8_t guest_os_tx_buf[256]; ++ uint8_t guest_os_rx_buf[256]; ++ int guest_os_tx_pos; ++ int guest_os_rx_pos; ++ int guest_os_rx_len; ++}; ++ ++static int i2c_event(I2CSlave *i2c, enum i2c_event event) ++{ ++ I2CNetdev *s = I2C_NETDEV(i2c); ++ NetClientState *netdev; ++ ++ switch (event) { ++ case I2C_START_RECV: ++ printf("SLAVE RECEIVE UNIMPLEMENTED\n"); ++ abort(); ++ case I2C_START_SEND: ++ printf("SLAVE SEND SYNCHRONOUSLY UNIMPLEMENTED\n"); ++ abort(); ++ case I2C_START_SEND_ASYNC: ++ s->guest_os_tx_pos = 0; ++ // Slave address, with R/W bit, is expected to be the first byte. ++ // R/W bit 1 indicates "read", 0 indicates "write". ++ s->guest_os_tx_buf[s->guest_os_tx_pos++] = i2c->address << 1 | 0; ++ break; ++ case I2C_FINISH: ++ assert(s->guest_os_tx_pos != 0); ++ netdev = qemu_get_queue(s->nic); ++ qemu_send_packet(netdev, s->guest_os_tx_buf, s->guest_os_tx_pos); ++ break; ++ case I2C_NACK: ++ printf("RECEIVE NACK UNIMPLEMENTED\n"); ++ abort(); ++ } ++ ++ return 0; ++} ++ ++static uint8_t i2c_receive(I2CSlave *i2c) ++{ ++ printf("I2C NETDEV SLAVE RECEIVE UNIMPLEMENTED\n"); ++ abort(); ++} ++ ++static int i2c_transmit(I2CSlave *i2c, uint8_t byte) ++{ ++ I2CNetdev *s = I2C_NETDEV(i2c); ++ ++ assert(s->guest_os_tx_pos < sizeof(s->guest_os_tx_buf)); ++ s->guest_os_tx_buf[s->guest_os_tx_pos++] = byte; ++ ++ return 0; ++} ++ ++static bool i2c_netdev_can_receive_packet(NetClientState *nc) ++{ ++ I2CNetdev *s = I2C_NETDEV(qemu_get_nic_opaque(nc)); ++ ++ // If the rx buffer is empty, then we can accept a new packet and schedule a ++ // new receive. ++ return s->guest_os_rx_len == 0; ++} ++ ++static ssize_t i2c_netdev_receive_packet(NetClientState *nc, const uint8_t *buf, size_t len) ++{ ++ I2CNetdev *s = I2C_NETDEV(qemu_get_nic_opaque(nc)); ++ ++ s->guest_os_rx_len = len; ++ s->guest_os_rx_pos = 0; ++ assert(len < sizeof(s->guest_os_rx_buf)); ++ memcpy(s->guest_os_rx_buf, buf, len); ++ qemu_bh_schedule(s->bh); ++ ++ return len; ++} ++ ++static void i2c_netdev_cleanup(NetClientState *nc) ++{ ++ I2CNetdev *s = I2C_NETDEV(qemu_get_nic_opaque(nc)); ++ ++ s->nic = NULL; ++} ++ ++static NetClientInfo net_client_info = { ++ .type = NET_CLIENT_DRIVER_NIC, ++ .size = sizeof(NetClientState), ++ .can_receive = i2c_netdev_can_receive_packet, ++ .receive = i2c_netdev_receive_packet, ++ .cleanup = i2c_netdev_cleanup, ++}; ++ ++static void i2c_netdev_bh(void *opaque) ++{ ++ I2CNetdev *s = opaque; ++ ++ switch (s->bh_bus_master) { ++ case ASYNC_NONE: ++ i2c_bus_master(s->bus, s->bh); ++ s->bh_bus_master = ASYNC_WAITING; ++ return; ++ case ASYNC_WAITING: ++ s->bh_bus_master = ASYNC_DONE; ++ break; ++ case ASYNC_DONE: ++ break; ++ } ++ ++ uint8_t b; ++ uint8_t slave_addr; ++ ++ switch (s->bh_transmit) { ++ case ASYNC_NONE: ++ case ASYNC_DONE: ++ assert(s->guest_os_rx_pos == 0); ++ assert(s->guest_os_rx_len != 0); ++ // Other side should be sending us the slave address shifted 1 to the ++ // left, with a R/W bit. The R/W bit should always be 0, because we're ++ // only supporting writes at this point. ++ b = s->guest_os_rx_buf[s->guest_os_rx_pos++]; ++ assert((b & 1) == 0); ++ slave_addr = b >> 1; ++ i2c_start_send(s->bus, slave_addr); ++ s->bh_transmit = ASYNC_WAITING; ++ break; ++ case ASYNC_WAITING: ++ if (s->guest_os_rx_pos >= s->guest_os_rx_len) { ++ s->bh_transmit = ASYNC_DONE; ++ s->bh_bus_master = ASYNC_NONE; ++ s->guest_os_rx_len = 0; ++ s->guest_os_rx_pos = 0; ++ i2c_end_transfer(s->bus); ++ i2c_bus_release(s->bus); ++ break; ++ } ++ ++ b = s->guest_os_rx_buf[s->guest_os_rx_pos++]; ++ i2c_send_async(s->bus, b); ++ break; ++ } ++} ++ ++static void i2c_netdev_realize(DeviceState *dev, Error **errp) ++{ ++ I2CNetdev *s = I2C_NETDEV(dev); ++ s->bus = I2C_BUS(qdev_get_parent_bus(dev)); ++ s->nic = qemu_new_nic(&net_client_info, &s->nic_conf, TYPE_I2C_NETDEV, ++ dev->id, &dev->mem_reentrancy_guard, s); ++ s->bh = qemu_bh_new(i2c_netdev_bh, s); ++ s->bh_bus_master = ASYNC_NONE; ++ s->bh_transmit = ASYNC_NONE; ++ memset(s->guest_os_tx_buf, 0, sizeof(s->guest_os_tx_buf)); ++ memset(s->guest_os_rx_buf, 0, sizeof(s->guest_os_rx_buf)); ++ s->guest_os_tx_pos = 0; ++ s->guest_os_rx_pos = 0; ++ s->guest_os_rx_len = 0; ++} ++ ++static Property i2c_netdev_props[] = { ++ DEFINE_NIC_PROPERTIES(I2CNetdev, nic_conf), ++ DEFINE_PROP_END_OF_LIST(), ++}; ++ ++static void i2c_netdev_class_init(ObjectClass *cls, void *data) ++{ ++ DeviceClass *dc = DEVICE_CLASS(cls); ++ dc->realize = i2c_netdev_realize; ++ device_class_set_props(dc, i2c_netdev_props); ++ ++ I2CSlaveClass *sc = I2C_SLAVE_CLASS(cls); ++ sc->event = i2c_event; ++ sc->recv = i2c_receive; ++ sc->send = i2c_transmit; ++} ++ ++static const TypeInfo i2c_netdev = { ++ .name = TYPE_I2C_NETDEV, ++ .parent = TYPE_I2C_SLAVE, ++ .instance_size = sizeof(I2CNetdev), ++ .class_init = i2c_netdev_class_init, ++}; ++ ++static void register_types(void) ++{ ++ type_register_static(&i2c_netdev); ++} ++ ++type_init(register_types); +diff --git a/hw/misc/meson.build b/hw/misc/meson.build +index 36c20d5637..c3bbde1803 100644 +--- a/hw/misc/meson.build ++++ b/hw/misc/meson.build +@@ -142,6 +142,7 @@ system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c')) + system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c')) + + system_ss.add(when: 'CONFIG_I2C_ECHO', if_true: files('i2c-echo.c')) ++system_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-netdev.c')) + + specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c')) + +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0504-hw-misc-Add-byte-by-byte-i2c-network-device.patch b/common/recipes-devtools/qemu/qemu/0504-hw-misc-Add-byte-by-byte-i2c-network-device.patch new file mode 100644 index 000000000000..12a4c4527612 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0504-hw-misc-Add-byte-by-byte-i2c-network-device.patch @@ -0,0 +1,560 @@ +From 9ec960ee45184713710248e4c6e9936e1e0cac44 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 7 Jun 2022 07:31:54 -0700 +Subject: [PATCH 504/532] hw/misc: Add byte-by-byte i2c network device + +Signed-off-by: Peter Delevoryas +--- + hw/misc/i2c-netdev2.c | 260 ++++++++++++++++++++++++++++++++++ + hw/misc/meson.build | 2 +- + tests/qtest/aspeed_i2c-test.c | 243 +++++++++++++++++++++++++++++++ + tests/qtest/meson.build | 3 +- + 4 files changed, 506 insertions(+), 2 deletions(-) + create mode 100644 hw/misc/i2c-netdev2.c + create mode 100644 tests/qtest/aspeed_i2c-test.c + +diff --git a/hw/misc/i2c-netdev2.c b/hw/misc/i2c-netdev2.c +new file mode 100644 +index 0000000000..e60846081e +--- /dev/null ++++ b/hw/misc/i2c-netdev2.c +@@ -0,0 +1,260 @@ ++#include "qemu/osdep.h" ++#include "qemu/main-loop.h" ++#include "qapi/error.h" ++#include "hw/i2c/i2c.h" ++#include "hw/qdev-properties.h" ++#include "net/net.h" ++#include "net/eth.h" ++#include "block/aio.h" ++ ++#define DATA_LEN 1 ++#define ACK_LEN 2 ++#define START_LEN 3 ++#define STOP_LEN 4 ++#define DEBUG 0 ++ ++#if !DEBUG ++#define printf(...) ++#endif ++ ++#define TYPE_I2C_NETDEV2 "i2c-netdev2" ++OBJECT_DECLARE_SIMPLE_TYPE(I2CNetdev2, I2C_NETDEV2) ++ ++typedef struct I2CNetdev2 I2CNetdev2; ++struct I2CNetdev2 { ++ I2CSlave parent; ++ ++ I2CBus *bus; ++ NICConf nic_conf; ++ NICState *nic; ++ QEMUBH *bh; ++ ++ uint8_t rx_buf[10]; ++ int rx_len; ++ bool rx_ack_pending; ++}; ++ ++static void print_bytes(const uint8_t *buf, size_t len) ++{ ++ int i; ++ ++ printf("["); ++ for (i = 0; i < len; i++) { ++ if (i) { ++ printf(", "); ++ } ++ printf("%02x", buf[i]); ++ } ++ printf("]"); ++} ++ ++static ssize_t i2c_netdev2_nic_receive(NetClientState *nc, const uint8_t *buf, size_t len); ++ ++static void i2c_netdev2_nic_cleanup(NetClientState *nc) ++{ ++ I2CNetdev2 *s = I2C_NETDEV2(qemu_get_nic_opaque(nc)); ++ ++ s->nic = NULL; ++} ++ ++static NetClientInfo net_client_info = { ++ .type = NET_CLIENT_DRIVER_NIC, ++ .size = sizeof(NetClientState), ++ .receive = i2c_netdev2_nic_receive, ++ .cleanup = i2c_netdev2_nic_cleanup, ++}; ++ ++static ssize_t i2c_netdev2_nic_receive(NetClientState *nc, const uint8_t *buf, size_t len) ++{ ++ printf("%s: rx ", __FILE__); ++ print_bytes(buf, len); ++ printf("\n"); ++ ++ I2CNetdev2 *s = I2C_NETDEV2(qemu_get_nic_opaque(nc)); ++ ++ if (len == ACK_LEN) { ++ return len; ++ } ++ ++ printf("prev rx_buf: "); ++ print_bytes(s->rx_buf, sizeof(s->rx_buf)); ++ printf("\n"); ++ ++ assert(len <= sizeof(s->rx_buf)); ++ memcpy(s->rx_buf, buf, len); ++ s->rx_len = len; ++ ++ printf("next rx_buf: "); ++ print_bytes(s->rx_buf, sizeof(s->rx_buf)); ++ printf("\n"); ++ ++ switch (len) { ++ case START_LEN: ++ i2c_bus_master(s->bus, s->bh); ++ break; ++ case DATA_LEN: ++ qemu_bh_schedule(s->bh); ++ break; ++ case STOP_LEN: ++ qemu_bh_schedule(s->bh); ++ break; ++ default: ++ printf("%s: unexpected packet len: %ld\n", __func__, len); ++ break; ++ } ++ ++ return len; ++} ++ ++static void i2c_netdev2_slave_mode_rx(void *opaque) ++{ ++ I2CNetdev2 *s = opaque; ++ NetClientState *netdev = qemu_get_queue(s->nic); ++ uint8_t rx_addr; ++ uint8_t ack[2] = {1, 0}; ++ ++ printf("%s: rx_len=%d\n", __func__, s->rx_len); ++ ++ if (s->rx_ack_pending) { ++ printf("%s: guest OS ack rx, clearing rx_len\n", __func__); ++ s->rx_ack_pending = false; ++ s->rx_len = 0; ++ qemu_send_packet(netdev, ack, sizeof(ack)); ++ return; ++ } ++ ++ switch (s->rx_len) { ++ case START_LEN: ++ rx_addr = s->rx_buf[0]; ++ assert((rx_addr & 1) == 0); ++ rx_addr >>= 1; ++ if (i2c_start_send_async(s->bus, rx_addr) != 0) { ++ printf("%s: i2c_start_send to 0x%02x failed\n", __func__, rx_addr); ++ ack[0] = 0; ++ i2c_bus_release(s->bus); ++ qemu_send_packet(netdev, ack, sizeof(ack)); ++ s->rx_len = 0; ++ return; ++ } ++ break; ++ case DATA_LEN: ++ i2c_send_async(s->bus, s->rx_buf[0]); ++ break; ++ case STOP_LEN: ++ i2c_end_transfer(s->bus); ++ i2c_bus_release(s->bus); ++ return; ++ default: ++ printf("%s: unexpected rx_len %d\n", __func__, s->rx_len); ++ break; ++ } ++ ++ s->rx_ack_pending = true; ++} ++ ++static void i2c_netdev2_realize(DeviceState *dev, Error **errp) ++{ ++ I2CNetdev2 *s = I2C_NETDEV2(dev); ++ ++ s->bus = I2C_BUS(qdev_get_parent_bus(dev)); ++ s->nic = qemu_new_nic(&net_client_info, &s->nic_conf, TYPE_I2C_NETDEV2, ++ dev->id, &dev->mem_reentrancy_guard, s); ++ s->bh = qemu_bh_new(i2c_netdev2_slave_mode_rx, s); ++ s->rx_len = 0; ++} ++ ++static int i2c_netdev2_handle_event(I2CSlave *i2c, enum i2c_event event) ++{ ++ I2CNetdev2 *s = I2C_NETDEV2(i2c); ++ NetClientState *netdev = qemu_get_queue(s->nic); ++ uint8_t tx_addr = i2c->address << 1; ++ uint8_t start_msg[START_LEN]; ++ uint8_t stop_msg[STOP_LEN]; ++ ++ // printf("%s: %d\n", __func__, event); ++ ++ switch (event) { ++ case I2C_START_RECV: ++ printf("%s: RECV UNIMPLEMENTED\n", __func__); ++ abort(); ++ case I2C_START_SEND_ASYNC: ++ printf("%s: SEND ASYNC UNIMPLEMENTED\n", __func__); ++ abort(); ++ case I2C_START_SEND: ++ // printf("%s: SENDING START MESSAGE PACKET\n", __func__); ++ memset(start_msg, 0, sizeof(start_msg)); ++ start_msg[0] = tx_addr; ++ qemu_send_packet(netdev, start_msg, sizeof(start_msg)); ++ printf("%s: tx ", __FILE__); ++ print_bytes(start_msg, sizeof(start_msg)); ++ printf("\n"); ++ //sleep(1); ++ break; ++ case I2C_FINISH: ++ memset(stop_msg, 0, sizeof(stop_msg)); ++ qemu_send_packet(netdev, stop_msg, sizeof(stop_msg)); ++ printf("%s: tx ", __FILE__); ++ print_bytes(stop_msg, sizeof(stop_msg)); ++ printf("\n"); ++ //sleep(1); ++ break; ++ case I2C_NACK: ++ printf("%s: NACK UNIMPLEMENTED\n", __func__); ++ abort(); ++ } ++ ++ return 0; ++} ++ ++static uint8_t i2c_netdev2_handle_recv(I2CSlave *i2c) ++{ ++ printf("%s: unimplemented\n", __func__); ++ abort(); ++} ++ ++static int i2c_netdev2_handle_send(I2CSlave *i2c, uint8_t byte) ++{ ++ I2CNetdev2 *s = I2C_NETDEV2(i2c); ++ NetClientState *netdev = qemu_get_queue(s->nic); ++ uint8_t data_msg[DATA_LEN] = {byte}; ++ ++ qemu_send_packet(netdev, data_msg, sizeof(data_msg)); ++ printf("%s: tx ", __FILE__); ++ print_bytes(data_msg, sizeof(data_msg)); ++ printf("\n"); ++ //sleep(1); ++ ++ return 0; ++} ++ ++static Property i2c_netdev2_props[] = { ++ DEFINE_NIC_PROPERTIES(I2CNetdev2, nic_conf), ++ DEFINE_PROP_END_OF_LIST(), ++}; ++ ++static void i2c_netdev2_class_init(ObjectClass *cls, void *data) ++{ ++ DeviceClass *dc = DEVICE_CLASS(cls); ++ I2CSlaveClass *sc = I2C_SLAVE_CLASS(cls); ++ ++ dc->realize = i2c_netdev2_realize; ++ device_class_set_props(dc, i2c_netdev2_props); ++ ++ sc->event = i2c_netdev2_handle_event; ++ sc->recv = i2c_netdev2_handle_recv; ++ sc->send = i2c_netdev2_handle_send; ++} ++ ++static const TypeInfo i2c_netdev2 = { ++ .name = TYPE_I2C_NETDEV2, ++ .parent = TYPE_I2C_SLAVE, ++ .instance_size = sizeof(I2CNetdev2), ++ .class_init = i2c_netdev2_class_init, ++}; ++ ++static void register_types(void) ++{ ++ type_register_static(&i2c_netdev2); ++} ++ ++type_init(register_types); +diff --git a/hw/misc/meson.build b/hw/misc/meson.build +index c3bbde1803..901e5a11f0 100644 +--- a/hw/misc/meson.build ++++ b/hw/misc/meson.build +@@ -142,7 +142,7 @@ system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c')) + system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c')) + + system_ss.add(when: 'CONFIG_I2C_ECHO', if_true: files('i2c-echo.c')) +-system_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-netdev.c')) ++system_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-netdev.c', 'i2c-netdev2.c')) + + specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c')) + +diff --git a/tests/qtest/aspeed_i2c-test.c b/tests/qtest/aspeed_i2c-test.c +new file mode 100644 +index 0000000000..aaf8c85427 +--- /dev/null ++++ b/tests/qtest/aspeed_i2c-test.c +@@ -0,0 +1,243 @@ ++/* ++ * QTest testcase for the Aspeed I2C Controller. ++ * ++ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a copy ++ * of this software and associated documentation files (the "Software"), to deal ++ * in the Software without restriction, including without limitation the rights ++ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell ++ * copies of the Software, and to permit persons to whom the Software is ++ * furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be included in ++ * all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN ++ * THE SOFTWARE. ++ */ ++ ++#include "qemu/osdep.h" ++#include "qemu/bitops.h" ++#include "libqtest-single.h" ++ ++#define ASPEED_I2C_BASE 0x1E78A000 ++#define ASPEED_I2C_BUS0_BASE (ASPEED_I2C_BASE + 0x80) ++#define I2C_CTRL_GLOBAL 0x0C ++#define I2C_CTRL_NEW_REG_MODE BIT(2) ++#define I2CD_FUN_CTRL_REG 0x00 ++#define I2CD_SLAVE_EN (0x1 << 1) ++#define I2CD_MASTER_EN (0x1) ++#define I2CD_INTR_CTRL_REG 0x0c ++#define I2CD_INTR_STS_REG 0x10 ++#define I2CD_INTR_SLAVE_ADDR_RX_MATCH (0x1 << 7) /* use RX_DONE */ ++#define I2CD_INTR_NORMAL_STOP (0x1 << 4) ++#define I2CD_INTR_RX_DONE (0x1 << 2) ++#define I2CD_CMD_REG 0x14 /* I2CD Command/Status */ ++#define I2CD_RX_DMA_ENABLE (0x1 << 9) ++#define I2CD_TX_DMA_ENABLE (0x1 << 8) ++#define I2CD_RX_BUFF_ENABLE (0x1 << 7) ++#define I2CD_TX_BUFF_ENABLE (0x1 << 6) ++#define I2CD_M_STOP_CMD (0x1 << 5) ++#define I2CD_M_S_RX_CMD_LAST (0x1 << 4) ++#define I2CD_M_RX_CMD (0x1 << 3) ++#define I2CD_S_TX_CMD (0x1 << 2) ++#define I2CD_M_TX_CMD (0x1 << 1) ++#define I2CD_M_START_CMD (0x1) ++#define I2CD_DEV_ADDR_REG 0x18 /* Slave Device Address */ ++#define I2CD_BYTE_BUF_REG 0x20 /* Transmit/Receive Byte Buffer */ ++#define I2CD_BYTE_BUF_TX_SHIFT 0 ++#define I2CD_BYTE_BUF_TX_MASK 0xff ++#define I2CD_BYTE_BUF_RX_SHIFT 8 ++#define I2CD_BYTE_BUF_RX_MASK 0xff ++ ++#define DATA_LEN 1 ++#define ACK_LEN 2 ++#define START_LEN 3 ++#define STOP_LEN 4 ++ ++static void aspeed_i2c_master_mode_tx(const uint8_t *buf, int len) ++{ ++ int i; ++ ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_BYTE_BUF_REG, buf[0]); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_CMD_REG, I2CD_M_START_CMD); ++ ++ for (i = 1; i < len; i++) { ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_BYTE_BUF_REG, buf[i]); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_CMD_REG, I2CD_M_TX_CMD); ++ } ++ ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_CMD_REG, I2CD_M_STOP_CMD); ++} ++ ++static void aspeed_i2c_slave_mode_enable(uint8_t addr) ++{ ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_DEV_ADDR_REG, addr); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_FUN_CTRL_REG, I2CD_SLAVE_EN); ++} ++ ++static int aspeed_i2c_slave_mode_rx(uint8_t *buf, int len) ++{ ++ uint32_t sts; ++ uint32_t byte_buf; ++ int i = 0; ++ ++ while (i < len) { ++ sts = readl(ASPEED_I2C_BUS0_BASE + I2CD_INTR_STS_REG); ++ if (sts & I2CD_INTR_NORMAL_STOP) { ++ break; ++ } ++ if (sts & I2CD_INTR_RX_DONE) { ++ byte_buf = readl(ASPEED_I2C_BUS0_BASE + I2CD_BYTE_BUF_REG); ++ buf[i++] = (byte_buf >> I2CD_BYTE_BUF_RX_SHIFT) & I2CD_BYTE_BUF_RX_MASK; ++ } ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_INTR_STS_REG, sts); ++ } ++ ++ return i; ++} ++ ++static uint8_t aspeed_i2c_slave_mode_rx_byte(void) ++{ ++ uint8_t buf = 0xff; ++ ++ g_assert_cmphex(aspeed_i2c_slave_mode_rx(&buf, sizeof(buf)), ==, 1); ++ return buf; ++} ++ ++static int udp_socket; ++ ++static void test_write_in_old_byte_mode(void) ++{ ++ uint8_t pkt[] = {0x64, 0xde, 0xad, 0xbe, 0xef}; ++ uint8_t buf[10]; ++ ssize_t n; ++ int i; ++ struct sockaddr_in rx_addr; ++ uint8_t ack[ACK_LEN] = {1, 0}; ++ ++ rx_addr.sin_family = AF_INET; ++ rx_addr.sin_addr.s_addr = inet_addr("127.0.0.1"); ++ rx_addr.sin_port = htons(6000); ++ ++ g_assert(!(readl(ASPEED_I2C_BASE + I2C_CTRL_GLOBAL) & I2C_CTRL_NEW_REG_MODE)); ++ ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_FUN_CTRL_REG, I2CD_MASTER_EN); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_INTR_CTRL_REG, 0xFFFFFFFF); ++ ++ aspeed_i2c_master_mode_tx(pkt, sizeof(pkt)); ++ ++ n = recv(udp_socket, buf, sizeof(buf), 0); ++ g_assert_cmphex(n, ==, START_LEN); ++ g_assert_cmphex(buf[0], ==, pkt[0]); ++ sendto(udp_socket, ack, sizeof(ack), 0, (const struct sockaddr_in*)&rx_addr, sizeof(rx_addr)); ++ ++ for (i = 1; i < sizeof(pkt); i++) { ++ n = recv(udp_socket, buf, sizeof(buf), 0); ++ g_assert_cmphex(n, ==, DATA_LEN); ++ g_assert_cmphex(buf[0], ==, pkt[i]); ++ sendto(udp_socket, ack, sizeof(ack), 0, (const struct sockaddr_in*)&rx_addr, sizeof(rx_addr)); ++ } ++ ++ n = recv(udp_socket, buf, sizeof(buf), 0); ++ g_assert_cmphex(n, ==, STOP_LEN); ++} ++ ++static void test_slave_mode_rx_byte_buf(void) ++{ ++ uint8_t b; ++ uint32_t sts; ++ ++ g_assert(!(readl(ASPEED_I2C_BASE + I2C_CTRL_GLOBAL) & I2C_CTRL_NEW_REG_MODE)); ++ ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_INTR_STS_REG, 0xFFFFFFFF); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_INTR_CTRL_REG, 0xFFFFFFFF); ++ ++ aspeed_i2c_slave_mode_enable(0x10); ++ ++ struct sockaddr_in dst; ++ dst.sin_family = AF_INET; ++ dst.sin_addr.s_addr = inet_addr("127.0.0.1"); ++ dst.sin_port = htons(6000); ++ ++ uint8_t pkt[] = {0x20, 0xde, 0xad, 0xbe, 0xef}; ++ uint8_t buf[10] = {}; ++ ++ buf[0] = 0x20; ++ sendto(udp_socket, buf, START_LEN, 0, (const struct sockaddr*)&dst, sizeof(dst)); ++ b = aspeed_i2c_slave_mode_rx_byte(); ++ g_assert_cmphex(b, ==, buf[0]); ++ ++ for (int i = 1; i < sizeof(pkt); i++) { ++ buf[0] = pkt[i]; ++ sendto(udp_socket, buf, DATA_LEN, 0, (const struct sockaddr*)&dst, sizeof(dst)); ++ b = aspeed_i2c_slave_mode_rx_byte(); ++ g_assert_cmphex(b, ==, buf[0]); ++ } ++ ++ sendto(udp_socket, buf, STOP_LEN, 0, (const struct sockaddr*)&dst, sizeof(dst)); ++ for (int i = 0; i < 10000; i++) { ++ sts = readl(ASPEED_I2C_BUS0_BASE + I2CD_INTR_STS_REG); ++ writel(ASPEED_I2C_BUS0_BASE + I2CD_INTR_STS_REG, sts); ++ if (sts & I2CD_INTR_NORMAL_STOP) { ++ break; ++ } ++ } ++ g_assert(sts & I2CD_INTR_NORMAL_STOP); ++} ++ ++static int udp_socket_init(const char *ip_addr, uint16_t port) ++{ ++ bool reuseaddr = true; ++ struct sockaddr_in addr; ++ int fd; ++ ++ fd = socket(AF_INET, SOCK_DGRAM, 0); ++ if (fd == -1) { ++ perror("socket"); ++ return -1; ++ } ++ ++ setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr, sizeof(reuseaddr)); ++ ++ addr.sin_family = AF_INET; ++ addr.sin_addr.s_addr = inet_addr(ip_addr); ++ addr.sin_port = htons(port); ++ if (bind(fd, (const struct sockaddr*)&addr, sizeof(addr))) { ++ perror("bind"); ++ return -1; ++ } ++ ++ return fd; ++} ++ ++int main(int argc, char **argv) ++{ ++ int ret; ++ ++ udp_socket = udp_socket_init("127.0.0.1", 5000); ++ if (udp_socket == -1) { ++ return 1; ++ } ++ ++ g_test_init(&argc, &argv, NULL); ++ ++ global_qtest = qtest_initf("-machine fby35-bmc " ++ "-netdev socket,id=socket0,udp=127.0.0.1:5000,localaddr=127.0.0.1:6000 " ++ "-device i2c-netdev2,bus=aspeed.i2c.bus.0,address=0x32,netdev=socket0"); ++ ++ qtest_add_func("/ast2600/i2c/write_in_old_byte_mode", test_write_in_old_byte_mode); ++ qtest_add_func("/ast2600/i2c/slave_mode_rx_byte_buf", test_slave_mode_rx_byte_buf); ++ ++ ret = g_test_run(); ++ qtest_quit(global_qtest); ++ close(udp_socket); ++ ++ return ret; ++} +diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build +index 47dabf91d0..14068d8f39 100644 +--- a/tests/qtest/meson.build ++++ b/tests/qtest/meson.build +@@ -193,7 +193,8 @@ qtests_npcm7xx = \ + qtests_aspeed = \ + ['aspeed_hace-test', + 'aspeed_smc-test', +- 'aspeed_gpio-test'] ++ 'aspeed_gpio-test', ++ 'aspeed_i2c-test'] + qtests_arm = \ + (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \ + (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \ +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0505-hw-intc-Add-a-property-to-allow-GIC-to-reset-into-no.patch b/common/recipes-devtools/qemu/qemu/0505-hw-intc-Add-a-property-to-allow-GIC-to-reset-into-no.patch new file mode 100644 index 000000000000..a4995b2cacc2 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0505-hw-intc-Add-a-property-to-allow-GIC-to-reset-into-no.patch @@ -0,0 +1,33 @@ +From c02cb2789c53d77e06be59c7f2fa914bf75684e1 Mon Sep 17 00:00:00 2001 +From: Hao Wu +Date: Tue, 5 Apr 2022 15:36:35 -0700 +Subject: [PATCH 505/532] hw/intc: Add a property to allow GIC to reset into + non secure mode + +This property allows certain boards like NPCM8xx to boot the kernel +directly into non-secure mode. This is necessary since we do not +support secure boot features for NPCM8xx now. + +Signed-off-by: Hao Wu +Reviewed-by: Patrick Venture +Signed-off-by: Peter Delevoryas +--- + hw/intc/arm_gic_common.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c +index 7c28504ace..2117d2c689 100644 +--- a/hw/intc/arm_gic_common.c ++++ b/hw/intc/arm_gic_common.c +@@ -360,6 +360,8 @@ static Property arm_gic_common_properties[] = { + /* True if the GIC should implement the virtualization extensions */ + DEFINE_PROP_BOOL("has-virtualization-extensions", GICState, virt_extn, 0), + DEFINE_PROP_UINT32("num-priority-bits", GICState, n_prio_bits, 8), ++ /* True if we want to directly booting a kernel into NonSecure */ ++ DEFINE_PROP_BOOL("irq-reset-nonsecure", GICState, irq_reset_nonsecure, 0), + DEFINE_PROP_END_OF_LIST(), + }; + +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0506-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch b/common/recipes-devtools/qemu/qemu/0506-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch new file mode 100644 index 000000000000..271d6a8b13aa --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0506-hw-m25p80-Add-BP-and-TB-bits-to-n25q00.patch @@ -0,0 +1,30 @@ +From eef1f1f9a01a9c3cf499bd000b2c40a2729cce0c Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 14 Jun 2022 11:32:13 -0700 +Subject: [PATCH 506/532] hw: m25p80: Add BP and TB bits to n25q00 + +This flash model is a 128MB Micron flash model that we can use with fb +machines to test U-Boot. + +Signed-off-by: Peter Delevoryas +--- + hw/block/m25p80.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c +index afc3fdf4d6..10cb94b2e7 100644 +--- a/hw/block/m25p80.c ++++ b/hw/block/m25p80.c +@@ -267,7 +267,8 @@ static const FlashPartInfo known_devices[] = { + { INFO("mt25ql512ab", 0x20ba20, 0x1044, 64 << 10, 1024, ER_4K | ER_32K) }, + { INFO_STACKED("mt35xu01g", 0x2c5b1b, 0x104100, 128 << 10, 1024, + ER_4K | ER_32K, 2) }, +- { INFO_STACKED("n25q00", 0x20ba21, 0x1000, 64 << 10, 2048, ER_4K, 4) }, ++ { INFO_STACKED("n25q00", 0x20ba21, 0x1000, 64 << 10, 2048, ++ ER_4K | HAS_SR_BP3_BIT6 | HAS_SR_TB, 4) }, + { INFO_STACKED("n25q00a", 0x20bb21, 0x1000, 64 << 10, 2048, ER_4K, 4) }, + { INFO_STACKED("mt25ql01g", 0x20ba21, 0x1040, 64 << 10, 2048, ER_4K, 2) }, + { INFO_STACKED("mt25qu01g", 0x20bb21, 0x1040, 64 << 10, 2048, ER_4K, 2) }, +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0507-hw-i2c-pca954x-Add-method-to-get-channels.patch b/common/recipes-devtools/qemu/qemu/0507-hw-i2c-pca954x-Add-method-to-get-channels.patch new file mode 100644 index 000000000000..fe6be91ccffc --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0507-hw-i2c-pca954x-Add-method-to-get-channels.patch @@ -0,0 +1,133 @@ +From e57bb6d8e59d9b193e0937d52b38637821207880 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 17 Aug 2022 10:14:07 +0200 +Subject: [PATCH 507/532] hw/i2c/pca954x: Add method to get channels +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +I added this helper in the Aspeed machine file a while ago to help +initialize fuji-bmc i2c devices. This moves it to the official pca954x +file so that other files can use it. + +This does something very similar to pca954x_i2c_get_bus, but I think +this is useful when you have a very complicated dts with a lot of +switches, like the fuji dts. + +This convenience method lets you write code that produces a flat array +of I2C buses that matches the naming in the dts. After that you can just +add individual sensors using the flat array of I2C buses. + +See fuji_bmc_i2c_init to understand this point further. + +The fuji dts is here for reference: + +https://github.com/torvalds/linux/blob/40cb6373b46/arch/arm/boot/dts/aspeed-bmc-facebook-fuji.dts + +Signed-off-by: Peter Delevoryas +Reviewed-by: Cédric Le Goater +Reviewed-by: Patrick Venture +Message-Id: <20220705191400.41632-2-peter@pjd.dev> +Signed-off-by: Cédric Le Goater +--- + hw/arm/aspeed.c | 29 +++++++++-------------------- + hw/i2c/i2c_mux_pca954x.c | 10 ++++++++++ + include/hw/i2c/i2c_mux_pca954x.h | 13 +++++++++++++ + 3 files changed, 32 insertions(+), 20 deletions(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 744441b5cc..2de2bd76c2 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -851,15 +851,6 @@ static void rainier_bmc_i2c_init(AspeedMachineState *bmc) + create_pca9552(soc, 15, 0x60); + } + +-static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr, +- I2CBus **channels) +-{ +- I2CSlave *mux = i2c_slave_create_simple(bus, "pca9548", mux_addr); +- for (int i = 0; i < 8; i++) { +- channels[i] = pca954x_i2c_get_bus(mux, i); +- } +-} +- + #define TYPE_LM75 TYPE_TMP105 + #define TYPE_TMP75 TYPE_TMP105 + #define TYPE_TMP422 "tmp422" +@@ -872,20 +863,18 @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc) + for (int i = 0; i < 16; i++) { + i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); + } +- I2CBus *i2c180 = i2c[2]; +- I2CBus *i2c480 = i2c[8]; +- I2CBus *i2c600 = i2c[11]; + +- get_pca9548_channels(i2c180, 0x70, &i2c[16]); +- get_pca9548_channels(i2c480, 0x70, &i2c[24]); ++ pca954x_i2c_get_channels(i2c[2], 0x70, "pca9548", &i2c[16]); ++ pca954x_i2c_get_channels(i2c[8], 0x70, "pca9548", &i2c[24]); + /* NOTE: The device tree skips [32, 40) in the alias numbering */ +- get_pca9548_channels(i2c600, 0x77, &i2c[40]); +- get_pca9548_channels(i2c[24], 0x71, &i2c[48]); +- get_pca9548_channels(i2c[25], 0x72, &i2c[56]); +- get_pca9548_channels(i2c[26], 0x76, &i2c[64]); +- get_pca9548_channels(i2c[27], 0x76, &i2c[72]); ++ pca954x_i2c_get_channels(i2c[11], 0x77, "pca9548", &i2c[40]); ++ pca954x_i2c_get_channels(i2c[24], 0x71, "pca9548", &i2c[48]); ++ pca954x_i2c_get_channels(i2c[25], 0x72, "pca9548", &i2c[56]); ++ pca954x_i2c_get_channels(i2c[26], 0x76, "pca9548", &i2c[64]); ++ pca954x_i2c_get_channels(i2c[27], 0x76, "pca9548", &i2c[72]); + for (int i = 0; i < 8; i++) { +- get_pca9548_channels(i2c[40 + i], 0x76, &i2c[80 + i * 8]); ++ pca954x_i2c_get_channels(i2c[40 + i], 0x76, "pca9548", ++ &i2c[80 + i * 8]); + } + + i2c_slave_create_simple(i2c[17], TYPE_LM75, 0x4c); +diff --git a/hw/i2c/i2c_mux_pca954x.c b/hw/i2c/i2c_mux_pca954x.c +index db5db956a6..1340dd9143 100644 +--- a/hw/i2c/i2c_mux_pca954x.c ++++ b/hw/i2c/i2c_mux_pca954x.c +@@ -172,6 +172,16 @@ I2CBus *pca954x_i2c_get_bus(I2CSlave *mux, uint8_t channel) + return pca954x->bus[channel]; + } + ++void pca954x_i2c_get_channels(I2CBus *bus, uint8_t address, ++ const char *type_name, I2CBus **channels) ++{ ++ I2CSlave *mux = i2c_slave_create_simple(bus, type_name, address); ++ Pca954xClass *pc = PCA954X_GET_CLASS(mux); ++ Pca954xState *pca954x = PCA954X(mux); ++ ++ memcpy(channels, pca954x->bus, pc->nchans * sizeof(channels[0])); ++} ++ + static void pca9546_class_init(ObjectClass *klass, void *data) + { + Pca954xClass *s = PCA954X_CLASS(klass); +diff --git a/include/hw/i2c/i2c_mux_pca954x.h b/include/hw/i2c/i2c_mux_pca954x.h +index 3dd25ec983..3a676a30a9 100644 +--- a/include/hw/i2c/i2c_mux_pca954x.h ++++ b/include/hw/i2c/i2c_mux_pca954x.h +@@ -16,4 +16,17 @@ + */ + I2CBus *pca954x_i2c_get_bus(I2CSlave *mux, uint8_t channel); + ++/** ++ * Creates an i2c mux and retrieves all of the channels associated with it. ++ * ++ * @bus: the i2c bus where the i2c mux resides. ++ * @address: the address of the i2c mux on the aforementioned i2c bus. ++ * @type_name: name of the i2c mux type to create. ++ * @channels: an output parameter specifying where to return the channels. ++ * ++ * Returns: None ++ */ ++void pca954x_i2c_get_channels(I2CBus *bus, uint8_t address, ++ const char *type_name, I2CBus **channels); ++ + #endif +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0508-hw-arm-aspeed-Add-fb_machine_class_init.patch b/common/recipes-devtools/qemu/qemu/0508-hw-arm-aspeed-Add-fb_machine_class_init.patch new file mode 100644 index 000000000000..a5243eed115b --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0508-hw-arm-aspeed-Add-fb_machine_class_init.patch @@ -0,0 +1,367 @@ +From 0966f4fffc6bf2c7cbf3596d8bba127e15303715 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 20 May 2022 17:07:55 -0700 +Subject: [PATCH 508/532] hw/arm/aspeed: Add fb_machine_class_init + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 332 ++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 332 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 2de2bd76c2..0d6b1bb929 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -929,6 +929,30 @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc) + } + } + ++static void wedge100_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); ++ I2CBus *i2c[14]; ++ ++ for (int i = 0; i < 14; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ i2c_slave_create_simple(i2c[3], TYPE_TMP75, 0x48); ++ i2c_slave_create_simple(i2c[3], TYPE_TMP75, 0x49); ++ i2c_slave_create_simple(i2c[3], TYPE_TMP75, 0x4a); ++ i2c_slave_create_simple(i2c[3], TYPE_TMP75, 0x4b); ++ i2c_slave_create_simple(i2c[3], TYPE_TMP75, 0x4c); ++ i2c_slave_create_simple(i2c[8], TYPE_TMP75, 0x48); ++ i2c_slave_create_simple(i2c[8], TYPE_TMP75, 0x49); ++ at24c_eeprom_init(i2c[6], 0x51, 64 * KiB); ++ at24c_eeprom_init(i2c[7], 0x50, 2 * KiB); ++ ++ /* FIXME: These two EEPROM's are supposed to be fancpld's. */ ++ at24c_eeprom_init(i2c[4], 0x33, 64 * KiB); ++ at24c_eeprom_init(i2c[8], 0x33, 64 * KiB); ++} ++ + #define TYPE_TMP421 "tmp421" + + static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) +@@ -1048,6 +1072,47 @@ static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 9), "max31785", 0x54); + } + ++static void create_unimplemented_i2c_device(I2CBus *bus, uint8_t addr) ++{ ++ /* Using EEPROM's as placeholders */ ++ at24c_eeprom_init(bus, addr, 64 * KiB); ++} ++ ++static void oby35_cl_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); ++ I2CBus *i2c[16]; ++ ++ for (int i = 0; i < 16; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ create_unimplemented_i2c_device(i2c[1], 0x71); ++ create_unimplemented_i2c_device(i2c[2], 0x16); ++ create_unimplemented_i2c_device(i2c[2], 0x10); ++ create_unimplemented_i2c_device(i2c[6], 0x20); ++ create_unimplemented_i2c_device(i2c[7], 0x20); ++ create_unimplemented_i2c_device(i2c[8], 0x20); ++} ++ ++static void oby35_bb_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); ++ I2CBus *i2c[16]; ++ ++ for (int i = 0; i < 16; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ /* FIXME: This is supposed to be an adm1278 */ ++ i2c_slave_create_simple(i2c[1], "adm1272", 0x40); ++ /* FIXME: This is supposed to be an ltc4282 */ ++ i2c_slave_create_simple(i2c[1], "adm1272", 0x44); ++ ++ create_unimplemented_i2c_device(i2c[6], 0x20); ++ create_unimplemented_i2c_device(i2c[7], 0x20); ++} ++ + static bool aspeed_get_mmio_exec(Object *obj, Error **errp) + { + return ASPEED_MACHINE(obj)->mmio_exec; +@@ -1733,3 +1798,270 @@ static const TypeInfo aspeed_machine_types[] = { + }; + + DEFINE_TYPES(aspeed_machine_types) ++ ++struct FBMachineData { ++ const char *parent; ++ const char *name; ++ const char *desc; ++ const char *soc_name; ++ const char *flash_model; ++ uint32_t hw_strap1; ++ uint32_t hw_strap2; ++ uint32_t stdout_path; ++ uint32_t macs_mask; ++ ram_addr_t ram_size; ++ void (*reset)(MachineState *state); ++ void (*i2c_init)(AspeedMachineState *bmc); ++}; ++ ++static void fb_machine_class_init(ObjectClass *oc, void *data) ++{ ++ MachineClass *mc = MACHINE_CLASS(oc); ++ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); ++ const struct FBMachineData *fb = data; ++ ++ if (fb->desc) ++ mc->desc = fb->desc; ++ if (fb->soc_name) ++ amc->soc_name = fb->soc_name; ++ if (fb->hw_strap1) ++ amc->hw_strap1 = fb->hw_strap1; ++ if (fb->hw_strap2) ++ amc->hw_strap2 = fb->hw_strap2; ++ if (fb->flash_model) { ++ amc->fmc_model = fb->flash_model; ++ amc->spi_model = fb->flash_model; ++ } ++ amc->num_cs = 2; ++ if (fb->stdout_path) ++ amc->uart_default = fb->stdout_path; ++ if (fb->macs_mask) ++ amc->macs_mask = fb->macs_mask; ++ if (fb->i2c_init) ++ amc->i2c_init = fb->i2c_init; ++ if (fb->ram_size) ++ mc->default_ram_size = fb->ram_size; ++ mc->default_cpus = mc->min_cpus = mc->max_cpus = aspeed_soc_num_cpus(amc->soc_name); ++} ++ ++static const struct FBMachineData fb_machines[] = { ++ { ++ .name = "minipack-bmc", ++ .desc = "Facebook Minipack 100 BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx66u51235f", ++ .macs_mask = ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART1, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "cloudripper-bmc", ++ .desc = "Facebook Cloudripper BMC (Cortex-A7)", ++ .soc_name = "ast2600-a3", ++ .hw_strap1 = AST2600_EVB_HW_STRAP1, ++ .hw_strap2 = AST2600_EVB_HW_STRAP2, ++ .flash_model = "mx66l1g45g", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART1, ++ .ram_size = FUJI_BMC_RAM_SIZE, ++ }, ++ { ++ .name = "grandcanyon-bmc", ++ .desc = "Facebook GrandCanyon BMC (Cortex-A7)", ++ .soc_name = "ast2600-a3", ++ .hw_strap1 = AST2600_EVB_HW_STRAP1, ++ .hw_strap2 = AST2600_EVB_HW_STRAP2, ++ .flash_model = "mx66l1g45g", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = FUJI_BMC_RAM_SIZE, ++ }, ++ { ++ .name = "fby2-bmc", ++ .desc = "Facebook Yosemitev2 BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "fby3-bmc", ++ .desc = "Facebook Yosemitev3 BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx66l1g45g", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "fbttn-bmc", ++ .desc = "Facebook BryceCanyon BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "fbtp-bmc", ++ .desc = "Facebook TiogaPass BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "cmm-bmc", ++ .desc = "Facebook Backpack CMM BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART1, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "angelslanding-bmc", ++ .desc = "Facebook Angels Landing BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "clearcreek-bmc", ++ .desc = "Facebook Clear Creek BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "emeraldpools-bmc", ++ .desc = "Facebook Emerald Pools BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "elbert-bmc", ++ .desc = "Facebook Elbert BMC (Cortex-A7)", ++ .soc_name = "ast2600-a3", ++ .hw_strap1 = AST2600_EVB_HW_STRAP1, ++ .hw_strap2 = AST2600_EVB_HW_STRAP2, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = FUJI_BMC_RAM_SIZE, ++ }, ++ { ++ .name = "northdome-bmc", ++ .desc = "Facebook Northdome BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "wedge100-bmc", ++ .desc = "Facebook Wedge 100 BMC (ARM926EJ-S)", ++ .soc_name = "ast2400-a1", ++ .hw_strap1 = PALMETTO_BMC_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART3, ++ .ram_size = 512 * MiB, ++ .i2c_init = wedge100_i2c_init, ++ }, ++ { ++ .name = "wedge400-bmc", ++ .desc = "Facebook Wedge 400 BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx66l1g45g", ++ .macs_mask = ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART1, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .name = "galaxy100-bmc", ++ .desc = "Facebook Galaxy 100 BMC (ARM926EJ-S)", ++ .soc_name = "ast2400-a1", ++ .hw_strap1 = PALMETTO_BMC_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC1_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 512 * MiB, ++ }, ++ { ++ .name = "yamp-bmc", ++ .desc = "Facebook YAMP 100 BMC (ARM1176)", ++ .soc_name = "ast2500-a1", ++ .hw_strap1 = AST2500_EVB_HW_STRAP1, ++ .hw_strap2 = 0, ++ .flash_model = "mx25l25635e", ++ .macs_mask = ASPEED_MAC0_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = 1 * GiB, ++ }, ++ { ++ .parent = MACHINE_TYPE_NAME("ast1030-evb"), ++ .name = "oby35-cl", ++ .desc = "Facebook fby35 CraterLake BIC (Cortex-M4)", ++ .i2c_init = oby35_cl_i2c_init, ++ }, ++ { ++ .parent = MACHINE_TYPE_NAME("ast1030-evb"), ++ .name = "oby35-bb", ++ .desc = "Facebook fby35 BaseBoard BIC (Cortex-M4)", ++ .i2c_init = oby35_bb_i2c_init, ++ }, ++}; ++ ++static void fb_register_machines(void) ++{ ++ static TypeInfo types[ARRAY_SIZE(fb_machines)]; ++ static char names[ARRAY_SIZE(types)][32]; ++ ++ for (int i = 0; i < ARRAY_SIZE(fb_machines); i++) { ++ snprintf(names[i], sizeof(names[i]), "%s%s", fb_machines[i].name, TYPE_MACHINE_SUFFIX); ++ ++ types[i].name = names[i]; ++ types[i].parent = fb_machines[i].parent ? fb_machines[i].parent : TYPE_ASPEED_MACHINE; ++ types[i].class_init = fb_machine_class_init; ++ types[i].class_data = (void*)&fb_machines[i]; ++ } ++ ++ type_register_static_array(types, ARRAY_SIZE(types)); ++} ++ ++type_init(fb_register_machines); +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0509-fbttn-Add-I2C-SCL-timeout-property.patch b/common/recipes-devtools/qemu/qemu/0509-fbttn-Add-I2C-SCL-timeout-property.patch new file mode 100644 index 000000000000..052b6b5db765 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0509-fbttn-Add-I2C-SCL-timeout-property.patch @@ -0,0 +1,164 @@ +From c21900268026c459ecfc9eeca6fe6c358c04003d Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 16 Aug 2022 00:32:54 -0700 +Subject: [PATCH 509/532] fbttn: Add I2C SCL timeout property + +This lets us inject errors using QOM: + +``` +qom-set /machine/soc/i2c/bus[12] scl-timeout true +qom-set /machine/soc/i2c/bus[12] scl-timeout false +``` + +This should cause the driver to attempt to recover the bus. If the +driver recovery logic is implemented properly, then there shouldn't be +any problems, but if it's not correct (for example, trying to do it +within the IRQ handler), then a crash or deadlock is possible. + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 7 ++++++ + hw/i2c/aspeed_i2c.c | 43 +++++++++++++++++++++++++++++++++++++ + hw/i2c/trace-events | 1 + + include/hw/i2c/aspeed_i2c.h | 1 + + 4 files changed, 52 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 0d6b1bb929..826bc834d8 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1033,6 +1033,12 @@ static void fby35_i2c_init(AspeedMachineState *bmc) + */ + } + ++static void fbttn_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); ++ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 12), "tmp421", 0x1f); ++} ++ + static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) + { + AspeedSoCState *soc = bmc->soc; +@@ -1910,6 +1916,7 @@ static const struct FBMachineData fb_machines[] = { + .macs_mask = ASPEED_MAC0_ON, + .stdout_path = ASPEED_DEV_UART5, + .ram_size = 1 * GiB, ++ .i2c_init = fbttn_i2c_init, + }, + { + .name = "fbtp-bmc", +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index 1037c22b2f..112c5ae86e 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -26,6 +26,7 @@ + #include "qemu/module.h" + #include "qemu/error-report.h" + #include "qapi/error.h" ++#include "qapi/visitor.h" + #include "hw/i2c/aspeed_i2c.h" + #include "hw/irq.h" + #include "hw/qdev-properties.h" +@@ -109,6 +110,8 @@ static uint64_t aspeed_i2c_bus_old_read(AspeedI2CBus *bus, hwaddr offset, + break; + case A_I2CD_CMD: + value = SHARED_FIELD_DP32(value, BUS_BUSY_STS, i2c_bus_busy(bus->bus)); ++ value = SHARED_FIELD_DP32(value, SCL_LINE_STS, !bus->scl_timeout); ++ value = SHARED_FIELD_DP32(value, SDA_LINE_STS, !bus->scl_timeout); + break; + case A_I2CD_DMA_ADDR: + if (!aic->has_dma) { +@@ -461,11 +464,28 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value) + aspeed_i2c_bus_cmd_dump(bus); + } + ++ if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, BUS_RECOVER_CMD_EN)) { ++ if (!bus->scl_timeout) { ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, TX_ACK, 0); ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, SCL_TIMEOUT, 0); ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, SDA_DL_TIMEOUT, 0); ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, BUS_RECOVER_DONE, 1); ++ } ++ return; ++ } ++ + if (SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, M_START_CMD)) { + uint8_t state = aspeed_i2c_get_state(bus) & I2CD_MACTIVE ? + I2CD_MSTARTR : I2CD_MSTART; + uint8_t addr; + ++ if (bus->scl_timeout) { ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, TX_ACK, 1); ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, SCL_TIMEOUT, 1); ++ SHARED_ARRAY_FIELD_DP32(bus->regs, reg_intr_sts, SDA_DL_TIMEOUT, 1); ++ return; ++ } ++ + aspeed_i2c_set_state(bus, state); + + addr = aspeed_i2c_get_addr(bus); +@@ -1241,6 +1261,24 @@ static Property aspeed_i2c_bus_properties[] = { + DEFINE_PROP_END_OF_LIST(), + }; + ++static void aspeed_i2c_bus_get_scl_timeout(Object *obj, Visitor *v, ++ const char *name, void *opaque, ++ Error **errp) ++{ ++ AspeedI2CBus *s = ASPEED_I2C_BUS(obj); ++ ++ visit_type_bool(v, name, &s->scl_timeout, errp); ++} ++ ++static void aspeed_i2c_bus_set_scl_timeout(Object *obj, Visitor *v, ++ const char *name, void *opaque, ++ Error **errp) ++{ ++ AspeedI2CBus *s = ASPEED_I2C_BUS(obj); ++ ++ visit_type_bool(v, name, &s->scl_timeout, errp); ++} ++ + static void aspeed_i2c_bus_class_init(ObjectClass *klass, void *data) + { + DeviceClass *dc = DEVICE_CLASS(klass); +@@ -1249,6 +1287,11 @@ static void aspeed_i2c_bus_class_init(ObjectClass *klass, void *data) + dc->realize = aspeed_i2c_bus_realize; + dc->reset = aspeed_i2c_bus_reset; + device_class_set_props(dc, aspeed_i2c_bus_properties); ++ ++ object_class_property_add(klass, "scl-timeout", "bool", ++ aspeed_i2c_bus_get_scl_timeout, ++ aspeed_i2c_bus_set_scl_timeout, ++ NULL, NULL); + } + + static const TypeInfo aspeed_i2c_bus_info = { +diff --git a/hw/i2c/trace-events b/hw/i2c/trace-events +index 6900e06eda..ec0a6aa736 100644 +--- a/hw/i2c/trace-events ++++ b/hw/i2c/trace-events +@@ -34,6 +34,7 @@ aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t val + aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 + aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) "%s send %d/%d 0x%02x" + aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) "%s recv %d/%d 0x%02x" ++aspeed_i2c_scl_timeout(uint32_t busid) "bus[%d]: raising SCL timeout" + + # npcm7xx_smbus.c + +diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h +index a064479e59..d468b84971 100644 +--- a/include/hw/i2c/aspeed_i2c.h ++++ b/include/hw/i2c/aspeed_i2c.h +@@ -243,6 +243,7 @@ struct AspeedI2CBus { + I2CBus *bus; + uint8_t id; + qemu_irq irq; ++ bool scl_timeout; + + uint32_t regs[ASPEED_I2C_NEW_NUM_REG]; + }; +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0510-hw-i2c-aspeed-Add-bus-ID-to-all-trace-events.patch b/common/recipes-devtools/qemu/qemu/0510-hw-i2c-aspeed-Add-bus-ID-to-all-trace-events.patch new file mode 100644 index 000000000000..57a94b2069aa --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0510-hw-i2c-aspeed-Add-bus-ID-to-all-trace-events.patch @@ -0,0 +1,113 @@ +From 182fa89e0c74c098ae858c30116809543e03b0f8 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 24 Aug 2022 00:48:44 -0700 +Subject: [PATCH 510/532] hw/i2c/aspeed: Add bus ID to all trace events + +Signed-off-by: Peter Delevoryas +--- + hw/i2c/aspeed_i2c.c | 18 ++++++++++-------- + hw/i2c/trace-events | 8 ++++---- + 2 files changed, 14 insertions(+), 12 deletions(-) + +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index 112c5ae86e..d04e1bf6f4 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -63,7 +63,8 @@ static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, ABNORMAL) ? + "abnormal" : ""); + +- trace_aspeed_i2c_bus_raise_interrupt(bus->regs[reg_intr_sts], buf); ++ trace_aspeed_i2c_bus_raise_interrupt(bus->id, ++ bus->regs[reg_intr_sts], buf); + } + + raise_irq = bus->regs[reg_intr_sts] & intr_ctrl_mask ; +@@ -245,7 +246,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus) + for (i = 0; i < pool_tx_count; i++) { + uint8_t *pool_base = aic->bus_pool_base(bus); + +- trace_aspeed_i2c_bus_send("BUF", i + 1, pool_tx_count, ++ trace_aspeed_i2c_bus_send(bus->id, "BUF", i + 1, pool_tx_count, + pool_base[i]); + ret = i2c_send(bus->bus, pool_base[i]); + if (ret) { +@@ -261,7 +262,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus) + while (bus->regs[reg_dma_len]) { + uint8_t data; + aspeed_i2c_dma_read(bus, &data); +- trace_aspeed_i2c_bus_send("DMA", bus->regs[reg_dma_len], ++ trace_aspeed_i2c_bus_send(bus->id, "DMA", bus->regs[reg_dma_len], + bus->regs[reg_dma_len], data); + ret = i2c_send(bus->bus, data); + if (ret) { +@@ -276,7 +277,7 @@ static int aspeed_i2c_bus_send(AspeedI2CBus *bus) + } + SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, TX_DMA_EN, 0); + } else { +- trace_aspeed_i2c_bus_send("BYTE", 0, 1, ++ trace_aspeed_i2c_bus_send(bus->id, "BYTE", 0, 1, + bus->regs[reg_byte_buf]); + ret = i2c_send(bus->bus, bus->regs[reg_byte_buf]); + } +@@ -307,7 +308,7 @@ static void aspeed_i2c_bus_recv(AspeedI2CBus *bus) + + for (i = 0; i < pool_rx_count; i++) { + pool_base[i] = i2c_recv(bus->bus); +- trace_aspeed_i2c_bus_recv("BUF", i + 1, pool_rx_count, ++ trace_aspeed_i2c_bus_recv(bus->id, "BUF", i + 1, pool_rx_count, + pool_base[i]); + } + +@@ -324,7 +325,7 @@ static void aspeed_i2c_bus_recv(AspeedI2CBus *bus) + MemTxResult result; + + data = i2c_recv(bus->bus); +- trace_aspeed_i2c_bus_recv("DMA", bus->regs[reg_dma_len], ++ trace_aspeed_i2c_bus_recv(bus->id, "DMA", bus->regs[reg_dma_len], + bus->regs[reg_dma_len], data); + result = address_space_write(&s->dram_as, bus->regs[reg_dma_addr], + MEMTXATTRS_UNSPECIFIED, &data, 1); +@@ -345,7 +346,8 @@ static void aspeed_i2c_bus_recv(AspeedI2CBus *bus) + SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, RX_DMA_EN, 0); + } else { + data = i2c_recv(bus->bus); +- trace_aspeed_i2c_bus_recv("BYTE", 1, 1, bus->regs[reg_byte_buf]); ++ trace_aspeed_i2c_bus_recv(bus->id, "BYTE", 1, 1, ++ bus->regs[reg_byte_buf]); + SHARED_ARRAY_FIELD_DP32(bus->regs, reg_byte_buf, RX_BUF, data); + } + } +@@ -442,7 +444,7 @@ static void aspeed_i2c_bus_cmd_dump(AspeedI2CBus *bus) + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, M_S_RX_CMD_LAST) ? "last|" : "", + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_cmd, M_STOP_CMD) ? "stop|" : ""); + +- trace_aspeed_i2c_bus_cmd(bus->regs[reg_cmd], cmd_flags, count, ++ trace_aspeed_i2c_bus_cmd(bus->id, bus->regs[reg_cmd], cmd_flags, count, + bus->regs[reg_intr_sts]); + } + +diff --git a/hw/i2c/trace-events b/hw/i2c/trace-events +index ec0a6aa736..e9f3d1af07 100644 +--- a/hw/i2c/trace-events ++++ b/hw/i2c/trace-events +@@ -28,12 +28,12 @@ allwinner_i2c_write(const char* reg_name, uint64_t offset, uint64_t value) "writ + + # aspeed_i2c.c + +-aspeed_i2c_bus_cmd(uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) "handling cmd=0x%x %s count=%d intr=0x%x" +-aspeed_i2c_bus_raise_interrupt(uint32_t intr_status, const char *s) "handled intr=0x%x %s" ++aspeed_i2c_bus_cmd(uint32_t busid, uint32_t cmd, const char *cmd_flags, uint32_t count, uint32_t intr_status) "bus[%d]: handling cmd=0x%x %s count=%d intr=0x%x" ++aspeed_i2c_bus_raise_interrupt(uint32_t busid, uint32_t intr_status, const char *s) "bus[%d]: handled intr=0x%x %s" + aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 + aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 +-aspeed_i2c_bus_send(const char *mode, int i, int count, uint8_t byte) "%s send %d/%d 0x%02x" +-aspeed_i2c_bus_recv(const char *mode, int i, int count, uint8_t byte) "%s recv %d/%d 0x%02x" ++aspeed_i2c_bus_send(uint32_t busid, const char *mode, int i, int count, uint8_t byte) "bus[%d]: %s send %d/%d 0x%02x" ++aspeed_i2c_bus_recv(uint32_t busid, const char *mode, int i, int count, uint8_t byte) "bus[%d]: %s recv %d/%d 0x%02x" + aspeed_i2c_scl_timeout(uint32_t busid) "bus[%d]: raising SCL timeout" + + # npcm7xx_smbus.c +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0511-hw-i2c-aspeed-Add-slave-event-traces.patch b/common/recipes-devtools/qemu/qemu/0511-hw-i2c-aspeed-Add-slave-event-traces.patch new file mode 100644 index 000000000000..155715a304f7 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0511-hw-i2c-aspeed-Add-slave-event-traces.patch @@ -0,0 +1,68 @@ +From d9eba13040279ef71f4e727fa87a042348522b10 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 24 Aug 2022 01:53:43 -0700 +Subject: [PATCH 511/532] hw/i2c/aspeed: Add slave event traces + +Signed-off-by: Peter Delevoryas +--- + hw/i2c/aspeed_i2c.c | 13 +++++++++++++ + hw/i2c/trace-events | 2 ++ + 2 files changed, 15 insertions(+) + +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index d04e1bf6f4..899aedcc9a 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -1101,9 +1101,18 @@ static const TypeInfo aspeed_i2c_info = { + .abstract = true, + }; + ++static const char *I2C_EVENT[] = { ++ [I2C_START_SEND] = "I2C_START_SEND", ++ [I2C_START_SEND_ASYNC] = "I2C_START_SEND_ASYNC", ++ [I2C_START_RECV] = "I2C_START_RECV", ++ [I2C_FINISH] = "I2C_FINISH", ++}; ++ + static int aspeed_i2c_bus_new_slave_event(AspeedI2CBus *bus, + enum i2c_event event) + { ++ trace_aspeed_i2c_bus_new_slave_event(bus->id, I2C_EVENT[event]); ++ + switch (event) { + case I2C_START_SEND_ASYNC: + if (!SHARED_ARRAY_FIELD_EX32(bus->regs, R_I2CS_CMD, RX_DMA_EN)) { +@@ -1148,6 +1157,8 @@ static int aspeed_i2c_bus_slave_event(I2CSlave *slave, enum i2c_event event) + return aspeed_i2c_bus_new_slave_event(bus, event); + } + ++ trace_aspeed_i2c_bus_slave_event(bus->id, I2C_EVENT[event]); ++ + switch (event) { + case I2C_START_SEND_ASYNC: + /* Bit[0] == 0 indicates "send". */ +@@ -1168,6 +1179,8 @@ static int aspeed_i2c_bus_slave_event(I2CSlave *slave, enum i2c_event event) + break; + + default: ++ qemu_log_mask(LOG_UNIMP, "%s: i2c event %d unimplemented\n", ++ __func__, event); + return -1; + } + +diff --git a/hw/i2c/trace-events b/hw/i2c/trace-events +index e9f3d1af07..5a1651352c 100644 +--- a/hw/i2c/trace-events ++++ b/hw/i2c/trace-events +@@ -34,6 +34,8 @@ aspeed_i2c_bus_read(uint32_t busid, uint64_t offset, unsigned size, uint64_t val + aspeed_i2c_bus_write(uint32_t busid, uint64_t offset, unsigned size, uint64_t value) "bus[%d]: To 0x%" PRIx64 " of size %u: 0x%" PRIx64 + aspeed_i2c_bus_send(uint32_t busid, const char *mode, int i, int count, uint8_t byte) "bus[%d]: %s send %d/%d 0x%02x" + aspeed_i2c_bus_recv(uint32_t busid, const char *mode, int i, int count, uint8_t byte) "bus[%d]: %s recv %d/%d 0x%02x" ++aspeed_i2c_bus_slave_event(uint32_t busid, const char *event) "bus[%d]: %s" ++aspeed_i2c_bus_new_slave_event(uint32_t busid, const char *event) "bus[%d]: %s" + aspeed_i2c_scl_timeout(uint32_t busid) "bus[%d]: raising SCL timeout" + + # npcm7xx_smbus.c +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0512-hw-i2c-aspeed-Fix-bus-derivation-for-slave-events.patch b/common/recipes-devtools/qemu/qemu/0512-hw-i2c-aspeed-Fix-bus-derivation-for-slave-events.patch new file mode 100644 index 000000000000..fe04f69bbcaf --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0512-hw-i2c-aspeed-Fix-bus-derivation-for-slave-events.patch @@ -0,0 +1,62 @@ +From b74bf0343d00ea8e3536d7339c46660e936d0ed7 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 24 Aug 2022 01:55:12 -0700 +Subject: [PATCH 512/532] hw/i2c/aspeed: Fix bus derivation for slave events + +The existing code assumes there's one AspeedI2CBus attached to each +I2CBus. That's not the case in a multi-SoC system where two +AspeedI2CBus's share a single I2CBus to communicate with each other. + +Signed-off-by: Peter Delevoryas +--- + hw/i2c/aspeed_i2c.c | 7 +++---- + include/hw/i2c/aspeed_i2c.h | 1 + + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index 899aedcc9a..bf70e3c03b 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -1145,8 +1145,7 @@ static int aspeed_i2c_bus_new_slave_event(AspeedI2CBus *bus, + + static int aspeed_i2c_bus_slave_event(I2CSlave *slave, enum i2c_event event) + { +- BusState *qbus = qdev_get_parent_bus(DEVICE(slave)); +- AspeedI2CBus *bus = ASPEED_I2C_BUS(qbus->parent); ++ AspeedI2CBus *bus = ASPEED_I2C_BUS_SLAVE(slave)->bus; + uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus); + uint32_t reg_byte_buf = aspeed_i2c_bus_byte_buf_offset(bus); + uint32_t reg_dev_addr = aspeed_i2c_bus_dev_addr_offset(bus); +@@ -1204,8 +1203,7 @@ static void aspeed_i2c_bus_new_slave_send_async(AspeedI2CBus *bus, uint8_t data) + + static void aspeed_i2c_bus_slave_send_async(I2CSlave *slave, uint8_t data) + { +- BusState *qbus = qdev_get_parent_bus(DEVICE(slave)); +- AspeedI2CBus *bus = ASPEED_I2C_BUS(qbus->parent); ++ AspeedI2CBus *bus = ASPEED_I2C_BUS_SLAVE(slave)->bus; + uint32_t reg_intr_sts = aspeed_i2c_bus_intr_sts_offset(bus); + uint32_t reg_byte_buf = aspeed_i2c_bus_byte_buf_offset(bus); + +@@ -1263,6 +1261,7 @@ static void aspeed_i2c_bus_realize(DeviceState *dev, Error **errp) + s->bus = i2c_init_bus(dev, name); + s->slave = i2c_slave_create_simple(s->bus, TYPE_ASPEED_I2C_BUS_SLAVE, + 0xff); ++ ASPEED_I2C_BUS_SLAVE(s->slave)->bus = s; + + memory_region_init_io(&s->mr, OBJECT(s), &aspeed_i2c_bus_ops, + s, name, aic->reg_size); +diff --git a/include/hw/i2c/aspeed_i2c.h b/include/hw/i2c/aspeed_i2c.h +index d468b84971..f1e3e016d2 100644 +--- a/include/hw/i2c/aspeed_i2c.h ++++ b/include/hw/i2c/aspeed_i2c.h +@@ -269,6 +269,7 @@ struct AspeedI2CState { + OBJECT_DECLARE_SIMPLE_TYPE(AspeedI2CBusSlave, ASPEED_I2C_BUS_SLAVE) + struct AspeedI2CBusSlave { + I2CSlave i2c; ++ AspeedI2CBus *bus; + }; + + struct AspeedI2CClass { +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0513-tests-Rename-aspeed_i2c-test-to-i2c-netdev2-test.patch b/common/recipes-devtools/qemu/qemu/0513-tests-Rename-aspeed_i2c-test-to-i2c-netdev2-test.patch new file mode 100644 index 000000000000..1b1fbef23706 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0513-tests-Rename-aspeed_i2c-test-to-i2c-netdev2-test.patch @@ -0,0 +1,45 @@ +From 806b8823c888c2c8e5da98f649cd9d903fce09fb Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 26 Aug 2022 02:13:04 -0700 +Subject: [PATCH 513/532] tests: Rename aspeed_i2c-test to i2c-netdev2-test + +This test is verifying Aspeed I2C, but mostly in the context of the +i2c-netdev2. + +Signed-off-by: Peter Delevoryas +--- + tests/qtest/{aspeed_i2c-test.c => i2c-netdev2-test.c} | 2 +- + tests/qtest/meson.build | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + rename tests/qtest/{aspeed_i2c-test.c => i2c-netdev2-test.c} (99%) + +diff --git a/tests/qtest/aspeed_i2c-test.c b/tests/qtest/i2c-netdev2-test.c +similarity index 99% +rename from tests/qtest/aspeed_i2c-test.c +rename to tests/qtest/i2c-netdev2-test.c +index aaf8c85427..59e874e4d4 100644 +--- a/tests/qtest/aspeed_i2c-test.c ++++ b/tests/qtest/i2c-netdev2-test.c +@@ -1,5 +1,5 @@ + /* +- * QTest testcase for the Aspeed I2C Controller. ++ * Tests for using i2c-netdev2 with the Aspeed I2C controller + * + * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) + * +diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build +index 14068d8f39..9bdd01f794 100644 +--- a/tests/qtest/meson.build ++++ b/tests/qtest/meson.build +@@ -194,7 +194,7 @@ qtests_aspeed = \ + ['aspeed_hace-test', + 'aspeed_smc-test', + 'aspeed_gpio-test', +- 'aspeed_i2c-test'] ++ 'i2c-netdev2-test'] + qtests_arm = \ + (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \ + (config_all_devices.has_key('CONFIG_CMSDK_APB_DUALTIMER') ? ['cmsdk-apb-dualtimer-test'] : []) + \ +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0514-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch b/common/recipes-devtools/qemu/qemu/0514-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch new file mode 100644 index 000000000000..82f2bd9fa08b --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0514-hw-i2c-aspeed-Fix-interrupt-status-flag-names.patch @@ -0,0 +1,39 @@ +From 6f3078b2923f27cb7347d53f777921ad6ca82e01 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 26 Aug 2022 07:10:35 -0700 +Subject: [PATCH 514/532] hw/i2c/aspeed: Fix interrupt status flag names + +It's pretty difficult to read the interrupt status flag names when +they're different from the register field name. This makes them the +same. + +Signed-off-by: Peter Delevoryas +--- + hw/i2c/aspeed_i2c.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index bf70e3c03b..f3e294b796 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -49,13 +49,13 @@ static inline void aspeed_i2c_bus_raise_interrupt(AspeedI2CBus *bus) + g_autofree char *buf = g_strdup_printf("%s%s%s%s%s%s%s", + aspeed_i2c_bus_pkt_mode_en(bus) && + ARRAY_FIELD_EX32(bus->regs, I2CM_INTR_STS, PKT_CMD_DONE) ? +- "pktdone|" : "", ++ "pkt-done|" : "", + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, TX_NAK) ? +- "nak|" : "", ++ "tx-nak|" : "", + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, TX_ACK) ? +- "ack|" : "", ++ "tx-ack|" : "", + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, RX_DONE) ? +- "done|" : "", ++ "rx-done|" : "", + ARRAY_FIELD_EX32(bus->regs, I2CD_INTR_STS, SLAVE_ADDR_RX_MATCH) ? + "slave-match|" : "", + SHARED_ARRAY_FIELD_EX32(bus->regs, reg_intr_sts, NORMAL_STOP) ? +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0515-tests-Create-qtest-for-Aspeed-I2C-controller.patch b/common/recipes-devtools/qemu/qemu/0515-tests-Create-qtest-for-Aspeed-I2C-controller.patch new file mode 100644 index 000000000000..5d1b91407556 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0515-tests-Create-qtest-for-Aspeed-I2C-controller.patch @@ -0,0 +1,175 @@ +From e5c119cdf202281086a38a3675e906b83c012592 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 26 Aug 2022 07:12:09 -0700 +Subject: [PATCH 515/532] tests: Create qtest for Aspeed I2C controller + +Initial commit for a qtest for the Aspeed I2C controller. It uses an +i2c-echo device and tests echoing some bytes back to itself. + +This just adds the old register mode byte-buffer mode used in the Linux +driver, but can be extended to test the new register mode dma-buffer +mode used in the Zephyr driver. + +Signed-off-by: Peter Delevoryas +--- + tests/qtest/aspeed_i2c-test.c | 135 ++++++++++++++++++++++++++++++++++ + tests/qtest/meson.build | 1 + + 2 files changed, 136 insertions(+) + create mode 100644 tests/qtest/aspeed_i2c-test.c + +diff --git a/tests/qtest/aspeed_i2c-test.c b/tests/qtest/aspeed_i2c-test.c +new file mode 100644 +index 0000000000..1db23222f0 +--- /dev/null ++++ b/tests/qtest/aspeed_i2c-test.c +@@ -0,0 +1,135 @@ ++/* ++ * Aspeed I2C Controller Tests ++ * ++ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) ++ * ++ * This code is licensed under the GPL version 2 or later. See the COPYING ++ * file in the top-level directory. ++ */ ++ ++#include "qemu/osdep.h" ++#include "qapi/error.h" ++#include "hw/i2c/aspeed_i2c.h" ++#include "libqtest.h" ++ ++#define QTEST_SHARED_FIELD_DP32(s, base_addr, reg, field, val) \ ++ { \ ++ uint32_t a, x; \ ++ a = base_addr + ((reg) << 2); \ ++ x = qtest_readl(s, a); \ ++ x = SHARED_FIELD_DP32(x, field, val); \ ++ qtest_writel(s, a, x); \ ++ } ++ ++#define QTEST_SHARED_FIELD_EX32(s, base_addr, reg, field) \ ++ ({ \ ++ uint32_t a, x; \ ++ a = base_addr + ((reg) << 2); \ ++ x = qtest_readl(s, a); \ ++ SHARED_FIELD_EX32(x, field); \ ++ }) ++ ++#define QTEST_FIELD_DP32(s, base_addr, reg, field, val) \ ++ { \ ++ uint32_t a, x; \ ++ a = base_addr + (A_ ## reg); \ ++ x = qtest_readl(s, a); \ ++ x = FIELD_DP32(x, reg, field, val); \ ++ qtest_writel(s, a, x); \ ++ } ++ ++#define QTEST_FIELD_EX32(s, base_addr, reg, field) \ ++ ({ \ ++ uint32_t a, x; \ ++ a = base_addr + (A_ ## reg); \ ++ x = qtest_readl(s, a); \ ++ FIELD_EX32(x, reg, field); \ ++ }) ++ ++#define ECHO_BUS 0 ++#define ECHO_ADDR 0x20 ++#define SELF_ADDR 0x10 ++ ++typedef struct Context Context; ++struct Context { ++ QTestState *qtest; ++ uint32_t base_addr; ++ uint32_t bus_addr[ASPEED_I2C_NR_BUSSES]; ++}; ++ ++static int old_reg_byte_mode_s_rx(QTestState *s, uint32_t bus_addr, ++ bool new_mode, uint8_t *buf, int cap) ++{ ++ uint32_t intr_sts_addr = new_mode ? A_I2CS_INTR_STS : A_I2CD_INTR_STS; ++ uint32_t intr_sts = 0; ++ int max_iterations = 1000; ++ int len = 0; ++ ++ for (int i = 0; i < max_iterations; i++) { ++ intr_sts = qtest_readl(s, bus_addr + intr_sts_addr); ++ if (SHARED_FIELD_EX32(intr_sts, NORMAL_STOP)) { ++ break; ++ } ++ if (SHARED_FIELD_EX32(intr_sts, RX_DONE)) { ++ g_assert(len < cap); ++ buf[len++] = QTEST_SHARED_FIELD_EX32(s, bus_addr, R_I2CD_BYTE_BUF, RX_BUF); ++ qtest_writel(s, bus_addr + intr_sts_addr, SHARED_FIELD_DP32(0, RX_DONE, 1)); ++ } ++ usleep(1); ++ } ++ return len; ++} ++ ++static void test_old_reg_byte_mode(const void *opaque) ++{ ++ Context *ctx = (Context *)opaque; ++ QTestState *s = ctx->qtest; ++ uint32_t global = ctx->base_addr; ++ uint32_t echo_bus = ctx->bus_addr[ECHO_BUS]; ++ uint8_t msg[] = {ECHO_ADDR << 1, SELF_ADDR << 1, 0xa, 0xb, 0xc, 0xd}; ++ uint8_t buf[64]; ++ int len; ++ ++ QTEST_FIELD_DP32(s, global, I2C_CTRL_GLOBAL, REG_MODE, 0); ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_FUN_CTRL, MASTER_EN, 1); ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_DEV_ADDR, SLAVE_DEV_ADDR1, SELF_ADDR); ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_FUN_CTRL, SLAVE_EN, 1); ++ qtest_writel(s, echo_bus + A_I2CD_INTR_CTRL, 0xffffffff); ++ ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_BYTE_BUF, TX_BUF, msg[0]); ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_CMD, M_START_CMD, 1); ++ g_assert(QTEST_SHARED_FIELD_EX32(s, echo_bus, R_I2CD_INTR_STS, TX_ACK)); ++ qtest_writel(s, echo_bus + A_I2CD_INTR_STS, SHARED_FIELD_DP32(0, TX_ACK, 1)); ++ for (int i = 1; i < ARRAY_SIZE(msg); i++) { ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_BYTE_BUF, TX_BUF, msg[i]); ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_CMD, M_TX_CMD, 1); ++ g_assert(QTEST_SHARED_FIELD_EX32(s, echo_bus, R_I2CD_INTR_STS, TX_ACK)); ++ qtest_writel(s, echo_bus + A_I2CD_INTR_STS, SHARED_FIELD_DP32(0, TX_ACK, 1)); ++ } ++ QTEST_SHARED_FIELD_DP32(s, echo_bus, R_I2CD_CMD, M_STOP_CMD, 1); ++ g_assert(QTEST_SHARED_FIELD_EX32(s, echo_bus, R_I2CD_INTR_STS, NORMAL_STOP)); ++ qtest_writel(s, echo_bus + A_I2CD_INTR_STS, SHARED_FIELD_DP32(0, NORMAL_STOP, 1)); ++ ++ len = old_reg_byte_mode_s_rx(s, echo_bus, false, buf, sizeof(buf)); ++ g_assert(len == sizeof(msg) - 1); ++ g_assert(memcmp(&msg[1], buf, len) == 0); ++} ++ ++int main(int argc, char **argv) ++{ ++ Context ast2600_evb = {}; ++ ++ g_test_init(&argc, &argv, NULL); ++ ++ ast2600_evb.qtest = qtest_initf("-machine ast2600-evb -device i2c-echo," ++ "bus=aspeed.i2c.bus.%d,address=%d", ++ ECHO_BUS, ECHO_ADDR); ++ ast2600_evb.base_addr = 0x1E78A000; ++ for (int i = 0; i < ARRAY_SIZE(ast2600_evb.bus_addr); i++) { ++ ast2600_evb.bus_addr[i] = ast2600_evb.base_addr + 0x80 + (i * 0x80); ++ } ++ ++ qtest_add_data_func("/ast2600/i2c/old_reg_byte_mode", &ast2600_evb, ++ test_old_reg_byte_mode); ++ return g_test_run(); ++} +diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build +index 9bdd01f794..bec819ab42 100644 +--- a/tests/qtest/meson.build ++++ b/tests/qtest/meson.build +@@ -194,6 +194,7 @@ qtests_aspeed = \ + ['aspeed_hace-test', + 'aspeed_smc-test', + 'aspeed_gpio-test', ++ 'aspeed_i2c-test', + 'i2c-netdev2-test'] + qtests_arm = \ + (config_all_devices.has_key('CONFIG_MPS2') ? ['sse-timer-test'] : []) + \ +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0516-scripts-Add-redact-util.patch b/common/recipes-devtools/qemu/qemu/0516-scripts-Add-redact-util.patch new file mode 100644 index 000000000000..ad79b0a8a319 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0516-scripts-Add-redact-util.patch @@ -0,0 +1,117 @@ +From 289609f4e24bf6d8f8ee342e152c58a0b233874a Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 15 Jun 2022 13:42:47 -0700 +Subject: [PATCH 516/532] scripts: Add redact-util + +This single-file, no-dependencies C++ program can be compiled with +`g++ -std=c++2a redact-util.cpp` and used with IPMI FRU eeprom binary files +collected from real hardware to remove serial numbers and other sensitive +information. It can be run like `redact-util fruid_bmc.bin`. + +Signed-off-by: Peter Delevoryas +--- + scripts/redact-util.cpp | 92 +++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 92 insertions(+) + create mode 100644 scripts/redact-util.cpp + +diff --git a/scripts/redact-util.cpp b/scripts/redact-util.cpp +new file mode 100644 +index 0000000000..b58b2d07ac +--- /dev/null ++++ b/scripts/redact-util.cpp +@@ -0,0 +1,92 @@ ++#include ++#include ++#include ++#include ++#include ++ ++constexpr int FRUID_EEPROM_SIZE = 512; ++constexpr int AREA_COUNT = 5; ++constexpr int AREA_ARRAY_MAX_COUNT = 10; ++constexpr int AREA_ARRAY_OFFSET[AREA_COUNT] = {0, 3, 6, 3, 0}; ++constexpr bool REDACTED[AREA_COUNT][AREA_ARRAY_MAX_COUNT] = { ++ {}, ++ {}, ++ {1, 0, 1, 1, 0, 1, 1}, ++ {1, 0, 1, 0, 1, 1, 0, 1}, ++ {}, ++}; ++ ++struct CommonHeader { ++ uint8_t version; // 0x01 ++ // Offsets encoded as multiples of 8 bytes. ++ uint8_t area_offset[AREA_COUNT]; ++ uint8_t pad; // 0x00 ++ uint8_t checksum; ++}; ++ ++static uint8_t checksum(const uint8_t *data, int len) ++{ ++ uint8_t sum = 0; ++ for (int i = 0; i < len; i++) { ++ sum += data[i]; ++ } ++ return sum; ++} ++ ++static void print_usage_and_exit() { ++ printf("USAGE: redact-util FILE\n"); ++ exit(1); ++} ++ ++int main(int argc, char **argv) { ++ for (int i = 1; i < argc; i++) { ++ if (strcmp(argv[i], "-h") == 0) { ++ print_usage_and_exit(); ++ } ++ } ++ if (argc < 2) { ++ print_usage_and_exit(); ++ } ++ ++ uint8_t buf[FRUID_EEPROM_SIZE]; ++ auto f = fopen(argv[1], "r"); ++ fread(buf, sizeof(buf), 1, f); ++ fclose(f); ++ ++ const auto &common = *reinterpret_cast(buf); ++ ++ assert(common.version == 0x01); ++ assert(common.pad == 0x00); ++ assert(checksum(buf, sizeof(CommonHeader)) == 0); ++ ++ for (int i = 1; i < 5; i++) { ++ uint8_t offset = common.area_offset[i] * 8; ++ if (offset == 0) { ++ continue; ++ } ++ uint8_t *area = &buf[offset]; ++ uint32_t len = static_cast(area[1] & 0b111111) * 8; ++ ++ uint8_t *p = &area[AREA_ARRAY_OFFSET[i]]; ++ for (int j = 0; *p != 0xC1; j++) { ++ assert(j < AREA_ARRAY_MAX_COUNT); ++ uint32_t elem_len = static_cast(*p & 0b111111); ++ *p = elem_len | 0b11000000; ++ p++; ++ if (REDACTED[i][j]) { ++ memset(p, 'X', elem_len); ++ } ++ printf("%d %d %.*s\n", i, j, (int)elem_len, (const char *)p); ++ p = &p[elem_len]; ++ } ++ ++ area[len - 1] = -checksum(area, len - 1); ++ assert(checksum(area, len) == 0); ++ } ++ ++ char path[256]; ++ snprintf(path, sizeof(path), "%s.redacted", argv[1]); ++ f = fopen(path, "w"); ++ fwrite(buf, sizeof(buf), 1, f); ++ fclose(f); ++} +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0517-aspeed-Expose-i2c-buses-to-machine.patch b/common/recipes-devtools/qemu/qemu/0517-aspeed-Expose-i2c-buses-to-machine.patch new file mode 100644 index 000000000000..5be5d0038199 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0517-aspeed-Expose-i2c-buses-to-machine.patch @@ -0,0 +1,117 @@ +From 69c330c175451dd3ef9669ba5469f127e92d1eca Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 17 Aug 2022 10:14:07 +0200 +Subject: [PATCH 517/532] aspeed: Expose i2c buses to machine +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Peter Delevoryas +Signed-off-by: Cédric Le Goater +--- + hw/arm/aspeed_soc_common.c | 14 ++++++++++++++ + hw/arm/fby35.c | 13 +++++++++++++ + hw/i2c/aspeed_i2c.c | 8 +++++++- + include/hw/arm/aspeed_soc.h | 2 ++ + 4 files changed, 36 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c +index 828f61093b..99aa4bd733 100644 +--- a/hw/arm/aspeed_soc_common.c ++++ b/hw/arm/aspeed_soc_common.c +@@ -97,6 +97,20 @@ bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp) + return true; + } + ++void aspeed_soc_i2c_set_bus(AspeedSoCState *s, int bus_id, I2CBus *bus) ++{ ++ object_property_set_link(OBJECT(&s->i2c.busses[bus_id]), "bus", OBJECT(bus), ++ &error_abort); ++} ++ ++I2CBus *aspeed_soc_i2c_bus(AspeedSoCState *s, int bus_id) ++{ ++ Object *obj; ++ ++ obj = object_property_get_link(OBJECT(&s->i2c.busses[bus_id]), "bus", &error_abort); ++ return I2C_BUS(obj); ++} ++ + void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr) + { + memory_region_add_subregion(s->memory, addr, +diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c +index c9964bd283..490f5d6e23 100644 +--- a/hw/arm/fby35.c ++++ b/hw/arm/fby35.c +@@ -14,6 +14,9 @@ + #include "hw/qdev-clock.h" + #include "hw/arm/aspeed_soc.h" + #include "hw/arm/boot.h" ++#include "hw/arm/fby35.h" ++#include "hw/i2c/i2c.h" ++#include "hw/i2c/i2c_mux_pca954x.h" + + #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35") + OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35); +@@ -141,8 +144,18 @@ static void fby35_bic_init(Fby35State *s) + static void fby35_init(MachineState *machine) + { + Fby35State *s = FBY35(machine); ++ I2CBus *slot_i2c[4]; ++ ++ object_initialize_child(OBJECT(s), "bmc", &s->bmc, "ast2600-a3"); ++ object_initialize_child(OBJECT(s), "bic", &s->bic, "ast1030-a1"); + + fby35_bmc_init(s); ++ ++ for (int i = 0; i < ARRAY_SIZE(slot_i2c); i++) { ++ slot_i2c[i] = aspeed_soc_i2c_bus(ASPEED_SOC(&s->bmc), i); ++ } ++ aspeed_soc_i2c_set_bus(ASPEED_SOC(&s->bic), 6, slot_i2c[0]); ++ + fby35_bic_init(s); + } + +diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c +index f3e294b796..48f50ea441 100644 +--- a/hw/i2c/aspeed_i2c.c ++++ b/hw/i2c/aspeed_i2c.c +@@ -1258,7 +1258,12 @@ static void aspeed_i2c_bus_realize(DeviceState *dev, Error **errp) + + sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq); + +- s->bus = i2c_init_bus(dev, name); ++ /* ++ * If a bus hasn't been provided to the controller, create one from scratch. ++ */ ++ if (!s->bus) { ++ s->bus = i2c_init_bus(dev, name); ++ } + s->slave = i2c_slave_create_simple(s->bus, TYPE_ASPEED_I2C_BUS_SLAVE, + 0xff); + ASPEED_I2C_BUS_SLAVE(s->slave)->bus = s; +@@ -1272,6 +1277,7 @@ static Property aspeed_i2c_bus_properties[] = { + DEFINE_PROP_UINT8("bus-id", AspeedI2CBus, id, 0), + DEFINE_PROP_LINK("controller", AspeedI2CBus, controller, TYPE_ASPEED_I2C, + AspeedI2CState *), ++ DEFINE_PROP_LINK("bus", AspeedI2CBus, bus, TYPE_I2C_BUS, I2CBus *), + DEFINE_PROP_END_OF_LIST(), + }; + +diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h +index cb832bc1ee..6c0f352c73 100644 +--- a/include/hw/arm/aspeed_soc.h ++++ b/include/hw/arm/aspeed_soc.h +@@ -222,6 +222,8 @@ qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev); + bool aspeed_soc_uart_realize(AspeedSoCState *s, Error **errp); + void aspeed_soc_uart_set_chr(AspeedSoCState *s, int dev, Chardev *chr); + bool aspeed_soc_dram_init(AspeedSoCState *s, Error **errp); ++void aspeed_soc_i2c_set_bus(AspeedSoCState *s, int bus_id, I2CBus *bus); ++I2CBus *aspeed_soc_i2c_bus(AspeedSoCState *s, int bus_id); + void aspeed_mmio_map(AspeedSoCState *s, SysBusDevice *dev, int n, hwaddr addr); + void aspeed_mmio_map_unimplemented(AspeedSoCState *s, SysBusDevice *dev, + const char *name, hwaddr addr, +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0518-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch b/common/recipes-devtools/qemu/qemu/0518-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch new file mode 100644 index 000000000000..26065d2a05c3 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0518-aspeed-fby35-Add-bmc-bb-and-nic-FRU-s.patch @@ -0,0 +1,233 @@ +From 2183c07e9d5b8cdb84ce98ffadf67cee3fab1b74 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 15 Jun 2022 13:45:39 -0700 +Subject: [PATCH 518/532] aspeed: fby35: Add bmc, bb, and nic FRU's + +This provides support to run `fruid-util bmc`, `fruid-util bb`, and +`fruid-util nic` and get some real (but redacted) output. + + root@bmc-oob:~# fruid-util bmc + + FRU Information : BMC + --------------- : ------------------ + Board Mfg Date : Mon Jan 10 21:42:00 2022 + Board Mfg : XXXXXX + Board Product : BMC Storage Module + Board Serial : XXXXXXXXXXXXX + Board Part Number : XXXXXXXXXXXXXX + Board FRU ID : 1.0 + Board Custom Data 1 : XXXXXXXXX + Board Custom Data 2 : XXXXXXXXXXXXXXXXXX + Product Manufacturer : XXXXXX + Product Name : Yosemite V3.5 EVT2 + Product Part Number : XXXXXXXXXXXXXX + Product Version : EVT2 + Product Serial : XXXXXXXXXXXXX + Product Asset Tag : XXXXXXX + Product FRU ID : 1.0 + Product Custom Data 1 : XXXXXXXXX + Product Custom Data 2 : Config A + root@bmc-oob:~# fruid-util bb + + FRU Information : Baseboard + --------------- : ------------------ + Chassis Type : Rack Mount Chassis + Chassis Part Number : N/A + Chassis Serial Number : N/A + Board Mfg Date : Fri Jan 7 10:30:00 2022 + Board Mfg : XXXXXX + Board Product : Management Board wBMC + Board Serial : XXXXXXXXXXXXX + Board Part Number : XXXXXXXXXXXXXX + Board FRU ID : 1.0 + Board Custom Data 1 : XXXXXXXXX + Board Custom Data 2 : XXXXXXXXXXXXXXXXXX + Product Manufacturer : XXXXXX + Product Name : Yosemite V3.5 EVT2 + Product Part Number : XXXXXXXXXXXXXX + Product Version : EVT2 + Product Serial : XXXXXXXXXXXXX + Product Asset Tag : XXXXXXX + Product FRU ID : 1.0 + Product Custom Data 1 : XXXXXXXXX + Product Custom Data 2 : N/A + root@bmc-oob:~# fruid-util nic + + FRU Information : NIC + --------------- : ------------------ + Board Mfg Date : Tue Nov 2 08:51:00 2021 + Board Mfg : XXXXXXXX + Board Product : Mellanox ConnectX-6 DX OCP3.0 + Board Serial : XXXXXXXXXXXXXXXXXXXXXXXX + Board Part Number : XXXXXXXXXXXXXXXXXXXXX + Board FRU ID : FRU Ver 0.02 + Product Manufacturer : XXXXXXXX + Product Name : Mellanox ConnectX-6 DX OCP3.0 + Product Part Number : XXXXXXXXXXXXXXXXXXXXX + Product Version : A9 + Product Serial : XXXXXXXXXXXXXXXXXXXXXXXX + Product Custom Data 3 : ConnectX-6 DX + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 1 + + hw/arm/fby35.h | 110 ++++++++++++++++++++++++++++++++++++++++++ + scripts/gen_eeprom.py | 17 +++++++ + 3 files changed, 128 insertions(+) + create mode 100644 hw/arm/fby35.h + create mode 100644 scripts/gen_eeprom.py + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 826bc834d8..84618d738b 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -30,6 +30,7 @@ + #include "qemu/units.h" + #include "hw/qdev-clock.h" + #include "sysemu/sysemu.h" ++#include "hw/arm/fby35.h" + + static struct arm_boot_info aspeed_board_binfo = { + .board_id = -1, /* device-tree-only board */ +diff --git a/hw/arm/fby35.h b/hw/arm/fby35.h +new file mode 100644 +index 0000000000..b8fbd1bf9a +--- /dev/null ++++ b/hw/arm/fby35.h +@@ -0,0 +1,110 @@ ++#ifndef FBY35_H ++#define FBY35_H ++#include "qemu/osdep.h" ++ ++static const uint8_t fby35_fruid_bb[] = { ++ 0x01, 0x00, 0x01, 0x03, 0x10, 0x00, 0x00, 0xeb, 0x01, 0x02, 0x17, 0xc3, 0x4e, 0x2f, 0x41, 0xc3, ++ 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x23, 0x01, 0x0d, 0x00, 0xb6, 0xd2, 0xd0, 0xc6, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x4d, 0x61, 0x6e, 0x61, 0x67, 0x65, 0x6d, 0x65, 0x6e, 0x74, ++ 0x20, 0x42, 0x6f, 0x61, 0x72, 0x64, 0x20, 0x77, 0x42, 0x4d, 0x43, 0xcd, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, ++ 0x01, 0x0c, 0x00, 0xc6, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, ++ 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, 0x20, 0x45, 0x56, 0x54, 0x32, 0xce, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, ++ 0x32, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x43, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++}; ++ ++static const uint8_t fby35_fruid_bmc[] = { ++ 0x01, 0x00, 0x00, 0x01, 0x0d, 0x00, 0x00, 0xf1, 0x01, 0x0c, 0x00, 0x36, 0xe6, 0xd0, 0xc6, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x42, 0x4d, 0x43, 0x20, 0x53, 0x74, 0x6f, 0x72, 0x61, 0x67, ++ 0x65, 0x20, 0x4d, 0x6f, 0x64, 0x75, 0x6c, 0x65, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x39, 0x01, 0x0c, 0x00, 0xc6, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0xd2, 0x59, 0x6f, 0x73, 0x65, 0x6d, 0x69, 0x74, 0x65, 0x20, 0x56, 0x33, 0x2e, 0x35, ++ 0x20, 0x45, 0x56, 0x54, 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0xc4, 0x45, 0x56, 0x54, 0x32, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc7, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, ++ 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc8, 0x43, 0x6f, ++ 0x6e, 0x66, 0x69, 0x67, 0x20, 0x41, 0xc1, 0x45, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++}; ++ ++static const uint8_t fby35_fruid_nic[] = { ++ 0x01, 0x00, 0x00, 0x01, 0x0f, 0x20, 0x00, 0xcf, 0x01, 0x0e, 0x19, 0xd7, 0x5e, 0xcf, 0xc8, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, ++ 0x20, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f, ++ 0x43, 0x50, 0x33, 0x2e, 0x30, 0xd8, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd5, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0xcc, 0x46, 0x52, 0x55, 0x20, 0x56, 0x65, 0x72, 0x20, 0x30, 0x2e, 0x30, ++ 0x32, 0xc0, 0xc0, 0xc0, 0xc1, 0x00, 0x00, 0x2f, 0x01, 0x11, 0x19, 0xc8, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0xdd, 0x4d, 0x65, 0x6c, 0x6c, 0x61, 0x6e, 0x6f, 0x78, 0x20, 0x43, 0x6f, ++ 0x6e, 0x6e, 0x65, 0x63, 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0x20, 0x4f, 0x43, 0x50, 0x33, ++ 0x2e, 0x30, 0xd5, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xd3, 0x41, 0x39, 0x20, 0x20, 0x20, 0x20, 0x20, ++ 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xd8, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0x43, 0x6f, 0x6e, 0x6e, 0x65, 0x63, ++ 0x74, 0x58, 0x2d, 0x36, 0x20, 0x44, 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xdb, ++ 0xc0, 0x82, 0x30, 0x15, 0x79, 0x7f, 0xa6, 0x00, 0x01, 0x18, 0x0b, 0xff, 0x08, 0x00, 0xff, 0xff, ++ 0x64, 0x00, 0x00, 0x00, 0x00, 0x03, 0x20, 0x01, 0xff, 0xff, 0x04, 0x46, 0x00, 0xff, 0xff, 0xff, ++ 0xff, 0xff, 0xff, 0xff, 0x01, 0x81, 0x09, 0x15, 0xb3, 0x10, 0x1d, 0x00, 0x24, 0x15, 0xb3, 0x00, ++ 0x02, 0xeb, 0x8a, 0x95, 0x5c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++}; ++ ++#endif +diff --git a/scripts/gen_eeprom.py b/scripts/gen_eeprom.py +new file mode 100644 +index 0000000000..b5eceb47bd +--- /dev/null ++++ b/scripts/gen_eeprom.py +@@ -0,0 +1,17 @@ ++import os ++import sys ++ ++prefix = os.environ.get('PREFIX', '') ++ ++for bin_file in sys.argv[1:]: ++ var_name = prefix + bin_file.split('.')[0] ++ sys.stdout.write('static const uint8_t %s[] = {' % var_name) ++ with open(bin_file, 'rb') as f: ++ s = f.read() ++ for i, b in enumerate(s): ++ if i % 16 == 0: ++ sys.stdout.write('\n ') ++ elif i != 0: ++ sys.stdout.write(' ') ++ sys.stdout.write('0x%02x,' % b) ++ sys.stdout.write('\n};\n') +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0519-hw-misc-aspeed-Add-fby35-sb-cpld.patch b/common/recipes-devtools/qemu/qemu/0519-hw-misc-aspeed-Add-fby35-sb-cpld.patch new file mode 100644 index 000000000000..8919a36f84c3 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0519-hw-misc-aspeed-Add-fby35-sb-cpld.patch @@ -0,0 +1,218 @@ +From 5bc7735cb1a7cb86dcfcd764d4075be723191648 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 17 Aug 2022 10:14:07 +0200 +Subject: [PATCH 519/532] hw/misc/aspeed: Add fby35-sb-cpld +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +fby35 machines have 1 BMC on a baseboard and 2-4 server boards with BIC's. +There are also CPLD's on each of the boards, one type of CPLD on the +baseboard and another type on each of the server boards. This commit adds an +implementation of some of the logic performed by the server board CPLD, +which is connected to the server board BIC. + +fby35 machines have 1 baseboard with a BMC (AST2600) and 4 server boards +with bridge interconnects (BIC's, AST1030's). Each server board has a CPLD +on it which provides FRU information and some synchronization functionality +with the BMC. The baseboard also has one CPLD, but it does other stuff. + +This commit just adds some of the FRU functionality to allow the BIC to +startup without any errors. + +Signed-off-by: Peter Delevoryas +Message-Id: <20220630045133.32251-13-me@pjd.dev> +Signed-off-by: Cédric Le Goater +Signed-off-by: Peter Delevoryas +--- + MAINTAINERS | 1 + + hw/misc/fby35_sb_cpld.c | 137 ++++++++++++++++++++++++++++++++++++++++ + hw/misc/meson.build | 3 +- + hw/misc/trace-events | 4 ++ + 4 files changed, 144 insertions(+), 1 deletion(-) + create mode 100644 hw/misc/fby35_sb_cpld.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index 695e0bd34f..35dc5cd767 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1163,6 +1163,7 @@ F: include/hw/net/ftgmac100.h + F: docs/system/arm/aspeed.rst + F: tests/*/*aspeed* + F: hw/arm/fby35.c ++F: hw/misc/fby35_sb_cpld.c + + NRF51 + M: Joel Stanley +diff --git a/hw/misc/fby35_sb_cpld.c b/hw/misc/fby35_sb_cpld.c +new file mode 100644 +index 0000000000..e7c4b8df7b +--- /dev/null ++++ b/hw/misc/fby35_sb_cpld.c +@@ -0,0 +1,137 @@ ++/* ++ * fby35 Server Board CPLD ++ * ++ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) ++ * ++ * This code is licensed under the GPL version 2 or later. See the COPYING ++ * file in the top-level directory. ++ */ ++ ++#include "qemu/osdep.h" ++#include "qemu/log.h" ++#include "hw/i2c/i2c.h" ++#include "hw/registerfields.h" ++#include "trace.h" ++ ++#define BOARD_ID_CLASS1 0b0000 ++#define BOARD_ID_CLASS2 0b0001 ++ ++#define TYPE_FBY35_SB_CPLD "fby35-sb-cpld" ++OBJECT_DECLARE_SIMPLE_TYPE(Fby35SbCpldState, FBY35_SB_CPLD); ++ ++REG8(CLASS_TYPE, 0x5); ++ FIELD(CLASS_TYPE, RESERVED, 0, 2); ++ FIELD(CLASS_TYPE, 1OU_EXPANSION_NOT_PRESENT, 2, 1); ++ FIELD(CLASS_TYPE, 2OU_EXPANSION_NOT_PRESENT, 3, 1); ++ FIELD(CLASS_TYPE, BOARD_ID, 4, 4); ++REG8(BOARD_REVISION, 0x8); ++ FIELD(BOARD_REVISION, VALUE, 0, 4); ++ FIELD(BOARD_REVISION, RESERVED, 4, 4); ++ ++struct Fby35SbCpldState { ++ I2CSlave parent_obj; ++ ++ uint8_t target_reg; ++ uint32_t regs[10]; ++}; ++ ++static void fby35_sb_cpld_realize(DeviceState *dev, Error **errp) ++{ ++ Fby35SbCpldState *s = FBY35_SB_CPLD(dev); ++ ++ memset(s->regs, 0, sizeof(s->regs)); ++ s->target_reg = 0; ++ ++ ARRAY_FIELD_DP32(s->regs, CLASS_TYPE, BOARD_ID, 0b0000); ++ ARRAY_FIELD_DP32(s->regs, CLASS_TYPE, 1OU_EXPANSION_NOT_PRESENT, 1); ++ ARRAY_FIELD_DP32(s->regs, CLASS_TYPE, 2OU_EXPANSION_NOT_PRESENT, 1); ++ ARRAY_FIELD_DP32(s->regs, BOARD_REVISION, VALUE, 0x1); ++} ++ ++static int fby35_sb_cpld_i2c_event(I2CSlave *i2c, enum i2c_event event) ++{ ++ Fby35SbCpldState *s = FBY35_SB_CPLD(i2c); ++ ++ switch (event) { ++ case I2C_START_RECV: ++ break; ++ case I2C_START_SEND: ++ s->target_reg = 0; ++ break; ++ case I2C_START_SEND_ASYNC: ++ case I2C_FINISH: ++ case I2C_NACK: ++ break; ++ } ++ ++ return 0; ++} ++ ++static uint8_t fby35_sb_cpld_i2c_recv(I2CSlave *i2c) ++{ ++ Fby35SbCpldState *s = FBY35_SB_CPLD(i2c); ++ uint8_t value; ++ ++ switch (s->target_reg) { ++ case R_CLASS_TYPE: ++ case R_BOARD_REVISION: ++ value = s->regs[s->target_reg]; ++ break; ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s: Register read unimplemented: 0x%02x\n", ++ __func__, s->target_reg); ++ value = 0xff; ++ break; ++ } ++ ++ trace_fby35_sb_cpld_read(s->target_reg, value); ++ return value; ++} ++ ++static int fby35_sb_cpld_i2c_send(I2CSlave *i2c, uint8_t data) ++{ ++ Fby35SbCpldState *s = FBY35_SB_CPLD(i2c); ++ ++ if (s->target_reg == 0) { ++ s->target_reg = data; ++ return 0; ++ } ++ ++ trace_fby35_sb_cpld_write(s->target_reg, data); ++ ++ switch (s->target_reg) { ++ case R_CLASS_TYPE: ++ case R_BOARD_REVISION: ++ s->regs[s->target_reg] = data; ++ break; ++ default: ++ qemu_log_mask(LOG_UNIMP, ++ "%s: Register write unimplemented: 0x%02x 0x%02x\n", ++ __func__, s->target_reg, data); ++ break; ++ } ++ ++ return 0; ++} ++ ++static void fby35_sb_cpld_class_init(ObjectClass *oc, void *data) ++{ ++ DeviceClass *dc = DEVICE_CLASS(oc); ++ I2CSlaveClass *i2c = I2C_SLAVE_CLASS(oc); ++ ++ dc->realize = fby35_sb_cpld_realize; ++ i2c->event = fby35_sb_cpld_i2c_event; ++ i2c->recv = fby35_sb_cpld_i2c_recv; ++ i2c->send = fby35_sb_cpld_i2c_send; ++} ++ ++static const TypeInfo types[] = { ++ { ++ .name = TYPE_FBY35_SB_CPLD, ++ .parent = TYPE_I2C_SLAVE, ++ .instance_size = sizeof(Fby35SbCpldState), ++ .class_init = fby35_sb_cpld_class_init, ++ }, ++}; ++ ++DEFINE_TYPES(types); +diff --git a/hw/misc/meson.build b/hw/misc/meson.build +index 901e5a11f0..18f3821c54 100644 +--- a/hw/misc/meson.build ++++ b/hw/misc/meson.build +@@ -134,7 +134,8 @@ system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( + 'aspeed_sbc.c', + 'aspeed_sdmc.c', + 'aspeed_xdma.c', +- 'aspeed_peci.c')) ++ 'aspeed_peci.c', ++ 'fby35_sb_cpld.c')) + + system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c')) + system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c')) +diff --git a/hw/misc/trace-events b/hw/misc/trace-events +index 05ff692441..6e20e6cd8a 100644 +--- a/hw/misc/trace-events ++++ b/hw/misc/trace-events +@@ -330,3 +330,7 @@ djmemc_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRI + # iosb.c + iosb_read(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" + iosb_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx64" size=%u" ++ ++# fby35_sb_cpld.c ++fby35_sb_cpld_read(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" ++fby35_sb_cpld_write(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0520-hw-misc-aspeed-Add-intel-me.patch b/common/recipes-devtools/qemu/qemu/0520-hw-misc-aspeed-Add-intel-me.patch new file mode 100644 index 000000000000..86f85d7979ce --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0520-hw-misc-aspeed-Add-intel-me.patch @@ -0,0 +1,240 @@ +From d968b9db8b4ef17a53e8b7bb732cec818d0da4d7 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 17 Aug 2022 10:14:07 +0200 +Subject: [PATCH 520/532] hw/misc/aspeed: Add intel-me +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Intel Management Engine is an IPMI endpoint that responds to various +IPMI commands. In this commit, I've added some very basic functionality that +will respond back with a respond code of zero (success), while also setting +an appropriate response NetFN (request NetFN + 1), a matching command ID and +sequence number, and the 2 standard checksums. Other data is not provided, +but the model here could be extended to respond to more kinds of requests. + +Signed-off-by: Peter Delevoryas +Message-Id: <20220630045133.32251-14-me@pjd.dev> +Signed-off-by: Cédric Le Goater +Signed-off-by: Peter Delevoryas +--- + MAINTAINERS | 1 + + hw/misc/intel_me.c | 162 +++++++++++++++++++++++++++++++++++++++++++ + hw/misc/meson.build | 3 +- + hw/misc/trace-events | 8 +++ + 4 files changed, 173 insertions(+), 1 deletion(-) + create mode 100644 hw/misc/intel_me.c + +diff --git a/MAINTAINERS b/MAINTAINERS +index 35dc5cd767..3a33ebf223 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1164,6 +1164,7 @@ F: docs/system/arm/aspeed.rst + F: tests/*/*aspeed* + F: hw/arm/fby35.c + F: hw/misc/fby35_sb_cpld.c ++F: hw/misc/intel_me.c + + NRF51 + M: Joel Stanley +diff --git a/hw/misc/intel_me.c b/hw/misc/intel_me.c +new file mode 100644 +index 0000000000..933ae45101 +--- /dev/null ++++ b/hw/misc/intel_me.c +@@ -0,0 +1,162 @@ ++/* ++ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) ++ * ++ * This code is licensed under the GPL version 2 or later. See the COPYING ++ * file in the top-level directory. ++ */ ++ ++#include "qemu/osdep.h" ++#include "qemu/main-loop.h" ++#include "hw/i2c/i2c.h" ++#include "trace.h" ++ ++#define TYPE_INTEL_ME "intel-me" ++OBJECT_DECLARE_SIMPLE_TYPE(IntelMEState, INTEL_ME); ++ ++struct IntelMEState { ++ I2CSlave parent_obj; ++ ++ I2CBus *bus; ++ QEMUBH *bh; ++ int rx_len; ++ int tx_len; ++ int tx_pos; ++ uint8_t rx_buf[512]; ++ uint8_t tx_buf[512]; ++}; ++ ++static void intel_me_bh(void *opaque) ++{ ++ IntelMEState *s = opaque; ++ I2CSlave *i2c = I2C_SLAVE(s); ++ uint8_t target_addr; ++ ++ assert(s->bus->bh == s->bh); ++ ++ switch (s->tx_pos) { ++ case 0: ++ target_addr = s->tx_buf[s->tx_pos++]; ++ trace_intel_me_tx_start(i2c->address, target_addr); ++ if (i2c_start_send_async(s->bus, target_addr) != 0) { ++ break; ++ } ++ return; ++ default: ++ if (s->tx_pos >= s->tx_len) { ++ break; ++ } ++ trace_intel_me_tx_data(i2c->address, s->tx_buf[s->tx_pos]); ++ if (i2c_send_async(s->bus, s->tx_buf[s->tx_pos++]) != 0) { ++ break; ++ } ++ return; ++ } ++ ++ trace_intel_me_tx_end(i2c->address); ++ i2c_end_transfer(s->bus); ++ i2c_bus_release(s->bus); ++ s->tx_len = 0; ++ s->tx_pos = 0; ++ memset(s->tx_buf, 0, sizeof(s->tx_buf)); ++} ++ ++static void intel_me_realize(DeviceState *dev, Error **errp) ++{ ++ IntelMEState *s = INTEL_ME(dev); ++ ++ s->bus = I2C_BUS(qdev_get_parent_bus(dev)); ++ s->bh = qemu_bh_new(intel_me_bh, s); ++ s->rx_len = 0; ++ s->tx_len = 0; ++ s->tx_pos = 0; ++ memset(s->rx_buf, 0, sizeof(s->rx_buf)); ++ memset(s->tx_buf, 0, sizeof(s->tx_buf)); ++} ++ ++static uint8_t checksum(const uint8_t *ptr, int len) ++{ ++ int sum = 0; ++ ++ for (int i = 0; i < len; i++) { ++ sum += ptr[i]; ++ } ++ ++ return 256 - sum; ++} ++ ++static int intel_me_i2c_event(I2CSlave *i2c, enum i2c_event event) ++{ ++ IntelMEState *s = INTEL_ME(i2c); ++ ++ switch (event) { ++ case I2C_START_RECV: ++ break; ++ case I2C_START_SEND: ++ trace_intel_me_rx_start(i2c->address); ++ s->rx_len = 0; ++ memset(s->rx_buf, 0, sizeof(s->rx_buf)); ++ break; ++ case I2C_START_SEND_ASYNC: ++ break; ++ case I2C_FINISH: ++ trace_intel_me_rx_end(i2c->address); ++ s->tx_len = 10; ++ s->tx_pos = 0; ++ s->tx_buf[0] = s->rx_buf[2]; ++ s->tx_buf[1] = ((s->rx_buf[0] >> 2) + 1) << 2; ++ s->tx_buf[2] = checksum(s->tx_buf, 2); ++ s->tx_buf[3] = i2c->address; ++ s->tx_buf[4] = (s->rx_buf[3] >> 2) << 2; ++ s->tx_buf[5] = s->rx_buf[4]; ++ s->tx_buf[6] = 0x00; ++ s->tx_buf[7] = 0x55; ++ s->tx_buf[8] = 0x00; ++ s->tx_buf[9] = checksum(s->tx_buf, s->tx_len - 1); ++ s->tx_buf[0] >>= 1; ++ i2c_bus_master(s->bus, s->bh); ++ break; ++ case I2C_NACK: ++ break; ++ } ++ ++ return 0; ++} ++ ++static uint8_t intel_me_i2c_recv(I2CSlave *i2c) ++{ ++ return 0xff; ++} ++ ++static int intel_me_i2c_send(I2CSlave *i2c, uint8_t data) ++{ ++ IntelMEState *s = INTEL_ME(i2c); ++ ++ trace_intel_me_rx_data(i2c->address, data); ++ ++ assert(s->rx_len < sizeof(s->rx_buf)); ++ s->rx_buf[s->rx_len++] = data; ++ ++ return 0; ++} ++ ++static void intel_me_class_init(ObjectClass *oc, void *data) ++{ ++ DeviceClass *dc = DEVICE_CLASS(oc); ++ I2CSlaveClass *i2c = I2C_SLAVE_CLASS(oc); ++ ++ dc->realize = intel_me_realize; ++ i2c->event = intel_me_i2c_event; ++ i2c->recv = intel_me_i2c_recv; ++ i2c->send = intel_me_i2c_send; ++} ++ ++static const TypeInfo types[] = { ++ { ++ .name = TYPE_INTEL_ME, ++ .parent = TYPE_I2C_SLAVE, ++ .instance_size = sizeof(IntelMEState), ++ .class_init = intel_me_class_init, ++ }, ++}; ++ ++DEFINE_TYPES(types); +diff --git a/hw/misc/meson.build b/hw/misc/meson.build +index 18f3821c54..89f6b13407 100644 +--- a/hw/misc/meson.build ++++ b/hw/misc/meson.build +@@ -135,7 +135,8 @@ system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( + 'aspeed_sdmc.c', + 'aspeed_xdma.c', + 'aspeed_peci.c', +- 'fby35_sb_cpld.c')) ++ 'fby35_sb_cpld.c', ++ 'intel_me.c')) + + system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c')) + system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c')) +diff --git a/hw/misc/trace-events b/hw/misc/trace-events +index 6e20e6cd8a..65f68aedbf 100644 +--- a/hw/misc/trace-events ++++ b/hw/misc/trace-events +@@ -334,3 +334,11 @@ iosb_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx6 + # fby35_sb_cpld.c + fby35_sb_cpld_read(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" + fby35_sb_cpld_write(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" ++ ++# intel_me.c ++intel_me_rx_start(uint8_t addr) "addr 0x%02x" ++intel_me_rx_data(uint8_t addr, uint8_t data) "addr 0x%02x data 0x%02x" ++intel_me_rx_end(uint8_t addr) "addr 0x%02x" ++intel_me_tx_start(uint8_t addr, uint8_t target_addr) "addr 0x%02x target_addr 0x%02x" ++intel_me_tx_data(uint8_t addr, uint8_t data) "addr 0x%02x data 0x%02x" ++intel_me_tx_end(uint8_t addr) "addr 0x%02x" +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0521-hw-misc-aspeed-Add-fby35-server-board-bridge-IC.patch b/common/recipes-devtools/qemu/qemu/0521-hw-misc-aspeed-Add-fby35-server-board-bridge-IC.patch new file mode 100644 index 000000000000..9eaa9954d3d6 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0521-hw-misc-aspeed-Add-fby35-server-board-bridge-IC.patch @@ -0,0 +1,436 @@ +From b7b078b9aa41065591979881da3c869240a82aba Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 23 Aug 2022 16:57:35 -0700 +Subject: [PATCH 521/532] hw/misc/aspeed: Add fby35 server board bridge IC + +Signed-off-by: Peter Delevoryas +--- + hw/arm/fby35.h | 35 +++++ + hw/misc/fby35_sb_bic.c | 342 +++++++++++++++++++++++++++++++++++++++++ + hw/misc/meson.build | 1 + + hw/misc/trace-events | 4 + + 4 files changed, 382 insertions(+) + create mode 100644 hw/misc/fby35_sb_bic.c + +diff --git a/hw/arm/fby35.h b/hw/arm/fby35.h +index b8fbd1bf9a..20bd43fbae 100644 +--- a/hw/arm/fby35.h ++++ b/hw/arm/fby35.h +@@ -107,4 +107,39 @@ static const uint8_t fby35_fruid_nic[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + }; + ++static const uint8_t fby35_fruid_slot[] = { ++ 0x01, 0x00, 0x01, 0x05, 0x11, 0x00, 0x00, 0xe8, 0x01, 0x04, 0x17, 0xc3, 0x4e, 0x2f, 0x41, 0xc3, ++ 0x4e, 0x2f, 0x41, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0xdc, 0x01, 0x0c, 0x00, 0x93, 0x28, 0xd1, 0xc6, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xd2, 0x43, 0x72, 0x61, 0x74, 0x65, 0x72, 0x20, 0x4c, 0x61, 0x6b, ++ 0x65, 0x2d, 0x43, 0x6c, 0x61, 0x73, 0x73, 0x31, 0xcd, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0xd2, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc1, 0x94, 0x01, 0x0d, 0x00, 0xc6, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0xd0, 0x43, 0x72, 0x61, 0x74, 0x65, 0x72, 0x20, 0x4c, 0x61, 0x6b, 0x65, 0x20, 0x45, ++ 0x56, 0x54, 0x32, 0xce, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0xc7, 0x59, 0x6f, 0x43, 0x4c, 0x30, 0x33, 0x35, 0xd6, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0xc7, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x31, 0x2e, 0x30, 0xc9, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0xc3, 0x4e, 0x2f, 0x41, 0xc1, 0x00, 0x00, 0x00, 0xaf, ++ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x7f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x57, 0xb7, 0x8c, 0x01, 0x00, 0x00, 0x00, 0x00, ++ 0x20, 0xf5, 0xf3, 0xec, 0xfd, 0x7f, 0x00, 0x00, 0xb0, 0x2a, 0xb3, 0xff, 0xa9, 0x7f, 0x00, 0x00, ++ 0x30, 0xf6, 0xf3, 0xec, 0xfd, 0x7f, 0x00, 0x00, 0x30, 0xf6, 0xf3, 0xec, 0xfd, 0x7f, 0x00, 0x00, ++ 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0xb5, 0xb3, 0x6b, 0xff, 0xa9, 0x7f, 0x00, 0x00, ++ 0x80, 0xcc, 0x7a, 0xff, 0xa9, 0x7f, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe6, 0xe1, 0x64, 0xff, 0xa9, 0x7f, 0x00, 0x00, ++ 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0xf2, 0x64, 0xff, 0xa9, 0x7f, 0x00, 0x00, ++ 0xe0, 0xcc, 0x7a, 0xff, 0xa9, 0x7f, 0x00, 0x00, 0x00, 0xa0, 0xaf, 0x01, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x00, 0x10, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xdb, 0x5b, 0xf3, 0x84, 0xc6, 0x25, 0x54, ++ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x90, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x80, 0xcc, 0x7a, 0xff, 0xa9, 0x7f, 0x00, 0x00, 0x80, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ++ 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, ++}; ++ + #endif +diff --git a/hw/misc/fby35_sb_bic.c b/hw/misc/fby35_sb_bic.c +new file mode 100644 +index 0000000000..245fd2df5a +--- /dev/null ++++ b/hw/misc/fby35_sb_bic.c +@@ -0,0 +1,342 @@ ++/* ++ * fby35 Server Board Bridge Interconnect ++ * ++ * Copyright (c) Meta Platforms, Inc. and affiliates. (http://www.meta.com) ++ * ++ * This code is licensed under the GPL version 2 or later. See the COPYING ++ * file in the top-level directory. ++ */ ++ ++#include "qemu/osdep.h" ++#include "qemu/main-loop.h" ++#include "qemu/log.h" ++#include "hw/i2c/i2c.h" ++#include "hw/arm/fby35.h" ++#include "trace.h" ++ ++#define IPMB_DATA_MAX_LENGTH 520 ++#define IPMB_HEADER_LENGTH 6 ++#define IPMB_CHECKSUM_LENGTH 1 ++#define IPMB_COMPLETION_CODE_LENGTH 1 ++#define IPMB_COMPLETION_CODE_SUCCESS 0x00 ++#define IPMB_COMPLETION_CODE_INVALID_LENGTH 0xC7 ++#define IPMB_COMPLETION_CODE_LENGTH_EXCEEDED 0xC8 ++ ++#define TYPE_FBY35_SB_BIC "fby35-sb-bic" ++OBJECT_DECLARE_SIMPLE_TYPE(BicState, FBY35_SB_BIC); ++ ++struct BicState { ++ I2CSlave parent_obj; ++ ++ I2CBus *bus; ++ QEMUBH *tx_task; ++ int rx_len; ++ int tx_len; ++ int tx_pos; ++ uint8_t rx_buf[512]; ++ uint8_t tx_buf[512]; ++}; ++ ++static void bic_tx_task(void *opaque) ++{ ++ BicState *s = opaque; ++ ++ switch (s->tx_pos) { ++ case 0: ++ if (i2c_start_send_async(s->bus, s->tx_buf[s->tx_pos++]) != 0) { ++ break; ++ } ++ return; ++ default: ++ if (s->tx_pos >= s->tx_len) { ++ break; ++ } ++ if (i2c_send_async(s->bus, s->tx_buf[s->tx_pos++]) != 0) { ++ break; ++ } ++ return; ++ } ++ ++ i2c_end_transfer(s->bus); ++ i2c_bus_release(s->bus); ++} ++ ++static void bic_realize(DeviceState *dev, Error **errp) ++{ ++ BicState *s = FBY35_SB_BIC(dev); ++ ++ s->bus = I2C_BUS(qdev_get_parent_bus(dev)); ++ s->tx_task = qemu_bh_new(bic_tx_task, s); ++ s->rx_len = 0; ++ s->tx_len = 0; ++ s->tx_pos = 0; ++ memset(s->rx_buf, 0, sizeof(s->rx_buf)); ++ memset(s->tx_buf, 0, sizeof(s->tx_buf)); ++} ++ ++static uint8_t checksum(const uint8_t *buf, int len) ++{ ++ int sum = 0; ++ ++ for (int i = 0; i < len; i++) { ++ sum += buf[i]; ++ } ++ return 256 - sum; ++} ++ ++typedef struct IPMBMessage IPMBMessage; ++ ++struct IPMBMessage { ++ uint8_t dst_addr; ++ uint8_t dst_lun; ++ uint8_t src_addr; ++ uint8_t src_lun; ++ uint8_t netfn; ++ uint8_t seq; ++ uint8_t cmd; ++ uint8_t completion_code; ++ uint16_t data_len; ++ uint8_t data[IPMB_DATA_MAX_LENGTH]; ++}; ++ ++static bool is_ipmb_response(const IPMBMessage *msg) ++{ ++ return msg->netfn & 1; ++} ++ ++static int encode_ipmb_message(const IPMBMessage *msg, uint8_t *buf, int cap) ++{ ++ int n = 0; ++ ++ g_assert(cap >= IPMB_HEADER_LENGTH + msg->data_len + IPMB_CHECKSUM_LENGTH ++ + (is_ipmb_response(msg) ? IPMB_COMPLETION_CODE_LENGTH : 0)); ++ ++ buf[n++] = msg->dst_addr; ++ buf[n++] = (msg->netfn << 2) | msg->dst_lun; ++ buf[n] = checksum(buf, n); ++ n++; ++ buf[n++] = msg->src_addr; ++ buf[n++] = (msg->seq << 2) | msg->src_lun; ++ buf[n++] = msg->cmd; ++ if (is_ipmb_response(msg)) { ++ buf[n++] = msg->completion_code; ++ } ++ memcpy(&buf[n], msg->data, msg->data_len); ++ n += msg->data_len; ++ ++ buf[n] = checksum(buf, n); ++ n++; ++ ++ /* QEMU's expecting a 7-bit I2C address. */ ++ buf[0] >>= 1; ++ ++ return n; ++} ++ ++static int decode_ipmb_message(const uint8_t *buf, int len, IPMBMessage *msg) ++{ ++ memset(msg, 0, sizeof(*msg)); ++ ++ if (len < IPMB_HEADER_LENGTH + IPMB_CHECKSUM_LENGTH) { ++ qemu_log_mask(LOG_GUEST_ERROR, "%s: length too small: %d\n", __func__, ++ len); ++ return -1; ++ } ++ ++ msg->dst_addr = buf[0]; ++ msg->dst_lun = buf[1] & 0b11; ++ msg->src_addr = buf[3]; ++ msg->src_lun = buf[4] & 0b11; ++ msg->netfn = buf[1] >> 2; ++ msg->seq = buf[4] >> 2; ++ msg->cmd = buf[5]; ++ msg->data_len = len - IPMB_HEADER_LENGTH - IPMB_CHECKSUM_LENGTH; ++ if (is_ipmb_response(msg)) { ++ msg->data_len -= IPMB_COMPLETION_CODE_LENGTH; ++ msg->completion_code = ++ len > IPMB_HEADER_LENGTH ? buf[IPMB_HEADER_LENGTH] : 0; ++ } ++ msg->data_len = MAX(msg->data_len, 0); ++ memcpy(msg->data, &buf[IPMB_HEADER_LENGTH], msg->data_len); ++ ++ return 0; ++} ++ ++static void ipmb_append_data(IPMBMessage *msg, uint8_t data) ++{ ++ g_assert(msg->data_len < sizeof(msg->data)); ++ msg->data[msg->data_len++] = data; ++} ++ ++static void ipmb_extend_data(IPMBMessage *msg, const uint8_t *buf, int len) ++{ ++ g_assert(msg->data_len + len < sizeof(msg->data)); ++ memcpy(&msg->data[msg->data_len], buf, len); ++ msg->data_len += len; ++} ++ ++static void read_fru(BicState *s, const IPMBMessage *request, IPMBMessage *response) ++{ ++ const uint8_t *fru = fby35_fruid_slot; /* Assume we're getting the slot FRUID. */ ++ int fru_size = sizeof(fru); ++ uint8_t device_id; ++ uint16_t offset; ++ uint8_t len; ++ ++ if (request->data_len != 4) { ++ response->completion_code = IPMB_COMPLETION_CODE_INVALID_LENGTH; ++ return; ++ } ++ ++ device_id = request->data[0]; ++ (void)device_id; /* Ignore device ID */ ++ offset = request->data[1] | (request->data[2] << 8); ++ len = request->data[3]; ++ ++ if (len > 32 || offset + len > fru_size) { ++ response->completion_code = IPMB_COMPLETION_CODE_LENGTH_EXCEEDED; ++ return; ++ } ++ ++ ipmb_append_data(response, len + 1); ++ ipmb_extend_data(response, &fru[offset], len); ++} ++ ++static int handle_ipmb_request(BicState *s, const IPMBMessage *request, ++ IPMBMessage *response) ++{ ++ I2CSlave *i2c = I2C_SLAVE(s); ++ ++ g_assert(request->dst_addr == i2c->address); ++ g_assert(!is_ipmb_response(request)); ++ ++ memset(response, 0, sizeof(*response)); ++ response->dst_addr = request->src_addr; ++ response->dst_lun = request->src_lun; ++ response->src_addr = request->dst_addr; ++ response->src_lun = request->dst_lun; ++ response->netfn = request->netfn + 1; ++ response->seq = request->seq; ++ response->cmd = request->cmd; ++ response->completion_code = IPMB_COMPLETION_CODE_SUCCESS; ++ ++ switch (request->netfn) { ++ case 0x06: ++ switch (request->cmd) { ++ case 0x04: ++ ipmb_append_data(response, 0x55); ++ ipmb_append_data(response, 0x00); ++ break; ++ } ++ break; ++ case 0x0a: ++ switch (request->cmd) { ++ case 0x10: ++ ipmb_append_data(response, sizeof(fby35_fruid_slot) & 0xFF); ++ ipmb_append_data(response, sizeof(fby35_fruid_slot) >> 8); ++ ipmb_append_data(response, 0); /* FRU access type: byte */ ++ break; ++ case 0x11: ++ read_fru(s, request, response); ++ break; ++ } ++ break; ++ default: ++ qemu_log_mask(LOG_UNIMP, "%s: netfn 0x%02x cmd 0x%02x unimplemented\n", ++ __func__, request->netfn, request->cmd); ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int bic_i2c_event(I2CSlave *i2c, enum i2c_event event) ++{ ++ BicState *s = FBY35_SB_BIC(i2c); ++ IPMBMessage request, response; ++ ++ switch (event) { ++ case I2C_START_SEND: ++ memset(s->rx_buf, 0, sizeof(s->rx_buf)); ++ s->rx_len = 0; ++ s->rx_buf[s->rx_len++] = i2c->address; ++ break; ++ case I2C_FINISH: ++ if (decode_ipmb_message(s->rx_buf, s->rx_len, &request)) { ++ break; ++ } ++ ++ trace_fby35_sb_bic_ipmb_message(request.src_addr, ++ request.dst_addr, ++ request.netfn, ++ request.cmd, ++ request.seq, ++ request.completion_code); ++ for (int i = 0; i < request.data_len; i++) { ++ trace_fby35_sb_bic_ipmb_message_data(i, request.data[i]); ++ } ++ ++ if (handle_ipmb_request(s, &request, &response)) { ++ break; ++ } ++ ++ s->tx_len = encode_ipmb_message(&response, s->tx_buf, sizeof(s->tx_buf)); ++ s->tx_pos = 0; ++ ++ trace_fby35_sb_bic_ipmb_message(response.src_addr, ++ response.dst_addr, ++ response.netfn, ++ response.cmd, ++ response.seq, ++ response.completion_code); ++ for (int i = 0; i < response.data_len; i++) { ++ trace_fby35_sb_bic_ipmb_message_data(i, response.data[i]); ++ } ++ ++ i2c_bus_master(s->bus, s->tx_task); ++ break; ++ case I2C_START_RECV: ++ case I2C_START_SEND_ASYNC: ++ case I2C_NACK: ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static uint8_t bic_i2c_recv(I2CSlave *i2c) ++{ ++ return 0xff; ++} ++ ++static int bic_i2c_send(I2CSlave *i2c, uint8_t data) ++{ ++ BicState *s = FBY35_SB_BIC(i2c); ++ ++ assert(s->rx_len < sizeof(s->rx_buf)); ++ s->rx_buf[s->rx_len++] = data; ++ ++ return 0; ++} ++ ++static void bic_class_init(ObjectClass *oc, void *data) ++{ ++ DeviceClass *dc = DEVICE_CLASS(oc); ++ I2CSlaveClass *i2c = I2C_SLAVE_CLASS(oc); ++ ++ dc->realize = bic_realize; ++ i2c->event = bic_i2c_event; ++ i2c->recv = bic_i2c_recv; ++ i2c->send = bic_i2c_send; ++} ++ ++static const TypeInfo types[] = { ++ { ++ .name = TYPE_FBY35_SB_BIC, ++ .parent = TYPE_I2C_SLAVE, ++ .instance_size = sizeof(BicState), ++ .class_init = bic_class_init, ++ }, ++}; ++ ++DEFINE_TYPES(types); +diff --git a/hw/misc/meson.build b/hw/misc/meson.build +index 89f6b13407..8043376f1e 100644 +--- a/hw/misc/meson.build ++++ b/hw/misc/meson.build +@@ -136,6 +136,7 @@ system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( + 'aspeed_xdma.c', + 'aspeed_peci.c', + 'fby35_sb_cpld.c', ++ 'fby35_sb_bic.c', + 'intel_me.c')) + + system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c')) +diff --git a/hw/misc/trace-events b/hw/misc/trace-events +index 65f68aedbf..a7610f8394 100644 +--- a/hw/misc/trace-events ++++ b/hw/misc/trace-events +@@ -335,6 +335,10 @@ iosb_write(int reg, uint64_t value, unsigned int size) "reg=0x%x value=0x%"PRIx6 + fby35_sb_cpld_read(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" + fby35_sb_cpld_write(uint8_t reg, uint8_t value) "reg 0x%02x value 0x%02x" + ++# fby35_sb_bic.c ++fby35_sb_bic_ipmb_message(uint8_t src, uint8_t dst, uint8_t netfn, uint8_t cmd, uint8_t seq, uint8_t cc) "src 0x%02x dst 0x%02x netfn 0x%02x cmd 0x%02x seq 0x%02x cc 0x%02x" ++fby35_sb_bic_ipmb_message_data(uint16_t i, uint8_t data) "data[%u]: 0x%02x" ++ + # intel_me.c + intel_me_rx_start(uint8_t addr) "addr 0x%02x" + intel_me_rx_data(uint8_t addr, uint8_t data) "addr 0x%02x data 0x%02x" +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0522-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch b/common/recipes-devtools/qemu/qemu/0522-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch new file mode 100644 index 000000000000..f4227c2ff512 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0522-hw-arm-aspeed-Switch-fby35-grandcanyon-to-n25q00.patch @@ -0,0 +1,38 @@ +From a0ae8b3ec541044d3f709fa31bf188aa9b53c5ea Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 14 Jun 2022 11:33:56 -0700 +Subject: [PATCH 522/532] hw/arm/aspeed: Switch fby35, grandcanyon to n25q00 + +This flash model is 128MB and includes the new BP and TB bits that Iris +added. The additional testing verifies the vboot status output. + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 84618d738b..13546a5420 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1582,7 +1582,7 @@ static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) + + mc->desc = "Facebook fby35 BMC (Cortex-A7)"; + mc->reset = fby35_reset; +- amc->fmc_model = "mx66l1g45g"; ++ amc->fmc_model = "n25q00"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC3_ON; + amc->i2c_init = fby35_i2c_init; +@@ -1880,7 +1880,7 @@ static const struct FBMachineData fb_machines[] = { + .soc_name = "ast2600-a3", + .hw_strap1 = AST2600_EVB_HW_STRAP1, + .hw_strap2 = AST2600_EVB_HW_STRAP2, +- .flash_model = "mx66l1g45g", ++ .flash_model = "n25q00", + .macs_mask = ASPEED_MAC3_ON, + .stdout_path = ASPEED_DEV_UART5, + .ram_size = FUJI_BMC_RAM_SIZE, +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0523-fby35-Add-CPLD-and-BIC-as-I2C-devices.patch b/common/recipes-devtools/qemu/qemu/0523-fby35-Add-CPLD-and-BIC-as-I2C-devices.patch new file mode 100644 index 000000000000..2cbd98533070 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0523-fby35-Add-CPLD-and-BIC-as-I2C-devices.patch @@ -0,0 +1,29 @@ +From d0ff6858135f6de089e4c4b9da22d66cd18de0b0 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 23 Aug 2022 18:11:55 -0700 +Subject: [PATCH 523/532] fby35: Add CPLD and BIC as I2C devices + +This lets us run some basic bic-util commands from the fby35 BMC +perspective. + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 13546a5420..51ec3cb6e0 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1032,6 +1032,8 @@ static void fby35_i2c_init(AspeedMachineState *bmc) + * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on + * each. + */ ++ i2c_slave_create_simple(i2c[0], "fby35-sb-bic", 0x20); ++ i2c_slave_create_simple(i2c[4], "fby35-sb-cpld", 0x0f); + } + + static void fbttn_i2c_init(AspeedMachineState *bmc) +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0524-fby35-Setup-I2C-devices-and-GPIO-s.patch b/common/recipes-devtools/qemu/qemu/0524-fby35-Setup-I2C-devices-and-GPIO-s.patch new file mode 100644 index 000000000000..5eb009d64ca7 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0524-fby35-Setup-I2C-devices-and-GPIO-s.patch @@ -0,0 +1,255 @@ +From 4147b883d1ba5aa9c97ea24cb74b52aa5920dcfa Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Tue, 23 Aug 2022 23:24:36 -0700 +Subject: [PATCH 524/532] fby35: Setup I2C devices and GPIO's + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 46 ++---------------------- + hw/arm/fby35.c | 95 +++++++++++++++++++++++++++++++++++++++++++++++++ + hw/arm/fby35.h | 5 +++ + 3 files changed, 103 insertions(+), 43 deletions(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 51ec3cb6e0..aa2d351a77 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1005,35 +1005,13 @@ static void bletchley_bmc_i2c_init(AspeedMachineState *bmc) + static void fby35_i2c_init(AspeedMachineState *bmc) + { + AspeedSoCState *soc = bmc->soc; +- I2CBus *i2c[16]; +- +- for (int i = 0; i < 16; i++) { +- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); +- } +- +- i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); +- i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f); +- /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ +- i2c_slave_create_simple(i2c[11], "adm1272", 0x44); +- i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); +- i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); +- +- at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); +- at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); +- at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, +- fby35_nic_fruid_len); +- at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, +- fby35_bb_fruid_len); +- at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, +- fby35_bmc_fruid_len); +- ++ fby35_bmc_i2c_init(soc); + /* + * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on + * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on + * each. + */ +- i2c_slave_create_simple(i2c[0], "fby35-sb-bic", 0x20); +- i2c_slave_create_simple(i2c[4], "fby35-sb-cpld", 0x0f); ++ i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "fby35-sb-bic", 0x20); + } + + static void fbttn_i2c_init(AspeedMachineState *bmc) +@@ -1554,27 +1532,9 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) + static void fby35_reset(MachineState *state, ShutdownCause reason) + { + AspeedMachineState *bmc = ASPEED_MACHINE(state); +- AspeedGPIOState *gpio = &bmc->soc->gpio; + + qemu_devices_reset(reason); +- +- /* Board ID: 7 (Class-1, 4 slots) */ +- object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); +- +- /* Slot presence pins, inverse polarity. (False means present) */ +- object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); +- +- /* Slot 12v power pins, normal polarity. (True means powered-on) */ +- object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); +- object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); ++ fby35_bmc_reset_gpios(bmc->soc); + } + + static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) +diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c +index 490f5d6e23..6acf5088be 100644 +--- a/hw/arm/fby35.c ++++ b/hw/arm/fby35.c +@@ -9,6 +9,7 @@ + #include "qemu/units.h" + #include "qapi/error.h" + #include "sysemu/sysemu.h" ++#include "sysemu/reset.h" + #include "sysemu/block-backend.h" + #include "hw/boards.h" + #include "hw/qdev-clock.h" +@@ -17,6 +18,11 @@ + #include "hw/arm/fby35.h" + #include "hw/i2c/i2c.h" + #include "hw/i2c/i2c_mux_pca954x.h" ++#include "hw/sensor/tmp105.h" ++#include "hw/nvram/eeprom_at24c.h" ++#include "hw/arm/aspeed_eeprom.h" ++ ++#define TYPE_LM75 TYPE_TMP105 + + #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35") + OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35); +@@ -39,6 +45,32 @@ struct Fby35State { + #define FBY35_BMC_RAM_SIZE (2 * GiB) + #define FBY35_BMC_FIRMWARE_ADDR 0x0 + ++static void fby35_cl_bic_i2c_init(AspeedSoCState *s) ++{ ++ I2CBus *i2c[14]; ++ I2CBus *ssd[8]; ++ ++ for (int i = 0; i < ARRAY_SIZE(i2c); i++) { ++ i2c[i] = aspeed_i2c_get_bus(&s->i2c, i); ++ } ++ pca954x_i2c_get_channels(i2c[1], 0x71, "pca9548", ssd); ++ ++ for (int i = 0; i < ARRAY_SIZE(ssd); i++) { ++ i2c_slave_create_simple(ssd[i], "tmp105", 0x6a); ++ } ++ ++ i2c_slave_create_simple(i2c[0], "fby35-sb-cpld", 0x21); ++ i2c_slave_create_simple(i2c[1], "tmp105", 0x48); ++ i2c_slave_create_simple(i2c[1], "tmp105", 0x49); ++ i2c_slave_create_simple(i2c[1], "tmp105", 0x4a); ++ i2c_slave_create_simple(i2c[1], "adm1272", 0x40); ++ i2c_slave_create_simple(i2c[1], "tmp421", 0x4c); ++ i2c_slave_create_simple(i2c[2], "intel-me", 0x16); ++ i2c_slave_create_simple(i2c[4], "isl69259", 0x76); ++ i2c_slave_create_simple(i2c[4], "isl69259", 0x62); ++ i2c_slave_create_simple(i2c[4], "isl69259", 0x60); ++} ++ + static void fby35_bmc_write_boot_rom(DriveInfo *dinfo, MemoryRegion *mr, + hwaddr offset, size_t rom_size, + Error **errp) +@@ -71,6 +103,34 @@ static void fby35_bmc_write_boot_rom(DriveInfo *dinfo, MemoryRegion *mr, + memcpy(memory_region_get_ram_ptr(mr) + offset, storage, rom_size); + } + ++void fby35_bmc_i2c_init(AspeedSoCState *soc) ++{ ++ I2CBus *i2c[16]; ++ ++ for (int i = 0; i < 16; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f); ++ i2c_slave_create_simple(i2c[8], "tmp421", 0x1f); ++ /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */ ++ i2c_slave_create_simple(i2c[11], "adm1272", 0x44); ++ i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e); ++ i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f); ++ ++ at24c_eeprom_init(i2c[4], 0x51, 128 * KiB); ++ at24c_eeprom_init(i2c[6], 0x51, 128 * KiB); ++ ++ at24c_eeprom_init_rom(i2c[8], 0x50, 32 * KiB, fby35_nic_fruid, ++ fby35_nic_fruid_len); ++ at24c_eeprom_init_rom(i2c[11], 0x51, 128 * KiB, fby35_bb_fruid, ++ fby35_bb_fruid_len); ++ at24c_eeprom_init_rom(i2c[11], 0x54, 128 * KiB, fby35_bmc_fruid, ++ fby35_bmc_fruid_len); ++ ++ i2c_slave_create_simple(i2c[4], "fby35-sb-cpld", 0x0f); ++} ++ + static void fby35_bmc_init(Fby35State *s) + { + AspeedSoCState *soc; +@@ -115,6 +175,8 @@ static void fby35_bmc_init(Fby35State *s) + rom_size, &error_abort); + } + } ++ ++ fby35_bmc_i2c_init(soc); + } + + static void fby35_bic_init(Fby35State *s) +@@ -139,6 +201,8 @@ static void fby35_bic_init(Fby35State *s) + aspeed_board_init_flashes(&soc->fmc, "sst25vf032b", 2, 2); + aspeed_board_init_flashes(&soc->spi[0], "sst25vf032b", 2, 4); + aspeed_board_init_flashes(&soc->spi[1], "sst25vf032b", 2, 6); ++ ++ fby35_cl_bic_i2c_init(soc); + } + + static void fby35_init(MachineState *machine) +@@ -159,6 +223,36 @@ static void fby35_init(MachineState *machine) + fby35_bic_init(s); + } + ++void fby35_bmc_reset_gpios(AspeedSoCState *s) ++{ ++ AspeedGPIOState *gpio = &s->gpio; ++ ++ /* Board ID: 7 (Class-1, 4 slots) */ ++ object_property_set_bool(OBJECT(gpio), "gpioV4", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioV5", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioV6", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioV7", false, &error_fatal); ++ ++ /* Slot presence pins, inverse polarity. (False means present) */ ++ object_property_set_bool(OBJECT(gpio), "gpioH4", false, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioH5", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioH6", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioH7", true, &error_fatal); ++ ++ /* Slot 12v power pins, normal polarity. (True means powered-on) */ ++ object_property_set_bool(OBJECT(gpio), "gpioB2", true, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioB3", false, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioB4", false, &error_fatal); ++ object_property_set_bool(OBJECT(gpio), "gpioB5", false, &error_fatal); ++} ++ ++static void fby35_reset(MachineState *machine, ShutdownCause reason) ++{ ++ Fby35State *s = FBY35(machine); ++ ++ qemu_devices_reset(reason); ++ fby35_bmc_reset_gpios(ASPEED_SOC(&s->bmc)); ++} + + static bool fby35_get_mmio_exec(Object *obj, Error **errp) + { +@@ -184,6 +278,7 @@ static void fby35_class_init(ObjectClass *oc, void *data) + mc->no_floppy = 1; + mc->no_cdrom = 1; + mc->min_cpus = mc->max_cpus = mc->default_cpus = 3; ++ mc->reset = fby35_reset; + + object_class_property_add_bool(oc, "execute-in-place", + fby35_get_mmio_exec, +diff --git a/hw/arm/fby35.h b/hw/arm/fby35.h +index 20bd43fbae..87cb1a10c2 100644 +--- a/hw/arm/fby35.h ++++ b/hw/arm/fby35.h +@@ -142,4 +142,9 @@ static const uint8_t fby35_fruid_slot[] = { + 0x29, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + }; + ++typedef struct AspeedSoCState AspeedSoCState; ++ ++void fby35_bmc_i2c_init(AspeedSoCState *s); ++void fby35_bmc_reset_gpios(AspeedSoCState *s); ++ + #endif +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0525-fby35-Add-motherboard-fru-EEPROM-to-BIC.patch b/common/recipes-devtools/qemu/qemu/0525-fby35-Add-motherboard-fru-EEPROM-to-BIC.patch new file mode 100644 index 000000000000..990f5f607a5c --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0525-fby35-Add-motherboard-fru-EEPROM-to-BIC.patch @@ -0,0 +1,27 @@ +From 3bfd1c11c663fda9764b0f941c4f2ca801e24122 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Wed, 24 Aug 2022 17:51:06 -0700 +Subject: [PATCH 525/532] fby35: Add motherboard fru EEPROM to BIC + +Signed-off-by: Peter Delevoryas +--- + hw/arm/fby35.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c +index 6acf5088be..dd8cbd1c61 100644 +--- a/hw/arm/fby35.c ++++ b/hw/arm/fby35.c +@@ -65,6 +65,9 @@ static void fby35_cl_bic_i2c_init(AspeedSoCState *s) + i2c_slave_create_simple(i2c[1], "tmp105", 0x4a); + i2c_slave_create_simple(i2c[1], "adm1272", 0x40); + i2c_slave_create_simple(i2c[1], "tmp421", 0x4c); ++ ++ at24c_eeprom_init_rom(i2c[1], 0x54, 512, fby35_fruid_slot, sizeof(fby35_fruid_slot)); ++ + i2c_slave_create_simple(i2c[2], "intel-me", 0x16); + i2c_slave_create_simple(i2c[4], "isl69259", 0x76); + i2c_slave_create_simple(i2c[4], "isl69259", 0x62); +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0526-qemu-Add-i2c-devices-to-oby35-cl.patch b/common/recipes-devtools/qemu/qemu/0526-qemu-Add-i2c-devices-to-oby35-cl.patch new file mode 100644 index 000000000000..002873b5bfb1 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0526-qemu-Add-i2c-devices-to-oby35-cl.patch @@ -0,0 +1,66 @@ +From 76043bf8beaa7caed47cfc7d2002c91ee86a9025 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 26 Aug 2022 02:03:46 -0700 +Subject: [PATCH 526/532] qemu: Add i2c devices to oby35-cl + +Already had these from -machine fby35, so this commit just makes +fby35_cl_bic_i2c_init public and uses it in aspeed.c and fby35.c + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 13 +------------ + hw/arm/fby35.c | 2 +- + hw/arm/fby35.h | 1 + + 3 files changed, 3 insertions(+), 13 deletions(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index aa2d351a77..f8d5831086 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1068,18 +1068,7 @@ static void create_unimplemented_i2c_device(I2CBus *bus, uint8_t addr) + static void oby35_cl_i2c_init(AspeedMachineState *bmc) + { + AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); +- I2CBus *i2c[16]; +- +- for (int i = 0; i < 16; i++) { +- i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); +- } +- +- create_unimplemented_i2c_device(i2c[1], 0x71); +- create_unimplemented_i2c_device(i2c[2], 0x16); +- create_unimplemented_i2c_device(i2c[2], 0x10); +- create_unimplemented_i2c_device(i2c[6], 0x20); +- create_unimplemented_i2c_device(i2c[7], 0x20); +- create_unimplemented_i2c_device(i2c[8], 0x20); ++ fby35_cl_bic_i2c_init(soc); + } + + static void oby35_bb_i2c_init(AspeedMachineState *bmc) +diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c +index dd8cbd1c61..d0ed414b79 100644 +--- a/hw/arm/fby35.c ++++ b/hw/arm/fby35.c +@@ -45,7 +45,7 @@ struct Fby35State { + #define FBY35_BMC_RAM_SIZE (2 * GiB) + #define FBY35_BMC_FIRMWARE_ADDR 0x0 + +-static void fby35_cl_bic_i2c_init(AspeedSoCState *s) ++void fby35_cl_bic_i2c_init(AspeedSoCState *s) + { + I2CBus *i2c[14]; + I2CBus *ssd[8]; +diff --git a/hw/arm/fby35.h b/hw/arm/fby35.h +index 87cb1a10c2..0f8369f0fa 100644 +--- a/hw/arm/fby35.h ++++ b/hw/arm/fby35.h +@@ -146,5 +146,6 @@ typedef struct AspeedSoCState AspeedSoCState; + + void fby35_bmc_i2c_init(AspeedSoCState *s); + void fby35_bmc_reset_gpios(AspeedSoCState *s); ++void fby35_cl_bic_i2c_init(AspeedSoCState *s); + + #endif +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0527-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch b/common/recipes-devtools/qemu/qemu/0527-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch new file mode 100644 index 000000000000..ff033feceffa --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0527-hw-arm-aspeed-Don-t-initialize-fby35-bmc-GPIO-s.patch @@ -0,0 +1,48 @@ +From 192be5d3404836d41233a6f5e946f456e820f50c Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Sun, 18 Dec 2022 14:41:31 -0800 +Subject: [PATCH 527/532] hw/arm/aspeed: Don't initialize fby35-bmc GPIO's + +Initializing the GPIO's triggers slot sensor cache initialization in the +boot sequence, which is extremely slow and annoying and doesn't succeed. + +Until we update the BMC's bic-cached setup to be less annoying, it's +better to just not initialize these GPIO's. + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index f8d5831086..def0acfb5c 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1518,6 +1518,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) + aspeed_soc_num_cpus(amc->soc_name); + } + ++#if 0 + static void fby35_reset(MachineState *state, ShutdownCause reason) + { + AspeedMachineState *bmc = ASPEED_MACHINE(state); +@@ -1525,6 +1526,7 @@ static void fby35_reset(MachineState *state, ShutdownCause reason) + qemu_devices_reset(reason); + fby35_bmc_reset_gpios(bmc->soc); + } ++#endif + + static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) + { +@@ -1532,7 +1534,7 @@ static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data) + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Facebook fby35 BMC (Cortex-A7)"; +- mc->reset = fby35_reset; ++ //mc->reset = fby35_reset; + amc->fmc_model = "n25q00"; + amc->num_cs = 2; + amc->macs_mask = ASPEED_MAC3_ON; +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0528-aspeed-Add-grandteton-bmc.patch b/common/recipes-devtools/qemu/qemu/0528-aspeed-Add-grandteton-bmc.patch new file mode 100644 index 000000000000..73d3d3d62f70 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0528-aspeed-Add-grandteton-bmc.patch @@ -0,0 +1,36 @@ +From 64a4caf0c13fb48b1668c09514214ac49bbbb961 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Fri, 15 Jul 2022 14:34:49 -0700 +Subject: [PATCH 528/532] aspeed: Add grandteton-bmc + +Signed-off-by: Peter Delevoryas +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index def0acfb5c..2ae13a047a 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1994,6 +1994,17 @@ static const struct FBMachineData fb_machines[] = { + .stdout_path = ASPEED_DEV_UART5, + .ram_size = 1 * GiB, + }, ++ { ++ .name = "grandteton-bmc", ++ .desc = "Facebook GrandTeton BMC (Cortex-A7)", ++ .soc_name = "ast2600-a3", ++ .hw_strap1 = AST2600_EVB_HW_STRAP1, ++ .hw_strap2 = AST2600_EVB_HW_STRAP2, ++ .flash_model = "n25q00", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART5, ++ .ram_size = FUJI_BMC_RAM_SIZE, ++ }, + { + .parent = MACHINE_TYPE_NAME("ast1030-evb"), + .name = "oby35-cl", +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0529-aspeed-Add-greatlakes-bmc.patch b/common/recipes-devtools/qemu/qemu/0529-aspeed-Add-greatlakes-bmc.patch new file mode 100644 index 000000000000..8721c8954fed --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0529-aspeed-Add-greatlakes-bmc.patch @@ -0,0 +1,29 @@ +From 0b8423285275aabdafc15a1e650b0ea6c7160427 Mon Sep 17 00:00:00 2001 +From: Peter Delevoryas +Date: Thu, 18 Aug 2022 16:10:19 -0700 +Subject: [PATCH 529/532] aspeed: Add greatlakes-bmc + +Signed-off-by: Peter Delevoryas +--- + hw/arm/aspeed.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 2ae13a047a..0c3e25b421 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -2005,6 +2005,11 @@ static const struct FBMachineData fb_machines[] = { + .stdout_path = ASPEED_DEV_UART5, + .ram_size = FUJI_BMC_RAM_SIZE, + }, ++ { ++ .parent = MACHINE_TYPE_NAME("fby35-bmc"), ++ .name = "greatlakes-bmc", ++ .desc = "Facebook Great Lakes BMC (Cortex-A7)", ++ }, + { + .parent = MACHINE_TYPE_NAME("ast1030-evb"), + .name = "oby35-cl", +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0530-aspeed-Add-Sandia.patch b/common/recipes-devtools/qemu/qemu/0530-aspeed-Add-Sandia.patch new file mode 100644 index 000000000000..bf921ac8d3cb --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0530-aspeed-Add-Sandia.patch @@ -0,0 +1,34 @@ +From 034fb070664c4d227c03b8b96640791b1347e89e Mon Sep 17 00:00:00 2001 +From: Bin Huang +Date: Tue, 13 Sep 2022 12:00:56 -0700 +Subject: [PATCH 530/532] aspeed: Add Sandia + +--- + hw/arm/aspeed.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 0c3e25b421..6d8901f9d6 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -1827,6 +1827,17 @@ static const struct FBMachineData fb_machines[] = { + .stdout_path = ASPEED_DEV_UART1, + .ram_size = FUJI_BMC_RAM_SIZE, + }, ++ { ++ .name = "sandia-bmc", ++ .desc = "Facebook Sandia BMC (Cortex-A7)", ++ .soc_name = "ast2600-a3", ++ .hw_strap1 = AST2600_EVB_HW_STRAP1, ++ .hw_strap2 = AST2600_EVB_HW_STRAP2, ++ .flash_model = "mx66l1g45g", ++ .macs_mask = ASPEED_MAC3_ON, ++ .stdout_path = ASPEED_DEV_UART1, ++ .ram_size = FUJI_BMC_RAM_SIZE, ++ }, + { + .name = "grandcanyon-bmc", + .desc = "Facebook GrandCanyon BMC (Cortex-A7)", +-- +2.43.0 + diff --git a/common/recipes-devtools/qemu/qemu/0531-aspeed-add-montblanc-bmc-reference-from-fuji.patch b/common/recipes-devtools/qemu/qemu/0531-aspeed-add-montblanc-bmc-reference-from-fuji.patch new file mode 100644 index 000000000000..ed7d9bfdb979 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0531-aspeed-add-montblanc-bmc-reference-from-fuji.patch @@ -0,0 +1,193 @@ +From 552d7d1f91540a8d60451d9dd61eb33ee3cb4d47 Mon Sep 17 00:00:00 2001 +From: Sittisak Sinprem +Date: Mon, 8 May 2023 14:37:18 +0700 +Subject: [PATCH 531/532] aspeed add montblanc bmc reference from fuji + +- I2C list follow I2C Tree v1.6 20230320 +- fru eeprom data use FB FRU format version 4 + +Signed-off-by: Sittisak Sinprem +--- + hw/arm/aspeed.c | 63 ++++++++++++++++++++++++++++++++++++++++++ + hw/arm/aspeed_eeprom.c | 49 ++++++++++++++++++++++++++++++++ + hw/arm/aspeed_eeprom.h | 7 +++++ + 3 files changed, 119 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 6d8901f9d6..95fc35fd4c 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -191,6 +191,10 @@ struct AspeedMachineState { + #define FUJI_BMC_HW_STRAP1 0x00000000 + #define FUJI_BMC_HW_STRAP2 0x00000000 + ++/* Montblanc hardware value */ ++#define MONTBLANC_BMC_HW_STRAP1 0x00000000 ++#define MONTBLANC_BMC_HW_STRAP2 0x00000000 ++ + /* Bletchley hardware value */ + /* TODO: Leave same as EVB for now. */ + #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 +@@ -930,6 +934,39 @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc) + } + } + ++static void montblanc_bmc_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = bmc->soc; ++ I2CBus *i2c[16] = {}; ++ ++ for (int i = 0; i < 16; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ /* Ref from Minipack3_I2C_Tree_V1.6 20230320 */ ++ at24c_eeprom_init_rom(i2c[3], 0x56, 8 * KiB, montblanc_scm_fruid, montblanc_scm_fruid_len); ++ at24c_eeprom_init_rom(i2c[6], 0x53, 8 * KiB, montblanc_fcm_fruid, montblanc_fcm_fruid_len); ++ ++ /* CPLD and FPGA */ ++ at24c_eeprom_init(i2c[1], 0x35, 256); /* SCM CPLD */ ++ at24c_eeprom_init(i2c[5], 0x35, 256); /* COMe CPLD TODO: need to update */ ++ at24c_eeprom_init(i2c[12], 0x60, 256); /* MCB PWR CPLD */ ++ at24c_eeprom_init(i2c[13], 0x35, 256); /* IOB FPGA */ ++ ++ /* on BMC board */ ++ at24c_eeprom_init_rom(i2c[8], 0x51, 8 * KiB, montblanc_bmc_fruid, montblanc_bmc_fruid_len); /* BMC EEPROM */ ++ i2c_slave_create_simple(i2c[8], TYPE_LM75, 0x48); /* Thermal Sensor */ ++ ++ /* COMe Sensor/EEPROM */ ++ at24c_eeprom_init(i2c[0], 0x56, 16 * KiB); /* FRU EEPROM */ ++ i2c_slave_create_simple(i2c[0], TYPE_LM75, 0x48); /* INLET Sensor */ ++ i2c_slave_create_simple(i2c[0], TYPE_LM75, 0x4A); /* OUTLET Sensor */ ++ ++ /* It expects a pca9555 but a pca9552 is compatible */ ++ create_pca9552(soc, 4, 0x27); ++} ++ ++ + static void wedge100_i2c_init(AspeedMachineState *bmc) + { + AspeedSoCState *soc = ASPEED_SOC(&bmc->soc); +@@ -1497,6 +1534,28 @@ static void aspeed_machine_fuji_class_init(ObjectClass *oc, void *data) + aspeed_soc_num_cpus(amc->soc_name); + }; + ++#define MONTBLANC_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) ++ ++static void aspeed_machine_montblanc_class_init(ObjectClass *oc, void *data) ++{ ++ MachineClass *mc = MACHINE_CLASS(oc); ++ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); ++ ++ mc->desc = "Facebook Montblanc BMC (Cortex-A7)"; ++ amc->soc_name = "ast2600-a3"; ++ amc->hw_strap1 = MONTBLANC_BMC_HW_STRAP1; ++ amc->hw_strap2 = MONTBLANC_BMC_HW_STRAP2; ++ amc->fmc_model = "mx66l1g45g"; ++ amc->spi_model = "mx66l1g45g"; ++ amc->num_cs = 2; ++ amc->macs_mask = ASPEED_MAC3_ON; ++ amc->i2c_init = montblanc_bmc_i2c_init; ++ amc->uart_default = ASPEED_DEV_UART1; ++ mc->default_ram_size = MONTBLANC_BMC_RAM_SIZE; ++ mc->default_cpus = mc->min_cpus = mc->max_cpus = ++ aspeed_soc_num_cpus(amc->soc_name); ++}; ++ + #define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + + static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) +@@ -1734,6 +1793,10 @@ static const TypeInfo aspeed_machine_types[] = { + .name = MACHINE_TYPE_NAME("fuji-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_fuji_class_init, ++ }, { ++ .name = MACHINE_TYPE_NAME("montblanc-bmc"), ++ .parent = TYPE_ASPEED_MACHINE, ++ .class_init = aspeed_machine_montblanc_class_init, + }, { + .name = MACHINE_TYPE_NAME("bletchley-bmc"), + .parent = TYPE_ASPEED_MACHINE, +diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c +index ace5266cec..432bea62bf 100644 +--- a/hw/arm/aspeed_eeprom.c ++++ b/hw/arm/aspeed_eeprom.c +@@ -161,6 +161,52 @@ const uint8_t rainier_bmc_fruid[] = { + 0x31, 0x50, 0x46, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, + }; + ++const uint8_t montblanc_scm_fruid[8192] = { ++ 0xfb, 0xfb, 0x04, 0xff, 0x01, 0x0d, 0x4d, 0x49, 0x4e, 0x49, 0x50, 0x41, ++ 0x43, 0x4b, 0x33, 0x5f, 0x53, 0x43, 0x4d, 0x02, 0x08, 0x32, 0x30, 0x30, ++ 0x30, 0x32, 0x39, 0x34, 0x35, 0x04, 0x0c, 0x31, 0x33, 0x32, 0x30, 0x30, ++ 0x30, 0x31, 0x36, 0x34, 0x30, 0x31, 0x20, 0x05, 0x0c, 0x31, 0x33, 0x31, ++ 0x30, 0x30, 0x30, 0x31, 0x32, 0x37, 0x30, 0x31, 0x20, 0x06, 0x0c, 0x52, ++ 0x33, 0x32, 0x31, 0x34, 0x47, 0x30, 0x30, 0x30, 0x33, 0x30, 0x31, 0x07, ++ 0x0d, 0x41, 0x30, 0x33, 0x31, 0x33, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x08, 0x01, 0x01, 0x09, 0x01, 0x00, 0x0a, 0x01, 0x00, 0x0b, ++ 0x0d, 0x4d, 0x32, 0x32, 0x31, 0x33, 0x32, 0x33, 0x31, 0x37, 0x30, 0x30, ++ 0x30, 0x32, 0x0c, 0x03, 0x43, 0x4c, 0x53, 0x0d, 0x08, 0x32, 0x30, 0x32, ++ 0x33, 0x30, 0x35, 0x30, 0x31, 0x0e, 0x03, 0x57, 0x55, 0x53, 0x0f, 0x03, ++ 0x43, 0x54, 0x48, 0x10, 0x06, 0x01, 0x00, 0x00, 0x91, 0xdb, 0xb4, 0x13, ++ 0x03, 0x53, 0x43, 0x4d, 0xfa, 0x02, 0x02, 0x61, ++}; ++ ++const uint8_t montblanc_fcm_fruid[8192] = { ++ 0xfb, 0xfb, 0x04, 0xff, 0x01, 0x0d, 0x4d, 0x49, 0x4e, 0x49, 0x50, 0x41, ++ 0x43, 0x4b, 0x33, 0x5f, 0x46, 0x43, 0x42, 0x02, 0x08, 0x33, 0x30, 0x30, ++ 0x30, 0x30, 0x31, 0x36, 0x31, 0x04, 0x0c, 0x31, 0x33, 0x32, 0x30, 0x30, ++ 0x30, 0x31, 0x36, 0x33, 0x30, 0x31, 0x20, 0x05, 0x0c, 0x31, 0x33, 0x31, ++ 0x30, 0x30, 0x30, 0x31, 0x33, 0x30, 0x30, 0x31, 0x20, 0x06, 0x0c, 0x52, ++ 0x33, 0x32, 0x31, 0x34, 0x47, 0x30, 0x30, 0x31, 0x32, 0x30, 0x31, 0x07, ++ 0x0d, 0x41, 0x31, 0x32, 0x31, 0x32, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x08, 0x01, 0x01, 0x09, 0x01, 0x00, 0x0a, 0x01, 0x00, 0x0b, ++ 0x0d, 0x46, 0x35, 0x30, 0x31, 0x33, 0x32, 0x33, 0x31, 0x37, 0x30, 0x30, ++ 0x30, 0x35, 0x0c, 0x03, 0x43, 0x4c, 0x53, 0x0d, 0x08, 0x32, 0x30, 0x32, ++ 0x33, 0x30, 0x35, 0x30, 0x31, 0x0e, 0x03, 0x57, 0x55, 0x53, 0x0f, 0x03, ++ 0x43, 0x54, 0x48, 0x10, 0x06, 0x02, 0x00, 0x00, 0x91, 0xdb, 0xb4, 0x11, ++ 0x06, 0x03, 0x00, 0x00, 0x91, 0xdb, 0xb4, 0x12, 0x02, 0x8a, 0x00, 0x13, ++ 0x03, 0x46, 0x43, 0x42, 0xfa, 0x02, 0x50, 0x47, ++}; ++ ++const uint8_t montblanc_bmc_fruid[8192] = { ++ 0xfb, 0xfb, 0x04, 0xff, 0x01, 0x0d, 0x4d, 0x49, 0x4e, 0x49, 0x50, 0x41, ++ 0x43, 0x4b, 0x33, 0x5f, 0x42, 0x4d, 0x43, 0x04, 0x0c, 0x31, 0x33, 0x32, ++ 0x30, 0x30, 0x30, 0x31, 0x33, 0x36, 0x30, 0x31, 0x20, 0x05, 0x0c, 0x31, ++ 0x33, 0x31, 0x30, 0x30, 0x30, 0x30, 0x38, 0x36, 0x30, 0x35, 0x20, 0x06, ++ 0x0c, 0x52, 0x33, 0x30, 0x39, 0x37, 0x47, 0x30, 0x30, 0x30, 0x32, 0x30, ++ 0x37, 0x07, 0x0d, 0x42, 0x30, 0x32, 0x37, 0x34, 0x58, 0x58, 0x58, 0x58, ++ 0x58, 0x58, 0x58, 0x58, 0x08, 0x01, 0x04, 0x09, 0x01, 0x00, 0x0a, 0x01, ++ 0x00, 0x0c, 0x03, 0x43, 0x4c, 0x53, 0x0d, 0x08, 0x32, 0x30, 0x32, 0x33, ++ 0x30, 0x35, 0x30, 0x31, 0x0e, 0x03, 0x57, 0x55, 0x53, 0x0f, 0x03, 0x43, ++ 0x54, 0x48, 0x13, 0x03, 0x42, 0x4d, 0x43, 0xfa, 0x02, 0xef, 0xba, ++}; ++ + const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid); + const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid); + const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid); +@@ -168,3 +214,6 @@ const size_t fby35_bmc_fruid_len = sizeof(fby35_bmc_fruid); + const size_t yosemitev2_bmc_fruid_len = sizeof(yosemitev2_bmc_fruid); + const size_t rainier_bb_fruid_len = sizeof(rainier_bb_fruid); + const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid); ++const size_t montblanc_scm_fruid_len = sizeof(montblanc_scm_fruid); ++const size_t montblanc_fcm_fruid_len = sizeof(montblanc_fcm_fruid); ++const size_t montblanc_bmc_fruid_len = sizeof(montblanc_bmc_fruid); +diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h +index bbf9e54365..b8fbdd0734 100644 +--- a/hw/arm/aspeed_eeprom.h ++++ b/hw/arm/aspeed_eeprom.h +@@ -27,4 +27,11 @@ extern const size_t rainier_bb_fruid_len; + extern const uint8_t rainier_bmc_fruid[]; + extern const size_t rainier_bmc_fruid_len; + ++extern const uint8_t montblanc_scm_fruid[]; ++extern const uint8_t montblanc_fcm_fruid[]; ++extern const uint8_t montblanc_bmc_fruid[]; ++extern const size_t montblanc_scm_fruid_len; ++extern const size_t montblanc_fcm_fruid_len; ++extern const size_t montblanc_bmc_fruid_len; ++ + #endif +-- +2.25.1 + diff --git a/common/recipes-devtools/qemu/qemu/0532-aspeed-add-janga-bmc.patch b/common/recipes-devtools/qemu/qemu/0532-aspeed-add-janga-bmc.patch new file mode 100644 index 000000000000..8bb48fcbecb1 --- /dev/null +++ b/common/recipes-devtools/qemu/qemu/0532-aspeed-add-janga-bmc.patch @@ -0,0 +1,146 @@ +From 1d5c00f5d1f00fb52407ef226c82ae07bb44f00f Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Mon, 10 Jul 2023 16:47:00 +0700 +Subject: [PATCH 532/532] aspeed: add janga bmc + +Signed-off-by: Tao Ren +--- + hw/arm/aspeed.c | 54 ++++++++++++++++++++++++++++++++++++++++++ + hw/arm/aspeed_eeprom.c | 18 ++++++++++++++ + hw/arm/aspeed_eeprom.h | 3 +++ + 3 files changed, 75 insertions(+) + +diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c +index 95fc35fd4c..d7cb391997 100644 +--- a/hw/arm/aspeed.c ++++ b/hw/arm/aspeed.c +@@ -195,6 +195,10 @@ struct AspeedMachineState { + #define MONTBLANC_BMC_HW_STRAP1 0x00000000 + #define MONTBLANC_BMC_HW_STRAP2 0x00000000 + ++/* Janga hardware value */ ++#define JANGA_BMC_HW_STRAP1 0x00000000 ++#define JANGA_BMC_HW_STRAP2 0x00000000 ++ + /* Bletchley hardware value */ + /* TODO: Leave same as EVB for now. */ + #define BLETCHLEY_BMC_HW_STRAP1 AST2600_EVB_HW_STRAP1 +@@ -966,6 +970,30 @@ static void montblanc_bmc_i2c_init(AspeedMachineState *bmc) + create_pca9552(soc, 4, 0x27); + } + ++static void janga_bmc_i2c_init(AspeedMachineState *bmc) ++{ ++ AspeedSoCState *soc = bmc->soc; ++ I2CBus *i2c[16] = {}; ++ ++ for (int i = 0; i < 16; i++) { ++ i2c[i] = aspeed_i2c_get_bus(&soc->i2c, i); ++ } ++ ++ at24c_eeprom_init_rom(i2c[3], 0x56, 8 * KiB, janga_smb_fruid, janga_smb_fruid_len); /* SMB_2 EEPROM */ ++ ++ /* CPLD and FPGA */ ++ at24c_eeprom_init(i2c[1], 0x35, 256); /* SMB_CPLD_1 aka SCM_CPLD */ ++ at24c_eeprom_init(i2c[4], 0x35, 256); /* COMe CPLD TODO: need to update */ ++ at24c_eeprom_init(i2c[6], 0x35, 256); /* FCB#1 CPLD TODO: need to update*/ ++ at24c_eeprom_init(i2c[2], 0x35, 256); /* FCB#2 CPLD TODO: need to update*/ ++ at24c_eeprom_init(i2c[12], 0x60, 256); /* PWR_CPLD */ ++ at24c_eeprom_init(i2c[13], 0x35, 256); /* IOB FPGA */ ++ ++ /* COMe Sensor/EEPROM */ ++ at24c_eeprom_init(i2c[0], 0x56, 16 * KiB); /* FRU EEPROM */ ++ i2c_slave_create_simple(i2c[0], TYPE_LM75, 0x48); /* INLET Sensor */ ++ i2c_slave_create_simple(i2c[0], TYPE_LM75, 0x4A); /* OUTLET Sensor */ ++} + + static void wedge100_i2c_init(AspeedMachineState *bmc) + { +@@ -1556,6 +1584,28 @@ static void aspeed_machine_montblanc_class_init(ObjectClass *oc, void *data) + aspeed_soc_num_cpus(amc->soc_name); + }; + ++#define JANGA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) ++ ++static void aspeed_machine_janga_class_init(ObjectClass *oc, void *data) ++{ ++ MachineClass *mc = MACHINE_CLASS(oc); ++ AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); ++ ++ mc->desc = "Facebook Janga BMC (Cortex-A7)"; ++ amc->soc_name = "ast2600-a3"; ++ amc->hw_strap1 = JANGA_BMC_HW_STRAP1; ++ amc->hw_strap2 = JANGA_BMC_HW_STRAP2; ++ amc->fmc_model = "mx66l1g45g"; ++ amc->spi_model = "mx66l1g45g"; ++ amc->num_cs = 2; ++ amc->macs_mask = ASPEED_MAC3_ON; ++ amc->i2c_init = janga_bmc_i2c_init; ++ amc->uart_default = ASPEED_DEV_UART1; ++ mc->default_ram_size = JANGA_BMC_RAM_SIZE; ++ mc->default_cpus = mc->min_cpus = mc->max_cpus = ++ aspeed_soc_num_cpus(amc->soc_name); ++}; ++ + #define BLETCHLEY_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB) + + static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data) +@@ -1797,6 +1847,10 @@ static const TypeInfo aspeed_machine_types[] = { + .name = MACHINE_TYPE_NAME("montblanc-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_montblanc_class_init, ++ }, { ++ .name = MACHINE_TYPE_NAME("janga-bmc"), ++ .parent = TYPE_ASPEED_MACHINE, ++ .class_init = aspeed_machine_janga_class_init, + }, { + .name = MACHINE_TYPE_NAME("bletchley-bmc"), + .parent = TYPE_ASPEED_MACHINE, +diff --git a/hw/arm/aspeed_eeprom.c b/hw/arm/aspeed_eeprom.c +index 432bea62bf..1e8ad7f768 100644 +--- a/hw/arm/aspeed_eeprom.c ++++ b/hw/arm/aspeed_eeprom.c +@@ -207,6 +207,23 @@ const uint8_t montblanc_bmc_fruid[8192] = { + 0x54, 0x48, 0x13, 0x03, 0x42, 0x4d, 0x43, 0xfa, 0x02, 0xef, 0xba, + }; + ++const uint8_t janga_smb_fruid[] = { ++ 0xFB, 0xFB, 0x04, 0xFF, 0x01, 0x05, 0x4A, 0x41, 0x4E, 0x47, 0x41, 0x02, ++ 0x09, 0x32, 0x30, 0x2D, 0x31, 0x30, 0x30, 0x30, 0x31, 0x36, 0x03, 0x08, ++ 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x04, 0x0C, 0x31, 0x33, ++ 0x32, 0x31, 0x30, 0x30, 0x30, 0x30, 0x35, 0x20, 0x20, 0x20, 0x05, 0x0C, ++ 0x31, 0x33, 0x31, 0x31, 0x30, 0x30, 0x30, 0x30, 0x34, 0x20, 0x20, 0x20, ++ 0x06, 0x0C, 0x52, 0x34, 0x30, 0x35, 0x34, 0x47, 0x30, 0x30, 0x30, 0x32, ++ 0x30, 0x31, 0x07, 0x0D, 0x42, 0x30, 0x39, 0x31, 0x37, 0x32, 0x30, 0x34, ++ 0x35, 0x30, 0x30, 0x32, 0x33, 0x08, 0x01, 0x01, 0x09, 0x01, 0x01, 0x0A, ++ 0x01, 0x01, 0x0B, 0x08, 0x44, 0x55, 0x4D, 0x4D, 0x59, 0x20, 0x53, 0x4E, ++ 0x0C, 0x03, 0x43, 0x4C, 0x53, 0x0D, 0x08, 0x32, 0x30, 0x32, 0x33, 0x30, ++ 0x38, 0x32, 0x38, 0x0E, 0x03, 0x57, 0x55, 0x53, 0x0F, 0x03, 0x43, 0x54, ++ 0x48, 0x10, 0x06, 0x01, 0x12, 0xFF, 0x91, 0xDB, 0xB4, 0x11, 0x06, 0x03, ++ 0x12, 0xFF, 0x91, 0xDB, 0xB4, 0x12, 0x02, 0x65, 0x00, 0x13, 0x03, 0x53, ++ 0x4D, 0x42, 0xFA, 0x02, 0x93, 0xBC, ++}; ++ + const size_t tiogapass_bmc_fruid_len = sizeof(tiogapass_bmc_fruid); + const size_t fby35_nic_fruid_len = sizeof(fby35_nic_fruid); + const size_t fby35_bb_fruid_len = sizeof(fby35_bb_fruid); +@@ -217,3 +234,4 @@ const size_t rainier_bmc_fruid_len = sizeof(rainier_bmc_fruid); + const size_t montblanc_scm_fruid_len = sizeof(montblanc_scm_fruid); + const size_t montblanc_fcm_fruid_len = sizeof(montblanc_fcm_fruid); + const size_t montblanc_bmc_fruid_len = sizeof(montblanc_bmc_fruid); ++const size_t janga_smb_fruid_len = sizeof(janga_smb_fruid); +diff --git a/hw/arm/aspeed_eeprom.h b/hw/arm/aspeed_eeprom.h +index b8fbdd0734..6ac1557b32 100644 +--- a/hw/arm/aspeed_eeprom.h ++++ b/hw/arm/aspeed_eeprom.h +@@ -34,4 +34,7 @@ extern const size_t montblanc_scm_fruid_len; + extern const size_t montblanc_fcm_fruid_len; + extern const size_t montblanc_bmc_fruid_len; + ++extern const uint8_t janga_smb_fruid[]; ++extern const size_t janga_smb_fruid_len; ++ + #endif +-- +2.25.1 + diff --git a/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.c b/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.c index acd83da26f24..44a7c1950a7c 100644 --- a/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.c +++ b/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.c @@ -359,6 +359,30 @@ int i2c_dev_sysfs_data_init(struct i2c_client *client, } EXPORT_SYMBOL_GPL(i2c_dev_sysfs_data_init); +static void i2c_dev_sysfs_clean_cb(void *args) +{ + struct i2c_client *client = args; + i2c_dev_data_st *data = i2c_get_clientdata(client); + + i2c_dev_sysfs_data_clean(client, data); +} + +int devm_i2c_dev_sysfs_init(struct i2c_client *client, + i2c_dev_data_st *data, + const i2c_dev_attr_st *dev_attrs, + int n_attrs) +{ + int err; + + err = i2c_dev_sysfs_data_init(client, data, dev_attrs, n_attrs); + if (err) + return err; + + return devm_add_action_or_reset(&client->dev, i2c_dev_sysfs_clean_cb, + client); +} +EXPORT_SYMBOL_GPL(devm_i2c_dev_sysfs_init); + MODULE_AUTHOR("Tian Fang "); MODULE_DESCRIPTION("i2c device sysfs attribute library"); diff --git a/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.h b/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.h index 78f4b38d2879..a38e00b875a3 100644 --- a/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.h +++ b/common/recipes-kernel/i2c-dev-sysfs-mod/files/i2c_dev_sysfs.h @@ -82,4 +82,13 @@ ssize_t i2c_dev_show_ascii(struct device *dev, struct device_attribute *attr, char *buf); +/* + * "devres" version of i2c_dev_sysfs_data_init(): i2c_dev_sysfs_data_clean() + * will be automatically called when the driver is detached from device. + */ +int devm_i2c_dev_sysfs_init(struct i2c_client *client, + i2c_dev_data_st *data, + const i2c_dev_attr_st *dev_attrs, + int n_attrs); + #endif diff --git a/common/recipes-kernel/linux/6.6/0001-ARM-dts-aspeed-Remove-eMMC-from-ast2600-facebook-net.patch b/common/recipes-kernel/linux/6.6/0001-ARM-dts-aspeed-Remove-eMMC-from-ast2600-facebook-net.patch new file mode 100644 index 000000000000..7cd9e584efa5 --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0001-ARM-dts-aspeed-Remove-eMMC-from-ast2600-facebook-net.patch @@ -0,0 +1,43 @@ +From d34a1a64d55eddea50c5e29d42d158921277f695 Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Fri, 2 Feb 2024 16:55:06 -0800 +Subject: [PATCH 1/5] ARM: dts: aspeed: Remove eMMC from + ast2600-facebook-netbmc-common.dtsi + +Summary: + +Remove eMMC device entries from ast2600-facebook-netbmc-common.dtsi +because eMMC will be removed from future Meta/Facebook AST2600 network +OpenBMC platforms. + +Test Plan: +--- + .../dts/aspeed/ast2600-facebook-netbmc-common.dtsi | 12 ------------ + 1 file changed, 12 deletions(-) + +diff --git a/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi b/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi +index 31590d3186a2..804a6c8a6292 100644 +--- a/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi ++++ b/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi +@@ -152,18 +152,6 @@ &vhub { + status = "okay"; + }; + +-&emmc_controller { +- status = "okay"; +-}; +- +-&emmc { +- status = "okay"; +- +- non-removable; +- max-frequency = <25000000>; +- bus-width = <4>; +-}; +- + &rtc { + status = "okay"; + }; +-- +2.43.0 + diff --git a/common/recipes-kernel/linux/6.6/0002-ARM-dts-aspeed-elbert-Enable-eMMC-device.patch b/common/recipes-kernel/linux/6.6/0002-ARM-dts-aspeed-elbert-Enable-eMMC-device.patch new file mode 100644 index 000000000000..2011d03c992d --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0002-ARM-dts-aspeed-elbert-Enable-eMMC-device.patch @@ -0,0 +1,35 @@ +From 667a37fea390e438ace088cb40d806071ff0f5a2 Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Fri, 2 Feb 2024 16:57:17 -0800 +Subject: [PATCH 2/5] ARM: dts: aspeed: elbert: Enable eMMC device + +Summary: + +Test Plan: +--- + .../boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts +index 74f3c67e0eff..ff1009ea1c49 100644 +--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts ++++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-elbert.dts +@@ -201,3 +201,15 @@ fixed-link { + full-duplex; + }; + }; ++ ++&emmc_controller { ++ status = "okay"; ++}; ++ ++&emmc { ++ status = "okay"; ++ ++ non-removable; ++ max-frequency = <25000000>; ++ bus-width = <4>; ++}; +-- +2.43.0 + diff --git a/common/recipes-kernel/linux/6.6/0003-ARM-dts-aspeed-fuji-Enable-eMMC-device.patch b/common/recipes-kernel/linux/6.6/0003-ARM-dts-aspeed-fuji-Enable-eMMC-device.patch new file mode 100644 index 000000000000..7c1d40bda27b --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0003-ARM-dts-aspeed-fuji-Enable-eMMC-device.patch @@ -0,0 +1,43 @@ +From 6c50b36cc5400dfe283ec400d6197c30e689878a Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Fri, 2 Feb 2024 16:58:06 -0800 +Subject: [PATCH 3/5] ARM: dts: aspeed: fuji: Enable eMMC device + +Summary: + +Test Plan: + +Reviewers: + +Subscribers: + +Tasks: + +Tags: +--- + .../arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts +index f23c26a3441d..8602ede3ec7e 100644 +--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts ++++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fuji.dts +@@ -1249,3 +1249,15 @@ &mac3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii4_default>; + }; ++ ++&emmc_controller { ++ status = "okay"; ++}; ++ ++&emmc { ++ status = "okay"; ++ ++ non-removable; ++ max-frequency = <25000000>; ++ bus-width = <4>; ++}; +-- +2.43.0 + diff --git a/common/recipes-kernel/linux/6.6/0004-ARM-dts-aspeed-remove-cloudripper-dts.patch b/common/recipes-kernel/linux/6.6/0004-ARM-dts-aspeed-remove-cloudripper-dts.patch new file mode 100644 index 000000000000..8bdc5186c57d --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0004-ARM-dts-aspeed-remove-cloudripper-dts.patch @@ -0,0 +1,581 @@ +From 37017972a16f86ab8a869beca978a5ba85fd047f Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Sun, 4 Feb 2024 14:11:21 -0800 +Subject: [PATCH 4/5] ARM: dts: aspeed: remove cloudripper dts + +Summary: + +The dts file is not being used. + +Test Plan: +--- + arch/arm/boot/dts/aspeed/Makefile | 1 - + .../aspeed-bmc-facebook-cloudripper.dts | 544 ------------------ + 2 files changed, 545 deletions(-) + delete mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts + +diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile +index fb9cc95f1b60..99980bdb2f16 100644 +--- a/arch/arm/boot/dts/aspeed/Makefile ++++ b/arch/arm/boot/dts/aspeed/Makefile +@@ -16,7 +16,6 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-bmc-bytedance-g220a.dtb \ + aspeed-bmc-delta-ahe50dc.dtb \ + aspeed-bmc-facebook-bletchley.dtb \ +- aspeed-bmc-facebook-cloudripper.dtb \ + aspeed-bmc-facebook-cmm.dtb \ + aspeed-bmc-facebook-elbert.dtb \ + aspeed-bmc-facebook-fuji.dtb \ +diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts +deleted file mode 100644 +index d49328fa487a..000000000000 +--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-cloudripper.dts ++++ /dev/null +@@ -1,544 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0+ +-// Copyright (c) 2020 Facebook Inc. +- +-/dts-v1/; +- +-#include +-#include "ast2600-facebook-netbmc-common.dtsi" +- +-/ { +- model = "Facebook Cloudripper BMC"; +- compatible = "facebook,cloudripper-bmc", "aspeed,ast2600"; +- +- aliases { +- /* +- * PCA9548 (1-0070) provides 8 channels connecting to +- * SMB (Switch Main Board). +- */ +- i2c16 = &imux16; +- i2c17 = &imux17; +- i2c18 = &imux18; +- i2c19 = &imux19; +- i2c20 = &imux20; +- i2c21 = &imux21; +- i2c22 = &imux22; +- i2c23 = &imux23; +- +- /* +- * PCA9548 (2-0070) provides 8 channels connecting to +- * SCM (System Controller Module). +- */ +- i2c24 = &imux24; +- i2c25 = &imux25; +- i2c26 = &imux26; +- i2c27 = &imux27; +- i2c28 = &imux28; +- i2c29 = &imux29; +- i2c30 = &imux30; +- i2c31 = &imux31; +- +- /* +- * PCA9548 (3-0070) provides 8 channels connecting to +- * SMB (Switch Main Board). +- */ +- i2c32 = &imux32; +- i2c33 = &imux33; +- i2c34 = &imux34; +- i2c35 = &imux35; +- i2c36 = &imux36; +- i2c37 = &imux37; +- i2c38 = &imux38; +- i2c39 = &imux39; +- +- /* +- * PCA9548 (8-0070) provides 8 channels connecting to +- * PDB (Power Delivery Board). +- */ +- i2c40 = &imux40; +- i2c41 = &imux41; +- i2c42 = &imux42; +- i2c43 = &imux43; +- i2c44 = &imux44; +- i2c45 = &imux45; +- i2c46 = &imux46; +- i2c47 = &imux47; +- +- /* +- * PCA9548 (15-0076) provides 8 channels connecting to +- * FCM (Fan Controller Module). +- */ +- i2c48 = &imux48; +- i2c49 = &imux49; +- i2c50 = &imux50; +- i2c51 = &imux51; +- i2c52 = &imux52; +- i2c53 = &imux53; +- i2c54 = &imux54; +- i2c55 = &imux55; +- }; +- +- spi_gpio: spi { +- num-chipselects = <2>; +- cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>, +- <&gpio0 ASPEED_GPIO(X, 1) GPIO_ACTIVE_HIGH>; +- +- eeprom@1 { +- compatible = "atmel,at93c46d"; +- spi-max-frequency = <250000>; +- data-size = <16>; +- spi-cs-high; +- reg = <1>; +- }; +- }; +-}; +- +-&ehci1 { +- status = "okay"; +-}; +- +-/* +- * "mdio1" is connected to the MDC/MDIO interface of the on-board +- * management switch (whose ports are connected to BMC, Host and front +- * panel ethernet port). +- */ +-&mdio1 { +- status = "okay"; +-}; +- +-&mdio3 { +- status = "okay"; +- +- ethphy1: ethernet-phy@13 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0x0d>; +- }; +-}; +- +-&mac3 { +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <ðphy1>; +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_rgmii4_default>; +-}; +- +-&i2c0 { +- multi-master; +- bus-frequency = <1000000>; +-}; +- +-&i2c1 { +- /* +- * PCA9548 (1-0070) provides 8 channels connecting to SMB (Switch +- * Main Board). +- */ +- i2c-mux@70 { +- compatible = "nxp,pca9548"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0x70>; +- i2c-mux-idle-disconnect; +- +- imux16: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- }; +- +- imux17: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- }; +- +- imux18: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- }; +- +- imux19: i2c@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- }; +- +- imux20: i2c@4 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <4>; +- }; +- +- imux21: i2c@5 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <5>; +- }; +- +- imux22: i2c@6 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <6>; +- }; +- +- imux23: i2c@7 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <7>; +- }; +- }; +-}; +- +-&i2c2 { +- /* +- * PCA9548 (2-0070) provides 8 channels connecting to SCM (System +- * Controller Module). +- */ +- i2c-mux@70 { +- compatible = "nxp,pca9548"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0x70>; +- i2c-mux-idle-disconnect; +- +- imux24: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- }; +- +- imux25: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- }; +- +- imux26: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- }; +- +- imux27: i2c@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- }; +- +- imux28: i2c@4 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <4>; +- }; +- +- imux29: i2c@5 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <5>; +- }; +- +- imux30: i2c@6 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <6>; +- }; +- +- imux31: i2c@7 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <7>; +- }; +- }; +-}; +- +-&i2c3 { +- /* +- * PCA9548 (3-0070) provides 8 channels connecting to SMB (Switch +- * Main Board). +- */ +- i2c-mux@70 { +- compatible = "nxp,pca9548"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0x70>; +- i2c-mux-idle-disconnect; +- +- imux32: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- }; +- +- imux33: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- }; +- +- imux34: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- }; +- +- imux35: i2c@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- }; +- +- imux36: i2c@4 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <4>; +- }; +- +- imux37: i2c@5 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <5>; +- }; +- +- imux38: i2c@6 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <6>; +- }; +- +- imux39: i2c@7 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <7>; +- }; +- }; +-}; +- +-&i2c6 { +- lp5012@14 { +- compatible = "ti,lp5012"; +- reg = <0x14>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- multi-led@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- color = ; +- function = LED_FUNCTION_ACTIVITY; +- label = "sys"; +- +- led@0 { +- reg = <0>; +- color = ; +- }; +- +- led@1 { +- reg = <1>; +- color = ; +- }; +- +- led@2 { +- reg = <2>; +- color = ; +- }; +- }; +- +- multi-led@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- color = ; +- function = LED_FUNCTION_ACTIVITY; +- label = "fan"; +- +- led@0 { +- reg = <0>; +- color = ; +- }; +- +- led@1 { +- reg = <1>; +- color = ; +- }; +- +- led@2 { +- reg = <2>; +- color = ; +- }; +- }; +- +- multi-led@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- color = ; +- function = LED_FUNCTION_ACTIVITY; +- label = "psu"; +- +- led@0 { +- reg = <0>; +- color = ; +- }; +- +- led@1 { +- reg = <1>; +- color = ; +- }; +- +- led@2 { +- reg = <2>; +- color = ; +- }; +- }; +- +- multi-led@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- color = ; +- function = LED_FUNCTION_ACTIVITY; +- label = "scm"; +- +- led@0 { +- reg = <0>; +- color = ; +- }; +- +- led@1 { +- reg = <1>; +- color = ; +- }; +- +- led@2 { +- reg = <2>; +- color = ; +- }; +- }; +- }; +-}; +- +-&i2c8 { +- /* +- * PCA9548 (8-0070) provides 8 channels connecting to PDB (Power +- * Delivery Board). +- */ +- i2c-mux@70 { +- compatible = "nxp,pca9548"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0x70>; +- i2c-mux-idle-disconnect; +- +- imux40: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- }; +- +- imux41: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- }; +- +- imux42: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- }; +- +- imux43: i2c@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- }; +- +- imux44: i2c@4 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <4>; +- }; +- +- imux45: i2c@5 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <5>; +- }; +- +- imux46: i2c@6 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <6>; +- }; +- +- imux47: i2c@7 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <7>; +- }; +- +- }; +-}; +- +-&i2c15 { +- /* +- * PCA9548 (15-0076) provides 8 channels connecting to FCM (Fan +- * Controller Module). +- */ +- i2c-mux@76 { +- compatible = "nxp,pca9548"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0x76>; +- i2c-mux-idle-disconnect; +- +- imux48: i2c@0 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <0>; +- }; +- +- imux49: i2c@1 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <1>; +- }; +- +- imux50: i2c@2 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <2>; +- }; +- +- imux51: i2c@3 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <3>; +- }; +- +- imux52: i2c@4 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <4>; +- }; +- +- imux53: i2c@5 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <5>; +- }; +- +- imux54: i2c@6 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <6>; +- }; +- +- imux55: i2c@7 { +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <7>; +- }; +- }; +-}; +-- +2.43.0 + diff --git a/meta-facebook/meta-janga/recipes-kernel/linux/patches_6.6/1001-ARM-dts-aspeed-Add-Facebook-janga-BMC.patch b/common/recipes-kernel/linux/6.6/0005-ARM-dts-aspeed-Add-Facebook-fblite-r1-BMC.patch similarity index 64% rename from meta-facebook/meta-janga/recipes-kernel/linux/patches_6.6/1001-ARM-dts-aspeed-Add-Facebook-janga-BMC.patch rename to common/recipes-kernel/linux/6.6/0005-ARM-dts-aspeed-Add-Facebook-fblite-r1-BMC.patch index bd5c4d6c2b94..166d0c1c4bf4 100644 --- a/meta-facebook/meta-janga/recipes-kernel/linux/patches_6.6/1001-ARM-dts-aspeed-Add-Facebook-janga-BMC.patch +++ b/common/recipes-kernel/linux/6.6/0005-ARM-dts-aspeed-Add-Facebook-fblite-r1-BMC.patch @@ -1,32 +1,37 @@ -From 1f14671e9b834a64fb5751e908c21b6f4883d132 Mon Sep 17 00:00:00 2001 +From 1b159f19f4adffa8e92051d1b0028cc68a102f0c Mon Sep 17 00:00:00 2001 From: Tao Ren -Date: Fri, 22 Dec 2023 16:30:26 +0000 -Subject: [PATCH] janga dts +Date: Mon, 5 Feb 2024 15:28:46 -0800 +Subject: [PATCH 5/5] ARM: dts: aspeed: Add Facebook fblite-r1 BMC +Summary: + +This is the Facebook FBOSS BMC-Lite Rev1 OpenBMC. + +Test Plan: --- arch/arm/boot/dts/aspeed/Makefile | 1 + - .../dts/aspeed/aspeed-bmc-facebook-janga.dts | 96 +++++++++++++++++++ - 2 files changed, 97 insertions(+) - create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-janga.dts + .../aspeed/aspeed-bmc-facebook-fblite-r1.dts | 94 +++++++++++++++++++ + 2 files changed, 95 insertions(+) + create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile -index fb9cc95f1b60..9b508b14aec3 100644 +index 99980bdb2f16..87c97ab9426e 100644 --- a/arch/arm/boot/dts/aspeed/Makefile +++ b/arch/arm/boot/dts/aspeed/Makefile -@@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ +@@ -18,6 +18,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ + aspeed-bmc-facebook-bletchley.dtb \ + aspeed-bmc-facebook-cmm.dtb \ + aspeed-bmc-facebook-elbert.dtb \ ++ aspeed-bmc-facebook-fblite-r1.dtb \ aspeed-bmc-facebook-fuji.dtb \ aspeed-bmc-facebook-galaxy100.dtb \ aspeed-bmc-facebook-greatlakes.dtb \ -+ aspeed-bmc-facebook-janga.dtb \ - aspeed-bmc-facebook-minerva-cmc.dtb \ - aspeed-bmc-facebook-minipack.dtb \ - aspeed-bmc-facebook-tiogapass.dtb \ -diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-janga.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-janga.dts +diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts new file mode 100644 -index 000000000000..330e41fef5d6 +index 000000000000..4264bd3c7a6b --- /dev/null -+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-janga.dts -@@ -0,0 +1,96 @@ ++++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts +@@ -0,0 +1,94 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (c) Meta Platforms, Inc. and affiliates. + @@ -35,8 +40,8 @@ index 000000000000..330e41fef5d6 +#include "ast2600-facebook-netbmc-common.dtsi" + +/ { -+ model = "Facebook janga BMC"; -+ compatible = "facebook,janga-bmc", "aspeed,ast2600"; ++ model = "Facebook FBOSS-Lite R1 BMC"; ++ compatible = "facebook,fblite-r1-bmc", "aspeed,ast2600"; + + chosen { + stdout-path = &uart1; @@ -48,28 +53,8 @@ index 000000000000..330e41fef5d6 + }; +}; + -+&peci0 { -+ status = "okay"; -+ -+ peci-client@30 { -+ compatible = "intel,peci-client"; -+ reg = <0x30>; -+ }; -+}; -+ -+&mdio1 { -+ status = "okay"; -+}; -+ -+&mac3 { ++&i2c11 { + status = "okay"; -+ phy-mode = "rgmii"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_rgmii4_default>; -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; +}; + +&lpc_ctrl { @@ -92,17 +77,35 @@ index 000000000000..330e41fef5d6 + aspeed,lpc-io-reg = <0xca2>; +}; + -+/* JTAG1 will be use for COMe FPGA upgrading */ -+&jtag1 { ++&peci0 { ++ status = "okay"; ++ ++ peci-client@30 { ++ compatible = "intel,peci-client"; ++ reg = <0x30>; ++ }; ++}; ++ ++&mdio1 { ++ status = "okay"; ++}; ++ ++&mac3 { + status = "okay"; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_rgmii4_default>; ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; +}; + -+/* SPI1 will be use for BIOS, IOB_FPGA flash upgrading */ +&spi1 { + status = "okay"; + + reg = < 0x1e630000 0xc4 -+ 0x30000000 0x2000000 >; ++ 0x30000000 0x2000000 >; + + flash@0 { + status = "okay"; @@ -118,7 +121,7 @@ index 000000000000..330e41fef5d6 + + flash1@0 { + reg = <0x0 0x2000000>; -+ label = "spi-flash"; ++ label = "host-flash"; + }; + }; + }; diff --git a/common/recipes-kernel/linux/6.6/0100-jffs2-kill-garbage-collect-thread-when-filesystem-is.patch b/common/recipes-kernel/linux/6.6/0100-jffs2-kill-garbage-collect-thread-when-filesystem-is.patch index 3947ef896e34..d0370753f78f 100644 --- a/common/recipes-kernel/linux/6.6/0100-jffs2-kill-garbage-collect-thread-when-filesystem-is.patch +++ b/common/recipes-kernel/linux/6.6/0100-jffs2-kill-garbage-collect-thread-when-filesystem-is.patch @@ -1,7 +1,7 @@ -From b79072a654b42c1b357cf2bccc78548bcf7cfc5f Mon Sep 17 00:00:00 2001 +From eb3b12891ebd081343018b5c86568c0842cd4e45 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Thu, 22 Aug 2019 17:07:24 -0700 -Subject: [PATCH 100/101] jffs2: kill garbage collect thread when filesystem is +Subject: [PATCH 100/102] jffs2: kill garbage collect thread when filesystem is corrupted Summary: @@ -57,5 +57,5 @@ index 5c6602f3c189..b92edbf6ede2 100644 case INO_STATE_READING: /* Someone's currently trying to read it. We must wait for -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0101-jffs2-suppress-jffs2-messages-when-reading-inode.patch b/common/recipes-kernel/linux/6.6/0101-jffs2-suppress-jffs2-messages-when-reading-inode.patch index b19de1316cbb..fd15d58c8abb 100644 --- a/common/recipes-kernel/linux/6.6/0101-jffs2-suppress-jffs2-messages-when-reading-inode.patch +++ b/common/recipes-kernel/linux/6.6/0101-jffs2-suppress-jffs2-messages-when-reading-inode.patch @@ -1,7 +1,7 @@ -From 6bc994b68ec0c661d934c9d6442d91cb2089f938 Mon Sep 17 00:00:00 2001 +From d9818ea75048538194765923101fefc235273e63 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Thu, 26 Sep 2019 16:03:16 -0700 -Subject: [PATCH 101/101] jffs2: suppress jffs2 messages when reading inode +Subject: [PATCH 101/102] jffs2: suppress jffs2 messages when reading inode Summary: @@ -84,5 +84,5 @@ index 03b4f99614be..4766072f2e34 100644 f->inocache->ino, rii->highest_version, rii->latest_mctime, rii->mctime_ver); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0102-drivers-misc-Add-Aspeed-OTP-control-register.patch b/common/recipes-kernel/linux/6.6/0102-drivers-misc-Add-Aspeed-OTP-control-register.patch index 3af3b39467ef..39a8284eb78a 100644 --- a/common/recipes-kernel/linux/6.6/0102-drivers-misc-Add-Aspeed-OTP-control-register.patch +++ b/common/recipes-kernel/linux/6.6/0102-drivers-misc-Add-Aspeed-OTP-control-register.patch @@ -1,7 +1,7 @@ -From 5f1b73a25de64c62fffd0c46dba3d6caeb237557 Mon Sep 17 00:00:00 2001 +From bf4bb6191afd8f2f8393b98805dc4e41b659c700 Mon Sep 17 00:00:00 2001 From: Johnny Huang Date: Mon, 26 Dec 2022 10:04:48 +0800 -Subject: [PATCH 1/1] drivers/misc: Add Aspeed OTP control register +Subject: [PATCH 102/102] drivers/misc: Add Aspeed OTP control register AST2600 built-in 64Kbit one time programmable (OTP) memory for configuration, strap, key storage, patch and user data. Each memory @@ -20,7 +20,7 @@ Change-Id: Ic2e8c2bf829dbde4d4e437c97edcc0a4591bcb46 create mode 100644 include/uapi/linux/aspeed-otp.h diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi -index c4d1faade8be3..3b072e36d50dc 100644 +index c4d1faade8be..3b072e36d50d 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -892,6 +892,12 @@ udma: dma-controller@1e79e000 { @@ -37,7 +37,7 @@ index c4d1faade8be3..3b072e36d50dc 100644 }; }; diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig -index aaf4596ae4f94..bdea4b0a687b4 100644 +index aaf4596ae4f9..bdea4b0a687b 100644 --- a/drivers/soc/aspeed/Kconfig +++ b/drivers/soc/aspeed/Kconfig @@ -69,6 +69,10 @@ config ASPEED_SBC @@ -52,7 +52,7 @@ index aaf4596ae4f94..bdea4b0a687b4 100644 endif diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile -index 5f61bb4cc36cf..224127a1dd55e 100644 +index 5f61bb4cc36c..224127a1dd55 100644 --- a/drivers/soc/aspeed/Makefile +++ b/drivers/soc/aspeed/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o @@ -62,7 +62,7 @@ index 5f61bb4cc36cf..224127a1dd55e 100644 +obj-$(CONFIG_ASPEED_OTP) += aspeed-otp.o diff --git a/drivers/soc/aspeed/aspeed-otp.c b/drivers/soc/aspeed/aspeed-otp.c new file mode 100644 -index 0000000000000..38b3890e5ad06 +index 000000000000..38b3890e5ad0 --- /dev/null +++ b/drivers/soc/aspeed/aspeed-otp.c @@ -0,0 +1,639 @@ @@ -708,7 +708,7 @@ index 0000000000000..38b3890e5ad06 \ No newline at end of file diff --git a/include/uapi/linux/aspeed-otp.h b/include/uapi/linux/aspeed-otp.h new file mode 100644 -index 0000000000000..3293555c312c6 +index 000000000000..3293555c312c --- /dev/null +++ b/include/uapi/linux/aspeed-otp.h @@ -0,0 +1,39 @@ @@ -753,5 +753,5 @@ index 0000000000000..3293555c312c6 +#endif /* _UAPI_LINUX_ASPEED_JTAG_H */ \ No newline at end of file -- -2.31.1 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0120-drivers-jtag-Add-JTAG-core-driver.patch b/common/recipes-kernel/linux/6.6/0120-drivers-jtag-Add-JTAG-core-driver.patch index f7e3d8c219d8..6d723367cc21 100644 --- a/common/recipes-kernel/linux/6.6/0120-drivers-jtag-Add-JTAG-core-driver.patch +++ b/common/recipes-kernel/linux/6.6/0120-drivers-jtag-Add-JTAG-core-driver.patch @@ -1,4 +1,4 @@ -From 70ee150925d13e3f3ba56dd663c166053379fda1 Mon Sep 17 00:00:00 2001 +From 1aad2b3ab7fc90d2e4d697b54ed5b4adbff930a1 Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:15 -0700 Subject: [PATCH 120/132] drivers: jtag: Add JTAG core driver @@ -664,5 +664,5 @@ index 000000000000..3f9e1953f5a4 + +#endif /* __UAPI_LINUX_JTAG_H */ -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0121-dt-binding-jtag-Aspeed-2400-and-2500-series.patch b/common/recipes-kernel/linux/6.6/0121-dt-binding-jtag-Aspeed-2400-and-2500-series.patch index 22938231d0af..aa805656c8bb 100644 --- a/common/recipes-kernel/linux/6.6/0121-dt-binding-jtag-Aspeed-2400-and-2500-series.patch +++ b/common/recipes-kernel/linux/6.6/0121-dt-binding-jtag-Aspeed-2400-and-2500-series.patch @@ -1,4 +1,4 @@ -From 7c1c0c865c1b6fd43fe60b02dc77c40649b86a7d Mon Sep 17 00:00:00 2001 +From 8f3db294b29a931d5ac795eb80dc7c787c8742a7 Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:16 -0700 Subject: [PATCH 121/132] dt-binding: jtag: Aspeed 2400 and 2500 series @@ -113,5 +113,5 @@ index 000000000000..3db49b70db45 + +... -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0122-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG-master-dr.patch b/common/recipes-kernel/linux/6.6/0122-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG-master-dr.patch index c5f0561f6f97..11689df79880 100644 --- a/common/recipes-kernel/linux/6.6/0122-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG-master-dr.patch +++ b/common/recipes-kernel/linux/6.6/0122-Add-Aspeed-SoC-24xx-and-25xx-families-JTAG-master-dr.patch @@ -1,4 +1,4 @@ -From 8331a9c91172d33854fdd0ada2436f8053c93648 Mon Sep 17 00:00:00 2001 +From 4188e9297f3a0e59a6b88d2072474a17dbf1372a Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:17 -0700 Subject: [PATCH 122/132] Add Aspeed SoC 24xx and 25xx families JTAG master @@ -1114,5 +1114,5 @@ index 000000000000..254548762dc5 +MODULE_DESCRIPTION("ASPEED JTAG driver"); +MODULE_LICENSE("GPL v2"); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0123-jtag-aspeed-support-sysfs-interface.patch b/common/recipes-kernel/linux/6.6/0123-jtag-aspeed-support-sysfs-interface.patch index 9cb31b22ee47..27298238b83b 100644 --- a/common/recipes-kernel/linux/6.6/0123-jtag-aspeed-support-sysfs-interface.patch +++ b/common/recipes-kernel/linux/6.6/0123-jtag-aspeed-support-sysfs-interface.patch @@ -1,4 +1,4 @@ -From 56d0a5f04201d6aabeb27bb4343e785b267cec2d Mon Sep 17 00:00:00 2001 +From 1d9a5bfd6287d43fd006846817c4a02417474403 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Tue, 14 Jul 2020 22:18:35 -0700 Subject: [PATCH 123/132] jtag: aspeed: support sysfs interface @@ -205,5 +205,5 @@ index 254548762dc5..0a30413efb93 100644 err_jtag_register: -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0124-jtag-support-driver-specific-ioctl-commands.patch b/common/recipes-kernel/linux/6.6/0124-jtag-support-driver-specific-ioctl-commands.patch index 21ed448bc93f..f6c0466b3296 100644 --- a/common/recipes-kernel/linux/6.6/0124-jtag-support-driver-specific-ioctl-commands.patch +++ b/common/recipes-kernel/linux/6.6/0124-jtag-support-driver-specific-ioctl-commands.patch @@ -1,4 +1,4 @@ -From dad10af84068e248bf4aab267707b5ab40f70f96 Mon Sep 17 00:00:00 2001 +From 18575605eeeb0706a621a5bbaa4bb37479002dd0 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Tue, 14 Jul 2020 22:59:49 -0700 Subject: [PATCH 124/132] jtag: support driver specific ioctl commands @@ -55,5 +55,5 @@ index 4153c905e550..6a6b53a549d8 100644 void *jtag_priv(struct jtag *jtag); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0125-jtag-aspeed-support-JTAG_RUN_CYCLE-ioctl-command.patch b/common/recipes-kernel/linux/6.6/0125-jtag-aspeed-support-JTAG_RUN_CYCLE-ioctl-command.patch index 9b7e128280bb..c50937266016 100644 --- a/common/recipes-kernel/linux/6.6/0125-jtag-aspeed-support-JTAG_RUN_CYCLE-ioctl-command.patch +++ b/common/recipes-kernel/linux/6.6/0125-jtag-aspeed-support-JTAG_RUN_CYCLE-ioctl-command.patch @@ -1,4 +1,4 @@ -From 18881d69a3b5de3935fb778a96e4b6395daa8415 Mon Sep 17 00:00:00 2001 +From 44c6e3d95fb18de4a83937e1b6982de0125968eb Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Tue, 14 Jul 2020 23:25:29 -0700 Subject: [PATCH 125/132] jtag: aspeed: support JTAG_RUN_CYCLE ioctl command @@ -111,5 +111,5 @@ index 0a30413efb93..2d4a631ca4ac 100644 static int aspeed_jtag_probe(struct platform_device *pdev) -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0126-jtag-aspeed-add-AST2600-support.patch b/common/recipes-kernel/linux/6.6/0126-jtag-aspeed-add-AST2600-support.patch index 23cabcbd19b7..92c3271e1285 100644 --- a/common/recipes-kernel/linux/6.6/0126-jtag-aspeed-add-AST2600-support.patch +++ b/common/recipes-kernel/linux/6.6/0126-jtag-aspeed-add-AST2600-support.patch @@ -1,4 +1,4 @@ -From 9c27719c9245bf1cff79f6a00278620271ac5dec Mon Sep 17 00:00:00 2001 +From ca889846f4e5e7dcddaf55fb50eba506d9bf2df5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joan=20Olguy=20Can=C3=A9us?= Date: Wed, 12 Aug 2020 18:01:39 -0700 Subject: [PATCH 126/132] jtag: aspeed: add AST2600 support @@ -154,5 +154,5 @@ index 2d4a631ca4ac..e0a46fd12bca 100644 }; -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0127-Documentation-jtag-Add-ABI-documentation.patch b/common/recipes-kernel/linux/6.6/0127-Documentation-jtag-Add-ABI-documentation.patch index 3e370735bd25..467b6ca90764 100644 --- a/common/recipes-kernel/linux/6.6/0127-Documentation-jtag-Add-ABI-documentation.patch +++ b/common/recipes-kernel/linux/6.6/0127-Documentation-jtag-Add-ABI-documentation.patch @@ -1,4 +1,4 @@ -From 5aaa953a65999a9ef46197c7365f6d17188256d1 Mon Sep 17 00:00:00 2001 +From 8648d96d729e914fe11237c267c1c78e604d45a5 Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:18 -0700 Subject: [PATCH 127/132] Documentation: jtag: Add ABI documentation @@ -345,5 +345,5 @@ index 000000000000..445f0b9c5b4d +- Steven Filary +- Vadim Pasternak -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0128-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch b/common/recipes-kernel/linux/6.6/0128-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch index 7c64d1092234..cf9130069c19 100644 --- a/common/recipes-kernel/linux/6.6/0128-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch +++ b/common/recipes-kernel/linux/6.6/0128-Documentation-jtag-Add-JTAG-core-driver-ioctl-number.patch @@ -1,4 +1,4 @@ -From 74513aec6b23e68687bfbbd068a285b8524380e9 Mon Sep 17 00:00:00 2001 +From 590799e77f23136909af101dff799c20a7cb72ea Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:19 -0700 Subject: [PATCH 128/132] Documentation jtag: Add JTAG core driver ioctl number @@ -69,5 +69,5 @@ index 4ea5b837399a..ac1ccb7936f7 100644 0xB4 00-0F linux/gpio.h 0xB5 00-0F uapi/linux/rpmsg.h -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0129-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch b/common/recipes-kernel/linux/6.6/0129-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch index 21a9e3c9f541..6134398ed4e7 100644 --- a/common/recipes-kernel/linux/6.6/0129-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch +++ b/common/recipes-kernel/linux/6.6/0129-drivers-jtag-Add-JTAG-core-driver-Maintainers.patch @@ -1,4 +1,4 @@ -From 382d17e6e624deca3a512fc05ba2f13bc1365ad6 Mon Sep 17 00:00:00 2001 +From aa8661f29c2fd5237f665e242d4577266834f6bd Mon Sep 17 00:00:00 2001 From: Ernesto Corona Date: Mon, 13 Apr 2020 15:29:20 -0700 Subject: [PATCH 129/132] drivers: jtag: Add JTAG core driver Maintainers @@ -36,10 +36,10 @@ Test Plan: booted up linux 5.15 on cmm and elbert successfully. 1 file changed, 11 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS -index f9cc9f25799f..d9ba580fd4ba 100644 +index 5c77a1ed22bb..2955ed8af791 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -11195,6 +11195,17 @@ L: linux-serial@vger.kernel.org +@@ -11299,6 +11299,17 @@ L: linux-serial@vger.kernel.org S: Orphan F: drivers/tty/serial/jsm/ @@ -58,5 +58,5 @@ index f9cc9f25799f..d9ba580fd4ba 100644 M: Clemens Ladisch L: linux-hwmon@vger.kernel.org -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0130-fixup-jtag-patch-series.patch b/common/recipes-kernel/linux/6.6/0130-fixup-jtag-patch-series.patch index 49a57a95be48..c5f205af1f06 100644 --- a/common/recipes-kernel/linux/6.6/0130-fixup-jtag-patch-series.patch +++ b/common/recipes-kernel/linux/6.6/0130-fixup-jtag-patch-series.patch @@ -1,4 +1,4 @@ -From a600746aec8b93e2148dc5c8fa81e62e6bbfde67 Mon Sep 17 00:00:00 2001 +From 1fbe608b018636a0ed6e949fe417d3a2ea39fa00 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Thu, 13 Oct 2022 03:38:28 -0700 Subject: [PATCH 130/132] fixup jtag patch series @@ -11,7 +11,7 @@ merge conflicts in future upgrade. 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/Kconfig b/drivers/Kconfig -index 514ae6b24cb2..9fe8fde35000 100644 +index efb66e25fa2d..32aa22e6a892 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -3,6 +3,8 @@ menu "Device Drivers" @@ -32,10 +32,10 @@ index 514ae6b24cb2..9fe8fde35000 100644 source "drivers/bus/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile -index 7241d80a7b29..3c3527a6b818 100644 +index 1bec7819a837..a6a59edb6f35 100644 --- a/drivers/Makefile +++ b/drivers/Makefile -@@ -14,6 +14,8 @@ endif +@@ -15,6 +15,8 @@ obj-y += cache/ obj-y += irqchip/ obj-y += bus/ @@ -45,5 +45,5 @@ index 7241d80a7b29..3c3527a6b818 100644 # GPIO must come after pinctrl as gpios may need to mux pins etc -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0131-ARM-dts-aspeed-g6-add-jtag-controllers.patch b/common/recipes-kernel/linux/6.6/0131-ARM-dts-aspeed-g6-add-jtag-controllers.patch index abc63331dc82..c08417399503 100644 --- a/common/recipes-kernel/linux/6.6/0131-ARM-dts-aspeed-g6-add-jtag-controllers.patch +++ b/common/recipes-kernel/linux/6.6/0131-ARM-dts-aspeed-g6-add-jtag-controllers.patch @@ -1,4 +1,4 @@ -From ef4d8f57227841437689e9924c563198e0e64e22 Mon Sep 17 00:00:00 2001 +From 2bcc91392a2ccd7df1d5d15f2ade2b6c8a365894 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Thu, 8 Apr 2021 15:26:15 -0700 Subject: [PATCH 131/132] ARM: dts: aspeed-g6: add jtag controllers @@ -27,7 +27,7 @@ Signature: 27663040:1617989954:ef64ea4d7a805b0eb4967b7167589aa8afc5562c 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi -index c4d1faade8be..6a5a058f128b 100644 +index 3b072e36d50d..01c0a7936132 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -398,6 +398,26 @@ gfx: display@1e6e6000 { @@ -58,5 +58,5 @@ index c4d1faade8be..6a5a058f128b 100644 compatible = "aspeed,ast2600-xdma"; reg = <0x1e6e7000 0x100>; -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0132-ARM-dts-aspeed-g5-add-jtag-controller.patch b/common/recipes-kernel/linux/6.6/0132-ARM-dts-aspeed-g5-add-jtag-controller.patch index 5500515ebe16..6babbe04175a 100644 --- a/common/recipes-kernel/linux/6.6/0132-ARM-dts-aspeed-g5-add-jtag-controller.patch +++ b/common/recipes-kernel/linux/6.6/0132-ARM-dts-aspeed-g5-add-jtag-controller.patch @@ -1,4 +1,4 @@ -From 0d125b9ed1a889a22698193b6f33e4b02db6af1f Mon Sep 17 00:00:00 2001 +From 37625d6dd5f8b566a5cd74f308bf6bd8244c6037 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Mon, 11 May 2020 13:51:25 -0700 Subject: [PATCH 132/132] ARM: dts: aspeed-g5: add jtag controller @@ -43,5 +43,5 @@ index 04f98d1dbb97..f4d6332d3bbd 100644 compatible = "aspeed,ast2500-gfx", "syscon"; reg = <0x1e6e6000 0x1000>; -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0150-spi-aspeed-add-shutdown-path-for-AST25XX-SPI-control.patch b/common/recipes-kernel/linux/6.6/0150-spi-aspeed-add-shutdown-path-for-AST25XX-SPI-control.patch index a02bae24bc41..6cd090ef81ed 100644 --- a/common/recipes-kernel/linux/6.6/0150-spi-aspeed-add-shutdown-path-for-AST25XX-SPI-control.patch +++ b/common/recipes-kernel/linux/6.6/0150-spi-aspeed-add-shutdown-path-for-AST25XX-SPI-control.patch @@ -1,4 +1,4 @@ -From 0dd214b2a2a31a8b3f6ed6ce056f6621eb49a28c Mon Sep 17 00:00:00 2001 +From 15ddd8e19c08df25eb4a5129dbc22c2a2ed3b71c Mon Sep 17 00:00:00 2001 From: dhineskumareswaran Date: Mon, 5 Dec 2022 12:17:20 +0000 Subject: [PATCH 150/151] spi: aspeed: add shutdown path for AST25XX SPI @@ -22,7 +22,7 @@ In reset path, restoring all FMC related register back to default state. 1 file changed, 26 insertions(+) diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c -index e75b0d51f06a..56d83689b32a 100644 +index 21b0fa646c7d..6d9d119bf1a2 100644 --- a/drivers/spi/spi-aspeed-smc.c +++ b/drivers/spi/spi-aspeed-smc.c @@ -46,6 +46,8 @@ @@ -101,5 +101,5 @@ index e75b0d51f06a..56d83689b32a 100644 .name = DEVICE_NAME, .of_match_table = aspeed_spi_matches, -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0151-spi-add-user-mode-aspeed-spi-driver.patch b/common/recipes-kernel/linux/6.6/0151-spi-add-user-mode-aspeed-spi-driver.patch index f854b7f384a5..5c2ac40dd3c7 100644 --- a/common/recipes-kernel/linux/6.6/0151-spi-add-user-mode-aspeed-spi-driver.patch +++ b/common/recipes-kernel/linux/6.6/0151-spi-add-user-mode-aspeed-spi-driver.patch @@ -1,4 +1,4 @@ -From 0d6ad077c786a21e9d7fc70e492c29c8c93b866b Mon Sep 17 00:00:00 2001 +From 051bd1f650d3ad74584fc807658327bb043afc95 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Mon, 9 May 2022 22:55:21 -0700 Subject: [PATCH 151/151] spi: add user-mode aspeed spi driver @@ -29,7 +29,7 @@ Differential Revision: https://phabricator.intern.facebook.com/D37292798 create mode 100644 drivers/spi/spi-aspeed-user.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig -index 8962b2557615..9abdb02cd65d 100644 +index 3ce0fd5df8e9..68b7c6af4295 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -119,6 +119,13 @@ config SPI_ASPEED_SMC @@ -47,7 +47,7 @@ index 8962b2557615..9abdb02cd65d 100644 tristate "Atmel SPI Controller" depends on ARCH_AT91 || COMPILE_TEST diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile -index 080c2c1b3ec1..395889acff50 100644 +index 6af54842b9fa..0406f40df794 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_SPI_AMLOGIC_SPIFC_A1) += spi-amlogic-spifc-a1.o @@ -702,5 +702,5 @@ index 000000000000..519e965585cc +MODULE_DESCRIPTION("ASPEED SPI Host Driver"); +MODULE_LICENSE("GPL"); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0160-aspeed-i2c-add-clock-duty-cycle-property.patch b/common/recipes-kernel/linux/6.6/0160-aspeed-i2c-add-clock-duty-cycle-property.patch index 703aea61b380..15ceb42945c6 100644 --- a/common/recipes-kernel/linux/6.6/0160-aspeed-i2c-add-clock-duty-cycle-property.patch +++ b/common/recipes-kernel/linux/6.6/0160-aspeed-i2c-add-clock-duty-cycle-property.patch @@ -1,7 +1,7 @@ -From 09f7ca6a3b9b1ac371dfd80d7b965b29ffb3f0f4 Mon Sep 17 00:00:00 2001 +From fed8a255d5160a145b8fe109d447889bdc2d5170 Mon Sep 17 00:00:00 2001 From: Potin Lai Date: Mon, 23 May 2022 11:56:36 +0800 -Subject: [PATCH 160/164] aspeed: i2c: add clock duty cycle property +Subject: [PATCH 160/170] aspeed: i2c: add clock duty cycle property Introduce i2c-clk-high-min-percent property for setting a minimum clock high percentage. @@ -16,7 +16,7 @@ Signed-off-by: Potin Lai 1 file changed, 45 insertions(+), 11 deletions(-) diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c -index 2e5acfeb76c8..3c3bc53e3381 100644 +index 5511fd46a65e..c8596cb5a66e 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c @@ -17,6 +17,7 @@ @@ -49,7 +49,7 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 /* Transaction state. */ enum aspeed_i2c_master_state master_state; struct i2c_msg *msgs; -@@ -803,9 +808,11 @@ static const struct i2c_algorithm aspeed_i2c_algo = { +@@ -823,9 +828,11 @@ static const struct i2c_algorithm aspeed_i2c_algo = { static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, u32 clk_high_low_mask, @@ -62,7 +62,7 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 /* * SCL_high and SCL_low represent a value 1 greater than what is stored -@@ -847,10 +854,32 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, +@@ -867,10 +874,32 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, "clamping clock divider: divider requested, %u, is greater than largest possible divider, %u.\n", divisor, (1 << base_clk_divisor) * clk_high_low_max); } else { @@ -98,7 +98,7 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 if (clk_high) clk_high--; -@@ -868,22 +897,22 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, +@@ -888,22 +917,22 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, & ASPEED_I2CD_TIME_BASE_DIVISOR_MASK); } @@ -125,7 +125,7 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 } /* precondition: bus.lock has been acquired. */ -@@ -896,7 +925,7 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) +@@ -916,7 +945,7 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) clk_reg_val &= (ASPEED_I2CD_TIME_TBUF_MASK | ASPEED_I2CD_TIME_THDSTA_MASK | ASPEED_I2CD_TIME_TACST_MASK); @@ -134,7 +134,7 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 writel(clk_reg_val, bus->base + ASPEED_I2C_AC_TIMING_REG1); writel(ASPEED_NO_TIMEOUT_CTRL, bus->base + ASPEED_I2C_AC_TIMING_REG2); -@@ -1012,11 +1041,16 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) +@@ -1032,11 +1061,16 @@ static int aspeed_i2c_probe_bus(struct platform_device *pdev) bus->bus_frequency = I2C_MAX_STANDARD_MODE_FREQ; } @@ -153,5 +153,5 @@ index 2e5acfeb76c8..3c3bc53e3381 100644 /* Initialize the I2C adapter */ -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0161-dt-bindings-aspeed-i2c-add-properties-for-setting-i2.patch b/common/recipes-kernel/linux/6.6/0161-dt-bindings-aspeed-i2c-add-properties-for-setting-i2.patch index ea468e74f928..c02c8620d482 100644 --- a/common/recipes-kernel/linux/6.6/0161-dt-bindings-aspeed-i2c-add-properties-for-setting-i2.patch +++ b/common/recipes-kernel/linux/6.6/0161-dt-bindings-aspeed-i2c-add-properties-for-setting-i2.patch @@ -1,7 +1,7 @@ -From 8c5949ade37292dbc91212a93928e5308aa5cf2d Mon Sep 17 00:00:00 2001 +From eb7b6f446ea40ef280b000f3776caef1fb834e9d Mon Sep 17 00:00:00 2001 From: Potin Lai Date: Wed, 1 Jun 2022 10:10:37 +0800 -Subject: [PATCH 161/164] dt-bindings: aspeed-i2c: add properties for setting +Subject: [PATCH 161/170] dt-bindings: aspeed-i2c: add properties for setting i2c clock duty cycle Introduce a new property for setting a minimum duty cycle for clock high. @@ -32,5 +32,5 @@ index 6df27b47b922..3a053c2a9a2e 100644 - reg - compatible -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0162-i2c-aspeed-update-ast2400-timing-settings.patch b/common/recipes-kernel/linux/6.6/0162-i2c-aspeed-update-ast2400-timing-settings.patch index 8bc9c5494366..dc7ac1be6c1d 100644 --- a/common/recipes-kernel/linux/6.6/0162-i2c-aspeed-update-ast2400-timing-settings.patch +++ b/common/recipes-kernel/linux/6.6/0162-i2c-aspeed-update-ast2400-timing-settings.patch @@ -1,7 +1,7 @@ -From e91a032085c7b216c6058c694f70a8a79eb6d138 Mon Sep 17 00:00:00 2001 +From 7180ff73185183d6b6a00a977b9d04795c0cdcac Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Wed, 21 Apr 2021 16:20:34 -0700 -Subject: [PATCH 162/164] i2c: aspeed: update ast2400 timing settings +Subject: [PATCH 162/170] i2c: aspeed: update ast2400 timing settings Summary: We have seen consistent I2C transaction failures in wedge100 i2c-3/4/9 @@ -29,10 +29,10 @@ Signature: 27956130:1619198529:34b97935d0812969dd1bb7a680046d1df9a6d262 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c -index 3c3bc53e3381..1e6a72e4f40c 100644 +index c8596cb5a66e..9e91d5fbd5f6 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c -@@ -899,11 +899,25 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, +@@ -919,11 +919,25 @@ static u32 aspeed_i2c_get_clk_reg_val(struct device *dev, static u32 aspeed_i2c_24xx_get_clk_reg_val(struct device *dev, u32 divisor, u32 duty_cycle) { @@ -60,5 +60,5 @@ index 3c3bc53e3381..1e6a72e4f40c 100644 static u32 aspeed_i2c_25xx_get_clk_reg_val(struct device *dev, u32 divisor, u32 duty_cycle) -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0163-i2c-add-a-slave-backend-to-receive-and-queue-message.patch b/common/recipes-kernel/linux/6.6/0163-i2c-add-a-slave-backend-to-receive-and-queue-message.patch index 91f4d1a86504..5e77a39abba3 100644 --- a/common/recipes-kernel/linux/6.6/0163-i2c-add-a-slave-backend-to-receive-and-queue-message.patch +++ b/common/recipes-kernel/linux/6.6/0163-i2c-add-a-slave-backend-to-receive-and-queue-message.patch @@ -1,7 +1,8 @@ -From 7ac6aed84487662381f0d8ed50a1957a35c8ebf3 Mon Sep 17 00:00:00 2001 +From 8d20834f1f446b9cb8ff17b9e1bcaaadd5ed1879 Mon Sep 17 00:00:00 2001 From: Michael Garner Date: Tue, 21 Jun 2022 15:13:30 -0700 -Subject: [PATCH] i2c: add a slave backend to receive and queue messages +Subject: [PATCH 163/170] i2c: add a slave backend to receive and queue + messages Summary: Ported form Kernel 5.6: @@ -177,10 +178,10 @@ index 000000000000..2d0d06d8df9d + [10204.220734634] : 20 18 c8 2c 80 01 53 + [10204.468461664] : 20 18 c8 2c 80 01 53 diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig -index 438905e2a1d0..9db0ce4d9a81 100644 +index 9388823bb0bb..ee3bc323083e 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig -@@ -125,6 +125,31 @@ config I2C_SLAVE_EEPROM +@@ -134,6 +134,31 @@ config I2C_SLAVE_EEPROM This backend makes Linux behave like an I2C EEPROM. Please read Documentation/i2c/slave-eeprom-backend.rst for further details. @@ -213,10 +214,10 @@ index 438905e2a1d0..9db0ce4d9a81 100644 tristate "I2C eeprom testunit driver" help diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile -index c1d493dc9bac..7af77add9f72 100644 +index 3f71ce4711e3..c79adbe5e8e9 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_I2C_MUX) += i2c-mux.o +@@ -17,6 +17,7 @@ obj-$(CONFIG_I2C_ATR) += i2c-atr.o obj-y += algos/ busses/ muxes/ obj-$(CONFIG_I2C_STUB) += i2c-stub.o obj-$(CONFIG_I2C_SLAVE_EEPROM) += i2c-slave-eeprom.o @@ -431,5 +432,5 @@ index 000000000000..ab7840b5b015 +MODULE_AUTHOR("Haiyue Wang "); +MODULE_DESCRIPTION("I2C slave mode for receiving and queuing messages"); -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0164-i2c-aspeed-add-i2c-slave-inactive-timeout-support.patch b/common/recipes-kernel/linux/6.6/0164-i2c-aspeed-add-i2c-slave-inactive-timeout-support.patch index c8628c4ce62f..30f09719463e 100644 --- a/common/recipes-kernel/linux/6.6/0164-i2c-aspeed-add-i2c-slave-inactive-timeout-support.patch +++ b/common/recipes-kernel/linux/6.6/0164-i2c-aspeed-add-i2c-slave-inactive-timeout-support.patch @@ -1,7 +1,7 @@ -From bf9abe5b05fca31738276cbe3e533d3087bce41e Mon Sep 17 00:00:00 2001 +From 1cc242cc5c10f95a90306bd6ecdd7730e92024d7 Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo Date: Tue, 13 Sep 2022 08:56:54 -0700 -Subject: [PATCH 164/164] i2c: aspeed: add i2c slave inactive timeout support +Subject: [PATCH 164/170] i2c: aspeed: add i2c slave inactive timeout support Summary: backport below patches to kernel 5.15 to support i2c slave inactive timeout. @@ -18,11 +18,11 @@ Pulled By: garnermic fbshipit-source-id: 019a949fcc6c09d93141e781ca5c2bbe0f8bf580 --- - drivers/i2c/busses/i2c-aspeed.c | 92 ++++++++++++++++++++++++++++++--- - 1 file changed, 86 insertions(+), 6 deletions(-) + drivers/i2c/busses/i2c-aspeed.c | 91 ++++++++++++++++++++++++++++++--- + 1 file changed, 85 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-aspeed.c b/drivers/i2c/busses/i2c-aspeed.c -index 1e6a72e4f40c..658370440504 100644 +index 9e91d5fbd5f6..51e0297384ac 100644 --- a/drivers/i2c/busses/i2c-aspeed.c +++ b/drivers/i2c/busses/i2c-aspeed.c @@ -7,6 +7,7 @@ @@ -110,22 +110,21 @@ index 1e6a72e4f40c..658370440504 100644 static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) { u32 command, irq_handled = 0; -@@ -254,6 +282,14 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) - if (!slave) - return 0; +@@ -271,6 +299,13 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status) + bus->slave_state = ASPEED_I2C_SLAVE_STOP; + } + if (aspeed_i2c_check_slave_error(irq_status)) { + dev_dbg(bus->dev, "received slave error interrupt: 0x%08x\n", + irq_status); + irq_handled |= (irq_status & ASPEED_I2CD_INTR_SLAVE_ERRORS); + bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE; -+ return irq_handled; + } + - command = readl(bus->base + ASPEED_I2C_CMD_REG); - - /* Slave was requested, restart state machine. */ -@@ -397,7 +433,7 @@ static void aspeed_i2c_next_msg_or_stop(struct aspeed_i2c_bus *bus) + /* Propagate any stop conditions to the slave implementation. */ + if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) { + i2c_slave_event(slave, I2C_SLAVE_STOP, &value); +@@ -413,7 +448,7 @@ static void aspeed_i2c_next_msg_or_stop(struct aspeed_i2c_bus *bus) } } @@ -134,7 +133,7 @@ index 1e6a72e4f40c..658370440504 100644 { if (irq_status & ASPEED_I2CD_INTR_ARBIT_LOSS) return -EAGAIN; -@@ -428,9 +464,9 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) +@@ -444,9 +479,9 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status) * should clear the command queue effectively taking us back to the * INACTIVE state. */ @@ -146,7 +145,7 @@ index 1e6a72e4f40c..658370440504 100644 irq_status); irq_handled |= (irq_status & ASPEED_I2CD_INTR_MASTER_ERRORS); if (bus->master_state != ASPEED_I2C_MASTER_INACTIVE) { -@@ -932,6 +968,7 @@ static u32 aspeed_i2c_25xx_get_clk_reg_val(struct device *dev, u32 divisor, u32 +@@ -952,6 +987,7 @@ static u32 aspeed_i2c_25xx_get_clk_reg_val(struct device *dev, u32 divisor, u32 /* precondition: bus.lock has been acquired. */ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) { @@ -154,7 +153,7 @@ index 1e6a72e4f40c..658370440504 100644 u32 divisor, clk_reg_val; divisor = DIV_ROUND_UP(bus->parent_clk_frequency, bus->bus_frequency); -@@ -940,8 +977,46 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) +@@ -960,8 +996,46 @@ static int aspeed_i2c_init_clk(struct aspeed_i2c_bus *bus) ASPEED_I2CD_TIME_THDSTA_MASK | ASPEED_I2CD_TIME_TACST_MASK); clk_reg_val |= bus->get_clk_reg_val(bus->dev, divisor, bus->duty_cycle); @@ -202,7 +201,7 @@ index 1e6a72e4f40c..658370440504 100644 return 0; } -@@ -956,6 +1031,11 @@ static int aspeed_i2c_init(struct aspeed_i2c_bus *bus, +@@ -976,6 +1050,11 @@ static int aspeed_i2c_init(struct aspeed_i2c_bus *bus, /* Disable everything. */ writel(0, bus->base + ASPEED_I2C_FUN_CTRL_REG); @@ -215,5 +214,5 @@ index 1e6a72e4f40c..658370440504 100644 if (ret < 0) return ret; -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0165-dt-bindings-hwmon-fan-Add-fan-binding-to-schema.patch b/common/recipes-kernel/linux/6.6/0165-dt-bindings-hwmon-fan-Add-fan-binding-to-schema.patch index 81ef188f3e7b..d6498c14c613 100644 --- a/common/recipes-kernel/linux/6.6/0165-dt-bindings-hwmon-fan-Add-fan-binding-to-schema.patch +++ b/common/recipes-kernel/linux/6.6/0165-dt-bindings-hwmon-fan-Add-fan-binding-to-schema.patch @@ -1,7 +1,7 @@ -From ec0e607515b8adcab537858f4835c5218d1ffcff Mon Sep 17 00:00:00 2001 +From 1d6a2114c4937089c1e07fadaf60ab01169d325e Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Mon, 18 Sep 2023 14:41:09 +0800 -Subject: [PATCH 165/167] dt-bindings: hwmon: fan: Add fan binding to schema +Subject: [PATCH 165/170] dt-bindings: hwmon: fan: Add fan binding to schema Add common fan properties bindings to a schema. @@ -108,5 +108,5 @@ index 000000000000..2bd2f57fc9d9 + +... -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0166-dt-bindings-hwmon-Support-Aspeed-g6-PWM-TACH-Control.patch b/common/recipes-kernel/linux/6.6/0166-dt-bindings-hwmon-Support-Aspeed-g6-PWM-TACH-Control.patch index 4a5718f469d7..93654fcd69ae 100644 --- a/common/recipes-kernel/linux/6.6/0166-dt-bindings-hwmon-Support-Aspeed-g6-PWM-TACH-Control.patch +++ b/common/recipes-kernel/linux/6.6/0166-dt-bindings-hwmon-Support-Aspeed-g6-PWM-TACH-Control.patch @@ -1,7 +1,7 @@ -From dd6573f4cd9406bc2cb6c9749ee7f64e9fed990d Mon Sep 17 00:00:00 2001 +From 40762b1bc85d2c473772ef537b874c87765c7a66 Mon Sep 17 00:00:00 2001 From: Billy Tsai Date: Mon, 18 Sep 2023 14:41:10 +0800 -Subject: [PATCH 166/167] dt-bindings: hwmon: Support Aspeed g6 PWM TACH +Subject: [PATCH 166/170] dt-bindings: hwmon: Support Aspeed g6 PWM TACH Control Document the compatible for aspeed,ast2600-pwm-tach device, which can @@ -89,5 +89,5 @@ index 000000000000..5a679f4ad2fa + }; + }; -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0167-hwmon-aspeed-g6-pwm-tacho-Support-for-ASPEED-g6-PWM-.patch b/common/recipes-kernel/linux/6.6/0167-hwmon-aspeed-g6-pwm-tacho-Support-for-ASPEED-g6-PWM-.patch index 54023e363ad1..2445698107a9 100644 --- a/common/recipes-kernel/linux/6.6/0167-hwmon-aspeed-g6-pwm-tacho-Support-for-ASPEED-g6-PWM-.patch +++ b/common/recipes-kernel/linux/6.6/0167-hwmon-aspeed-g6-pwm-tacho-Support-for-ASPEED-g6-PWM-.patch @@ -1,7 +1,7 @@ -From 2f679cc81b9fa4cc8f753fccd6d881c4cd322650 Mon Sep 17 00:00:00 2001 +From 95041efccd9ba975dcf25eca7e2372e241d83eaf Mon Sep 17 00:00:00 2001 From: Billy Tsai Date: Mon, 18 Sep 2023 14:41:11 +0800 -Subject: [PATCH 167/167] hwmon: (aspeed-g6-pwm-tacho): Support for ASPEED g6 +Subject: [PATCH 167/170] hwmon: (aspeed-g6-pwm-tacho): Support for ASPEED g6 PWM/Fan tach The driver support two functions: PWM and Tachometer. The PWM feature can @@ -56,7 +56,7 @@ index 000000000000..17398fe397fe + affected by fan signal glitch. +=============== ======= ====================================================== diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst -index 042e1cf9501b..75b869ff6c53 100644 +index 641aa5d97add..fac861e2a8ab 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -44,6 +44,7 @@ Hardware Monitoring Kernel Drivers @@ -68,7 +68,7 @@ index 042e1cf9501b..75b869ff6c53 100644 asus_ec_sensors asus_wmi_sensors diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 307477b8a371..75fbea7e81e2 100644 +index ec38c8892158..67f8f2e6633c 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -412,6 +412,17 @@ config SENSORS_ASPEED @@ -90,7 +90,7 @@ index 307477b8a371..75fbea7e81e2 100644 tristate "Attansic ATXP1 VID controller" depends on I2C diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index 3f4b0fda0998..51de5c1d5f1e 100644 +index 4ac9452b5430..6415bf756c10 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_SENSORS_ARM_SCPI) += scpi-hwmon.o @@ -647,5 +647,5 @@ index 000000000000..504574e8940c +MODULE_DESCRIPTION("Aspeed ast2600 PWM and Fan Tach device driver"); +MODULE_LICENSE("GPL"); -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0168-aspeed-g6.dtsi-update-for-PWM-and-TACH-driver.patch b/common/recipes-kernel/linux/6.6/0168-aspeed-g6.dtsi-update-for-PWM-and-TACH-driver.patch index a97c7b9b6da0..74c063946dfc 100644 --- a/common/recipes-kernel/linux/6.6/0168-aspeed-g6.dtsi-update-for-PWM-and-TACH-driver.patch +++ b/common/recipes-kernel/linux/6.6/0168-aspeed-g6.dtsi-update-for-PWM-and-TACH-driver.patch @@ -1,7 +1,7 @@ -From aeb819e5e1527595751cb6da0a972d9aa871a70b Mon Sep 17 00:00:00 2001 +From 2ab4d3e557c23ed3cec1fd3020afdb9ad7f03b7b Mon Sep 17 00:00:00 2001 From: Potin Lai Date: Thu, 31 Aug 2023 16:49:57 +0800 -Subject: [PATCH 1/1] aspeed-g6.dtsi update for PWM and TACH driver +Subject: [PATCH 168/170] aspeed-g6.dtsi update for PWM and TACH driver Signed-off-by: Potin Lai --- @@ -9,7 +9,7 @@ Signed-off-by: Potin Lai 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi -index 3b072e36d50dc..aa2a01500a239 100644 +index 01c0a7936132..7eee849bbeb7 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi @@ -332,6 +332,14 @@ apb { @@ -28,5 +28,5 @@ index 3b072e36d50dc..aa2a01500a239 100644 compatible = "aspeed,ast2600-hace"; reg = <0x1e6d0000 0x200>; -- -2.31.1 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0169-net-ncsi-Simplify-Kconfig-dts-control-flow.patch b/common/recipes-kernel/linux/6.6/0169-net-ncsi-Simplify-Kconfig-dts-control-flow.patch index 404c91f2157d..8d76e8d5115a 100644 --- a/common/recipes-kernel/linux/6.6/0169-net-ncsi-Simplify-Kconfig-dts-control-flow.patch +++ b/common/recipes-kernel/linux/6.6/0169-net-ncsi-Simplify-Kconfig-dts-control-flow.patch @@ -1,7 +1,7 @@ -From b646dcd6368465fd5b4330199ca69457c6cf1d0b Mon Sep 17 00:00:00 2001 +From 5d25154f9a2a97f3a3b4ab8ab0955cbedc67bc5d Mon Sep 17 00:00:00 2001 From: Peter Delevoryas Date: Tue, 20 Dec 2022 21:22:44 -0800 -Subject: [PATCH 169/171] net/ncsi: Simplify Kconfig/dts control flow +Subject: [PATCH 169/170] net/ncsi: Simplify Kconfig/dts control flow Background: @@ -141,5 +141,5 @@ index d9da942ad53d..f3d7fe86fea1 100644 case ncsi_dev_state_probe_gc: case ncsi_dev_state_probe_gls: -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0171-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch b/common/recipes-kernel/linux/6.6/0170-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch similarity index 97% rename from common/recipes-kernel/linux/6.6/0171-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch rename to common/recipes-kernel/linux/6.6/0170-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch index d42cde3e9565..d0c74f463419 100644 --- a/common/recipes-kernel/linux/6.6/0171-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch +++ b/common/recipes-kernel/linux/6.6/0170-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch @@ -1,7 +1,7 @@ -From fee75e24e5898d1493ce84644ba60d4714f5c92b Mon Sep 17 00:00:00 2001 +From 54f8ee34753ca695ad04474e874269baeefae4ef Mon Sep 17 00:00:00 2001 From: Peter Delevoryas Date: Tue, 20 Dec 2022 21:22:46 -0800 -Subject: [PATCH 171/171] net/ncsi: Add NC-SI 1.2 Get MC MAC Address command +Subject: [PATCH 170/170] net/ncsi: Add NC-SI 1.2 Get MC MAC Address command This change adds support for the NC-SI 1.2 Get MC MAC Address command, specified here: @@ -163,5 +163,5 @@ index 480e80e3c283..3e5e5cf7b5c9 100644 int ncsi_rcv_rsp(struct sk_buff *skb, struct net_device *dev, -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0170-net-ncsi-Fix-netlink-major-minor-version-numbers.patch b/common/recipes-kernel/linux/6.6/0170-net-ncsi-Fix-netlink-major-minor-version-numbers.patch deleted file mode 100644 index cbf275759734..000000000000 --- a/common/recipes-kernel/linux/6.6/0170-net-ncsi-Fix-netlink-major-minor-version-numbers.patch +++ /dev/null @@ -1,196 +0,0 @@ -From dc31e170346725b5f6463097a3010b5117dfd1af Mon Sep 17 00:00:00 2001 -From: Peter Delevoryas -Date: Tue, 20 Dec 2022 21:22:45 -0800 -Subject: [PATCH 170/171] net/ncsi: Fix netlink major/minor version numbers - -The netlink interface for major and minor version numbers doesn't actually -return the major and minor version numbers. - -It reports a u32 that contains the (major, minor, update, alpha1) -components as the major version number, and then alpha2 as the minor -version number. - -For whatever reason, the u32 byte order was reversed (ntohl): maybe it was -assumed that the encoded value was a single big-endian u32, and alpha2 was -the minor version. - -The correct way to get the supported NC-SI version from the network -controller is to parse the Get Version ID response as described in 8.4.44 -of the NC-SI spec[1]. - - Get Version ID Response Packet Format - - Bits - +--------+--------+--------+--------+ - Bytes | 31..24 | 23..16 | 15..8 | 7..0 | - +-------+--------+--------+--------+--------+ - | 0..15 | NC-SI Header | - +-------+--------+--------+--------+--------+ - | 16..19| Response code | Reason code | - +-------+--------+--------+--------+--------+ - |20..23 | Major | Minor | Update | Alpha1 | - +-------+--------+--------+--------+--------+ - |24..27 | reserved | Alpha2 | - +-------+--------+--------+--------+--------+ - | .... other stuff .... | - -The major, minor, and update fields are all binary-coded decimal (BCD) -encoded [2]. The spec provides examples below the Get Version ID response -format in section 8.4.44.1, but for practical purposes, this is an example -from a live network card: - - root@bmc:~# ncsi-util 0x15 - NC-SI Command Response: - cmd: GET_VERSION_ID(0x15) - Response: COMMAND_COMPLETED(0x0000) Reason: NO_ERROR(0x0000) - Payload length = 40 - - 20: 0xf1 0xf1 0xf0 0x00 <<<<<<<<< (major, minor, update, alpha1) - 24: 0x00 0x00 0x00 0x00 <<<<<<<<< (_, _, _, alpha2) - - 28: 0x6d 0x6c 0x78 0x30 - 32: 0x2e 0x31 0x00 0x00 - 36: 0x00 0x00 0x00 0x00 - 40: 0x16 0x1d 0x07 0xd2 - 44: 0x10 0x1d 0x15 0xb3 - 48: 0x00 0x17 0x15 0xb3 - 52: 0x00 0x00 0x81 0x19 - -This should be parsed as "1.1.0". - -"f" in the upper-nibble means to ignore it, contributing zero. - -If both nibbles are "f", I think the whole field is supposed to be ignored. -Major and minor are "required", meaning they're not supposed to be "ff", -but the update field is "optional" so I think it can be ff. I think the -simplest thing to do is just set the major and minor to zero instead of -juggling some conditional logic or something. - -bcd2bin() from "include/linux/bcd.h" seems to assume both nibbles are 0-9, -so I've provided a custom BCD decoding function. - -Alpha1 and alpha2 are ISO/IEC 8859-1 encoded, which just means ASCII -characters as far as I can tell, although the full encoding table for -non-alphabetic characters is slightly different (I think). - -I imagine the alpha fields are just supposed to be alphabetic characters, -but I haven't seen any network cards actually report a non-zero value for -either. - -If people wrote software against this netlink behavior, and were parsing -the major and minor versions themselves from the u32, then this would -definitely break their code. - -[1] https://www.dmtf.org/sites/default/files/standards/documents/DSP0222_1.0.0.pdf -[2] https://en.wikipedia.org/wiki/Binary-coded_decimal -[2] https://en.wikipedia.org/wiki/ISO/IEC_8859-1 - -Signed-off-by: Peter Delevoryas -Fixes: 138635cc27c9 ("net/ncsi: NCSI response packet handler") ---- - net/ncsi/internal.h | 7 +++++-- - net/ncsi/ncsi-netlink.c | 4 ++-- - net/ncsi/ncsi-pkt.h | 7 +++++-- - net/ncsi/ncsi-rsp.c | 26 ++++++++++++++++++++++++-- - 4 files changed, 36 insertions(+), 8 deletions(-) - -diff --git a/net/ncsi/internal.h b/net/ncsi/internal.h -index 03757e76bb6b..374412ed780b 100644 ---- a/net/ncsi/internal.h -+++ b/net/ncsi/internal.h -@@ -105,8 +105,11 @@ enum { - - - struct ncsi_channel_version { -- u32 version; /* Supported BCD encoded NCSI version */ -- u32 alpha2; /* Supported BCD encoded NCSI version */ -+ u8 major; /* NCSI version major */ -+ u8 minor; /* NCSI version minor */ -+ u8 update; /* NCSI version update */ -+ char alpha1; /* NCSI version alpha1 */ -+ char alpha2; /* NCSI version alpha2 */ - u8 fw_name[12]; /* Firmware name string */ - u32 fw_version; /* Firmware version */ - u16 pci_ids[4]; /* PCI identification */ -diff --git a/net/ncsi/ncsi-netlink.c b/net/ncsi/ncsi-netlink.c -index a3a6753a1db7..2f872d064396 100644 ---- a/net/ncsi/ncsi-netlink.c -+++ b/net/ncsi/ncsi-netlink.c -@@ -71,8 +71,8 @@ static int ncsi_write_channel_info(struct sk_buff *skb, - if (nc == nc->package->preferred_channel) - nla_put_flag(skb, NCSI_CHANNEL_ATTR_FORCED); - -- nla_put_u32(skb, NCSI_CHANNEL_ATTR_VERSION_MAJOR, nc->version.version); -- nla_put_u32(skb, NCSI_CHANNEL_ATTR_VERSION_MINOR, nc->version.alpha2); -+ nla_put_u32(skb, NCSI_CHANNEL_ATTR_VERSION_MAJOR, nc->version.major); -+ nla_put_u32(skb, NCSI_CHANNEL_ATTR_VERSION_MINOR, nc->version.minor); - nla_put_string(skb, NCSI_CHANNEL_ATTR_VERSION_STR, nc->version.fw_name); - - vid_nest = nla_nest_start_noflag(skb, NCSI_CHANNEL_ATTR_VLAN_LIST); -diff --git a/net/ncsi/ncsi-pkt.h b/net/ncsi/ncsi-pkt.h -index ba66c7dc3a21..c9d1da34dc4d 100644 ---- a/net/ncsi/ncsi-pkt.h -+++ b/net/ncsi/ncsi-pkt.h -@@ -197,9 +197,12 @@ struct ncsi_rsp_gls_pkt { - /* Get Version ID */ - struct ncsi_rsp_gvi_pkt { - struct ncsi_rsp_pkt_hdr rsp; /* Response header */ -- __be32 ncsi_version; /* NCSI version */ -+ unsigned char major; /* NCSI version major */ -+ unsigned char minor; /* NCSI version minor */ -+ unsigned char update; /* NCSI version update */ -+ unsigned char alpha1; /* NCSI version alpha1 */ - unsigned char reserved[3]; /* Reserved */ -- unsigned char alpha2; /* NCSI version */ -+ unsigned char alpha2; /* NCSI version alpha2 */ - unsigned char fw_name[12]; /* f/w name string */ - __be32 fw_version; /* f/w version */ - __be16 pci_ids[4]; /* PCI IDs */ -diff --git a/net/ncsi/ncsi-rsp.c b/net/ncsi/ncsi-rsp.c -index 069c2659074b..480e80e3c283 100644 ---- a/net/ncsi/ncsi-rsp.c -+++ b/net/ncsi/ncsi-rsp.c -@@ -19,6 +19,19 @@ - #include "ncsi-pkt.h" - #include "ncsi-netlink.h" - -+/* Nibbles within [0xA, 0xF] add zero "0" to the returned value. -+ * Optional fields (encoded as 0xFF) will default to zero. -+ */ -+static u8 decode_bcd_u8(u8 x) -+{ -+ int lo = x & 0xF; -+ int hi = x >> 4; -+ -+ lo = lo < 0xA ? lo : 0; -+ hi = hi < 0xA ? hi : 0; -+ return lo + hi * 10; -+} -+ - static int ncsi_validate_rsp_pkt(struct ncsi_request *nr, - unsigned short payload) - { -@@ -755,9 +768,18 @@ static int ncsi_rsp_handler_gvi(struct ncsi_request *nr) - if (!nc) - return -ENODEV; - -- /* Update to channel's version info */ -+ /* Update channel's version info -+ * -+ * Major, minor, and update fields are supposed to be -+ * unsigned integers encoded as packed BCD. -+ * -+ * Alpha1 and alpha2 are ISO/IEC 8859-1 characters. -+ */ - ncv = &nc->version; -- ncv->version = ntohl(rsp->ncsi_version); -+ ncv->major = decode_bcd_u8(rsp->major); -+ ncv->minor = decode_bcd_u8(rsp->minor); -+ ncv->update = decode_bcd_u8(rsp->update); -+ ncv->alpha1 = rsp->alpha1; - ncv->alpha2 = rsp->alpha2; - memcpy(ncv->fw_name, rsp->fw_name, 12); - ncv->fw_version = ntohl(rsp->fw_version); --- -2.41.0 - diff --git a/common/recipes-kernel/linux/6.6/0171-aspeed-g6.dtsi-add-pcc-config.patch b/common/recipes-kernel/linux/6.6/0171-aspeed-g6.dtsi-add-pcc-config.patch new file mode 100644 index 000000000000..76646c956cd9 --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0171-aspeed-g6.dtsi-add-pcc-config.patch @@ -0,0 +1,31 @@ +From 7d47836bdb09d08819a1c800dd50dae606117fbb Mon Sep 17 00:00:00 2001 +From: Peter Yin +Date: Wed, 13 Mar 2024 09:19:06 +0800 +Subject: [PATCH 1000/1002] meta-facebook: common: add pcc config + +Add PCC config in aspeed-g6.dtsi +--- + arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +index c4d1faade8be..53406d301a23 100644 +--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi ++++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +@@ -645,6 +645,13 @@ lpc_snoop: lpc-snoop@80 { + status = "disabled"; + }; + ++ lpc_pcc: lpc-pcc@0 { ++ compatible = "aspeed,ast2600-lpc-pcc"; ++ reg = <0x0 0x140>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ + lhc: lhc@a0 { + compatible = "aspeed,ast2600-lhc"; + reg = <0xa0 0x24 0xc8 0x8>; +-- +2.25.1 + diff --git a/common/recipes-kernel/linux/6.6/0172-drivers-watchdog-ast2600-support-bootstatus.patch b/common/recipes-kernel/linux/6.6/0172-drivers-watchdog-ast2600-support-bootstatus.patch new file mode 100644 index 000000000000..e4be5f025a6a --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0172-drivers-watchdog-ast2600-support-bootstatus.patch @@ -0,0 +1,47 @@ +From f8546e41b8cdacae089600fd9be94dfa53f217d5 Mon Sep 17 00:00:00 2001 +From: Peter Yin +Date: Thu, 14 Mar 2024 10:30:26 +0800 +Subject: [PATCH v1] drivers: watchdog: ast2600 support bootstatus + +Add WDIOF_EXTERN1 bootstatus in ast2600 + +Signed-off-by: Peter Yin +--- + drivers/watchdog/aspeed_wdt.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c +index b4773a6aaf8c..8adadd394be6 100644 +--- a/drivers/watchdog/aspeed_wdt.c ++++ b/drivers/watchdog/aspeed_wdt.c +@@ -81,6 +81,7 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); + #define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0) + #define WDT_RESET_MASK1 0x1c + #define WDT_RESET_MASK2 0x20 ++#define WDT_EVENT_COUNTER_MASK (0xFFF << 8) + + /* + * WDT_RESET_WIDTH controls the characteristics of the external pulse (if +@@ -459,8 +460,17 @@ static int aspeed_wdt_probe(struct platform_device *pdev) + } + + status = readl(wdt->base + WDT_TIMEOUT_STATUS); +- if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) { +- wdt->wdd.bootstatus = WDIOF_CARDRESET; ++ ++ if (of_device_is_compatible(np, "aspeed,ast2600-wdt")) { ++ if (status & WDT_EVENT_COUNTER_MASK) { ++ /* ++ * Reset cause by WatchDog ++ */ ++ wdt->wdd.bootstatus |= WDIOF_EXTERN1; ++ } ++ } else { ++ if (status & WDT_TIMEOUT_STATUS_BOOT_SECONDARY) ++ wdt->wdd.bootstatus = WDIOF_CARDRESET; + + if (of_device_is_compatible(np, "aspeed,ast2400-wdt") || + of_device_is_compatible(np, "aspeed,ast2500-wdt")) +-- +2.25.1 + diff --git a/common/recipes-kernel/linux/6.6/0200-mmc-sdhci-of-aspeed-add-skip_probe-module-parameter.patch b/common/recipes-kernel/linux/6.6/0200-mmc-sdhci-of-aspeed-add-skip_probe-module-parameter.patch index af4ad7d21428..c8f6fa9a3450 100644 --- a/common/recipes-kernel/linux/6.6/0200-mmc-sdhci-of-aspeed-add-skip_probe-module-parameter.patch +++ b/common/recipes-kernel/linux/6.6/0200-mmc-sdhci-of-aspeed-add-skip_probe-module-parameter.patch @@ -1,4 +1,4 @@ -From 2ab9d2c079e481083b230073eaf0faaffea92661 Mon Sep 17 00:00:00 2001 +From fa8927742092c836d5baec115e3247098e8b33b5 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Tue, 18 Oct 2022 11:38:44 -0700 Subject: [PATCH] mmc: sdhci-of-aspeed: add "skip_probe" module parameter @@ -24,7 +24,7 @@ T79173094): 1 file changed, 21 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c -index 25b4073f698b..587f1d2c7102 100644 +index 42d54532cabe..9919b427ad73 100644 --- a/drivers/mmc/host/sdhci-of-aspeed.c +++ b/drivers/mmc/host/sdhci-of-aspeed.c @@ -77,6 +77,22 @@ struct aspeed_sdhci { @@ -63,5 +63,5 @@ index 25b4073f698b..587f1d2c7102 100644 if (!aspeed_pdata) { dev_err(&pdev->dev, "Missing platform configuration data\n"); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0201-soc-aspeed-Add-Post-Code-Control.patch b/common/recipes-kernel/linux/6.6/0201-soc-aspeed-Add-Post-Code-Control.patch new file mode 100644 index 000000000000..e7329726c988 --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0201-soc-aspeed-Add-Post-Code-Control.patch @@ -0,0 +1,525 @@ +From 10f8bab0576886b5b2a0b56d6b9b9ba58c636f1f Mon Sep 17 00:00:00 2001 +From: Peter Yin +Date: Thu, 7 Dec 2023 13:04:19 +0800 +Subject: [PATCH 1/2] soc: aspeed: Add Post Code Control + +Add Aspeed Post Code Capture (PCC) module support. +PCC can be used to snoop the debug code sent by the +host through LPC I/O ports. + +This driver is reference from below link +Link: https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v5.15/drivers/soc/aspeed/aspeed-lpc-pcc.c + +--- + drivers/soc/aspeed/Kconfig | 8 + + drivers/soc/aspeed/Makefile | 2 + + drivers/soc/aspeed/aspeed-lpc-pcc.c | 469 ++++++++++++++++++++++++++++ + 3 files changed, 479 insertions(+) + create mode 100644 drivers/soc/aspeed/aspeed-lpc-pcc.c + +diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig +index aaf4596ae4f94..6bdb6fc696bb9 100644 +--- a/drivers/soc/aspeed/Kconfig ++++ b/drivers/soc/aspeed/Kconfig +@@ -24,6 +24,14 @@ config ASPEED_LPC_SNOOP + allows the BMC to listen on and save the data written by + the host to an arbitrary LPC I/O port. + ++config ASPEED_LPC_PCC ++ tristate "Aspeed Post Code Capture support" ++ depends on ARCH_ASPEED && REGMAP && MFD_SYSCON ++ help ++ Provides a driver to control the LPC PCC interface, ++ allowing the BMC to snoop data bytes written by the ++ the host to an arbitrary LPC I/O port. ++ + config ASPEED_UART_ROUTING + tristate "ASPEED uart routing control" + select REGMAP +diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile +index 5f61bb4cc36cf..803d5a21216ef 100644 +--- a/drivers/soc/aspeed/Makefile ++++ b/drivers/soc/aspeed/Makefile +@@ -6,3 +6,5 @@ obj-$(CONFIG_ASPEED_P2A_CTRL) += aspeed-p2a-ctrl.o + obj-$(CONFIG_ASPEED_SOCINFO) += aspeed-socinfo.o + obj-$(CONFIG_ASPEED_SBC) += aspeed-sbc.o + obj-$(CONFIG_ASPEED_XDMA) += aspeed-xdma.o ++obj-$(CONFIG_ASPEED_LPC_PCC) += aspeed-lpc-pcc.o ++ +diff --git a/drivers/soc/aspeed/aspeed-lpc-pcc.c b/drivers/soc/aspeed/aspeed-lpc-pcc.c +new file mode 100644 +index 0000000000000..e5ba0047499f9 +--- /dev/null ++++ b/drivers/soc/aspeed/aspeed-lpc-pcc.c +@@ -0,0 +1,469 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) ASPEED Technology Inc. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DEVICE_NAME "aspeed-lpc-pcc" ++ ++#define PCCR6 0x0c4 ++#define PCCR6_DMA_CUR_ADDR GENMASK(27, 0) ++#define PCCR4 0x0d0 ++#define PCCR5 0x0d4 ++#define PCCR0 0x130 ++#define PCCR0_EN_DMA_INT BIT(31) ++#define PCCR0_EN_DMA_MODE BIT(14) ++#define PCCR0_ADDR_SEL_MASK GENMASK(13, 12) ++#define PCCR0_ADDR_SEL_SHIFT 12 ++#define PCCR0_RX_TRIG_LVL_MASK GENMASK(10, 8) ++#define PCCR0_RX_TRIG_LVL_SHIFT 8 ++#define PCCR0_CLR_RX_FIFO BIT(7) ++#define PCCR0_MODE_SEL_MASK GENMASK(5, 4) ++#define PCCR0_MODE_SEL_SHIFT 4 ++#define PCCR0_EN_RX_TMOUT_INT BIT(2) ++#define PCCR0_EN_RX_AVAIL_INT BIT(1) ++#define PCCR0_EN BIT(0) ++#define PCCR1 0x134 ++#define PCCR1_BASE_ADDR_MASK GENMASK(15, 0) ++#define PCCR1_BASE_ADDR_SHIFT 0 ++#define PCCR1_DONT_CARE_BITS_MASK GENMASK(21, 16) ++#define PCCR1_DONT_CARE_BITS_SHIFT 16 ++#define PCCR2 0x138 ++#define PCCR2_DMA_DONE BIT(4) ++#define PCCR2_DATA_RDY PCCR2_DMA_DONE ++#define PCCR2_RX_TMOUT_INT BIT(2) ++#define PCCR2_RX_AVAIL_INT BIT(1) ++#define PCCR3 0x13c ++#define PCCR3_FIFO_DATA_MASK GENMASK(7, 0) ++ ++#define PCC_DMA_BUFSZ (256 * SZ_1K) ++ ++enum pcc_fifo_threshold { ++ PCC_FIFO_THR_1_BYTE, ++ PCC_FIFO_THR_1_EIGHTH, ++ PCC_FIFO_THR_2_EIGHTH, ++ PCC_FIFO_THR_3_EIGHTH, ++ PCC_FIFO_THR_4_EIGHTH, ++ PCC_FIFO_THR_5_EIGHTH, ++ PCC_FIFO_THR_6_EIGHTH, ++ PCC_FIFO_THR_7_EIGHTH, ++ PCC_FIFO_THR_8_EIGHTH, ++}; ++ ++enum pcc_record_mode { ++ PCC_REC_1B, ++ PCC_REC_2B, ++ PCC_REC_4B, ++ PCC_REC_FULL, ++}; ++ ++enum pcc_port_hbits_select { ++ PCC_PORT_HBITS_SEL_NONE, ++ PCC_PORT_HBITS_SEL_45, ++ PCC_PORT_HBITS_SEL_67, ++ PCC_PORT_HBITS_SEL_89, ++}; ++ ++struct aspeed_pcc_dma { ++ uint32_t rptr; ++ uint8_t *virt; ++ dma_addr_t addr; ++ uint32_t size; ++}; ++ ++struct aspeed_pcc { ++ struct device *dev; ++ struct regmap *regmap; ++ int irq; ++ uint32_t rec_mode; ++ uint32_t port; ++ uint32_t port_xbits; ++ uint32_t port_hbits_select; ++ uint32_t dma_mode; ++ struct aspeed_pcc_dma dma; ++ struct kfifo fifo; ++ wait_queue_head_t wq; ++ struct miscdevice misc_dev; ++ bool a2600_15; ++}; ++ ++static inline bool is_valid_rec_mode(uint32_t mode) ++{ ++ return (mode > PCC_REC_FULL) ? false : true; ++} ++ ++static inline bool is_valid_high_bits_select(uint32_t sel) ++{ ++ return (sel > PCC_PORT_HBITS_SEL_89) ? false : true; ++} ++ ++static ssize_t aspeed_pcc_file_read(struct file *file, char __user *buffer, ++ size_t count, loff_t *ppos) ++{ ++ int rc; ++ ssize_t copied; ++ ++ struct aspeed_pcc *pcc = container_of( ++ file->private_data, ++ struct aspeed_pcc, ++ misc_dev); ++ ++ if (kfifo_is_empty(&pcc->fifo)) { ++ if (file->f_flags & O_NONBLOCK) ++ return -EAGAIN; ++ ++ rc = wait_event_interruptible(pcc->wq, ++ !kfifo_is_empty(&pcc->fifo)); ++ ++ if (rc == -ERESTARTSYS) ++ return -EINTR; ++ } ++ ++ rc = kfifo_to_user(&pcc->fifo, buffer, count, &copied); ++ ++ return rc ? rc : copied; ++} ++ ++static __poll_t aspeed_pcc_file_poll(struct file *file, ++ struct poll_table_struct *pt) ++{ ++ struct aspeed_pcc *pcc = container_of( ++ file->private_data, ++ struct aspeed_pcc, ++ misc_dev); ++ ++ poll_wait(file, &pcc->wq, pt); ++ ++ return !kfifo_is_empty(&pcc->fifo) ? POLLIN : 0; ++} ++ ++static const struct file_operations pcc_fops = { ++ .owner = THIS_MODULE, ++ .read = aspeed_pcc_file_read, ++ .poll = aspeed_pcc_file_poll, ++}; ++ ++static irqreturn_t aspeed_pcc_dma_isr(int irq, void *arg) ++{ ++ uint32_t reg, rptr, wptr; ++ struct aspeed_pcc *pcc = (struct aspeed_pcc*)arg; ++ struct kfifo *fifo = &pcc->fifo; ++ ++ regmap_read(pcc->regmap, PCCR6, ®); ++ ++ regmap_write_bits(pcc->regmap, PCCR2, PCCR2_DMA_DONE, PCCR2_DMA_DONE); ++ ++ wptr = (reg & PCCR6_DMA_CUR_ADDR) - (pcc->dma.addr & PCCR6_DMA_CUR_ADDR); ++ rptr = pcc->dma.rptr; ++ ++ do { ++ if (kfifo_is_full(fifo)) ++ kfifo_skip(fifo); ++ ++ kfifo_put(fifo, pcc->dma.virt[rptr]); ++ ++ rptr = (rptr + 1) % pcc->dma.size; ++ } while (rptr != wptr); ++ ++ pcc->dma.rptr = rptr; ++ ++ wake_up_interruptible(&pcc->wq); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t aspeed_pcc_isr(int irq, void *arg) ++{ ++ uint32_t sts, reg; ++ struct aspeed_pcc *pcc = (struct aspeed_pcc*)arg; ++ struct kfifo *fifo = &pcc->fifo; ++ ++ regmap_read(pcc->regmap, PCCR2, &sts); ++ ++ if (!(sts & (PCCR2_RX_TMOUT_INT | PCCR2_RX_AVAIL_INT | PCCR2_DMA_DONE))) ++ return IRQ_NONE; ++ ++ if (pcc->dma_mode) ++ return aspeed_pcc_dma_isr(irq, arg); ++ ++ while (sts & PCCR2_DATA_RDY) { ++ regmap_read(pcc->regmap, PCCR3, ®); ++ ++ if (kfifo_is_full(fifo)) ++ kfifo_skip(fifo); ++ ++ kfifo_put(fifo, reg & PCCR3_FIFO_DATA_MASK); ++ ++ regmap_read(pcc->regmap, PCCR2, &sts); ++ } ++ ++ wake_up_interruptible(&pcc->wq); ++ ++ return IRQ_HANDLED; ++} ++ ++/* ++ * A2600-15 AP note ++ * ++ * SW workaround to prevent generating Non-Fatal-Error (NFE) ++ * eSPI response when PCC is used for port I/O byte snooping ++ * over eSPI. ++ */ ++#define SNPWADR 0x90 ++#define HICR6 0x84 ++#define HICRB 0x100 ++static int aspeed_a2600_15(struct aspeed_pcc *pcc, struct device *dev) ++{ ++ struct device_node *np; ++ ++ /* abort if snoop is enabled */ ++ np = of_find_compatible_node(NULL, NULL, "aspeed,ast2600-lpc-snoop"); ++ if (np) { ++ if (of_device_is_available(np)) { ++ dev_err(dev, "A2600-15 should be applied with snoop disabled\n"); ++ return -EPERM; ++ } ++ } ++ ++ /* abort if port is not 4-bytes continuous range */ ++ if (pcc->port_xbits != 0x3) { ++ dev_err(dev, "A2600-15 should be applied on 4-bytes continuous I/O address range\n"); ++ return -EINVAL; ++ } ++ ++ /* set SNPWADR of snoop device */ ++ regmap_write(pcc->regmap, SNPWADR, pcc->port | ((pcc->port + 2) << 16)); ++ ++ /* set HICRB[15:14]=11b to enable ACCEPT response for SNPWADR */ ++ regmap_update_bits(pcc->regmap, HICRB, BIT(14) | BIT(15), BIT(14) | BIT(15)); ++ ++ /* set HICR6[19] to extend SNPWADR to 2x range */ ++ regmap_update_bits(pcc->regmap, HICR6, BIT(19), BIT(19)); ++ ++ return 0; ++} ++ ++static int aspeed_pcc_enable(struct aspeed_pcc *pcc, struct device *dev) ++{ ++ int rc; ++ ++ if (pcc->a2600_15) { ++ rc = aspeed_a2600_15(pcc, dev); ++ if (rc) ++ return rc; ++ } ++ ++ /* record mode */ ++ regmap_update_bits(pcc->regmap, PCCR0, ++ PCCR0_MODE_SEL_MASK, ++ pcc->rec_mode << PCCR0_MODE_SEL_SHIFT); ++ ++ /* port address */ ++ regmap_update_bits(pcc->regmap, PCCR1, ++ PCCR1_BASE_ADDR_MASK, ++ pcc->port << PCCR1_BASE_ADDR_SHIFT); ++ ++ /* port address high bits selection or parser control */ ++ regmap_update_bits(pcc->regmap, PCCR0, ++ PCCR0_ADDR_SEL_MASK, ++ pcc->port_hbits_select << PCCR0_ADDR_SEL_SHIFT); ++ ++ /* port address dont care bits */ ++ regmap_update_bits(pcc->regmap, PCCR1, ++ PCCR1_DONT_CARE_BITS_MASK, ++ pcc->port_xbits << PCCR1_DONT_CARE_BITS_SHIFT); ++ ++ /* set DMA ring buffer size and enable interrupts */ ++ if (pcc->dma_mode) { ++ regmap_write(pcc->regmap, PCCR4, pcc->dma.addr); ++ regmap_write(pcc->regmap, PCCR5, pcc->dma.size / 4); ++ regmap_update_bits(pcc->regmap, PCCR0, ++ PCCR0_EN_DMA_INT | PCCR0_EN_DMA_MODE, ++ PCCR0_EN_DMA_INT | PCCR0_EN_DMA_MODE); ++ } else { ++ regmap_update_bits(pcc->regmap, PCCR0, PCCR0_RX_TRIG_LVL_MASK, ++ PCC_FIFO_THR_4_EIGHTH << PCCR0_RX_TRIG_LVL_SHIFT); ++ regmap_update_bits(pcc->regmap, PCCR0, ++ PCCR0_EN_RX_TMOUT_INT | PCCR0_EN_RX_AVAIL_INT, ++ PCCR0_EN_RX_TMOUT_INT | PCCR0_EN_RX_AVAIL_INT); ++ } ++ ++ regmap_update_bits(pcc->regmap, PCCR0, PCCR0_EN, PCCR0_EN); ++ ++ return 0; ++} ++ ++static int aspeed_pcc_probe(struct platform_device *pdev) ++{ ++ int rc; ++ struct aspeed_pcc *pcc; ++ struct device *dev = &pdev->dev; ++ uint32_t fifo_size = PAGE_SIZE; ++ ++ pcc = devm_kzalloc(&pdev->dev, sizeof(*pcc), GFP_KERNEL); ++ if (!pcc) ++ return -ENOMEM; ++ ++ pcc->dev = dev; ++ ++ pcc->regmap = syscon_node_to_regmap(pdev->dev.parent->of_node); ++ if (IS_ERR(pcc->regmap)) { ++ dev_err(dev, "cannot map register\n"); ++ return -ENODEV; ++ } ++ ++ /* disable PCC for safety */ ++ regmap_update_bits(pcc->regmap, PCCR0, PCCR0_EN, 0); ++ ++ rc = of_property_read_u32(dev->of_node, "port-addr", &pcc->port); ++ if (rc) { ++ dev_err(dev, "cannot get port address\n"); ++ return -ENODEV; ++ } ++ ++ /* optional, by default: 0 -> 1-Byte mode */ ++ of_property_read_u32(dev->of_node, "rec-mode", &pcc->rec_mode); ++ if (!is_valid_rec_mode(pcc->rec_mode)) { ++ dev_err(dev, "invalid record mode: %u\n", ++ pcc->rec_mode); ++ return -EINVAL; ++ } ++ ++ /* optional, by default: 0 -> no don't care bits */ ++ of_property_read_u32(dev->of_node, "port-addr-xbits", &pcc->port_xbits); ++ ++ /* ++ * optional, by default: 0 -> no high address bits ++ * ++ * Note that when record mode is set to 1-Byte, this ++ * property is ignored and the corresponding HW bits ++ * behave as read/write cycle parser control with the ++ * value set to 0b11 ++ */ ++ if (pcc->rec_mode) { ++ of_property_read_u32(dev->of_node, "port-addr-hbits-select", &pcc->port_hbits_select); ++ if (!is_valid_high_bits_select(pcc->port_hbits_select)) { ++ dev_err(dev, "invalid high address bits selection: %u\n", ++ pcc->port_hbits_select); ++ return -EINVAL; ++ } ++ } ++ else ++ pcc->port_hbits_select = 0x3; ++ ++ pcc->dma_mode = of_property_read_bool(dev->of_node, "dma-mode"); ++ if (pcc->dma_mode) { ++ pcc->dma.size = PCC_DMA_BUFSZ; ++ pcc->dma.virt = dmam_alloc_coherent(dev, ++ pcc->dma.size, ++ &pcc->dma.addr, ++ GFP_KERNEL); ++ if (!pcc->dma.virt) { ++ dev_err(dev, "cannot allocate DMA buffer\n"); ++ return -ENOMEM; ++ } ++ ++ fifo_size = roundup(pcc->dma.size, PAGE_SIZE); ++ } ++ ++ rc = kfifo_alloc(&pcc->fifo, fifo_size, GFP_KERNEL); ++ if (rc) { ++ dev_err(dev, "cannot allocate kFIFO\n"); ++ return -ENOMEM; ++ } ++ ++ /* AP note A2600-15 */ ++ pcc->a2600_15 = of_property_read_bool(dev->of_node, "A2600-15"); ++ if (pcc->a2600_15) ++ dev_warn(dev, "A2600-15 AP note patch is selected\n"); ++ ++ pcc->irq = platform_get_irq(pdev, 0); ++ if (pcc->irq < 0) { ++ dev_err(dev, "cannot get IRQ\n"); ++ rc = -ENODEV; ++ goto err_free_kfifo; ++ } ++ ++ rc = devm_request_irq(dev, pcc->irq, aspeed_pcc_isr, 0, DEVICE_NAME, pcc); ++ if (rc < 0) { ++ dev_err(dev, "cannot request IRQ handler\n"); ++ goto err_free_kfifo; ++ } ++ ++ init_waitqueue_head(&pcc->wq); ++ ++ pcc->misc_dev.parent = dev; ++ pcc->misc_dev.name = devm_kasprintf(dev, GFP_KERNEL, "%s", DEVICE_NAME); ++ pcc->misc_dev.fops = &pcc_fops; ++ rc = misc_register(&pcc->misc_dev); ++ if (rc) { ++ dev_err(dev, "cannot register misc device\n"); ++ goto err_free_kfifo; ++ } ++ ++ rc = aspeed_pcc_enable(pcc, dev); ++ if (rc) { ++ dev_err(dev, "cannot enable PCC\n"); ++ goto err_dereg_mdev; ++ } ++ ++ dev_set_drvdata(&pdev->dev, pcc); ++ ++ dev_info(dev, "module loaded\n"); ++ ++ return 0; ++ ++err_dereg_mdev: ++ misc_deregister(&pcc->misc_dev); ++ ++err_free_kfifo: ++ kfifo_free(&pcc->fifo); ++ ++ return rc; ++} ++ ++static int aspeed_pcc_remove(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct aspeed_pcc *pcc = dev_get_drvdata(dev); ++ ++ kfifo_free(&pcc->fifo); ++ misc_deregister(&pcc->misc_dev); ++ ++ return 0; ++} ++ ++static const struct of_device_id aspeed_pcc_table[] = { ++ { .compatible = "aspeed,ast2500-lpc-pcc" }, ++ { .compatible = "aspeed,ast2600-lpc-pcc" }, ++ { }, ++}; ++ ++static struct platform_driver aspeed_pcc_driver = { ++ .driver = { ++ .name = "aspeed-pcc", ++ .of_match_table = aspeed_pcc_table, ++ }, ++ .probe = aspeed_pcc_probe, ++ .remove = aspeed_pcc_remove, ++}; ++ ++module_platform_driver(aspeed_pcc_driver); ++ ++MODULE_AUTHOR("Chia-Wei Wang "); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Driver for Aspeed Post Code Capture"); +-- +2.25.1 diff --git a/common/recipes-kernel/linux/6.6/0300-To-support-MCP9600-temperature-driver.patch b/common/recipes-kernel/linux/6.6/0300-To-support-MCP9600-temperature-driver.patch index c3cfd61a43b8..907d0ad14728 100644 --- a/common/recipes-kernel/linux/6.6/0300-To-support-MCP9600-temperature-driver.patch +++ b/common/recipes-kernel/linux/6.6/0300-To-support-MCP9600-temperature-driver.patch @@ -1,4 +1,4 @@ -From 6730a3fc30df7be7f6a5bf66f65e9a25915b5b2f Mon Sep 17 00:00:00 2001 +From a3b2d1e64d24e68aba8511ded1c4a83026654057 Mon Sep 17 00:00:00 2001 From: Peter Yin Date: Thu, 2 Nov 2023 14:52:04 +0800 Subject: [PATCH 300/303] To support MCP9600 temperature driver @@ -268,5 +268,5 @@ index 000000000000..46845804292b +MODULE_DESCRIPTION("Microchip MCP9600 thermocouple EMF converter driver"); +MODULE_LICENSE("GPL"); -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0301-To-support-MP2856-VR-driver.patch b/common/recipes-kernel/linux/6.6/0301-To-support-MP2856-VR-driver.patch index 8f6e466d8c83..29706c5ffddd 100644 --- a/common/recipes-kernel/linux/6.6/0301-To-support-MP2856-VR-driver.patch +++ b/common/recipes-kernel/linux/6.6/0301-To-support-MP2856-VR-driver.patch @@ -1,4 +1,4 @@ -From 15b91b16d378d68eda6e4c4e5489f335b57be6e3 Mon Sep 17 00:00:00 2001 +From 468f691fc6cd2fbabcd15a1236f639a1dfcc96e4 Mon Sep 17 00:00:00 2001 From: Peter Yin Date: Wed, 8 Nov 2023 09:27:35 +0800 Subject: [PATCH 301/303] To-support-MP2856-VR-driver @@ -517,5 +517,5 @@ index 000000000000..b72a46cb6e9b +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(PMBUS); -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0302-To-support-LTC4286-LTC4287-driver.patch b/common/recipes-kernel/linux/6.6/0302-To-support-LTC4286-LTC4287-driver.patch index c1d9104cc623..3bd261a6ef90 100644 --- a/common/recipes-kernel/linux/6.6/0302-To-support-LTC4286-LTC4287-driver.patch +++ b/common/recipes-kernel/linux/6.6/0302-To-support-LTC4286-LTC4287-driver.patch @@ -1,4 +1,4 @@ -From 1551ecad1f3872e2ac646d1893da885cdc8025e3 Mon Sep 17 00:00:00 2001 +From 8651cc9a082fac261346cace2170fdfaca18d400 Mon Sep 17 00:00:00 2001 From: Delphine CC Chiu Date: Mon, 24 Jul 2023 11:58:51 +0800 Subject: [PATCH 302/303] To support LTC4286 LTC4287 driver @@ -418,5 +418,5 @@ index 000000000000..32cf3946388e +MODULE_DESCRIPTION("PMBUS driver for LTC4286 and compatibles"); +MODULE_LICENSE("GPL"); -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0303-Kernel6v5-Support-apml-driver.patch b/common/recipes-kernel/linux/6.6/0303-Kernel6v5-Support-apml-driver.patch index b7db7225cd53..011b25ffa32b 100644 --- a/common/recipes-kernel/linux/6.6/0303-Kernel6v5-Support-apml-driver.patch +++ b/common/recipes-kernel/linux/6.6/0303-Kernel6v5-Support-apml-driver.patch @@ -1,4 +1,4 @@ -From 6d3d8333e412f2bc3393c55eea95b7cfeb342454 Mon Sep 17 00:00:00 2001 +From b1e1973b111e70051dfa91f1a4c32d64105ab60b Mon Sep 17 00:00:00 2001 From: Peter Yin Date: Fri, 24 Nov 2023 15:54:07 +0800 Subject: [PATCH 303/303] Kernel6v5: Support apml driver @@ -2754,5 +2754,5 @@ index 000000000000..041610925fad + +#endif /*_AMD_APML_H_*/ -- -2.41.0 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0304-hwmon-Add-driver-for-Astera-Labs-PT5161L-retimer.patch b/common/recipes-kernel/linux/6.6/0304-hwmon-Add-driver-for-Astera-Labs-PT5161L-retimer.patch new file mode 100644 index 000000000000..db6de29a29cb --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0304-hwmon-Add-driver-for-Astera-Labs-PT5161L-retimer.patch @@ -0,0 +1,811 @@ +From 5c2ba0b2e08f5c62d87831f0d7299a1e49cd6067 Mon Sep 17 00:00:00 2001 +From: Cosmo Chou +Date: Tue, 5 Dec 2023 15:14:31 +0800 +Subject: [PATCH v6 1/1] hwmon: Add driver for Astera Labs PT5161L retimer + +This driver implements support for temperature monitoring of Astera Labs +PT5161L series PCIe retimer chips. + +This driver implementation originates from the CSDK available at +Link: https://github.com/facebook/openbmc/tree/helium/common/recipes-lib/retimer-v2.14 +The communication protocol utilized is based on the I2C/SMBus standard. + +Signed-off-by: Cosmo Chou +--- + Documentation/hwmon/index.rst | 1 + + Documentation/hwmon/pt5161l.rst | 42 ++ + MAINTAINERS | 7 + + drivers/hwmon/Kconfig | 10 + + drivers/hwmon/Makefile | 1 + + drivers/hwmon/pt5161l.c | 667 ++++++++++++++++++++++++++++++++ + 6 files changed, 728 insertions(+) + create mode 100644 Documentation/hwmon/pt5161l.rst + create mode 100644 drivers/hwmon/pt5161l.c + +diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst +index c7ed1f73ac06..9f5f215fcb2d 100644 +--- a/Documentation/hwmon/index.rst ++++ b/Documentation/hwmon/index.rst +@@ -185,6 +185,7 @@ Hardware Monitoring Kernel Drivers + pmbus + powerz + powr1220 ++ pt5161l + pxe1610 + pwm-fan + q54sj108a2 +diff --git a/Documentation/hwmon/pt5161l.rst b/Documentation/hwmon/pt5161l.rst +new file mode 100644 +index 000000000000..1b97336991ea +--- /dev/null ++++ b/Documentation/hwmon/pt5161l.rst +@@ -0,0 +1,42 @@ ++.. SPDX-License-Identifier: GPL-2.0-or-later ++ ++Kernel driver pt5161l ++===================== ++ ++Supported chips: ++ ++ * Astera Labs PT5161L ++ ++ Prefix: 'pt5161l' ++ ++ Addresses scanned: I2C 0x20 - 0x27 ++ ++ Datasheet: Not publicly available. ++ ++Authors: Cosmo Chou ++ ++Description ++----------- ++ ++This driver implements support for temperature monitoring of Astera Labs ++PT5161L series PCIe retimer chips. ++ ++This driver implementation originates from the CSDK available at ++https://github.com/facebook/openbmc/tree/helium/common/recipes-lib/retimer-v2.14 ++The communication protocol utilized is based on the I2C/SMBus standard. ++ ++Sysfs entries ++---------------- ++ ++================ ============================================== ++temp1_input Measured temperature (in millidegrees Celsius) ++================ ============================================== ++ ++Debugfs entries ++---------------- ++ ++================ =============================== ++fw_load_status Firmware load status ++fw_ver Firmware version of the retimer ++heartbeat_status Heartbeat status ++================ =============================== +diff --git a/MAINTAINERS b/MAINTAINERS +index 960512bec428..a656b98971ca 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -17679,6 +17679,13 @@ F: fs/pstore/ + F: include/linux/pstore* + K: \b(pstore|ramoops) + ++PT5161L HARDWARE MONITOR DRIVER ++M: Cosmo Chou ++L: linux-hwmon@vger.kernel.org ++S: Maintained ++F: Documentation/hwmon/pt5161l.rst ++F: drivers/hwmon/pt5161l.c ++ + PTP HARDWARE CLOCK SUPPORT + M: Richard Cochran + L: netdev@vger.kernel.org +diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig +index a608264da87d..c8d86a695f66 100644 +--- a/drivers/hwmon/Kconfig ++++ b/drivers/hwmon/Kconfig +@@ -1714,6 +1714,16 @@ source "drivers/hwmon/peci/Kconfig" + + source "drivers/hwmon/pmbus/Kconfig" + ++config SENSORS_PT5161L ++ tristate "Astera Labs PT5161L PCIe retimer hardware monitoring" ++ depends on I2C ++ help ++ If you say yes here you get support for temperature monitoring ++ on the Astera Labs PT5161L PCIe retimer. ++ ++ This driver can also be built as a module. If so, the module ++ will be called pt5161l. ++ + config SENSORS_PWM_FAN + tristate "PWM fan" + depends on (PWM && OF) || COMPILE_TEST +diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile +index 47be39af5c03..0554d3ccb09a 100644 +--- a/drivers/hwmon/Makefile ++++ b/drivers/hwmon/Makefile +@@ -180,6 +180,7 @@ obj-$(CONFIG_SENSORS_PC87427) += pc87427.o + obj-$(CONFIG_SENSORS_PCF8591) += pcf8591.o + obj-$(CONFIG_SENSORS_POWERZ) += powerz.o + obj-$(CONFIG_SENSORS_POWR1220) += powr1220.o ++obj-$(CONFIG_SENSORS_PT5161L) += pt5161l.o + obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o + obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o + obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o +diff --git a/drivers/hwmon/pt5161l.c b/drivers/hwmon/pt5161l.c +new file mode 100644 +index 000000000000..60361e39c474 +--- /dev/null ++++ b/drivers/hwmon/pt5161l.c +@@ -0,0 +1,667 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Aries current average temp ADC code CSR */ ++#define ARIES_CURRENT_AVG_TEMP_ADC_CSR 0x42c ++ ++/* Device Load check register */ ++#define ARIES_CODE_LOAD_REG 0x605 ++/* Value indicating FW was loaded properly, [3:1] = 3'b111 */ ++#define ARIES_LOAD_CODE 0xe ++ ++/* Main Micro Heartbeat register */ ++#define ARIES_MM_HEARTBEAT_ADDR 0x923 ++ ++/* Reg offset to specify Address for MM assisted accesses */ ++#define ARIES_MM_ASSIST_REG_ADDR_OFFSET 0xd99 ++/* Reg offset to specify Command for MM assisted accesses */ ++#define ARIES_MM_ASSIST_CMD_OFFSET 0xd9d ++/* Reg offset to MM SPARE 0 used specify Address[7:0] */ ++#define ARIES_MM_ASSIST_SPARE_0_OFFSET 0xd9f ++/* Reg offset to MM SPARE 3 used specify Data Byte 0 */ ++#define ARIES_MM_ASSIST_SPARE_3_OFFSET 0xda2 ++/* Wide register reads */ ++#define ARIES_MM_RD_WIDE_REG_2B 0x1d ++#define ARIES_MM_RD_WIDE_REG_3B 0x1e ++#define ARIES_MM_RD_WIDE_REG_4B 0x1f ++#define ARIES_MM_RD_WIDE_REG_5B 0x20 ++ ++/* Time delay between checking MM status of EEPROM write (microseconds) */ ++#define ARIES_MM_STATUS_TIME 5000 ++ ++/* AL Main SRAM DMEM offset (A0) */ ++#define AL_MAIN_SRAM_DMEM_OFFSET (64 * 1024) ++/* SRAM read command */ ++#define AL_TG_RD_LOC_IND_SRAM 0x16 ++ ++/* Offset for main micro FW info */ ++#define ARIES_MAIN_MICRO_FW_INFO (96 * 1024 - 128) ++/* FW Info (Major) offset location in struct */ ++#define ARIES_MM_FW_VERSION_MAJOR 0 ++/* FW Info (Minor) offset location in struct */ ++#define ARIES_MM_FW_VERSION_MINOR 1 ++/* FW Info (Build no.) offset location in struct */ ++#define ARIES_MM_FW_VERSION_BUILD 2 ++ ++#define ARIES_TEMP_CAL_CODE_DEFAULT 84 ++ ++/* Struct defining FW version loaded on an Aries device */ ++struct pt5161l_fw_ver { ++ u8 major; ++ u8 minor; ++ u16 build; ++}; ++ ++/* Each client has this additional data */ ++struct pt5161l_data { ++ struct i2c_client *client; ++ struct dentry *debugfs; ++ struct pt5161l_fw_ver fw_ver; ++ struct mutex lock; /* for atomic I2C transactions */ ++ bool init_done; ++ bool code_load_okay; /* indicate if code load reg value is expected */ ++ bool mm_heartbeat_okay; /* indicate if Main Micro heartbeat is good */ ++ bool mm_wide_reg_access; /* MM assisted wide register access */ ++}; ++ ++static struct dentry *pt5161l_debugfs_dir; ++ ++/* ++ * Write multiple data bytes to Aries over I2C ++ */ ++static int pt5161l_write_block_data(struct pt5161l_data *data, u32 address, ++ u8 len, u8 *val) ++{ ++ struct i2c_client *client = data->client; ++ int ret; ++ u8 remain_len = len; ++ u8 xfer_len, curr_len; ++ u8 buf[16]; ++ u8 cmd = 0x0F; /* [7]:pec_en, [4:2]:func, [1]:start, [0]:end */ ++ u8 config = 0x40; /* [6]:cfg_type, [4:1]:burst_len, [0]:address bit16 */ ++ ++ while (remain_len > 0) { ++ if (remain_len > 4) { ++ curr_len = 4; ++ remain_len -= 4; ++ } else { ++ curr_len = remain_len; ++ remain_len = 0; ++ } ++ ++ buf[0] = config | (curr_len - 1) << 1 | ((address >> 16) & 0x1); ++ buf[1] = (address >> 8) & 0xff; ++ buf[2] = address & 0xff; ++ memcpy(&buf[3], val, curr_len); ++ ++ xfer_len = 3 + curr_len; ++ ret = i2c_smbus_write_block_data(client, cmd, xfer_len, buf); ++ if (ret) ++ return ret; ++ ++ val += curr_len; ++ address += curr_len; ++ } ++ ++ return 0; ++} ++ ++/* ++ * Read multiple data bytes from Aries over I2C ++ */ ++static int pt5161l_read_block_data(struct pt5161l_data *data, u32 address, ++ u8 len, u8 *val) ++{ ++ struct i2c_client *client = data->client; ++ int ret, tries; ++ u8 remain_len = len; ++ u8 curr_len; ++ u8 wbuf[16], rbuf[24]; ++ u8 cmd = 0x08; /* [7]:pec_en, [4:2]:func, [1]:start, [0]:end */ ++ u8 config = 0x00; /* [6]:cfg_type, [4:1]:burst_len, [0]:address bit16 */ ++ ++ while (remain_len > 0) { ++ if (remain_len > 16) { ++ curr_len = 16; ++ remain_len -= 16; ++ } else { ++ curr_len = remain_len; ++ remain_len = 0; ++ } ++ ++ wbuf[0] = config | (curr_len - 1) << 1 | ++ ((address >> 16) & 0x1); ++ wbuf[1] = (address >> 8) & 0xff; ++ wbuf[2] = address & 0xff; ++ ++ for (tries = 0; tries < 3; tries++) { ++ ret = i2c_smbus_write_block_data(client, (cmd | 0x2), 3, ++ wbuf); ++ if (ret) ++ return ret; ++ ++ ret = i2c_smbus_read_block_data(client, (cmd | 0x1), ++ rbuf); ++ if (ret == curr_len) ++ break; ++ } ++ if (tries >= 3) ++ return ret; ++ ++ memcpy(val, rbuf, curr_len); ++ val += curr_len; ++ address += curr_len; ++ } ++ ++ return 0; ++} ++ ++static int pt5161l_read_wide_reg(struct pt5161l_data *data, u32 address, ++ u8 width, u8 *val) ++{ ++ int ret, tries; ++ u8 buf[8]; ++ u8 status; ++ ++ /* ++ * Safely access wide registers using mailbox method to prevent ++ * risking conflict with Aries firmware; otherwise fallback to ++ * legacy, less secure method. ++ */ ++ if (data->mm_wide_reg_access) { ++ buf[0] = address & 0xff; ++ buf[1] = (address >> 8) & 0xff; ++ buf[2] = (address >> 16) & 0x1; ++ ret = pt5161l_write_block_data(data, ++ ARIES_MM_ASSIST_SPARE_0_OFFSET, ++ 3, buf); ++ if (ret) ++ return ret; ++ ++ /* Set command based on width */ ++ switch (width) { ++ case 2: ++ buf[0] = ARIES_MM_RD_WIDE_REG_2B; ++ break; ++ case 3: ++ buf[0] = ARIES_MM_RD_WIDE_REG_3B; ++ break; ++ case 4: ++ buf[0] = ARIES_MM_RD_WIDE_REG_4B; ++ break; ++ case 5: ++ buf[0] = ARIES_MM_RD_WIDE_REG_5B; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ret = pt5161l_write_block_data(data, ARIES_MM_ASSIST_CMD_OFFSET, ++ 1, buf); ++ if (ret) ++ return ret; ++ ++ status = 0xff; ++ for (tries = 0; tries < 100; tries++) { ++ ret = pt5161l_read_block_data(data, ++ ARIES_MM_ASSIST_CMD_OFFSET, ++ 1, &status); ++ if (ret) ++ return ret; ++ ++ if (status == 0) ++ break; ++ ++ usleep_range(ARIES_MM_STATUS_TIME, ++ ARIES_MM_STATUS_TIME + 1000); ++ } ++ if (status != 0) ++ return -ETIMEDOUT; ++ ++ ret = pt5161l_read_block_data(data, ++ ARIES_MM_ASSIST_SPARE_3_OFFSET, ++ width, val); ++ if (ret) ++ return ret; ++ } else { ++ return pt5161l_read_block_data(data, address, width, val); ++ } ++ ++ return 0; ++} ++ ++/* ++ * Read multiple (up to eight) data bytes from micro SRAM over I2C ++ */ ++static int ++pt5161l_read_block_data_main_micro_indirect(struct pt5161l_data *data, ++ u32 address, u8 len, u8 *val) ++{ ++ int ret, tries; ++ u8 buf[8]; ++ u8 i, status; ++ u32 uind_offs = ARIES_MM_ASSIST_REG_ADDR_OFFSET; ++ u32 eeprom_base, eeprom_addr; ++ ++ /* No multi-byte indirect support here. Hence read a byte at a time */ ++ eeprom_base = address - AL_MAIN_SRAM_DMEM_OFFSET; ++ for (i = 0; i < len; i++) { ++ eeprom_addr = eeprom_base + i; ++ buf[0] = eeprom_addr & 0xff; ++ buf[1] = (eeprom_addr >> 8) & 0xff; ++ buf[2] = (eeprom_addr >> 16) & 0xff; ++ ret = pt5161l_write_block_data(data, uind_offs, 3, buf); ++ if (ret) ++ return ret; ++ ++ buf[0] = AL_TG_RD_LOC_IND_SRAM; ++ ret = pt5161l_write_block_data(data, uind_offs + 4, 1, buf); ++ if (ret) ++ return ret; ++ ++ status = 0xff; ++ for (tries = 0; tries < 255; tries++) { ++ ret = pt5161l_read_block_data(data, uind_offs + 4, 1, ++ &status); ++ if (ret) ++ return ret; ++ ++ if (status == 0) ++ break; ++ } ++ if (status != 0) ++ return -ETIMEDOUT; ++ ++ ret = pt5161l_read_block_data(data, uind_offs + 3, 1, buf); ++ if (ret) ++ return ret; ++ ++ val[i] = buf[0]; ++ } ++ ++ return 0; ++} ++ ++/* ++ * Check firmware load status ++ */ ++static int pt5161l_fw_load_check(struct pt5161l_data *data) ++{ ++ int ret; ++ u8 buf[8]; ++ ++ ret = pt5161l_read_block_data(data, ARIES_CODE_LOAD_REG, 1, buf); ++ if (ret) ++ return ret; ++ ++ if (buf[0] < ARIES_LOAD_CODE) { ++ dev_dbg(&data->client->dev, ++ "Code Load reg unexpected. Not all modules are loaded %x\n", ++ buf[0]); ++ data->code_load_okay = false; ++ } else { ++ data->code_load_okay = true; ++ } ++ ++ return 0; ++} ++ ++/* ++ * Check main micro heartbeat ++ */ ++static int pt5161l_heartbeat_check(struct pt5161l_data *data) ++{ ++ int ret, tries; ++ u8 buf[8]; ++ u8 heartbeat; ++ bool hb_changed = false; ++ ++ ret = pt5161l_read_block_data(data, ARIES_MM_HEARTBEAT_ADDR, 1, buf); ++ if (ret) ++ return ret; ++ ++ heartbeat = buf[0]; ++ for (tries = 0; tries < 100; tries++) { ++ ret = pt5161l_read_block_data(data, ARIES_MM_HEARTBEAT_ADDR, 1, ++ buf); ++ if (ret) ++ return ret; ++ ++ if (buf[0] != heartbeat) { ++ hb_changed = true; ++ break; ++ } ++ } ++ data->mm_heartbeat_okay = hb_changed; ++ ++ return 0; ++} ++ ++/* ++ * Check the status of firmware ++ */ ++static int pt5161l_fwsts_check(struct pt5161l_data *data) ++{ ++ int ret; ++ u8 buf[8]; ++ u8 major = 0, minor = 0; ++ u16 build = 0; ++ ++ ret = pt5161l_fw_load_check(data); ++ if (ret) ++ return ret; ++ ++ ret = pt5161l_heartbeat_check(data); ++ if (ret) ++ return ret; ++ ++ if (data->code_load_okay && data->mm_heartbeat_okay) { ++ ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO + ++ ARIES_MM_FW_VERSION_MAJOR, ++ 1, &major); ++ if (ret) ++ return ret; ++ ++ ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO + ++ ARIES_MM_FW_VERSION_MINOR, ++ 1, &minor); ++ if (ret) ++ return ret; ++ ++ ret = pt5161l_read_block_data_main_micro_indirect(data, ARIES_MAIN_MICRO_FW_INFO + ++ ARIES_MM_FW_VERSION_BUILD, ++ 2, buf); ++ if (ret) ++ return ret; ++ build = buf[1] << 8 | buf[0]; ++ } ++ data->fw_ver.major = major; ++ data->fw_ver.minor = minor; ++ data->fw_ver.build = build; ++ ++ return 0; ++} ++ ++static int pt5161l_fw_is_at_least(struct pt5161l_data *data, u8 major, u8 minor, ++ u16 build) ++{ ++ u32 ver = major << 24 | minor << 16 | build; ++ u32 curr_ver = data->fw_ver.major << 24 | data->fw_ver.minor << 16 | ++ data->fw_ver.build; ++ ++ if (curr_ver >= ver) ++ return true; ++ ++ return false; ++} ++ ++static int pt5161l_init_dev(struct pt5161l_data *data) ++{ ++ int ret; ++ ++ mutex_lock(&data->lock); ++ ret = pt5161l_fwsts_check(data); ++ mutex_unlock(&data->lock); ++ if (ret) ++ return ret; ++ ++ /* Firmware 2.2.0 enables safe access to wide registers */ ++ if (pt5161l_fw_is_at_least(data, 2, 2, 0)) ++ data->mm_wide_reg_access = true; ++ ++ data->init_done = true; ++ ++ return 0; ++} ++ ++static int pt5161l_read(struct device *dev, enum hwmon_sensor_types type, ++ u32 attr, int channel, long *val) ++{ ++ struct pt5161l_data *data = dev_get_drvdata(dev); ++ int ret; ++ u8 buf[8]; ++ long adc_code; ++ ++ switch (attr) { ++ case hwmon_temp_input: ++ if (!data->init_done) { ++ ret = pt5161l_init_dev(data); ++ if (ret) ++ return ret; ++ } ++ ++ mutex_lock(&data->lock); ++ ret = pt5161l_read_wide_reg(data, ++ ARIES_CURRENT_AVG_TEMP_ADC_CSR, 4, ++ buf); ++ mutex_unlock(&data->lock); ++ if (ret) { ++ dev_dbg(dev, "Read adc_code failed %d\n", ret); ++ return ret; ++ } ++ ++ adc_code = buf[3] << 24 | buf[2] << 16 | buf[1] << 8 | buf[0]; ++ if (adc_code == 0 || adc_code >= 0x3ff) { ++ dev_dbg(dev, "Invalid adc_code %lx\n", adc_code); ++ return -EIO; ++ } ++ ++ *val = 110000 + ++ ((adc_code - (ARIES_TEMP_CAL_CODE_DEFAULT + 250)) * ++ -320); ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ return 0; ++} ++ ++static umode_t pt5161l_is_visible(const void *data, ++ enum hwmon_sensor_types type, u32 attr, ++ int channel) ++{ ++ switch (attr) { ++ case hwmon_temp_input: ++ return 0444; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static const struct hwmon_channel_info *pt5161l_info[] = { ++ HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT), ++ NULL ++}; ++ ++static const struct hwmon_ops pt5161l_hwmon_ops = { ++ .is_visible = pt5161l_is_visible, ++ .read = pt5161l_read, ++}; ++ ++static const struct hwmon_chip_info pt5161l_chip_info = { ++ .ops = &pt5161l_hwmon_ops, ++ .info = pt5161l_info, ++}; ++ ++static ssize_t pt5161l_debugfs_read_fw_ver(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct pt5161l_data *data = file->private_data; ++ int ret; ++ char ver[32]; ++ ++ mutex_lock(&data->lock); ++ ret = pt5161l_fwsts_check(data); ++ mutex_unlock(&data->lock); ++ if (ret) ++ return ret; ++ ++ ret = snprintf(ver, sizeof(ver), "%u.%u.%u\n", data->fw_ver.major, ++ data->fw_ver.minor, data->fw_ver.build); ++ ++ return simple_read_from_buffer(buf, count, ppos, ver, ret); ++} ++ ++static const struct file_operations pt5161l_debugfs_ops_fw_ver = { ++ .read = pt5161l_debugfs_read_fw_ver, ++ .open = simple_open, ++}; ++ ++static ssize_t pt5161l_debugfs_read_fw_load_sts(struct file *file, ++ char __user *buf, size_t count, ++ loff_t *ppos) ++{ ++ struct pt5161l_data *data = file->private_data; ++ int ret; ++ bool status = false; ++ char health[16]; ++ ++ mutex_lock(&data->lock); ++ ret = pt5161l_fw_load_check(data); ++ mutex_unlock(&data->lock); ++ if (ret == 0) ++ status = data->code_load_okay; ++ ++ ret = snprintf(health, sizeof(health), "%s\n", ++ status ? "normal" : "abnormal"); ++ ++ return simple_read_from_buffer(buf, count, ppos, health, ret); ++} ++ ++static const struct file_operations pt5161l_debugfs_ops_fw_load_sts = { ++ .read = pt5161l_debugfs_read_fw_load_sts, ++ .open = simple_open, ++}; ++ ++static ssize_t pt5161l_debugfs_read_hb_sts(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ struct pt5161l_data *data = file->private_data; ++ int ret; ++ bool status = false; ++ char health[16]; ++ ++ mutex_lock(&data->lock); ++ ret = pt5161l_heartbeat_check(data); ++ mutex_unlock(&data->lock); ++ if (ret == 0) ++ status = data->mm_heartbeat_okay; ++ ++ ret = snprintf(health, sizeof(health), "%s\n", ++ status ? "normal" : "abnormal"); ++ ++ return simple_read_from_buffer(buf, count, ppos, health, ret); ++} ++ ++static const struct file_operations pt5161l_debugfs_ops_hb_sts = { ++ .read = pt5161l_debugfs_read_hb_sts, ++ .open = simple_open, ++}; ++ ++static int pt5161l_init_debugfs(struct pt5161l_data *data) ++{ ++ data->debugfs = debugfs_create_dir(dev_name(&data->client->dev), ++ pt5161l_debugfs_dir); ++ ++ debugfs_create_file("fw_ver", 0444, data->debugfs, data, ++ &pt5161l_debugfs_ops_fw_ver); ++ ++ debugfs_create_file("fw_load_status", 0444, data->debugfs, data, ++ &pt5161l_debugfs_ops_fw_load_sts); ++ ++ debugfs_create_file("heartbeat_status", 0444, data->debugfs, data, ++ &pt5161l_debugfs_ops_hb_sts); ++ ++ return 0; ++} ++ ++static int pt5161l_probe(struct i2c_client *client) ++{ ++ struct device *dev = &client->dev; ++ struct device *hwmon_dev; ++ struct pt5161l_data *data; ++ ++ data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ data->client = client; ++ mutex_init(&data->lock); ++ pt5161l_init_dev(data); ++ dev_set_drvdata(dev, data); ++ ++ hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ++ data, ++ &pt5161l_chip_info, ++ NULL); ++ ++ pt5161l_init_debugfs(data); ++ ++ return PTR_ERR_OR_ZERO(hwmon_dev); ++} ++ ++static void pt5161l_remove(struct i2c_client *client) ++{ ++ struct pt5161l_data *data = i2c_get_clientdata(client); ++ ++ debugfs_remove_recursive(data->debugfs); ++} ++ ++static const struct of_device_id __maybe_unused pt5161l_of_match[] = { ++ { .compatible = "asteralabs,pt5161l" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, pt5161l_of_match); ++ ++static const struct acpi_device_id __maybe_unused pt5161l_acpi_match[] = { ++ { "PT5161L", 0 }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(acpi, pt5161l_acpi_match); ++ ++static const struct i2c_device_id pt5161l_id[] = { ++ { "pt5161l", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(i2c, pt5161l_id); ++ ++static struct i2c_driver pt5161l_driver = { ++ .class = I2C_CLASS_HWMON, ++ .driver = { ++ .name = "pt5161l", ++ .of_match_table = of_match_ptr(pt5161l_of_match), ++ .acpi_match_table = ACPI_PTR(pt5161l_acpi_match), ++ }, ++ .probe = pt5161l_probe, ++ .remove = pt5161l_remove, ++ .id_table = pt5161l_id, ++}; ++ ++static int __init pt5161l_init(void) ++{ ++ pt5161l_debugfs_dir = debugfs_create_dir("pt5161l", NULL); ++ return i2c_add_driver(&pt5161l_driver); ++} ++ ++static void __exit pt5161l_exit(void) ++{ ++ i2c_del_driver(&pt5161l_driver); ++ debugfs_remove_recursive(pt5161l_debugfs_dir); ++} ++ ++module_init(pt5161l_init); ++module_exit(pt5161l_exit); ++ ++MODULE_AUTHOR("Cosmo Chou "); ++MODULE_DESCRIPTION("Hwmon driver for Astera Labs Aries PCIe retimer"); ++MODULE_LICENSE("GPL"); +-- +2.34.1 + diff --git a/common/recipes-kernel/linux/6.6/0310-ARM-dts-aspeed-Enable-jtag1-in-fblite-r1-dts.patch b/common/recipes-kernel/linux/6.6/0310-ARM-dts-aspeed-Enable-jtag1-in-fblite-r1-dts.patch new file mode 100644 index 000000000000..39391e80511d --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0310-ARM-dts-aspeed-Enable-jtag1-in-fblite-r1-dts.patch @@ -0,0 +1,33 @@ +From 6f44cf1b8ec57f660f173e7db388ec2feff8705b Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Mon, 12 Feb 2024 14:09:50 -0800 +Subject: [PATCH] ARM: dts: aspeed: Enable jtag1 in fblite-r1 dts + +Summary: + +Enable jtag1 in fblite-r1 device tree for firmware upgrade. + +Test Plan: + +1) "bitbake janga-image" succeeded. +2) "bitbake tahan-image" succeeded. +3) verified jtag is enabled after booting up janga and tahan. +--- + arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts +index 4264bd3c7a6b..dee1f78b8ca0 100644 +--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts ++++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-fblite-r1.dts +@@ -92,3 +92,7 @@ flash1@0 { + }; + }; + }; ++ ++&jtag1 { ++ status = "okay"; ++}; +-- +2.25.1 + diff --git a/common/recipes-kernel/linux/6.6/0500-hwmon-Add-net_brcm-driver.patch b/common/recipes-kernel/linux/6.6/0500-hwmon-Add-net_brcm-driver.patch index 616d3489d54f..e1581e6f9a3c 100644 --- a/common/recipes-kernel/linux/6.6/0500-hwmon-Add-net_brcm-driver.patch +++ b/common/recipes-kernel/linux/6.6/0500-hwmon-Add-net_brcm-driver.patch @@ -1,4 +1,4 @@ -From 65b003a8bfab4eccc23a311feee76338597d4146 Mon Sep 17 00:00:00 2001 +From cc9bb556b267b1437a92b721781353f1cd791f0f Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Thu, 8 Apr 2021 15:23:48 -0700 Subject: [PATCH 500/501] hwmon: Add net_brcm driver @@ -30,10 +30,10 @@ Signature: 27585349:1617733366:5443ecb847967f7725c2d8d6416b357b37ac4f28 create mode 100644 drivers/hwmon/net_brcm.c diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index 307477b8a371..91517f3d62d4 100644 +index cdde5a2a4d90..15f3d1d3bc9c 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig -@@ -1597,6 +1597,16 @@ config SENSORS_NCT7904 +@@ -1618,6 +1618,16 @@ config SENSORS_NCT7904 This driver can also be built as a module. If so, the module will be called nct7904. @@ -51,10 +51,10 @@ index 307477b8a371..91517f3d62d4 100644 tristate "Nuvoton NPCM750 and compatible PWM and Fan controllers" imply THERMAL diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index 3f4b0fda0998..6617f250ed41 100644 +index 774eba4960d6..344c84fa6c84 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile -@@ -166,6 +166,7 @@ obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o +@@ -168,6 +168,7 @@ obj-$(CONFIG_SENSORS_NCT6775) += nct6775.o obj-$(CONFIG_SENSORS_NCT6775_I2C) += nct6775-i2c.o obj-$(CONFIG_SENSORS_NCT7802) += nct7802.o obj-$(CONFIG_SENSORS_NCT7904) += nct7904.o @@ -297,5 +297,5 @@ index 000000000000..638a4ab7d7cf +MODULE_DESCRIPTION("NET_BRCM Driver"); +MODULE_LICENSE("GPL"); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0501-hwmon-pmbus-Add-xdpe132g5c-driver.patch b/common/recipes-kernel/linux/6.6/0501-hwmon-pmbus-Add-xdpe132g5c-driver.patch index 57e10b73763b..cc7f92dfc1ac 100644 --- a/common/recipes-kernel/linux/6.6/0501-hwmon-pmbus-Add-xdpe132g5c-driver.patch +++ b/common/recipes-kernel/linux/6.6/0501-hwmon-pmbus-Add-xdpe132g5c-driver.patch @@ -1,4 +1,4 @@ -From e02c3ffdc5b203642c0e5a63ca0888adf1cfa5c3 Mon Sep 17 00:00:00 2001 +From 7941d14f1ed5345693e322bb51ab118680ba39f5 Mon Sep 17 00:00:00 2001 From: "karthik.gengan" Date: Fri, 4 Nov 2022 06:31:37 +0000 Subject: [PATCH 501/501] hwmon: (pmbus) Add xdpe132g5c driver @@ -17,10 +17,10 @@ This patch is needed by wedge400 and fuji. create mode 100644 drivers/hwmon/pmbus/xdpe132g5c.c diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig -index 270b6336b76d..afa849304176 100644 +index 294808f5240a..617d45295bb3 100644 --- a/drivers/hwmon/pmbus/Kconfig +++ b/drivers/hwmon/pmbus/Kconfig -@@ -491,6 +491,15 @@ config SENSORS_XDPE122_REGULATOR +@@ -526,6 +526,15 @@ config SENSORS_XDPE122_REGULATOR help Uses the xdpe12284 or compatible as regulator. @@ -37,10 +37,10 @@ index 270b6336b76d..afa849304176 100644 tristate "Intersil ZL6100 and compatibles" help diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile -index 84ee960a6c2d..6f099bc88da3 100644 +index cf8a76744545..f626db4e99e9 100644 --- a/drivers/hwmon/pmbus/Makefile +++ b/drivers/hwmon/pmbus/Makefile -@@ -49,5 +49,6 @@ obj-$(CONFIG_SENSORS_UCD9000) += ucd9000.o +@@ -52,5 +52,6 @@ obj-$(CONFIG_SENSORS_UCD9000) += ucd9000.o obj-$(CONFIG_SENSORS_UCD9200) += ucd9200.o obj-$(CONFIG_SENSORS_XDPE122) += xdpe12284.o obj-$(CONFIG_SENSORS_XDPE152) += xdpe152c4.o @@ -256,5 +256,5 @@ index 000000000000..d39bb63565da +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(PMBUS); -- -2.39.3 +2.43.0 diff --git a/common/recipes-kernel/linux/6.6/0503-Revert-usb-gadget-f_ecm-Add-suspend-resume-and-remot.patch b/common/recipes-kernel/linux/6.6/0503-Revert-usb-gadget-f_ecm-Add-suspend-resume-and-remot.patch new file mode 100644 index 000000000000..aa41a3c9f776 --- /dev/null +++ b/common/recipes-kernel/linux/6.6/0503-Revert-usb-gadget-f_ecm-Add-suspend-resume-and-remot.patch @@ -0,0 +1,178 @@ +From 4081a6b8adf3d661144aa7abd644580d4290116c Mon Sep 17 00:00:00 2001 +From: Tao Ren +Date: Mon, 12 Feb 2024 11:31:14 +0700 +Subject: Revert linux kernel patch usb: gadget: f_ecm: Add suspend/resume and remote wakeup support +(https://github.com/torvalds/linux/commit/0a1af6dfa0772ffedaef422127f1338fa0ddfed3). + +The above patch added suspend/resume support to USB gadgets. +After this patch was added ping fails between COMe and USB0 fails over the USB ethernet interface +if the COMe is boots up after BMC. + +Till a proper root-cause is found, +as temporary patch the above patch is reverted. + +--- + drivers/usb/gadget/function/f_ecm.c | 22 ---------- + drivers/usb/gadget/function/u_ether.c | 63 --------------------------- + drivers/usb/gadget/function/u_ether.h | 4 -- + 3 files changed, 89 deletions(-) + +diff --git a/drivers/usb/gadget/function/f_ecm.c b/drivers/usb/gadget/function/f_ecm.c +index f55f60639e42..d1b9e3831578 100644 +--- a/drivers/usb/gadget/function/f_ecm.c ++++ b/drivers/usb/gadget/function/f_ecm.c +@@ -872,26 +872,6 @@ static struct usb_function_instance *ecm_alloc_inst(void) + return &opts->func_inst; + } + +-static void ecm_suspend(struct usb_function *f) +-{ +- struct f_ecm *ecm = func_to_ecm(f); +- struct usb_composite_dev *cdev = ecm->port.func.config->cdev; +- +- DBG(cdev, "ECM Suspend\n"); +- +- gether_suspend(&ecm->port); +-} +- +-static void ecm_resume(struct usb_function *f) +-{ +- struct f_ecm *ecm = func_to_ecm(f); +- struct usb_composite_dev *cdev = ecm->port.func.config->cdev; +- +- DBG(cdev, "ECM Resume\n"); +- +- gether_resume(&ecm->port); +-} +- + static void ecm_free(struct usb_function *f) + { + struct f_ecm *ecm; +@@ -959,8 +939,6 @@ static struct usb_function *ecm_alloc(struct usb_function_instance *fi) + ecm->port.func.setup = ecm_setup; + ecm->port.func.disable = ecm_disable; + ecm->port.func.free_func = ecm_free; +- ecm->port.func.suspend = ecm_suspend; +- ecm->port.func.resume = ecm_resume; + + return &ecm->port.func; + } +diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c +index 4bb0553da658..74222f1788f8 100644 +--- a/drivers/usb/gadget/function/u_ether.c ++++ b/drivers/usb/gadget/function/u_ether.c +@@ -437,20 +437,6 @@ static inline int is_promisc(u16 cdc_filter) + return cdc_filter & USB_CDC_PACKET_TYPE_PROMISCUOUS; + } + +-static int ether_wakeup_host(struct gether *port) +-{ +- int ret; +- struct usb_function *func = &port->func; +- struct usb_gadget *gadget = func->config->cdev->gadget; +- +- if (func->func_suspended) +- ret = usb_func_wakeup(func); +- else +- ret = usb_gadget_wakeup(gadget); +- +- return ret; +-} +- + static netdev_tx_t eth_start_xmit(struct sk_buff *skb, + struct net_device *net) + { +@@ -470,15 +456,6 @@ static netdev_tx_t eth_start_xmit(struct sk_buff *skb, + in = NULL; + cdc_filter = 0; + } +- +- if (dev->port_usb && dev->port_usb->is_suspend) { +- DBG(dev, "Port suspended. Triggering wakeup\n"); +- netif_stop_queue(net); +- spin_unlock_irqrestore(&dev->lock, flags); +- ether_wakeup_host(dev->port_usb); +- return NETDEV_TX_BUSY; +- } +- + spin_unlock_irqrestore(&dev->lock, flags); + + if (!in) { +@@ -1039,45 +1016,6 @@ int gether_set_ifname(struct net_device *net, const char *name, int len) + } + EXPORT_SYMBOL_GPL(gether_set_ifname); + +-void gether_suspend(struct gether *link) +-{ +- struct eth_dev *dev = link->ioport; +- unsigned long flags; +- +- if (!dev) +- return; +- +- if (atomic_read(&dev->tx_qlen)) { +- /* +- * There is a transfer in progress. So we trigger a remote +- * wakeup to inform the host. +- */ +- ether_wakeup_host(dev->port_usb); +- return; +- } +- spin_lock_irqsave(&dev->lock, flags); +- link->is_suspend = true; +- spin_unlock_irqrestore(&dev->lock, flags); +-} +-EXPORT_SYMBOL_GPL(gether_suspend); +- +-void gether_resume(struct gether *link) +-{ +- struct eth_dev *dev = link->ioport; +- unsigned long flags; +- +- if (!dev) +- return; +- +- if (netif_queue_stopped(dev->net)) +- netif_start_queue(dev->net); +- +- spin_lock_irqsave(&dev->lock, flags); +- link->is_suspend = false; +- spin_unlock_irqrestore(&dev->lock, flags); +-} +-EXPORT_SYMBOL_GPL(gether_resume); +- + /* + * gether_cleanup - remove Ethernet-over-USB device + * Context: may sleep +@@ -1240,7 +1178,6 @@ void gether_disconnect(struct gether *link) + + spin_lock(&dev->lock); + dev->port_usb = NULL; +- link->is_suspend = false; + spin_unlock(&dev->lock); + } + EXPORT_SYMBOL_GPL(gether_disconnect); +diff --git a/drivers/usb/gadget/function/u_ether.h b/drivers/usb/gadget/function/u_ether.h +index 34be220cef77..d8df29b31fd7 100644 +--- a/drivers/usb/gadget/function/u_ether.h ++++ b/drivers/usb/gadget/function/u_ether.h +@@ -79,7 +79,6 @@ struct gether { + /* called on network open/close */ + void (*open)(struct gether *); + void (*close)(struct gether *); +- bool is_suspend; + }; + + #define DEFAULT_FILTER (USB_CDC_PACKET_TYPE_BROADCAST \ +@@ -259,9 +258,6 @@ int gether_set_ifname(struct net_device *net, const char *name, int len); + + void gether_cleanup(struct eth_dev *dev); + +-void gether_suspend(struct gether *link); +-void gether_resume(struct gether *link); +- + /* connect/disconnect is handled by individual functions */ + struct net_device *gether_connect(struct gether *); + void gether_disconnect(struct gether *); +-- +2.25.1 diff --git a/common/recipes-kernel/linux/linux-patches-6.6.inc b/common/recipes-kernel/linux/linux-patches-6.6.inc index daf4a8359b16..5a41e937631b 100644 --- a/common/recipes-kernel/linux/linux-patches-6.6.inc +++ b/common/recipes-kernel/linux/linux-patches-6.6.inc @@ -1,5 +1,16 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/6.6:" +# +# Patches to be upstreamed soon. +# +SRC_URI:append = " \ + file://0001-ARM-dts-aspeed-Remove-eMMC-from-ast2600-facebook-net.patch \ + file://0002-ARM-dts-aspeed-elbert-Enable-eMMC-device.patch \ + file://0003-ARM-dts-aspeed-fuji-Enable-eMMC-device.patch \ + file://0004-ARM-dts-aspeed-remove-cloudripper-dts.patch \ + file://0005-ARM-dts-aspeed-Add-Facebook-fblite-r1-BMC.patch \ +" + # # JFFS2 patches to workaround kernel panic. # Highly recommended for all the OpenBMC platforms running JFFS2. @@ -74,8 +85,9 @@ SRC_URI:append = " \ # SRC_URI:append = " \ file://0169-net-ncsi-Simplify-Kconfig-dts-control-flow.patch \ - file://0170-net-ncsi-Fix-netlink-major-minor-version-numbers.patch \ - file://0171-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch \ + file://0170-net-ncsi-Add-NC-SI-1.2-Get-MC-MAC-Address-command.patch \ + file://0171-aspeed-g6.dtsi-add-pcc-config.patch \ + file://0172-drivers-watchdog-ast2600-support-bootstatus.patch \ " # @@ -84,6 +96,14 @@ SRC_URI:append = " \ SRC_URI:append = " \ file://0200-mmc-sdhci-of-aspeed-add-skip_probe-module-parameter.patch \ " + +# +# Aspeed Soc drivers used by multiple OpenBMC platforms. +# +SRC_URI:append = " \ + file://0201-soc-aspeed-Add-Post-Code-Control.patch \ +" + # # Device drvier for OpenBMC platforms. # @@ -92,4 +112,17 @@ SRC_URI:append = " \ file://0301-To-support-MP2856-VR-driver.patch \ file://0302-To-support-LTC4286-LTC4287-driver.patch \ file://0303-Kernel6v5-Support-apml-driver.patch \ + file://0304-hwmon-Add-driver-for-Astera-Labs-PT5161L-retimer.patch \ +" + +# +# Enable JTAG in "fblite-r1" dts (patch #0005) to support the recovery +# path (programming CPLD) in OpenBMC. +# +SRC_URI:append = " \ + file://0310-ARM-dts-aspeed-Enable-jtag1-in-fblite-r1-dts.patch \ +" + +SRC_URI:append = " \ + file://0503-Revert-usb-gadget-f_ecm-Add-suspend-resume-and-remot.patch \ " diff --git a/common/recipes-lfopenbmc/.clang-format b/common/recipes-lfopenbmc/.clang-format new file mode 100644 index 000000000000..d43e884dbbb3 --- /dev/null +++ b/common/recipes-lfopenbmc/.clang-format @@ -0,0 +1,135 @@ +--- +Language: Cpp +# BasedOnStyle: LLVM +AccessModifierOffset: -2 +AlignAfterOpenBracket: Align +AlignConsecutiveAssignments: false +AlignConsecutiveDeclarations: false +AlignEscapedNewlines: Right +AlignOperands: Align +AlignTrailingComments: + Kind: Always + OverEmptyLines: 1 +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortBlocksOnASingleLine: Empty +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: Empty +AllowShortIfStatementsOnASingleLine: Never +AllowShortLambdasOnASingleLine: true +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: false +AlwaysBreakTemplateDeclarations: Yes +BinPackArguments: true +BinPackParameters: true +BitFieldColonSpacing: None +BraceWrapping: + AfterCaseLabel: true + AfterClass: true + AfterControlStatement: true + AfterEnum: true + AfterExternBlock: true + AfterFunction: true + AfterNamespace: true + AfterObjCDeclaration: true + AfterStruct: true + AfterUnion: true + BeforeCatch: true + BeforeElse: true + BeforeLambdaBody: false + BeforeWhile: false + IndentBraces: false + SplitEmptyFunction: false + SplitEmptyRecord: false + SplitEmptyNamespace: false +BreakAfterAttributes: Never +BreakBeforeBinaryOperators: None +BreakBeforeBraces: Custom +BreakBeforeTernaryOperators: true +BreakConstructorInitializers: AfterColon +BreakInheritanceList: AfterColon +BreakStringLiterals: false +ColumnLimit: 80 +CommentPragmas: '^ IWYU pragma:' +CompactNamespaces: false +ConstructorInitializerIndentWidth: 4 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DerivePointerAlignment: false +DisableFormat: false +FixNamespaceComments: true +ForEachMacros: + - foreach + - Q_FOREACH + - BOOST_FOREACH +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^[<"](gtest|gmock)' + Priority: 7 + - Regex: '^"config.h"' + Priority: -1 + - Regex: '^".*\.h"' + Priority: 1 + - Regex: '^".*\.hpp"' + Priority: 2 + - Regex: '^<.*\.h>' + Priority: 3 + - Regex: '^<.*\.hpp>' + Priority: 4 + - Regex: '^<.*' + Priority: 5 + - Regex: '.*' + Priority: 6 +IndentCaseLabels: true +IndentExternBlock: NoIndent +IndentRequiresClause: true +IndentWidth: 4 +IndentWrappedFunctionNames: true +InsertNewlineAtEOF: true +KeepEmptyLinesAtTheStartOfBlocks: false +LambdaBodyIndentation: OuterScope +LineEnding: LF +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +ObjCBlockIndentWidth: 2 +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PackConstructorInitializers: BinPack +PenaltyBreakAssignment: 25 +PenaltyBreakBeforeFirstCallParameter: 19 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 60 +PenaltyIndentedWhitespace: 0 +PointerAlignment: Left +QualifierAlignment: Left +ReferenceAlignment: Left +ReflowComments: true +RequiresClausePosition: OwnLine +RequiresExpressionIndentation: Keyword +SortIncludes: CaseSensitive +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceAfterTemplateKeyword: true +SpaceBeforeAssignmentOperators: true +SpaceBeforeCpp11BracedList: false +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true +SpaceBeforeParens: ControlStatements +SpaceBeforeRangeBasedForLoopColon: true +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 1 +SpacesInAngles: Never +SpacesInContainerLiterals: true +SpacesInCStyleCastParentheses: false +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Latest +TabWidth: 4 +UseTab: Never +... + diff --git a/common/recipes-lfopenbmc/mfg-tool/README.md b/common/recipes-lfopenbmc/mfg-tool/README.md new file mode 100644 index 000000000000..fc3234a5cb6c --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/README.md @@ -0,0 +1,1802 @@ +# mfg-tool + +mfg-tool is a command-line tool specifically designed for manufacturing and testing purposes on OpenBMC platforms.

+ It provides various subcommands to perform different tasks, such as displaying sensor values, setting fan speeds, and manipulating fan modes, among others.

+This tool leverages the sdbusplus library and system APIs and libraries to interact with the D-Bus interface and modify behavior as needed. + +## Usage + +To run mfg-tool, log in to the BMC system and execute the following command: + +```bash +$ mfg-tool [options] +``` + +To see the available subcommands and options, run the following command: + +```bash +$ mfg-tool --help +``` + +## Subcommands + +mfg-tool supports the following subcommands: + +- `sensor-display`: Displays the sensor values of the BMC system. +- `power-state`: Shows the current power state of the host system. +- `power-control`: Controls the power state of the host system. +- `log-resolve`: Resolves the log entries of the BMC system. +- `log-display`: Displays the log entries of the BMC system. +- `log-clear`: Clears the log entries of the BMC system. +- `inventory`: Shows the inventory information of the BMC system. +- `fan-speed`: Displays and adjust the fan speeds of the BMC system. +- `fan-mode`: Displays and manipulating the fan mode of the BMC system. +- `bmc-arch`: Shows the architecture of the BMC system. + +## 1. sensor-display + +The `sensor-display` subcommand provides an overview of data from all sensors on the BMC system, including temperature, voltage, power, and more. +For instance, when executed on YV4, it will present details about sensors linked to the Spider Board, Management Board, Medusa Board, Fan Board, Sentinel Dome, and Waluia Falls. +It retrieves a wide range of sensor properties and presents them in a structured format. + +### Usage + +To use the `sensor-display` subcommand, execute the following command: + +```bash +$ mfg-tool sensor-display +``` + +### Output + +The output will resemble the following: + +```bash +{ + "CPU": { + "critical": { + "high": 90.0 + }, + "max": 100.0, + "min": 0.0, + "status": "ok", + "unit": "Percent", + "value": 15.872707100551539, + "warning": { + "high": 80.0 + } + }, + "FANBOARD0_ADC_3V3_STBY_VOLT_V": { + "critical": { + "high": 3.432, + "low": 3.168 + }, + "hard-shutdown": { + "high": 3.83, + "low": 2.64 + }, + "max": 255.0, + "min": 0.0, + "status": "ok", + "unit": "Volts", + "value": 3.31, + "warning": { + "high": 3.399, + "low": 3.201 + } + }, + "MB_ADC_P12V_DIMM_0_VOLT_V_38_40": { + "critical": { + "high": 14.214, + "low": 9.894 + }, + "max": 13.8, + "min": 10.200000000000001, + "status": "ok", + "unit": "Volts", + "value": 11.939, + "warning": { + "high": 14.076, + "low": 9.996 + } + }, + "MEDUSA_12VDELTA3_CURR_A": { + "critical": { + "high": 116.919 + }, + "hard-shutdown": { + "high": 130.0 + }, + "max": 255.0, + "min": 0.0, + "status": "ok", + "unit": "Amperes", + "value": -1.0, + "warning": { + "high": 111.6045 + } + }, + "MGNT_P5V_VOLT_V": { + "critical": { + "high": 5.55, + "low": 4.45 + }, + "max": 6.624954120108078, + "min": 0.0, + "status": "ok", + "unit": "Volts", + "value": 5.0939, + "warning": { + "high": 5.5, + "low": 4.5 + } + }, + "Memory": { + "critical": { + "high": 85.0 + }, + "max": 100.0, + "min": 0.0, + "status": "ok", + "unit": "Percent", + "value": 50.70193584984709, + "warning": { + "high": 70.0 + } + }, + "SPIDER_INA233_12V_NIC0_PWR_W": { + "critical": { + "high": 56.375 + }, + "hard-shutdown": { + "high": 67.5 + }, + "max": 3000.0, + "min": 0.0, + "status": "ok", + "unit": "Watts", + "value": 0.0, + "warning": { + "high": 53.8125 + } + }, + "WF_INA233_P12V_E1S_0_L_CURR_A_65_42": { + "critical": { + "high": 0.0, + "low": 0.0 + }, + "max": 0.0, + "min": 0.0, + "status": "ok", + "unit": "Amperes", + "value": 0.0, + "warning": { + "high": 0.0, + "low": 0.0 + } + }, + ... + } +} +``` + +It includes the following information for each sensor: + +- The name of the sensor. +- `hard-shutdown`, `critical`, and `warning`: These fields contain the high and low thresholds for the corresponding sensor states. If the sensor reading crosses a threshold, the sensor status is updated accordingly. +- `max` and `min`: The maximum and minimum values that the sensor can measure. +- `status`: The status of the sensor, which can be “ok”, “warning”, “critical”, or “unavailable”. +- `unit`: The unit of measurement for the sensor reading. +- `value`: The current reading of the sensor. + + + +## 2. power-state + +The `power-state` subcommand displays the current power state of both the host system and the chassis. +It checks the system’s power status and reports the operational state of the host and the power state of the chassis. + +### Usage + +To use the `power-state` subcommand, execute the following command: + +```bash +$ mfg-tool power-state +``` + +### Output + +The output will resemable the following: + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "transition-on", + "standby": "off" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +It includes the following information: + +- The number of the device: : This corresponds to the slot numbers 1-8. +- `runtime`: The operational state of the host system. This indicates whether the host system is running (“on”), off (“off”), or transitioning to these states (“transition-on” or "transition-off"). +- `standby`: The power state of the chassis. This reflects whether the power of the physical server enclosure is on("on"), off("off'), or transitioning to these states (“transition-on” or transition-off"). + + +## 3. power-control + +The `power-control` subcommand manipulates the power state of both the host system and the chassis. +It enables the user to specify an action and a scope to perform the action on. + +### Usage + +To use the `power-control` subcommand, execute the following command: + +```bash +$ mfg-tool power-control -p -a -s +``` + +### Options + +- `-p, --position `: The position of the device. This is a required parameter. +- `-a, --action `: The control action (e.g., on, off, or cycle). This is a required parameter. +- `-s, --scope `: The scope of the action (e.g., runtime, standby, or acpi). This is a required parameter. + +### Example + +**(1) Host powers on** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "off", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +#### Host power on in slot 1 + +- Command + +```bash +$ mfg-tool power-control -p 1 -a on -s runtime +``` + +- Output + +```bash +"success" +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + + +**(2) Host powers off** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +#### Host power off in slot 4 + +- Command + +```bash +$ mfg-tool power-control -p 4 -a off -s runtime +``` + +- Output + +```bash +"success" +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "off", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + + +**(3) Host powers cycle** + + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +#### Host power cycle in slot 4 + +- Command + +```bash +$ mfg-tool -p 4 -a cycle -s runtime +``` + +- Output + +```bash +"success" + +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "transition-off" + }, + "1": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + + +**(4) Host power reset** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "on", + "standby": "on" + }, + "2": { + "runtime": "on", + "standby": "on" + }, + "3": { + "runtime": "on", + "standby": "on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "on", + "standby": "on" + }, + "6": { + "runtime": "on", + "standby": "on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "on", + "standby": "on" + } +} +``` + +#### Host power reset in slot 1 + +- Command + +```bash +$ mfg-tool power-control -p 1 -a cycle -s acpi + +``` + +- Output + +```bash +"success" +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "off", + "standby": "on" + }, + "2": { + "runtime": "on", + "standby": "on" + }, + "3": { + "runtime": "on", + "standby": "on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "on", + "standby": "on" + }, + "6": { + "runtime": "on", + "standby": "on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "on", + "standby": "on" + } +} +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "on", + "standby": "on" + }, + "2": { + "runtime": "on", + "standby": "on" + }, + "3": { + "runtime": "on", + "standby": "on" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "on", + "standby": "on" + }, + "6": { + "runtime": "on", + "standby": "on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "on", + "standby": "on" + } +} +``` + + +**(5) 12V powers on** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "off", + "standby": "off" + }, + "2": { + "runtime": "transition-on", + "standby": "off" + }, + "3": { + "runtime": "off", + "standby": "off" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +#### Chassis power on in slot 2 + +- Command + +```bash +$ mfg-tool power-control -p 2 -a on -s standby +``` + +- Output + +```bash +"success" +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "off", + "standby": "off" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "off", + "standby": "off" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + + +**(6) 12V powers off** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +- Output: + +```bash +{ + "0": { + "standby": "off" + }, + "1": { + "runtime": "off", + "standby": "off" + }, + "2": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "3": { + "runtime": "off", + "standby": "off" + }, + "4": { + "runtime": "on", + "standby": "on" + }, + "5": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "6": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "7": { + "runtime": "transition-on", + "standby": "transition-on" + }, + "8": { + "runtime": "transition-on", + "standby": "transition-on" + } +} +``` + +#### Chassis power off in slot 4 + +- Command + +```bash +$ mfg-tool power-control -p 4 -a off -c standby +``` + +- Output + +```bash +"success" +``` + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` +- Output + +***TBD*** + + +**(7) 12V powers cycle** + +#### Check current power state + +- Command + +```bash +$ mfg-tool power-state +``` + +***TBD*** + + +**(8) Sled cycle** + + +- Command + +```bash +$ mfg-tool power-control -p 0 -a cycle -s standby +``` + + + +## 4. log-resolve + +The `log-resolve` subcommand resolves a specified log entry. +It enables the user to specify a log entry ID, and it will mark that log entry as resolved. + +### Usage + +To use the `log-resolve` subcommand, execute the following command: + +```bash +$ mfg-tool log-resolve -i +``` + +### Options + +- `-i, --id `: The ID of the log entry. This is a required parameter. + +### Note + +After resolving the log, you can verify the resolution by using the following command: + +```bash +$ mfg-tool log-display +``` + +In the output, the `resolved` field for the corresponding log entry should now be `true`. + +### Example + +Check current log entries + +- Command + +```bash +$ mfg-tool log-display +``` + +- Output + +``` bash +{ + "1": { + "additional_data": [ + "NUM_LOGS=1" + ], + "event_id": "", + "message": "xyz.openbmc_project.Logging.Error.LogsCleared", + "resolution": "", + "resolved": true, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Informational", + "timestamp": "2024-02-21T05:17:52.106000000Z", + "updated_timestamp": "2024-02-21T05:23:13.772000000Z" + }, + "125": { + "additional_data": [ + "DIRECTION=low", + "EVENT=critical low", + "READING=0.000000", + "SENSOR_PATH=/xyz/openbmc_project/sensors/voltage/SPIDER_INA233_12V_NIC3_VOLT_V", + "THRESHOLD=11.500000" + ], + "event_id": "", + "message": "SPIDER_INA233_12V_NIC3_VOLT_V critical low threshold assert. Reading=0.000000 Threshold=11.500000.", + "resolution": "", + "resolved": false, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Critical", + "timestamp": "2024-02-21T05:57:05.637000000Z", + "updated_timestamp": "2024-02-21T05:57:05.637000000Z" + } +} +``` + +Resolve the log entry with ID 125 + +- Command + +```bash +$ mfg-tool log-resolve -i 125 +``` + +- Output + +```bash +"success" +``` + +Check current log entries + +- Command + +```bash +$ mfg-tool log-display +``` + +- Output + +```bash +{ + "1": { + "additional_data": [ + "NUM_LOGS=1" + ], + "event_id": "", + "message": "xyz.openbmc_project.Logging.Error.LogsCleared", + "resolution": "", + "resolved": true, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Informational", + "timestamp": "2024-02-21T05:17:52.106000000Z", + "updated_timestamp": "2024-02-21T05:23:13.772000000Z" + }, + "125": { + "additional_data": [ + "DIRECTION=low", + "EVENT=critical low", + "READING=0.000000", + "SENSOR_PATH=/xyz/openbmc_project/sensors/voltage/SPIDER_INA233_12V_NIC3_VOLT_V", + "THRESHOLD=11.500000" + ], + "event_id": "", + "message": "SPIDER_INA233_12V_NIC3_VOLT_V critical low threshold assert. Reading=0.000000 Threshold=11.500000.", + "resolution": "", + "resolved": true, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Critical", + "timestamp": "2024-02-21T05:57:05.637000000Z", + "updated_timestamp": "2024-02-21T05:57:05.637000000Z" + } +} +``` + + + +## 5. log-display + +The `log-display` subcommand displays log entries. +It enables the user to view all log entries or only those that are unresolved. + +### Usage + +To use the `log-display` subcommand, execute the following command: + +```bash +$ mfg-tool log-display [-u] +``` + +### Options + +- `-u, --unresolved-only`: This flag shows only unresolved log entries. This is an optional flag. + +### Output + +The output will resemble the following: + +```bash +{ + "1": { + "additional_data": [ + "NUM_LOGS=1" + ], + "event_id": "", + "message": "xyz.openbmc_project.Logging.Error.LogsCleared", + "resolution": "", + "resolved": true, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Informational", + "timestamp": "2024-02-21T05:17:52.106000000Z", + "updated_timestamp": "2024-02-21T05:23:13.772000000Z" + }, + "125": { + "additional_data": [ + "DIRECTION=low", + "EVENT=critical low", + "READING=0.000000", + "SENSOR_PATH=/xyz/openbmc_project/sensors/voltage/SPIDER_INA233_12V_NIC3_VOLT_V", + "THRESHOLD=11.500000" + ], + "event_id": "", + "message": "SPIDER_INA233_12V_NIC3_VOLT_V critical low threshold assert. Reading=0.000000 Threshold=11.500000.", + "resolution": "", + "resolved": false, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Critical", + "timestamp": "2024-02-21T05:57:05.637000000Z", + "updated_timestamp": "2024-02-21T05:57:05.637000000Z" + } +} +``` + +It includes the following information for each log entry: + +- The ID of the log entry. +- `additional data`: Any additional data associated with the log entry. +- `event id`: The event ID of the log entry. +- `message`: The message of the log entry. +- `resolution`: The resolution of the log entry. +- `resolved`: A boolean indicating whether the log entry has been resolved. +- `severity`: The severity level of the log entry. +- `timestamp`: The timestamp when the log entry was created. +- `updated timestamp`: The timestamp when the log entry was last updated. + + + +## 6. log-clear + +The `log-clear` subcommand clears log entries. +It removes all log entries from the BMC system. + +### Usage + +To use the `log-clear` subcommand, execute the following command: + +```bash +$ mfg-tool log-clear +``` + +### Output + +The output will resemble the following: + +```bash +"success" +``` + +### Example + +Check current log entries + +- Command + +```bash +$ mfg-tool log-display +``` + +- Output + +```bash +{ + "1": { + "additional_data": [ + "NUM_LOGS=1" + ], + "event_id": "", + "message": "xyz.openbmc_project.Logging.Error.LogsCleared", + "resolution": "", + "resolved": true, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Informational", + "timestamp": "2024-02-21T05:17:52.106000000Z", + "updated_timestamp": "2024-02-21T05:23:13.772000000Z" + }, + "125": { + "additional_data": [ + "DIRECTION=low", + "EVENT=critical low", + "READING=0.000000", + "SENSOR_PATH=/xyz/openbmc_project/sensors/voltage/SPIDER_INA233_12V_NIC3_VOLT_V", + "THRESHOLD=11.500000" + ], + "event_id": "", + "message": "SPIDER_INA233_12V_NIC3_VOLT_V critical low threshold assert. Reading=0.000000 Threshold=11.500000.", + "resolution": "", + "resolved": false, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Critical", + "timestamp": "2024-02-21T05:57:05.637000000Z", + "updated_timestamp": "2024-02-21T05:57:05.637000000Z" + } +} +``` + +Clear all log entries + +- Command + +```bash +$ mfg-tool log-clear +``` + +- Output: + +```bash +$ "success" +``` + +Check current log entries + +- Command + +```bash +$ mfg-tool log-dsiplay +``` + +- Output + +```bash +{ + "1": { + "additional_data": [ + "NUM_LOGS=1" + ], + "event_id": "", + "message": "xyz.openbmc_project.Logging.Error.LogsCleared", + "resolution": "", + "resolved": false, + "severity": "xyz.openbmc_project.Logging.Entry.Level.Informational", + "timestamp": "2024-03-04T06:29:28.077000000Z", + "updated_timestamp": "2024-03-04T06:29:28.077000000Z" + } +} +``` + + + +## 7. inventory + +The `inventory` subcommand retrieves inventory information. +It enables the user to query the system’s inventory data and returns a variety of properties for each inventory item. + +### Usage + +To use the `inventory` subcommand, execute the following command: + +```bash +$ mfg-tool inventory +``` + +### Output + +The output will resemble the following: + +```bash +{ + "system/board/BMC_Storage_Module": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Item.Board": { + "Name": "BMC Storage Module", + "Type": "Board" + } + }, + "system/board/Yosemite_4_FAN_Board_0": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Item.Board": { + "Name": "Yosemite 4 FAN Board 0", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Floating_Falls_Slot_4": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Decorator.Slot": { + "SlotNumber": false + }, + "Item.Board": { + "Name": "Yosemite 4 Floating Falls Slot 4", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Management_Board": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Item.Board": { + "Name": "Yosemite 4 Management Board", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Medusa_Board": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Item.Board": { + "Name": "Yosemite 4 Medusa Board", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Sentinel_Dome_Slot_4": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Decorator.Slot": { + "SlotNumber": false + }, + "Item.Board": { + "Name": "Yosemite 4 Sentinel Dome Slot 4", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Spider_Board": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Item.Board": { + "Name": "Yosemite 4 Spider Board", + "Type": "Board" + } + }, + "system/board/Yosemite_4_Wailua_Falls_Slot_4": { + "Decorator.Asset": { + "Manufacturer": "Wiwynn", + "Model": "Yosemite V4 EVT", + "PartNumber": "N/A", + "SerialNumber": "N/A" + }, + "Decorator.Slot": { + "SlotNumber": false + }, + "Item.Board": { + "Name": "Yosemite 4 Wailua Falls Slot 4", + "Type": "Board" + } + } +} +``` + +It includes the following information for each inventory item: + +- The path of the inventory item, stripped of the common prefix. +- The interface of the inventory item, stripped of the common prefix. +- `Manufacturer`: The manufacturer of the item. +- `Model`: The model of the item. +- `PartNumber`: The part number (if available). +- `SerialNumber`: The serial number (if available). +- `Slot Number` (if applicable): The slot number associated with the inventory item. +- `Name`: The name of the board. +- `Type`: The type of the board (e.g., “Board”). + + + +## 8. fan-speed + +The `fan-speed` subcommand displays and adjusts the fan speed on the BMC system. +It enables the user to specify a target Pulse Width Modulation (PWM) percentage and a fan position to set the fan speed. + +### Usage + +To use the `fan-speed` subcommand, execute the following command: + +```bash +$ mfg-tool fan-speed [-t ] [-p ] +``` + +### Options + +- `-t, --target `: The target PWM percentage(e.g., 50.0). This is an optional parameter. + - If a target PWM percentage is specified, the tool will attempt to set the fan speed to the target value. + - If no target is specified, the tool will simply display the current fan speed. +- `-p, --position `: The position of the fan(e.g., FANBOARD0_FAN0). This is an optional parameter. + - If the position parameter is specified, the tool will only affect or display information for the fan at that position. + - If the position parameter is not specified, the tool will affect or display information for all fans. + +### Output + +If no parameters are provided, the output will resemble the following: + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13107.0 + }, + "FANBOARD1_FAN1": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13284.0 + }, + "FANBOARD1_FAN2": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13284.0 + }, + "FANBOARD1_FAN3": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13284.0 + }, + "FANBOARD1_FAN4": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13466.0 + }, + "FANBOARD1_FAN5": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13466.0 + } +} +``` + +It includes the following information for each fan: + +- The position of the fan. +- `pwm`: The current and target PWM value of the fan, which indicates the fan speed. +- `tach_il`: The current tachometer reading from the inside rotor of the fan, which indicates the fan’s RPM (Revolutions Per Minute). +- `tach_ol`: The current tachometer reading from the outside rotor of the fan, which indicates the fan’s RPM (Revolutions Per Minute). + +### Example + +Check the current fan speed of FANBOARD1_FAN0 + +- Command + +```bash +$ mfg-tool fan-speed -p FANBOARD1_FAN0 +``` + +- Output + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13107.0 + } +} +``` + +Set FANBOARD1_FAN0's PWM to 50% + +- Command + +```bash +$ mfg-tool fan-speed -t 50.0 -p FANBOARD1_FAN0 +``` + +Check the current fan speed of FANBOARD1_FAN0 + +- Command + +```bash +$ mfg-tool fan-speed -p FANBOARD1_FAN0 +``` + +- Output + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 49.9999997, + "target": 49.9999997 + }, + "tach_il": 7802.0, + "tach_ol": 6554.0 + } +} +``` + + + +## 9. fan-mode + +The `fan-mode` subcommand sets the fan mode to either manual or automatic. +- In manual mode, the fan speed can be controlled directly by the user. +- In automatic mode, the fan speed is controlled by the system based on the current temperature and other factors. + +### Usage + +To use the `fan-mode` subcommand, execute the following command: + +```bash +$ mfg-tool fan-mode [-m] [-a] +``` + +### Options + +- `-m, --manual`: This flag sets the mode to manual. This is an optional flag. +- `-a, --auto`: This flag sets the mode to automatic. This is an optional flag. + +### Output + +The output will resemble the following: + +If the mode is set to manual +```bash +{ + "zone1": "manual" +} + +``` + +If the mode is set to automatic +```bash +{ + "zone1": "auto" +} +``` + +### Note + +Before setting the fan speed with the following command: + +```bash +$ mfg-tool fan-speed [-t ] [-p ] +``` + +Ensure the fan mode is initially set to manual. + +Even when the fan mode is set to automatic, you can still override the fan speed. +However, to switch back to automatic mode, you need to transition through manual mode first. + +This can be done using the following commands: +```bash +$ mfg-tool fan-mode -m +$ mfg-tool fan-mode -a +``` + +### Example + +Check the current fan speed of FANBOARD1_FAN0 + +- Command + +```bash +$ mfg-tool fan-speed -p FANBOARD1_FAN0 +``` + +- Output + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13107.0 + } +} +``` + +Switch fan mode to manual + +- Command + +```bash +$ mfg-tool fan-mode -m +``` + +- Output + +```bash +{ + "zone1": "manual" +} +``` + +Set FANBOARD1_FAN0's PWM to 50% + +- Command + +```bash +$ mfg-tool fan-speed -t 50.0 -p FANBOARD1_FAN0 +``` + +Check the current fan speed of FANBOARD1_FAN0 + +- Command + +```bash +$ mfg-tool fan-speed -p FANBOARD1_FAN0 +``` + +- Output + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 49.9999997, + "target": 49.9999997 + }, + "tach_il": 7802.0, + "tach_ol": 6554.0 + } +} +``` + +Switch fan mode to auto + +- Command + +``` bash +$ mfg-tool fan-mode -a +``` + +- Output + +```bash +{ + "zone1": "auto" +} +``` + +Check the current fan speed of FANBOARD1_FAN0 + +- Command + +```bash +$ mfg-tool fan-speed -p FANBOARD1_FAN0 +``` + +- Output + +```bash +{ + "FANBOARD1_FAN0": { + "pwm": { + "current": 100.0, + "target": 100.0 + }, + "tach_il": 15603.0, + "tach_ol": 13107.0 + } +} +``` + + + +## 10. bmc-arch + +The `bmc-arch` subcommand retrieves the architecture of the BMC (Baseboard Management Controller) on OpenBMC platforms. +It enables the user to query the system’s architecture and returns the result. + +### Usage + +To use the `bmc-arch` subcommand, execute the following command: + +```bash +$ mfg-tool bmc-arch +``` + +### Output + +The output will resemble the following: + +```bash +"arm" +``` + diff --git a/common/recipes-lfopenbmc/mfg-tool/files/.gitignore b/common/recipes-lfopenbmc/mfg-tool/files/.gitignore new file mode 100644 index 000000000000..4af809096adb --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/.gitignore @@ -0,0 +1,2 @@ +subprojects/* +!subprojects/*.wrap diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-arch.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-arch.cpp new file mode 100644 index 000000000000..269006802e37 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-arch.cpp @@ -0,0 +1,38 @@ +#include "utils/json.hpp" +#include "utils/register.hpp" + +#include + +namespace mfgtool::cmds::bmc_arch +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("bmc-arch", + "Get architecture of the BMC"); + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + constexpr auto systemd = + sdbusplus::async::proxy() + .service("org.freedesktop.systemd1") + .path("/org/freedesktop/systemd1") + .interface("org.freedesktop.systemd1.Manager"); + + info("Calling systemd to get architecture."); + auto arch = co_await systemd.get_property(ctx, + "Architecture"); + + json::display(arch); + + co_return; + } +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::bmc_arch diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-state.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-state.cpp new file mode 100644 index 000000000000..d1fa8e7ecbf1 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/bmc-state.cpp @@ -0,0 +1,67 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" + +#include +#include + +#include + +namespace mfgtool::cmds::bmc_state +{ +PHOSPHOR_LOG2_USING; +using namespace dbuspath; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("bmc-state", "Get state of the BMC"); + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + using utils::mapper::object_service; + + auto result = json::empty_map(); + + debug("Finding BMC."); + auto path = bmc::path(); + auto service = co_await object_service(ctx, path, bmc::interface); + + if (!service) + { + warning("Could not find BMC object"); + co_return; + } + + debug("Getting BMC state."); + auto proxy = bmc::Proxy(ctx).service(*service).path(path); + result["state"] = mapBMCState(co_await proxy.current_bmc_state()); + + json::display(result); + } + + static auto mapBMCState(bmc::Proxy::BMCState state) -> std::string + { + using BMCState = bmc::Proxy::BMCState; + + static const auto values = std::unordered_map{ + {BMCState::Ready, "ready"}, + {BMCState::NotReady, "starting"}, + {BMCState::Quiesced, "quiesced"}, + }; + + if (!values.contains(state)) + { + return "unknown"; + } + + return values.at(state); + } +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::bmc_state diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-mode.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-mode.cpp new file mode 100644 index 000000000000..4641ffc841d5 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-mode.cpp @@ -0,0 +1,71 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" +#include "utils/string.hpp" + +#include +#include + +namespace mfgtool::cmds::fan_mode +{ + +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("fan-mode", "Manipulate the fan mode"); + auto manual = cmd->add_flag("-m,--manual", arg_manual, + "Set manual mode"); + cmd->add_flag("-a,--auto", arg_auto, "Set auto mode")->excludes(manual); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + namespace control = dbuspath::control; + using utils::string::last_element; + + auto result = json::empty_map(); + + debug("Finding Control.Mode objects."); + co_await utils::mapper::subtree_for_each( + ctx, "/", control::mode::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + if (!path.str.starts_with(FanControlPrefix)) + { + co_return; + } + + auto mode = + control::mode::Proxy(ctx).service(service).path(path.str); + + if (arg_manual || arg_auto) + { + co_await mode.manual(arg_manual); + result[last_element(path)] = arg_manual ? "manual" : "auto"; + } + else + { + result[last_element(path)] = (co_await mode.manual()) ? "manual" + : "auto"; + } + }); + + json::display(result); + } + + bool arg_manual = false; + bool arg_auto = false; + + static constexpr auto FanControlPrefix = + "/xyz/openbmc_project/settings/fanctrl"; +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::fan_mode diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-speed.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-speed.cpp new file mode 100644 index 000000000000..f2916dc81cd8 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/fan-speed.cpp @@ -0,0 +1,131 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" +#include "utils/string.hpp" + +#include +#include + +#include +#include + +namespace mfgtool::cmds::fan_speed +{ + +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("fan-speed", "Manipulate the fan mode"); + cmd->add_option("-t,--target", arg_target, "Desired PWM percentage"); + cmd->add_option("-p,--position", arg_position, "Fan position"); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + namespace control = dbuspath::control; + namespace sensor = dbuspath::sensor; + using utils::mapper::subtree_for_each; + using utils::string::last_element; + using utils::string::replace_substring; + + auto result = json::empty_map(); + + debug("Finding Control.FanPwm objects."); + co_await subtree_for_each(ctx, "/", control::fan_pwm::interface, + + [&](const auto& path, const auto& service) + -> sdbusplus::async::task<> { + auto pwm_name = last_element(path); + if (!pwm_name.contains("_PWM")) + { + debug("{PATH} doesn't contain _PWM", "PATH", path); + co_return; + } + + if (arg_position && !pwm_name.contains(*arg_position)) + { + info("Skipping {PATH} due to position mismatch.", "PATH", path); + co_return; + } + + auto [fan_name, _] = split(last_element(path), "_PWM"); + + auto pwm = + control::fan_pwm::Proxy(ctx).service(service).path(path.str); + + auto& result_json = result[fan_name]["pwm"]; + if (arg_target) + { + uint64_t target = 255.0 * (*arg_target / 100.0); + co_await pwm.target(target); + result_json["target"] = target; + } + else + { + uint64_t target = co_await pwm.target(); + result_json["target"] = double(target) * 100.0 / 255.0; + } + + // This is a hack, but how dbus-sensor's FanSensor currently works. + // They don't have any association but they at least use the same + // final element name. + auto sensor_path = replace_substring(path, "control/fanpwm", + "sensors/fan_pwm"); + auto sensor = sensor::Proxy(ctx).service(service).path(sensor_path); + + result_json["current"] = co_await sensor.value(); + }); + + debug("Finding Sensor objects in Tach namespace."); + auto fan_tach_subpath = std::string(sensor::ns_path) + "/" + + sensor::Proxy::namespace_path::fan_tach; + co_await subtree_for_each(ctx, fan_tach_subpath, sensor::interface, + + [&](const auto& path, const auto& service) + -> sdbusplus::async::task<> { + auto tach_name = last_element(path); + if (!tach_name.contains("_TACH")) + { + debug("{PATH} doesn't contain _TACH", "PATH", path); + co_return; + } + + if (arg_position && !tach_name.contains(*arg_position)) + { + info("Skipping {PATH} due to position mismatch.", "PATH", path); + co_return; + } + + auto [fan_name, tach_shortname] = split(tach_name, "_TACH"); + + // We need to strip off the _ from _TACH and make it lowercase for a + // key. + tach_shortname = tach_shortname.substr(1); + std::ranges::transform(tach_shortname, tach_shortname.begin(), + [](auto c) { return std::tolower(c); }); + + auto sensor = sensor::Proxy(ctx).service(service).path(path.str); + result[fan_name][tach_shortname] = co_await sensor.value(); + }); + + json::display(result); + } + + auto split(const auto& s, const auto& substr) + { + auto pos = s.find(substr); + return std::make_tuple(s.substr(0, pos), s.substr(pos)); + } + + std::optional arg_target = std::nullopt; + std::optional arg_position = std::nullopt; +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::fan_speed diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/hello.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/hello.cpp new file mode 100644 index 000000000000..3886fbbce74e --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/hello.cpp @@ -0,0 +1,26 @@ +#include "utils/json.hpp" +#include "utils/register.hpp" + +#include + +namespace mfgtool::cmds::hello +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("hello", "Hello World"); + init_callback(cmd, *this); + } + + void run() + { + info("Hello World!"); + json::display(js{"Hello World!"}); + } +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::hello diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/inventory.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/inventory.cpp new file mode 100644 index 000000000000..f473dd36d1cd --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/inventory.cpp @@ -0,0 +1,94 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" + +#include + +#include +#include +#include + +namespace mfgtool::cmds::inventory +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("inventory", "Get inventory"); + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + using namespace std::literals; + namespace item = dbuspath::inventory::item; + namespace asset = dbuspath::inventory::asset; + using utils::mapper::subtree_for_each_interface; + + auto result = json::empty_map(); + + co_await subtree_for_each_interface( + ctx, item::ns_path, asset::interface, + // TODO: We are using asset::interface here because a lot of the + // entity-manager content appears to be missing the + // Inventory.Item. We need to get this fixed. + + [&](const auto& path, const auto& service, + const auto& interface) -> sdbusplus::async::task<> { + if (!interface.starts_with(InventoryIfacePrefix)) + { + co_return; + } + + // Insert the interface into the JSON so it shows up even if it + // doesn't have any properties. + auto& iface_result = + result[strip_path(path)][strip_intf(interface)]; + iface_result = json::empty_map(); + + debug("Getting properties."); + for (const auto& [property, value] : + co_await sdbusplus::async::proxy() + .service(service) + .path(path) + .interface(interface) + .template get_all_properties(ctx)) + { + // Ignore the entity-manager Probe statement because nobody + // is going to be interested in that. + if (property == "Probe") + { + continue; + } + std::visit([&](const auto& v) { iface_result[property] = v; }, + value); + } + }); + + json::display(result); + } + + auto strip_path(const auto& p) + { + namespace item = dbuspath::inventory::item; + return p.substr(std::string(item::ns_path).length() + 1); + } + + auto strip_intf(const auto& i) + { + return i.substr(std::string(InventoryIfacePrefix).length() + 1); + } + + static constexpr auto InventoryIfacePrefix = + "xyz.openbmc_project.Inventory"; + + using InventoryTypes = + std::variant, std::vector>; +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::inventory diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-clear.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-clear.cpp new file mode 100644 index 000000000000..cefa2da0ec4a --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-clear.cpp @@ -0,0 +1,44 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/register.hpp" + +#include +#include + +namespace mfgtool::cmds::log_clear +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("log-clear", "Clear logs"); + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + namespace delete_all = dbuspath::delete_all; + namespace log_entry = dbuspath::log_entry; + + try + { + info("Calling DeleteAll on Logging service"); + co_await delete_all::Proxy(ctx) + .service(log_entry::service) + .path(log_entry::ns_path) + .delete_all(); + + json::display("success"); + } + catch (const std::exception& e) + { + error("Caught {ERROR}", "ERROR", e); + json::display("failed"); + } + } +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::log_clear diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-display.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-display.cpp new file mode 100644 index 000000000000..49af884521db --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-display.cpp @@ -0,0 +1,92 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" + +#include +#include +#include + +#include +#include +#include +#include +#include + +namespace mfgtool::cmds::log_display +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("log-display", "Display pending logs."); + cmd->add_flag("-u,--unresolved-only", arg_unresolved_only, + "Only show unresolved logs."); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + namespace log_entry = dbuspath::log_entry; + + auto result = json::empty_map(); + + info("Finding log entries."); + co_await utils::mapper::subtree_for_each( + ctx, log_entry::ns_path, log_entry::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + if (service != log_entry::service) + { + warning("Entry ({PATH}) not hosted by logging service.", "PATH", + path); + co_return; + } + + auto entry = log_entry::Proxy(ctx) + .service(log_entry::service) + .path(path.str); + + if (auto resolved = co_await entry.resolved(); + !resolved || !arg_unresolved_only) + { + auto& entry_json = result[std::to_string(co_await entry.id())]; + + entry_json["message"] = co_await entry.message(); + entry_json["severity"] = sdbusplus::message::convert_to_string( + co_await entry.severity()); + entry_json["event_id"] = co_await entry.event_id(); + entry_json["additional_data"] = + co_await entry.additional_data(); + entry_json["resolution"] = co_await entry.resolution(); + entry_json["resolved"] = resolved; + + auto epoch_to_iso8601 = [](auto ts) { + using namespace std::chrono; + return std::format("{:%FT%TZ}", time_point( + milliseconds(ts))); + }; + + entry_json["timestamp"] = + epoch_to_iso8601(co_await entry.timestamp()); + entry_json["updated_timestamp"] = + epoch_to_iso8601(co_await entry.update_timestamp()); + } + else + { + info("Resolved and filtered out."); + } + }); + + json::display(result); + co_return; + } + + bool arg_unresolved_only = false; +}; +MFGTOOL_REGISTER(command); +} // namespace mfgtool::cmds::log_display diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-resolve.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-resolve.cpp new file mode 100644 index 000000000000..bdb9b3f2da95 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/log-resolve.cpp @@ -0,0 +1,55 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/register.hpp" + +#include +#include + +#include +#include + +namespace mfgtool::cmds::log_resolve +{ +PHOSPHOR_LOG2_USING; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("log-resolve", "Resolve a log entry"); + + cmd->add_option("-i,--id", arg_id, "Entry ID")->required(); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + namespace log_entry = dbuspath::log_entry; + + try + { + auto path = log_entry::path(arg_id); + + info("Setting resolved on {PATH}", "PATH", path); + co_await log_entry::Proxy(ctx) + .service(log_entry::service) + .path(path) + .resolved(true); + + json::display("success"); + } + catch (const std::exception& e) + { + error("Caught {ERROR}", "ERROR", e); + json::display("failed"); + } + + co_return; + } + + size_t arg_id = 0; +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::log_resolve diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-control.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-control.cpp new file mode 100644 index 000000000000..b6f5290b37d6 --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-control.cpp @@ -0,0 +1,261 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" + +#include +#include + +#include +#include +#include + +namespace mfgtool::cmds::power_control +{ + +PHOSPHOR_LOG2_USING; +namespace mapper = mfgtool::utils::mapper; + +enum class action +{ + on, + off, + cycle +}; + +enum class scope +{ + runtime, + standby, + acpi +}; + +template +struct execute; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("power-control", + "Manipulate power state of a device"); + + cmd->add_option("-p,--position", arg_pos, "Device position") + ->required(); + + cmd->add_option("-a,--action", arg_action, "Control action") + ->required() + ->check(CLI::IsMember(keys(action_map()))); + + cmd->add_option("-s,--scope", arg_scope, "Scope of the action") + ->check(CLI::IsMember(keys(scope_map()))); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + info("Attempting {SCOPE}:{ACTION} on {POS}.", "POS", arg_pos, "ACTION", + arg_action, "SCOPE", arg_scope); + + try + { + co_await execute(ctx); + } + catch (...) + { + json::display("failed"); + co_return; + } + + json::display("success"); + co_return; + } + + size_t arg_pos = 0; + std::string arg_action = ""; + std::string arg_scope = "runtime"; + + static auto action_map() -> std::map + { + return { + {"on", action::on}, {"off", action::off}, {"cycle", action::cycle}}; + } + static auto scope_map() -> std::map + { + return {{"runtime", scope::runtime}, + {"standby", scope::standby}, + {"acpi", scope::acpi}}; + } + + static auto keys(const auto&& m) -> std::vector + { + // This should have been implemented as views::keys(action_map) | + // ranges::to but ranges::to isn't ready until GCC14. + + std::vector r{}; + std::ranges::for_each(std::views::keys(m), + [&](const auto& v) { r.push_back(v); }); + + return r; + } + + auto execute(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + switch (action_map()[arg_action]) + { + case action::on: + co_await execute(ctx); + break; + + case action::off: + co_await execute(ctx); + break; + + case action::cycle: + co_await execute(ctx); + break; + } + } + + template + auto execute(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + switch (scope_map()[arg_scope]) + { + case scope::runtime: + co_await power_control::execute::op( + ctx, arg_pos); + break; + + case scope::standby: + co_await power_control::execute::op( + ctx, arg_pos); + break; + + case scope::acpi: + co_await power_control::execute::op( + ctx, arg_pos); + break; + } + } +}; +MFGTOOL_REGISTER(command); + +template +struct execute +{ + static auto op(sdbusplus::async::context&, size_t) + -> sdbusplus::async::task<> + { + error("Execution method undefined."); + throw std::exception(); + } +}; + +template +struct execute +{ + static auto op(sdbusplus::async::context& ctx, size_t pos) + -> sdbusplus::async::task<> + { + using namespace dbuspath; + auto path = chassis::path(pos); + + auto service = co_await mapper::object_service(ctx, path, + chassis::interface); + + if (!service) + { + warning("Can't find {PATH}", "PATH", path); + error( + "Cannot find chassis to execute operation against; giving up."); + throw std::exception(); + } + + auto proxy = chassis::Proxy(ctx).service(*service).path(path); + + if constexpr (Action == action::on) + { + co_await proxy.requested_power_transition( + chassis::Proxy::Transition::On); + } + else if constexpr (Action == action::off) + { + co_await proxy.requested_power_transition( + chassis::Proxy::Transition::Off); + } + else + { + co_await proxy.requested_power_transition( + chassis::Proxy::Transition::PowerCycle); + } + } +}; + +template +struct execute +{ + static auto op(sdbusplus::async::context& ctx, size_t pos) + -> sdbusplus::async::task<> + { + using namespace dbuspath; + + auto path = host::path(pos); + auto service = co_await mapper::object_service(ctx, path, + host::interface); + + if (!service) + { + warning("Can't find {PATH}", "PATH", path); + info("Trying to escalate to scope=standby"); + co_return co_await execute::op(ctx, pos); + } + + auto proxy = host::Proxy(ctx).service(*service).path(path); + + if constexpr (Action == action::on) + { + co_await proxy.requested_host_transition( + host::Proxy::Transition::On); + } + else if constexpr (Action == action::off) + { + co_await proxy.requested_host_transition( + host::Proxy::Transition::Off); + } + else + { + co_await proxy.requested_host_transition( + host::Proxy::Transition::Reboot); + } + } +}; + +template <> +struct execute +{ + static auto op(sdbusplus::async::context& ctx, size_t pos) + -> sdbusplus::async::task<> + { + using namespace dbuspath; + + auto path = host::path(pos); + auto service = co_await mapper::object_service(ctx, path, + host::interface); + + if (!service) + { + warning("Can't find {PATH}", "PATH", path); + info("Trying to escalate to scope=standby"); + co_return co_await execute::op(ctx, + pos); + } + + auto proxy = host::Proxy(ctx).service(*service).path(path); + co_await proxy.requested_host_transition( + host::Proxy::Transition::GracefulWarmReboot); + } +}; + +} // namespace mfgtool::cmds::power_control diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-state.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-state.cpp new file mode 100644 index 000000000000..9e8a9455d0ed --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/power-state.cpp @@ -0,0 +1,116 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" + +#include +#include + +#include +#include + +namespace mfgtool::cmds::power_state +{ +PHOSPHOR_LOG2_USING; +using namespace dbuspath; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("power-state", "Get state of device"); + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + using utils::mapper::subtree_for_each; + + auto result = json::empty_map(); + + debug("Finding chasses."); + co_await subtree_for_each(ctx, chassis::ns_path, chassis::interface, + + [&](const auto& path, const auto& service) + -> sdbusplus::async::task<> { + static auto pathPrefix = chassis::path_prefix(); + if (path.str.size() <= pathPrefix.size()) + { + error("Unexpected chassis path found: {PATH}", "PATH", path); + co_return; + } + + auto proxy = chassis::Proxy(ctx).service(service).path(path.str); + auto state = mapChassisState(co_await proxy.current_power_state()); + + info("State for {PATH}: {STATE}", "PATH", path, "STATE", state); + auto id = path.str.substr(pathPrefix.size()); + result[id]["standby"] = state; + }); + + debug("Finding hosts."); + co_await subtree_for_each(ctx, host::ns_path, host::interface, + + [&](const auto& path, const auto& service) + -> sdbusplus::async::task<> { + static auto pathPrefix = host::path_prefix(); + if (path.str.size() <= pathPrefix.size()) + { + error("Unexpected host path found: {PATH}", "PATH", path); + co_return; + } + + auto proxy = host::Proxy(ctx).service(service).path(path.str); + auto state = mapHostState(co_await proxy.current_host_state()); + + info("State for {PATH}: {STATE}", "PATH", path, "STATE", state); + auto id = path.str.substr(pathPrefix.size()); + result[id]["runtime"] = state; + }); + + json::display(result); + + co_return; + } + + static auto mapChassisState(chassis::Proxy::PowerState state) -> std::string + { + using PowerState = chassis::Proxy::PowerState; + + static const auto values = std::unordered_map{ + {PowerState::Off, "off"}, + {PowerState::TransitioningToOff, "transition-off"}, + {PowerState::On, "on"}, + {PowerState::TransitioningToOn, "transition-on"}, + }; + + if (!values.contains(state)) + { + return "unknown"; + } + + return values.at(state); + } + + static auto mapHostState(host::Proxy::HostState state) -> std::string + { + using HostState = host::Proxy::HostState; + + static const auto values = std::unordered_map{ + {HostState::Off, "off"}, + {HostState::TransitioningToOff, "transition-off"}, + {HostState::Running, "on"}, + {HostState::TransitioningToRunning, "transition-on"}, + }; + + if (!values.contains(state)) + { + return "unknown"; + } + + return values.at(state); + } +}; +MFGTOOL_REGISTER(command); + +} // namespace mfgtool::cmds::power_state diff --git a/common/recipes-lfopenbmc/mfg-tool/files/cmd/sensor-display.cpp b/common/recipes-lfopenbmc/mfg-tool/files/cmd/sensor-display.cpp new file mode 100644 index 000000000000..85a19f6bb8ae --- /dev/null +++ b/common/recipes-lfopenbmc/mfg-tool/files/cmd/sensor-display.cpp @@ -0,0 +1,288 @@ +#include "utils/dbus.hpp" +#include "utils/json.hpp" +#include "utils/mapper.hpp" +#include "utils/register.hpp" +#include "utils/string.hpp" + +#include +#include +#include + +#include +#include +#include + +namespace mfgtool::cmds::sensor_display +{ +PHOSPHOR_LOG2_USING; +namespace sensor = dbuspath::sensor; +namespace metric = dbuspath::metric; +namespace threshold = dbuspath::threshold; +using namespace utils::string; + +struct command +{ + void init(CLI::App& app) + { + auto cmd = app.add_subcommand("sensor-display", "Display sensors."); + + init_callback(cmd, *this); + } + + auto run(sdbusplus::async::context& ctx) -> sdbusplus::async::task<> + { + auto result = json::empty_map(); + + info("Finding sensor entries."); + co_await utils::mapper::subtree_for_each( + ctx, sensor::ns_path, sensor::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + auto& entry_json = result[last_element(path)]; + auto proxy = sensor::Proxy(ctx).service(service).path(path.str); + + auto value = co_await proxy.value(); + entry_json["value"] = value; + entry_json["status"] = std::isfinite(value) ? "ok" : "unavailable"; + + if (auto v = co_await proxy.max_value(); std::isfinite(v)) + { + entry_json["max"] = v; + } + if (auto v = co_await proxy.min_value(); std::isfinite(v)) + { + entry_json["min"] = v; + } + entry_json["unit"] = last_element( + sdbusplus::message::convert_to_string(co_await proxy.unit()), + '.'); + }); + + info("Finding HardShutdown thresholds"); + co_await utils::mapper::subtree_for_each( + ctx, sensor::ns_path, sensor::hard_shutdown::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + auto& sensor_json = result[last_element(path)]; + auto& entry_json = sensor_json["hard-shutdown"]; + auto proxy = + sensor::hard_shutdown::Proxy(ctx).service(service).path( + path.str); + + if (auto v = co_await proxy.hard_shutdown_high(); std::isfinite(v)) + { + entry_json["high"] = v; + update_status(sensor_json, v, "critical"); + } + if (auto v = co_await proxy.hard_shutdown_low(); std::isfinite(v)) + { + entry_json["low"] = v; + update_status(sensor_json, v, "critical"); + } + }); + + info("Finding Critical thresholds"); + co_await utils::mapper::subtree_for_each( + ctx, sensor::ns_path, sensor::critical::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + auto& sensor_json = result[last_element(path)]; + auto& entry_json = sensor_json["critical"]; + auto proxy = + sensor::critical::Proxy(ctx).service(service).path(path.str); + + if (auto v = co_await proxy.critical_high(); std::isfinite(v)) + { + entry_json["high"] = v; + update_status(sensor_json, v, "critical"); + } + if (auto v = co_await proxy.critical_low(); std::isfinite(v)) + { + entry_json["low"] = v; + update_status(sensor_json, v, "critical"); + } + }); + + info("Finding Warning thresholds"); + co_await utils::mapper::subtree_for_each( + ctx, sensor::ns_path, sensor::warning::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + auto& sensor_json = result[last_element(path)]; + auto& entry_json = sensor_json["warning"]; + auto proxy = + sensor::warning::Proxy(ctx).service(service).path(path.str); + + if (auto v = co_await proxy.warning_high(); std::isfinite(v)) + { + entry_json["high"] = v; + update_status(sensor_json, v, "warning"); + } + if (auto v = co_await proxy.warning_low(); std::isfinite(v)) + { + entry_json["low"] = v; + update_status(sensor_json, v, "warning"); + } + }); + + info("Finding sensor threshold entries."); + co_await utils::mapper::subtree_for_each( + ctx, sensor::ns_path, threshold::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + using namespace std::string_literals; + + auto& sensor_json = result[last_element(path)]; + auto proxy = threshold::Proxy(ctx).service(service).path(path.str); + + auto values = co_await proxy.value(); + auto asserted = co_await proxy.asserted(); + + for (const auto& [type, type_str] : thresholds) + { + for (const auto& [bound, bound_str] : bounds) + { + if (values.contains(type) && + values.at(type).contains(bound)) + { + if (auto v = values.at(type).at(bound); + std::isfinite(v)) + { + sensor_json[type_str][bound_str] = v; + if (asserted.contains({type, bound})) + { + update_status(sensor_json, bound_str); + } + } + } + } + } + }); + + info("Finding metric entries."); + co_await utils::mapper::subtree_for_each( + ctx, metric::ns_path, metric::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + using namespace std::string_literals; + + auto& entry_json = + result[replace_substring(path, metric::ns_path + "/"s, "")]; + auto proxy = metric::Proxy(ctx).service(service).path(path.str); + + auto value = co_await proxy.value(); + entry_json["value"] = value; + entry_json["status"] = std::isfinite(value) ? "ok" : "unavailable"; + if (auto v = co_await proxy.max_value(); std::isfinite(v)) + { + entry_json["max"] = v; + } + if (auto v = co_await proxy.min_value(); std::isfinite(v)) + { + entry_json["min"] = v; + } + entry_json["unit"] = last_element( + sdbusplus::message::convert_to_string(co_await proxy.unit()), + '.'); + }); + + info("Finding metric threshold entries."); + co_await utils::mapper::subtree_for_each( + ctx, metric::ns_path, threshold::interface, + + [&](const auto& path, + const auto& service) -> sdbusplus::async::task<> { + using namespace std::string_literals; + + auto& sensor_json = + result[replace_substring(path, metric::ns_path + "/"s, "")]; + auto proxy = threshold::Proxy(ctx).service(service).path(path.str); + + auto values = co_await proxy.value(); + auto asserted = co_await proxy.asserted(); + + for (const auto& [type, type_str] : thresholds) + { + for (const auto& [bound, bound_str] : bounds) + { + if (values.contains(type) && + values.at(type).contains(bound)) + { + if (auto v = values.at(type).at(bound); + std::isfinite(v)) + { + sensor_json[type_str][bound_str] = v; + if (asserted.contains({type, bound})) + { + update_status(sensor_json, bound_str); + } + } + } + } + } + }); + + json::display(result); + + co_return; + } + + static constexpr auto thresholds = + std::to_array>( + {{threshold::Proxy::Type::HardShutdown, "hard-shutdown"}, + {threshold::Proxy::Type::Critical, "critical"}, + {threshold::Proxy::Type::Warning, "warning"}}); + + static constexpr auto bounds = + std::to_array>( + {{threshold::Proxy::Bound::Upper, "high"}, + {threshold::Proxy::Bound::Lower, "low"}}); + + template