forked from cilynx/rtl88x2bu
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathrtw_mp.c
3969 lines (3411 loc) · 104 KB
/
rtw_mp.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/******************************************************************************
*
* Copyright(c) 2007 - 2017 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*****************************************************************************/
#define _RTW_MP_C_
#include <drv_types.h>
#ifdef PLATFORM_FREEBSD
#include <sys/unistd.h> /* for RFHIGHPID */
#endif
#include "../hal/phydm/phydm_precomp.h"
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8821A)
#include <rtw_bt_mp.h>
#endif
#ifdef CONFIG_MP_VHT_HW_TX_MODE
#define CEILING_POS(X) ((X - (int)(X)) > 0 ? (int)(X + 1) : (int)(X))
#define CEILING_NEG(X) ((X - (int)(X)) < 0 ? (int)(X - 1) : (int)(X))
#define ceil(X) (((X) > 0) ? CEILING_POS(X) : CEILING_NEG(X))
int rtfloor(float x)
{
int i = x - 2;
while
(++i <= x - 1)
;
return i;
}
#endif
#ifdef CONFIG_MP_INCLUDED
u32 read_macreg(_adapter *padapter, u32 addr, u32 sz)
{
u32 val = 0;
switch (sz) {
case 1:
val = rtw_read8(padapter, addr);
break;
case 2:
val = rtw_read16(padapter, addr);
break;
case 4:
val = rtw_read32(padapter, addr);
break;
default:
val = 0xffffffff;
break;
}
return val;
}
void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz)
{
switch (sz) {
case 1:
rtw_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
break;
default:
break;
}
}
u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask)
{
return rtw_hal_read_bbreg(padapter, addr, bitmask);
}
void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_bbreg(padapter, addr, bitmask, val);
}
u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask)
{
return rtw_hal_read_rfreg(padapter, rfpath, addr, bitmask);
}
void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_rfreg(padapter, rfpath, addr, bitmask, val);
}
u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr)
{
return _read_rfreg(padapter, rfpath, addr, bRFRegOffsetMask);
}
void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val)
{
_write_rfreg(padapter, rfpath, addr, bRFRegOffsetMask, val);
}
static void _init_mp_priv_(struct mp_priv *pmp_priv)
{
WLAN_BSSID_EX *pnetwork;
_rtw_memset(pmp_priv, 0, sizeof(struct mp_priv));
pmp_priv->mode = MP_OFF;
pmp_priv->channel = 1;
pmp_priv->bandwidth = CHANNEL_WIDTH_20;
pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
pmp_priv->rateidx = RATE_1M;
pmp_priv->txpoweridx = 0x2A;
pmp_priv->antenna_tx = ANTENNA_A;
pmp_priv->antenna_rx = ANTENNA_AB;
pmp_priv->check_mp_pkt = 0;
pmp_priv->tx_pktcount = 0;
pmp_priv->rx_bssidpktcount = 0;
pmp_priv->rx_pktcount = 0;
pmp_priv->rx_crcerrpktcount = 0;
pmp_priv->network_macaddr[0] = 0x00;
pmp_priv->network_macaddr[1] = 0xE0;
pmp_priv->network_macaddr[2] = 0x4C;
pmp_priv->network_macaddr[3] = 0x87;
pmp_priv->network_macaddr[4] = 0x66;
pmp_priv->network_macaddr[5] = 0x55;
pmp_priv->bSetRxBssid = _FALSE;
pmp_priv->bRTWSmbCfg = _FALSE;
pmp_priv->bloopback = _FALSE;
pmp_priv->bloadefusemap = _FALSE;
pmp_priv->brx_filter_beacon = _FALSE;
pmp_priv->mplink_brx = _FALSE;
pnetwork = &pmp_priv->mp_network.network;
_rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
pnetwork->Ssid.SsidLength = 8;
_rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
pmp_priv->tx.payload = MP_TX_Payload_default_random;
#ifdef CONFIG_80211N_HT
pmp_priv->tx.attrib.ht_en = 1;
#endif
pmp_priv->mpt_ctx.mpt_rate_index = 1;
}
static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct pkt_attrib *pattrib;
/* init xmitframe attribute */
pattrib = &pmptx->attrib;
_rtw_memset(pattrib, 0, sizeof(struct pkt_attrib));
_rtw_memset(pmptx->desc, 0, TXDESC_SIZE);
pattrib->ether_type = 0x8712;
#if 0
_rtw_memcpy(pattrib->src, adapter_mac_addr(padapter), ETH_ALEN);
_rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
#endif
_rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
/* pattrib->dhcp_pkt = 0;
* pattrib->pktlen = 0; */
pattrib->ack_policy = 0;
/* pattrib->pkt_hdrlen = ETH_HLEN; */
pattrib->hdrlen = WLAN_HDR_A3_LEN;
pattrib->subtype = WIFI_DATA;
pattrib->priority = 0;
pattrib->qsel = pattrib->priority;
/* do_queue_select(padapter, pattrib); */
pattrib->nr_frags = 1;
pattrib->encrypt = 0;
pattrib->bswenc = _FALSE;
pattrib->qos_en = _FALSE;
pattrib->pktlen = 1500;
if (pHalData->rf_type == RF_2T2R)
pattrib->raid = RATEID_IDX_BGN_40M_2SS;
else
pattrib->raid = RATEID_IDX_BGN_40M_1SS;
#ifdef CONFIG_80211AC_VHT
if (pHalData->rf_type == RF_1T1R)
pattrib->raid = RATEID_IDX_VHT_1SS;
else if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_2T4R)
pattrib->raid = RATEID_IDX_VHT_2SS;
else if (pHalData->rf_type == RF_3T3R)
pattrib->raid = RATEID_IDX_VHT_3SS;
else
pattrib->raid = RATEID_IDX_BGN_40M_1SS;
#endif
}
s32 init_mp_priv(PADAPTER padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
PHAL_DATA_TYPE pHalData;
pHalData = GET_HAL_DATA(padapter);
_init_mp_priv_(pmppriv);
pmppriv->papdater = padapter;
if (IS_HARDWARE_TYPE_8822C(padapter))
pmppriv->mp_dm = 1;/* default enable dpk tracking */
else
pmppriv->mp_dm = 0;
pmppriv->tx.stop = 1;
pmppriv->bSetTxPower = 0; /*for manually set tx power*/
pmppriv->bTxBufCkFail = _FALSE;
pmppriv->pktInterval = 0;
pmppriv->pktLength = 1000;
pmppriv->bprocess_mp_mode = _FALSE;
mp_init_xmit_attrib(&pmppriv->tx, padapter);
switch (GET_HAL_RFPATH(padapter)) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_BC;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
pHalData->AntennaRxPath = pmppriv->antenna_rx;
pHalData->antenna_tx_path = pmppriv->antenna_tx;
return _SUCCESS;
}
void free_mp_priv(struct mp_priv *pmp_priv)
{
if (pmp_priv->pallocated_mp_xmitframe_buf) {
rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0);
pmp_priv->pallocated_mp_xmitframe_buf = NULL;
}
pmp_priv->pmp_xmtframe_buf = NULL;
}
#if 0
static void PHY_IQCalibrate_default(
PADAPTER pAdapter,
BOOLEAN bReCovery
)
{
RTW_INFO("%s\n", __func__);
}
static void PHY_LCCalibrate_default(
PADAPTER pAdapter
)
{
RTW_INFO("%s\n", __func__);
}
static void PHY_SetRFPathSwitch_default(
PADAPTER pAdapter,
BOOLEAN bMain
)
{
RTW_INFO("%s\n", __func__);
}
#endif
void mpt_InitHWConfig(PADAPTER Adapter)
{
PHAL_DATA_TYPE hal;
hal = GET_HAL_DATA(Adapter);
if (IS_HARDWARE_TYPE_8723B(Adapter)) {
/* TODO: <20130114, Kordan> The following setting is only for DPDT and Fixed board type. */
/* TODO: A better solution is configure it according EFUSE during the run-time. */
phy_set_mac_reg(Adapter, 0x64, BIT20, 0x0); /* 0x66[4]=0 */
phy_set_mac_reg(Adapter, 0x64, BIT24, 0x0); /* 0x66[8]=0 */
phy_set_mac_reg(Adapter, 0x40, BIT4, 0x0); /* 0x40[4]=0 */
phy_set_mac_reg(Adapter, 0x40, BIT3, 0x1); /* 0x40[3]=1 */
phy_set_mac_reg(Adapter, 0x4C, BIT24, 0x1); /* 0x4C[24:23]=10 */
phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /* 0x4C[24:23]=10 */
phy_set_bb_reg(Adapter, 0x944, BIT1 | BIT0, 0x3); /* 0x944[1:0]=11 */
phy_set_bb_reg(Adapter, 0x930, bMaskByte0, 0x77);/* 0x930[7:0]=77 */
phy_set_mac_reg(Adapter, 0x38, BIT11, 0x1);/* 0x38[11]=1 */
/* TODO: <20130206, Kordan> The default setting is wrong, hard-coded here. */
phy_set_mac_reg(Adapter, 0x778, 0x3, 0x3); /* Turn off hardware PTA control (Asked by Scott) */
phy_set_mac_reg(Adapter, 0x64, bMaskDWord, 0x36000000);/* Fix BT S0/S1 */
phy_set_mac_reg(Adapter, 0x948, bMaskDWord, 0x0); /* Fix BT can't Tx */
/* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou) */
phy_set_bb_reg(Adapter, 0xA00, BIT8, 0x0); /*0xA01[0] = 0*/
} else if (IS_HARDWARE_TYPE_8821(Adapter)) {
/* <20131121, VincentL> Add for 8821AU DPDT setting and fix switching antenna issue (Asked by Rock)
<20131122, VincentL> Enable for all 8821A/8811AU (Asked by Alex)*/
phy_set_mac_reg(Adapter, 0x4C, BIT23, 0x0); /*0x4C[23:22]=01*/
phy_set_mac_reg(Adapter, 0x4C, BIT22, 0x1); /*0x4C[23:22]=01*/
} else if (IS_HARDWARE_TYPE_8188ES(Adapter))
phy_set_mac_reg(Adapter, 0x4C , BIT23, 0); /*select DPDT_P and DPDT_N as output pin*/
#ifdef CONFIG_RTL8814A
else if (IS_HARDWARE_TYPE_8814A(Adapter))
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814A, 0x2000);
#endif
#ifdef CONFIG_RTL8812A
else if (IS_HARDWARE_TYPE_8812(Adapter)) {
rtw_write32(Adapter, 0x520, rtw_read32(Adapter, 0x520) | 0x8000);
rtw_write32(Adapter, 0x524, rtw_read32(Adapter, 0x524) & (~0x800));
}
#endif
#ifdef CONFIG_RTL8822B
else if (IS_HARDWARE_TYPE_8822B(Adapter)) {
u32 tmp_reg = 0;
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8822B, 0x2000);
/* fixed wifi can't 2.4g tx suggest by Szuyitasi 20160504 */
phy_set_bb_reg(Adapter, 0x70, bMaskByte3, 0x0e);
RTW_INFO(" 0x73 = 0x%x\n", phy_query_bb_reg(Adapter, 0x70, bMaskByte3));
phy_set_bb_reg(Adapter, 0x1704, bMaskDWord, 0x0000ff00);
RTW_INFO(" 0x1704 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1704, bMaskDWord));
phy_set_bb_reg(Adapter, 0x1700, bMaskDWord, 0xc00f0038);
RTW_INFO(" 0x1700 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1700, bMaskDWord));
}
#endif /* CONFIG_RTL8822B */
#ifdef CONFIG_RTL8821C
else if (IS_HARDWARE_TYPE_8821C(Adapter))
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8821C, 0x2000);
#endif /* CONFIG_RTL8821C */
#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
else if (IS_HARDWARE_TYPE_8188F(Adapter) || IS_HARDWARE_TYPE_8188GTV(Adapter)) {
if (IS_A_CUT(hal->version_id) || IS_B_CUT(hal->version_id)) {
RTW_INFO("%s() Active large power detection\n", __func__);
phy_active_large_power_detection_8188f(&(GET_HAL_DATA(Adapter)->odmpriv));
}
}
#endif
#if defined(CONFIG_RTL8822C)
else if( IS_HARDWARE_TYPE_8822C(Adapter)) {
rtw_write16(Adapter, REG_RXFLTMAP1_8822C, 0x2000);
/* 0x7D8[31] : time out enable when cca is not assert
0x60D[7:0] : time out value (Unit : us)*/
rtw_write8(Adapter, 0x7db, 0xc0);
RTW_INFO(" 0x7d8 = 0x%x\n", rtw_read8(Adapter, 0x7d8));
rtw_write8(Adapter, 0x60d, 0x0c);
RTW_INFO(" 0x60d = 0x%x\n", rtw_read8(Adapter, 0x60d));
phy_set_bb_reg(Adapter, 0x1c44, BIT10, 0x1);
RTW_INFO(" 0x1c44 = 0x%x\n", phy_query_bb_reg(Adapter, 0x1c44, bMaskDWord));
}
#endif
#if defined(CONFIG_RTL8814B)
else if(IS_HARDWARE_TYPE_8814B(Adapter))
{
PlatformEFIOWrite2Byte(Adapter, REG_RXFLTMAP1_8814B, 0x2000);
}
#endif
}
static void PHY_IQCalibrate(PADAPTER padapter, u8 bReCovery)
{
halrf_iqk_trigger(&(GET_HAL_DATA(padapter)->odmpriv), bReCovery);
}
static void PHY_LCCalibrate(PADAPTER padapter)
{
halrf_lck_trigger(&(GET_HAL_DATA(padapter)->odmpriv));
}
static u8 PHY_QueryRFPathSwitch(PADAPTER padapter)
{
u8 bmain = 0;
/*
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
bmain = PHY_QueryRFPathSwitch_8723B(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
#ifdef CONFIG_RTL8188E
bmain = PHY_QueryRFPathSwitch_8188E(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
#ifdef CONFIG_RTL8814A
bmain = PHY_QueryRFPathSwitch_8814A(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
bmain = PHY_QueryRFPathSwitch_8812A(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
#ifdef CONFIG_RTL8192E
bmain = PHY_QueryRFPathSwitch_8192E(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
#ifdef CONFIG_RTL8703B
bmain = PHY_QueryRFPathSwitch_8703B(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8188F(padapter)) {
#ifdef CONFIG_RTL8188F
bmain = PHY_QueryRFPathSwitch_8188F(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8188GTV(padapter)) {
#ifdef CONFIG_RTL8188GTV
bmain = PHY_QueryRFPathSwitch_8188GTV(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
bmain = PHY_QueryRFPathSwitch_8822B(padapter);
#endif
} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
#ifdef CONFIG_RTL8723D
bmain = PHY_QueryRFPathSwitch_8723D(padapter);
#endif
} else
*/
if (IS_HARDWARE_TYPE_8821C(padapter)) {
#ifdef CONFIG_RTL8821C
bmain = phy_query_rf_path_switch_8821c(padapter);
#endif
}
return bmain;
}
static void PHY_SetRFPathSwitch(PADAPTER padapter , BOOLEAN bMain) {
PHAL_DATA_TYPE hal = GET_HAL_DATA(padapter);
struct dm_struct *phydm = &hal->odmpriv;
if (IS_HARDWARE_TYPE_8723B(padapter)) {
#ifdef CONFIG_RTL8723B
phy_set_rf_path_switch_8723b(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8188E(padapter)) {
#ifdef CONFIG_RTL8188E
phy_set_rf_path_switch_8188e(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8814A(padapter)) {
#ifdef CONFIG_RTL8814A
phy_set_rf_path_switch_8814a(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8812(padapter) || IS_HARDWARE_TYPE_8821(padapter)) {
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
phy_set_rf_path_switch_8812a(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8192E(padapter)) {
#ifdef CONFIG_RTL8192E
phy_set_rf_path_switch_8192e(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8703B(padapter)) {
#ifdef CONFIG_RTL8703B
phy_set_rf_path_switch_8703b(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8188F(padapter) || IS_HARDWARE_TYPE_8188GTV(padapter)) {
#if defined(CONFIG_RTL8188F) || defined(CONFIG_RTL8188GTV)
phy_set_rf_path_switch_8188f(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8192F(padapter)) {
#ifdef CONFIG_RTL8192F
phy_set_rf_path_switch_8192f(padapter, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8822B(padapter)) {
#ifdef CONFIG_RTL8822B
phy_set_rf_path_switch_8822b(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8723D(padapter)) {
#ifdef CONFIG_RTL8723D
phy_set_rf_path_switch_8723d(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8821C(padapter)) {
#ifdef CONFIG_RTL8821C
phy_set_rf_path_switch_8821c(phydm, bMain);
#endif
} else if (IS_HARDWARE_TYPE_8822C(padapter)) {
#ifdef CONFIG_RTL8822C
/* remove for MP EVM Fail, need to review by willis 20180809
phy_set_rf_path_switch_8822c(phydm, bMain);
*/
#endif
} else if (IS_HARDWARE_TYPE_8814B(padapter)) {
#ifdef CONFIG_RTL8814B
/* phy_set_rf_path_switch_8814b(phydm, bMain); */
#endif
}
}
static void phy_switch_rf_path_set(PADAPTER padapter , u8 *prf_set_State) {
#ifdef CONFIG_RTL8821C
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_struct *p_dm = &pHalData->odmpriv;
if (IS_HARDWARE_TYPE_8821C(padapter)) {
config_phydm_set_ant_path(p_dm, *prf_set_State, p_dm->current_ant_num_8821c);
/* Do IQK when switching to BTG/WLG, requested by RF Binson */
if (*prf_set_State == SWITCH_TO_BTG || *prf_set_State == SWITCH_TO_WLG)
PHY_IQCalibrate(padapter, FALSE);
}
#endif
}
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_mp_set_antdiv(PADAPTER padapter, BOOLEAN bMain)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
u8 cur_ant, change_ant;
if (!pHalData->AntDivCfg)
return _FALSE;
/*rtw_hal_get_odm_var(padapter, HAL_ODM_ANTDIV_SELECT, &cur_ant, NULL);*/
change_ant = (bMain == MAIN_ANT) ? MAIN_ANT : AUX_ANT;
RTW_INFO("%s: config %s\n", __func__, (bMain == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
rtw_antenna_select_cmd(padapter, change_ant, _FALSE);
return _TRUE;
}
#endif
s32
MPT_InitializeAdapter(
PADAPTER pAdapter,
u8 Channel
)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
s32 rtStatus = _SUCCESS;
PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx;
u32 ledsetting;
pMptCtx->bMptDrvUnload = _FALSE;
pMptCtx->bMassProdTest = _FALSE;
pMptCtx->bMptIndexEven = _TRUE; /* default gain index is -6.0db */
pMptCtx->h2cReqNum = 0x0;
/* init for BT MP */
#if defined(CONFIG_RTL8723B)
pMptCtx->bMPh2c_timeout = _FALSE;
pMptCtx->MptH2cRspEvent = _FALSE;
pMptCtx->MptBtC2hEvent = _FALSE;
_rtw_init_sema(&pMptCtx->MPh2c_Sema, 0);
rtw_init_timer(&pMptCtx->MPh2c_timeout_timer, pAdapter, MPh2c_timeout_handle, pAdapter);
#endif
mpt_InitHWConfig(pAdapter);
#ifdef CONFIG_RTL8723B
rtl8723b_InitAntenna_Selection(pAdapter);
if (IS_HARDWARE_TYPE_8723B(pAdapter)) {
/* <20130522, Kordan> Turn off equalizer to improve Rx sensitivity. (Asked by EEChou)*/
phy_set_bb_reg(pAdapter, 0xA00, BIT8, 0x0);
PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /*default use Main*/
if (pHalData->PackageType == PACKAGE_DEFAULT)
phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6B04E);
else
phy_set_rf_reg(pAdapter, RF_PATH_A, 0x51, bRFRegOffsetMask, 0x6F10E);
}
/*set ant to wifi side in mp mode*/
rtw_write16(pAdapter, 0x870, 0x300);
rtw_write16(pAdapter, 0x860, 0x110);
#endif
pMptCtx->bMptWorkItemInProgress = _FALSE;
pMptCtx->CurrMptAct = NULL;
pMptCtx->mpt_rf_path = RF_PATH_A;
/* ------------------------------------------------------------------------- */
/* Don't accept any packets */
rtw_write32(pAdapter, REG_RCR, 0);
/* ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); */
/* rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); */
/* rtw_write32(pAdapter, REG_LEDCFG0, 0x08080); */
ledsetting = rtw_read32(pAdapter, REG_LEDCFG0);
PHY_LCCalibrate(pAdapter);
PHY_IQCalibrate(pAdapter, _FALSE);
/* dm_check_txpowertracking(&pHalData->odmpriv); */ /* trigger thermal meter */
PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); /* default use Main */
pMptCtx->backup0xc50 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
pMptCtx->backup0xc58 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
pMptCtx->backup0xc30 = (u8)phy_query_bb_reg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
pMptCtx->backup0x52_RF_A = (u8)phy_query_rf_reg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pMptCtx->backup0x52_RF_B = (u8)phy_query_rf_reg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
#ifdef CONFIG_RTL8188E
rtw_write32(pAdapter, REG_MACID_NO_LINK_0, 0x0);
rtw_write32(pAdapter, REG_MACID_NO_LINK_1, 0x0);
#endif
#ifdef CONFIG_RTL8814A
if (IS_HARDWARE_TYPE_8814A(pAdapter)) {
pHalData->BackUp_IG_REG_4_Chnl_Section[0] = (u8)phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[1] = (u8)phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[2] = (u8)phy_query_bb_reg(pAdapter, rC_IGI_Jaguar2, bMaskByte0);
pHalData->BackUp_IG_REG_4_Chnl_Section[3] = (u8)phy_query_bb_reg(pAdapter, rD_IGI_Jaguar2, bMaskByte0);
}
#endif
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: MPT_DeInitAdapter()
*
* Overview: Extra DeInitialization for Mass Production Test.
*
* Input: PADAPTER pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 05/08/2007 MHC Create Version 0.
* 05/18/2007 MHC Add normal driver MPHalt code.
*
*---------------------------------------------------------------------------*/
void
MPT_DeInitAdapter(
PADAPTER pAdapter
)
{
PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx;
pMptCtx->bMptDrvUnload = _TRUE;
#if defined(CONFIG_RTL8723B)
_rtw_free_sema(&(pMptCtx->MPh2c_Sema));
_cancel_timer_ex(&pMptCtx->MPh2c_timeout_timer);
#endif
#if defined(CONFIG_RTL8723B)
phy_set_bb_reg(pAdapter, 0xA01, BIT0, 1); /* /suggestion by jerry for MP Rx. */
#endif
#if 0 /* for Windows */
PlatformFreeWorkItem(&(pMptCtx->MptWorkItem));
while (pMptCtx->bMptWorkItemInProgress) {
if (NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50))
break;
}
NdisFreeSpinLock(&(pMptCtx->MptWorkItemSpinLock));
#endif
}
static u8 mpt_ProStartTest(PADAPTER padapter)
{
PMPT_CONTEXT pMptCtx = &padapter->mppriv.mpt_ctx;
pMptCtx->bMassProdTest = _TRUE;
pMptCtx->is_start_cont_tx = _FALSE;
pMptCtx->bCckContTx = _FALSE;
pMptCtx->bOfdmContTx = _FALSE;
pMptCtx->bSingleCarrier = _FALSE;
pMptCtx->is_carrier_suppression = _FALSE;
pMptCtx->is_single_tone = _FALSE;
pMptCtx->HWTxmode = PACKETS_TX;
return _SUCCESS;
}
/*
* General use
*/
s32 SetPowerTracking(PADAPTER padapter, u8 enable)
{
hal_mpt_SetPowerTracking(padapter, enable);
return 0;
}
void GetPowerTracking(PADAPTER padapter, u8 *enable)
{
hal_mpt_GetPowerTracking(padapter, enable);
}
void rtw_mp_trigger_iqk(PADAPTER padapter)
{
PHY_IQCalibrate(padapter, _FALSE);
}
void rtw_mp_trigger_lck(PADAPTER padapter)
{
PHY_LCCalibrate(padapter);
}
void rtw_mp_trigger_dpk(PADAPTER padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_struct *pDM_Odm = &pHalData->odmpriv;
halrf_dpk_trigger(pDM_Odm);
}
static void init_mp_data(PADAPTER padapter)
{
u8 v8;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_struct *pDM_Odm = &pHalData->odmpriv;
/*disable BCN*/
#ifdef CONFIG_PROTSEL_PORT
rtw_hal_hw_port_disable(padapter);
#else
v8 = rtw_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
rtw_write8(padapter, REG_BCN_CTRL, v8);
#endif
pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
}
void MPT_PwrCtlDM(PADAPTER padapter, u32 bstart)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dm_struct *pDM_Odm = &pHalData->odmpriv;
u32 rf_ability;
padapter->mppriv.tssitrk_on = bstart == 3;
if (bstart == 1) {
RTW_INFO("in MPT_PwrCtlDM start\n");
rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) | HAL_RF_TX_PWR_TRACK;
halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability);
halrf_set_pwr_track(pDM_Odm, bstart);
pDM_Odm->rf_calibrate_info.txpowertrack_control = _TRUE;
padapter->mppriv.mp_dm = 1;
} else {
RTW_INFO("in MPT_PwrCtlDM stop\n");
rf_ability = ((u32)halrf_cmn_info_get(pDM_Odm, HALRF_CMNINFO_ABILITY)) & ~HAL_RF_TX_PWR_TRACK;
halrf_cmn_info_set(pDM_Odm, HALRF_CMNINFO_ABILITY, rf_ability);
halrf_set_pwr_track(pDM_Odm, bstart);
pDM_Odm->rf_calibrate_info.txpowertrack_control = _FALSE;
if (IS_HARDWARE_TYPE_8822C(padapter))
padapter->mppriv.mp_dm = 1; /* default enable dpk tracking */
else
padapter->mppriv.mp_dm = 0;
{
struct txpwrtrack_cfg c;
u8 chnl = 0 ;
_rtw_memset(&c, 0, sizeof(struct txpwrtrack_cfg));
configure_txpower_track(pDM_Odm, &c);
odm_clear_txpowertracking_state(pDM_Odm);
if (*c.odm_tx_pwr_track_set_pwr) {
if (pDM_Odm->support_ic_type == ODM_RTL8188F)
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl);
else if (pDM_Odm->support_ic_type == ODM_RTL8723D) {
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
SetTxPower(padapter);
} else if (pDM_Odm->support_ic_type == ODM_RTL8192F) {
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_A, chnl);
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, MIX_MODE, RF_PATH_B, chnl);
} else {
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_A, chnl);
(*c.odm_tx_pwr_track_set_pwr)(pDM_Odm, BBSWING, RF_PATH_B, chnl);
}
}
}
}
}
u32 mp_join(PADAPTER padapter, u8 mode)
{
WLAN_BSSID_EX bssid;
struct sta_info *psta;
u32 length;
_irqL irqL;
s32 res = _SUCCESS;
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)(&(pmlmeinfo->network));
/* 1. initialize a new WLAN_BSSID_EX */
_rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX));
RTW_INFO("%s ,pmppriv->network_macaddr=%x %x %x %x %x %x\n", __func__,
pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
pmppriv->network_macaddr[5]);
_rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
if (mode == WIFI_FW_ADHOC_STATE) {
bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
_rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
bssid.InfrastructureMode = Ndis802_11IBSS;
bssid.IELength = 0;
bssid.Configuration.DSConfig = pmppriv->channel;
} else if (mode == WIFI_FW_STATION_STATE) {
bssid.Ssid.SsidLength = strlen("mp_pseudo_STATION");
_rtw_memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_STATION", bssid.Ssid.SsidLength);
bssid.InfrastructureMode = Ndis802_11Infrastructure;
bssid.IELength = 0;
}
length = get_WLAN_BSSID_EX_sz(&bssid);
if (length % 4)
bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */
else
bssid.Length = length;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)
goto end_of_mp_start_test;
/* init mp_start_test status */
if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
rtw_disassoc_cmd(padapter, 500, 0);
rtw_indicate_disconnect(padapter, 0, _FALSE);
rtw_free_assoc_resources_cmd(padapter, _TRUE, 0);
}
pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
/*pmlmepriv->fw_state = WIFI_MP_STATE;*/
init_fwstate(pmlmepriv, WIFI_MP_STATE);
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
/* 3 2. create a new psta for mp driver */
/* clear psta in the cur_network, if any */
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
if (psta)
rtw_free_stainfo(padapter, psta);
psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
if (psta == NULL) {
/*pmlmepriv->fw_state = pmppriv->prev_fw_state;*/
init_fwstate(pmlmepriv, pmppriv->prev_fw_state);
res = _FAIL;
goto end_of_mp_start_test;
}
if (mode == WIFI_FW_ADHOC_STATE)
set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
else
set_fwstate(pmlmepriv, WIFI_STATION_STATE);
/* 3 3. join psudo AdHoc */
tgt_network->join_res = 1;
tgt_network->aid = psta->cmn.aid = 1;
_rtw_memcpy(&padapter->registrypriv.dev_network, &bssid, length);
rtw_update_registrypriv_dev_network(padapter);
_rtw_memcpy(&tgt_network->network, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
_rtw_memcpy(pnetwork, &padapter->registrypriv.dev_network, padapter->registrypriv.dev_network.Length);
rtw_indicate_connect(padapter);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
set_fwstate(pmlmepriv, _FW_LINKED);
end_of_mp_start_test:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
if (1) { /* (res == _SUCCESS) */
/* set MSR to WIFI_FW_ADHOC_STATE */
if (mode == WIFI_FW_ADHOC_STATE) {
/* set msr to WIFI_FW_ADHOC_STATE */
pmlmeinfo->state = WIFI_FW_ADHOC_STATE;
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress);
rtw_hal_rcr_set_chk_bssid(padapter, MLME_ADHOC_STARTED);
pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS;
} else {
Set_MSR(padapter, WIFI_FW_STATION_STATE);
RTW_INFO("%s , pmppriv->network_macaddr =%x %x %x %x %x %x\n", __func__,
pmppriv->network_macaddr[0], pmppriv->network_macaddr[1], pmppriv->network_macaddr[2], pmppriv->network_macaddr[3], pmppriv->network_macaddr[4],
pmppriv->network_macaddr[5]);
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmppriv->network_macaddr);
}
}
return res;
}
/* This function initializes the DUT to the MP test mode */
s32 mp_start_test(PADAPTER padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
#ifdef CONFIG_PCI_HCI
PHAL_DATA_TYPE hal;
#endif
s32 res = _SUCCESS;
padapter->registrypriv.mp_mode = 1;
init_mp_data(padapter);
#ifdef CONFIG_RTL8814A
rtl8814_InitHalDm(padapter);
#endif /* CONFIG_RTL8814A */
#ifdef CONFIG_RTL8812A
rtl8812_InitHalDm(padapter);
#endif /* CONFIG_RTL8812A */
#ifdef CONFIG_RTL8723B
rtl8723b_InitHalDm(padapter);
#endif /* CONFIG_RTL8723B */
#ifdef CONFIG_RTL8703B
rtl8703b_InitHalDm(padapter);
#endif /* CONFIG_RTL8703B */
#ifdef CONFIG_RTL8192E
rtl8192e_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188F
rtl8188f_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188GTV
rtl8188gtv_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8188E
rtl8188e_InitHalDm(padapter);
#endif
#ifdef CONFIG_RTL8723D
rtl8723d_InitHalDm(padapter);
#endif /* CONFIG_RTL8723D */
#ifdef CONFIG_PCI_HCI
hal = GET_HAL_DATA(padapter);
hal->pci_backdoor_ctrl = 0;
rtw_pci_aspm_config(padapter);
#endif
/* 3 0. update mp_priv */
switch (GET_HAL_RFPATH(padapter)) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
mpt_ProStartTest(padapter);
mp_join(padapter, WIFI_FW_ADHOC_STATE);
return res;
}
/* ------------------------------------------------------------------------------
* This function change the DUT from the MP test mode into normal mode */
void mp_stop_test(PADAPTER padapter)