diff --git a/test/benchmarks/01_DDR_SHIM_LM_FillRate/test.cpp b/test/benchmarks/01_DDR_SHIM_LM_FillRate/test.cpp index e6d2df3b2a..1fe2c2fe20 100755 --- a/test/benchmarks/01_DDR_SHIM_LM_FillRate/test.cpp +++ b/test/benchmarks/01_DDR_SHIM_LM_FillRate/test.cpp @@ -47,13 +47,8 @@ int main(int argc, char *argv[]) { mlir_aie_configure_dmas(_xaie); ext_mem_model_t buf0; -<<<<<<< HEAD int *ddr_ptr = mlir_aie_mem_alloc(buf0, DMA_COUNT); for(int i=0; i>>>>>> 0df6dfa7... fixup! dos2unix *(ddr_ptr + i) = i + 1; } mlir_aie_sync_mem_dev(buf0); diff --git a/test/benchmarks/02_LM_SHIM_DDR_FillRate/test.cpp b/test/benchmarks/02_LM_SHIM_DDR_FillRate/test.cpp index ffc86b46c0..3eff794b57 100755 --- a/test/benchmarks/02_LM_SHIM_DDR_FillRate/test.cpp +++ b/test/benchmarks/02_LM_SHIM_DDR_FillRate/test.cpp @@ -48,7 +48,7 @@ int main(int argc, char *argv[]) { mlir_aie_configure_dmas(_xaie); ext_mem_model_t buf0; - int *ddr_ptr = mlir_aie_mem_alloc(_xaie, buf0, DMA_COUNT); + int *ddr_ptr = mlir_aie_mem_alloc(buf0, DMA_COUNT); for (int i = 0; i < DMA_COUNT; i++) { *(ddr_ptr + i) = 0xdeadbeef; } diff --git a/test/unit_tests/27_single_L1_single_lock/aieWithWorkaround.mlir b/test/unit_tests/27_single_L1_single_lock/aieWithWorkaround.mlir index 5b6b5b38e6..27ab1817ea 100644 --- a/test/unit_tests/27_single_L1_single_lock/aieWithWorkaround.mlir +++ b/test/unit_tests/27_single_L1_single_lock/aieWithWorkaround.mlir @@ -8,7 +8,7 @@ // //===----------------------------------------------------------------------===// -// RUN: aiecc.py --sysroot=%VITIS_SYSROOT% --host-target=aarch64-linux-gnu %s -I%aie_runtime_lib% %extraAieCcFlags% %aie_runtime_lib%/test_library.cpp %S/test.cpp -o test.elf +// RUN: aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %s -I%aie_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test.cpp -o test.elf -L%aie_runtime_lib%/test_lib/lib -ltest_lib // RUN: %run_on_board ./test.elf module @test27_simple_shim_dma_single_lock {