diff --git a/rules/klayout/lvs/testing/testcases/mim_1p0fF.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_1f0_m2m3_noshield.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/mim_1p0fF.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_1f0_m2m3_noshield.cdl index f32edfe8..055b4dcf 100644 --- a/rules/klayout/lvs/testing/testcases/mim_1p0fF.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_1f0_m2m3_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_1p0fF +* Top Cell Name: cap_mim_1f0_m2m3_noshield * View Name: schematic * Netlisted on: Nov 24 10:39:22 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_1p0fF +* Cell Name: cap_mim_1f0_m2m3_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_1p0fF I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_1f0_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,25 +36,25 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=50.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=50.000u w=50.000u + c=2.5335p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=11.560u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=50.000u w=11.560u + c=0.6111156p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=5.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=50.000u w=5.000u + c=0.28305p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=50.000u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=11.560u w=50.000u + c=0.6111156p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=11.560u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=11.560u w=11.560u + c=0.14715556p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=5.000u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=11.560u w=5.000u + c=0.0679782p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=50.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=5.000u w=50.000u + c=0.28305p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=11.560u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=5.000u w=11.560u + c=0.0679782p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=5.000u w=5.000u + c=0.031275p -CI1_default I1_default_TOP I1_default_BOT $[mim_1p0fF] M=1 l=5u w=5u +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_1f0_m2m3_noshield] M=1 l=5u w=5u + c=0.031275p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/mim_1p0fF_tm.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_1f0_m5m6_noshield.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/mim_1p0fF_tm.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_1f0_m5m6_noshield.cdl index 21b127cf..56138c31 100644 --- a/rules/klayout/lvs/testing/testcases/mim_1p0fF_tm.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_1f0_m5m6_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_1p0fF_tm +* Top Cell Name: cap_mim_1f0_m5m6_noshield * View Name: schematic * Netlisted on: Nov 24 10:42:03 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_1p0fF_tm +* Cell Name: cap_mim_1f0_m5m6_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_1p0fF_tm I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_1f0_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,25 +36,25 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=50.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=50.000u w=50.000u + c=2.5335p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=11.560u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=50.000u w=11.560u + c=0.6111156p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_1p0fF] M=1 l=50.000u w=5.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=50.000u w=5.000u + c=0.28305p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=50.000u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=11.560u w=50.000u + c=0.6111156p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=11.560u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=11.560u w=11.560u + c=0.14715556p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_1p0fF] M=1 l=11.560u w=5.000u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=11.560u w=5.000u + c=0.0679782p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=50.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=5.000u w=50.000u + c=0.28305p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=11.560u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=5.000u w=11.560u + c=0.0679782p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_1p0fF] M=1 l=5.000u w=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=5.000u w=5.000u + c=0.031275p -CI1_default I1_default_TOP I1_default_BOT $[mim_1p0fF] M=1 l=5u w=5u +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_1f0_m5m6_noshield] M=1 l=5u w=5u + c=0.031275p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/mim_1p5fF.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_1f5_m2m3_noshield.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/mim_1p5fF.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_1f5_m2m3_noshield.cdl index 77c4a9c0..d4908d75 100644 --- a/rules/klayout/lvs/testing/testcases/mim_1p5fF.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_1f5_m2m3_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_1p5fF +* Top Cell Name: cap_mim_1f5_m2m3_noshield * View Name: schematic * Netlisted on: Nov 24 11:42:38 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_1p5fF +* Cell Name: cap_mim_1f5_m2m3_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_1p5fF I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_1f5_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,24 +36,24 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=100.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=100.000u w=100.000u + c=14.8516p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=12.340u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=100.000u w=12.340u + c=1.89913372p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=5.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=100.000u w=5.000u + c=0.81459p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=100.000u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=12.340u w=100.000u + c=1.89913372p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=12.340u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=12.340u w=12.340u + c=0.24255257p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=5.000u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=12.340u w=5.000u + c=0.10384272p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=100.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=5.000u w=100.000u + c=0.81459p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=12.340u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=5.000u w=12.340u + c=0.10384272p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=5.000u w=5.000u + c=0.04433p -CI1_default I1_default_TOP I1_default_BOT $[mim_1p5fF] M=1 l=5u w=5u c=0.04433p +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_1f5_m2m3_noshield] M=1 l=5u w=5u c=0.04433p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/mim_1p5fF_tm.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_1f5_m5m6_noshield.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/mim_1p5fF_tm.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_1f5_m5m6_noshield.cdl index 7afd4ecb..34756579 100644 --- a/rules/klayout/lvs/testing/testcases/mim_1p5fF_tm.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_1f5_m5m6_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_1p5fF_tm +* Top Cell Name: cap_mim_1f5_m5m6_noshield * View Name: schematic * Netlisted on: Nov 24 12:03:53 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_1p5fF_tm +* Cell Name: cap_mim_1f5_m5m6_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_1p5fF_tm I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_1f5_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,24 +36,24 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=100.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=100.000u w=100.000u + c=14.8516p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=12.340u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=100.000u w=12.340u + c=1.89913372p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_1p5fF] M=1 l=100.000u w=5.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=100.000u w=5.000u + c=0.81459p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=100.000u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=12.340u w=100.000u + c=1.89913372p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=12.340u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=12.340u w=12.340u + c=0.24255257p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_1p5fF] M=1 l=12.340u w=5.000u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=12.340u w=5.000u + c=0.10384272p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=100.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=5.000u w=100.000u + c=0.81459p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=12.340u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=5.000u w=12.340u + c=0.10384272p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_1p5fF] M=1 l=5.000u w=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=5.000u w=5.000u + c=0.04433p -CI1_default I1_default_TOP I1_default_BOT $[mim_1p5fF] M=1 l=5u w=5u c=0.04433p +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_1f5_m5m6_noshield] M=1 l=5u w=5u c=0.04433p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/mim_2p0fF.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_2f0_m2m3_noshield.cdl similarity index 58% rename from rules/klayout/lvs/testing/testcases/mim_2p0fF.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_2f0_m2m3_noshield.cdl index ab92f993..12e60df7 100644 --- a/rules/klayout/lvs/testing/testcases/mim_2p0fF.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_2f0_m2m3_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_2p0fF +* Top Cell Name: cap_mim_2f0_m2m3_noshield * View Name: schematic * Netlisted on: Nov 24 10:53:54 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_2p0fF +* Cell Name: cap_mim_2f0_m2m3_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_2p0fF I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_2f0_m2m3_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,25 +36,25 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=100.000u + w=100.000u c=19.99532p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=100.000u + w=12.340u c=2.50920124p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=100.000u + w=5.000u c=1.045043p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=12.340u + w=100.000u c=2.50920124p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=12.340u + w=12.340u c=0.31479093p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=12.340u + w=5.000u c=0.13104724p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=5.000u + w=100.000u c=1.045043p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=5.000u + w=12.340u c=0.13104724p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=5.000u + w=5.000u c=0.054516p -CI1_default I1_default_TOP I1_default_BOT $[mim_single_2p0fF] M=1 l=5u w=5u +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_2f0_m2m3_noshield] M=1 l=5u w=5u + c=0.054516p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/mim_2p0fF_tm.cdl b/rules/klayout/lvs/testing/testcases/cap_mim_2f0_m5m6_noshield.cdl similarity index 58% rename from rules/klayout/lvs/testing/testcases/mim_2p0fF_tm.cdl rename to rules/klayout/lvs/testing/testcases/cap_mim_2f0_m5m6_noshield.cdl index 2e45ae52..7d7a71ff 100644 --- a/rules/klayout/lvs/testing/testcases/mim_2p0fF_tm.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_mim_2f0_m5m6_noshield.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: mim_2p0fF_tm +* Top Cell Name: cap_mim_2f0_m5m6_noshield * View Name: schematic * Netlisted on: Nov 24 11:32:36 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: mim_2p0fF_tm +* Cell Name: cap_mim_2f0_m5m6_noshield * View Name: schematic ************************************************************************ -.SUBCKT mim_2p0fF_tm I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP +.SUBCKT cap_mim_2f0_m5m6_noshield I1_0_0_R0_BOT I1_0_0_R0_TOP I1_0_1_R0_BOT I1_0_1_R0_TOP + I1_0_2_R0_BOT I1_0_2_R0_TOP I1_1_0_R0_BOT I1_1_0_R0_TOP I1_1_1_R0_BOT + I1_1_1_R0_TOP I1_1_2_R0_BOT I1_1_2_R0_TOP I1_2_0_R0_BOT I1_2_0_R0_TOP + I1_2_1_R0_BOT I1_2_1_R0_TOP I1_2_2_R0_BOT I1_2_2_R0_TOP I1_default_BOT @@ -36,25 +36,25 @@ *.PININFO I1_1_1_R0_BOT:I I1_1_1_R0_TOP:I I1_1_2_R0_BOT:I I1_1_2_R0_TOP:I *.PININFO I1_2_0_R0_BOT:I I1_2_0_R0_TOP:I I1_2_1_R0_BOT:I I1_2_1_R0_TOP:I *.PININFO I1_2_2_R0_BOT:I I1_2_2_R0_TOP:I I1_default_BOT:I I1_default_TOP:I -CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_2_R0 I1_2_2_R0_TOP I1_2_2_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=100.000u + w=100.000u c=19.99532p -CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_1_R0 I1_2_1_R0_TOP I1_2_1_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=100.000u + w=12.340u c=2.50920124p -CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[mim_single_2p0fF] M=1 l=100.000u +CI1_2_0_R0 I1_2_0_R0_TOP I1_2_0_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=100.000u + w=5.000u c=1.045043p -CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_2_R0 I1_1_2_R0_TOP I1_1_2_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=12.340u + w=100.000u c=2.50920124p -CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_1_R0 I1_1_1_R0_TOP I1_1_1_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=12.340u + w=12.340u c=0.31479093p -CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[mim_single_2p0fF] M=1 l=12.340u +CI1_1_0_R0 I1_1_0_R0_TOP I1_1_0_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=12.340u + w=5.000u c=0.13104724p -CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_2_R0 I1_0_2_R0_TOP I1_0_2_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=5.000u + w=100.000u c=1.045043p -CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_1_R0 I1_0_1_R0_TOP I1_0_1_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=5.000u + w=12.340u c=0.13104724p -CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[mim_single_2p0fF] M=1 l=5.000u +CI1_0_0_R0 I1_0_0_R0_TOP I1_0_0_R0_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=5.000u + w=5.000u c=0.054516p -CI1_default I1_default_TOP I1_default_BOT $[mim_single_2p0fF] M=1 l=5u w=5u +CI1_default I1_default_TOP I1_default_BOT $[cap_mim_2f0_m5m6_noshield] M=1 l=5u w=5u + c=0.054516p .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_3p3_b.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/nmoscap_3p3_b.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_03v3.cdl index f50c24b6..1ccb050a 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_3p3_b.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_3p3_b +* Top Cell Name: cap_nmos_03v3 * View Name: schematic -* Netlisted on: Nov 24 09:11:11 2021 +* Netlisted on: Nov 24 09:07:52 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_3p3_b +* Cell Name: cap_nmos_03v3 * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_3p3_b I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_03v3 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_3p3_b] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_3p3_b] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_3p3_b] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_3p3_b] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_3p3_b] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_3p3_b] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_3p3_b] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_3p3_b] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_3p3_b] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_3p3_b] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_03v3] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_03v3] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_03v3] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_03v3] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_03v3] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_03v3] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_03v3] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_03v3] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_03v3] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_03v3] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_6p0_dw.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3_b.cdl similarity index 55% rename from rules/klayout/lvs/testing/testcases/nmoscap_6p0_dw.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_03v3_b.cdl index 072dea4a..4c92bb67 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_6p0_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3_b.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_6p0_dw +* Top Cell Name: cap_nmos_03v3_b * View Name: schematic -* Netlisted on: Nov 24 09:15:20 2021 +* Netlisted on: Nov 24 09:11:11 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_6p0_dw +* Cell Name: cap_nmos_03v3_b * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_6p0_dw I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_03v3_b I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_6p0_dw] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_6p0_dw] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_6p0_dw] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_6p0_dw] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_6p0_dw] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_6p0_dw] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_6p0_dw] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_6p0_dw] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_6p0_dw] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_6p0_dw] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_03v3_b] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_03v3_b] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_03v3_b] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_03v3_b] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_03v3_b] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_03v3_b] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_03v3_b] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_03v3_b] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_03v3_b] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_03v3_b] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_3p3.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3_dn.cdl similarity index 52% rename from rules/klayout/lvs/testing/testcases/nmoscap_3p3.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_03v3_dn.cdl index 1dbe516d..31ca545b 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_3p3.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_03v3_dn.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_3p3 +* Top Cell Name: cap_nmos_03v3_dn * View Name: schematic -* Netlisted on: Nov 24 09:07:52 2021 +* Netlisted on: Nov 24 09:12:27 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_3p3 +* Cell Name: cap_nmos_03v3_dn * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_3p3 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_03v3_dn I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_3p3] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_3p3] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_3p3] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_3p3] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_3p3] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_3p3] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_3p3] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_3p3] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_3p3] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_3p3] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_03v3_dn] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_03v3_dn] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_03v3_dn] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_03v3_dn] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_03v3_dn] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_03v3_dn] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_03v3_dn] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_03v3_dn] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_03v3_dn] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_03v3_dn] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_6p0_b.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/nmoscap_6p0_b.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_06v0.cdl index fc9deb51..5f44415b 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_6p0_b.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_6p0_b +* Top Cell Name: cap_nmos_06v0 * View Name: schematic -* Netlisted on: Nov 24 09:14:31 2021 +* Netlisted on: Nov 24 09:13:17 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_6p0_b +* Cell Name: cap_nmos_06v0 * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_6p0_b I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_06v0 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_6p0_b] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_6p0_b] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_6p0_b] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_6p0_b] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_6p0_b] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_6p0_b] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_6p0_b] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_6p0_b] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_6p0_b] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_6p0_b] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_06v0] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_06v0] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_06v0] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_06v0] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_06v0] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_06v0] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_06v0] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_06v0] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_06v0] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_06v0] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_3p3_dw.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0_b.cdl similarity index 55% rename from rules/klayout/lvs/testing/testcases/nmoscap_3p3_dw.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_06v0_b.cdl index 1d054338..55e570ec 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_3p3_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0_b.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_3p3_dw +* Top Cell Name: cap_nmos_06v0_b * View Name: schematic -* Netlisted on: Nov 24 09:12:27 2021 +* Netlisted on: Nov 24 09:14:31 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_3p3_dw +* Cell Name: cap_nmos_06v0_b * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_3p3_dw I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_06v0_b I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_3p3_dw] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_3p3_dw] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_3p3_dw] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_3p3_dw] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_3p3_dw] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_3p3_dw] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_3p3_dw] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_3p3_dw] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_3p3_dw] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_3p3_dw] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_06v0_b] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_06v0_b] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_06v0_b] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_06v0_b] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_06v0_b] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_06v0_b] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_06v0_b] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_06v0_b] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_06v0_b] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_06v0_b] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nmoscap_6p0.cdl b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0_dn.cdl similarity index 52% rename from rules/klayout/lvs/testing/testcases/nmoscap_6p0.cdl rename to rules/klayout/lvs/testing/testcases/cap_nmos_06v0_dn.cdl index 39d9604f..ee898546 100644 --- a/rules/klayout/lvs/testing/testcases/nmoscap_6p0.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_nmos_06v0_dn.cdl @@ -2,9 +2,9 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: nmoscap_6p0 +* Top Cell Name: cap_nmos_06v0_dn * View Name: schematic -* Netlisted on: Nov 24 09:13:17 2021 +* Netlisted on: Nov 24 09:15:20 2021 ************************************************************************ *.BIPOLAR @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: nmoscap_6p0 +* Cell Name: cap_nmos_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT nmoscap_6p0 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_nmos_06v0_dn I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[nmoscap_6p0] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[nmoscap_6p0] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[nmoscap_6p0] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[nmoscap_6p0] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[nmoscap_6p0] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[nmoscap_6p0] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[nmoscap_6p0] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[nmoscap_6p0] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[nmoscap_6p0] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[nmoscap_6p0] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_nmos_06v0_dn] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_nmos_06v0_dn] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_nmos_06v0_dn] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_nmos_06v0_dn] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_nmos_06v0_dn] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_nmos_06v0_dn] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_nmos_06v0_dn] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_nmos_06v0_dn] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_nmos_06v0_dn] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_nmos_06v0_dn] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_3p3.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3.cdl similarity index 55% rename from rules/klayout/lvs/testing/testcases/pmoscap_3p3.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_03v3.cdl index e828925a..30e5c080 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_3p3.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_3p3 +* Top Cell Name: cap_pmos_03v3 * View Name: schematic * Netlisted on: Nov 24 09:44:20 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_3p3 +* Cell Name: cap_pmos_03v3 * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_3p3 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_pmos_03v3 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[pmoscap_3p3] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[pmoscap_3p3] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[pmoscap_3p3] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[pmoscap_3p3] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[pmoscap_3p3] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[pmoscap_3p3] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[pmoscap_3p3] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[pmoscap_3p3] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[pmoscap_3p3] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[pmoscap_3p3] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_pmos_03v3] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_pmos_03v3] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_pmos_03v3] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_pmos_03v3] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_pmos_03v3] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_pmos_03v3] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_pmos_03v3] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_pmos_03v3] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_pmos_03v3] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_pmos_03v3] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_3p3_b.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3_b.cdl similarity index 51% rename from rules/klayout/lvs/testing/testcases/pmoscap_3p3_b.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_03v3_b.cdl index a7168a4f..ce2cddf0 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_3p3_b.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3_b.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_3p3_b +* Top Cell Name: cap_pmos_03v3_b * View Name: schematic * Netlisted on: Nov 24 09:45:07 2021 ************************************************************************ @@ -24,24 +24,24 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_3p3_b +* Cell Name: cap_pmos_03v3_b * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_3p3_b I1_0_0_R0_G I1_0_1_R0_G I1_0_2_R0_G I1_1_0_R0_G +.SUBCKT cap_pmos_03v3_b I1_0_0_R0_G I1_0_1_R0_G I1_0_2_R0_G I1_1_0_R0_G + I1_1_1_R0_G I1_1_2_R0_G I1_2_0_R0_G I1_2_1_R0_G I1_2_2_R0_G I1_default_G vdd! *.PININFO I1_0_0_R0_G:I I1_0_1_R0_G:I I1_0_2_R0_G:I I1_1_0_R0_G:I *.PININFO I1_1_1_R0_G:I I1_1_2_R0_G:I I1_2_0_R0_G:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_G:I I1_default_G:I vdd!:I -CI1_2_2_R0 I1_2_2_R0_G vdd! $[pmoscap_3p3_b] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G vdd! $[pmoscap_3p3_b] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G vdd! $[pmoscap_3p3_b] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G vdd! $[pmoscap_3p3_b] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G vdd! $[pmoscap_3p3_b] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G vdd! $[pmoscap_3p3_b] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G vdd! $[pmoscap_3p3_b] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G vdd! $[pmoscap_3p3_b] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G vdd! $[pmoscap_3p3_b] m=1 l=1.000u w=1.000u -CI1_default I1_default_G vdd! $[pmoscap_3p3_b] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G vdd! $[cap_pmos_03v3_b] m=1 l=1.000u w=1.000u +CI1_default I1_default_G vdd! $[cap_pmos_03v3_b] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_3p3_dw.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3_dn.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/pmoscap_3p3_dw.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_03v3_dn.cdl index d3884928..4c85afe6 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_3p3_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_03v3_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_3p3_dw +* Top Cell Name: cap_pmos_03v3_dn * View Name: schematic * Netlisted on: Nov 24 09:45:53 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_3p3_dw +* Cell Name: cap_pmos_03v3_dn * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_3p3_dw I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_pmos_03v3_dn I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[pmoscap_3p3_dw] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[pmoscap_3p3_dw] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[pmoscap_3p3_dw] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[pmoscap_3p3_dw] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[pmoscap_3p3_dw] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[pmoscap_3p3_dw] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[pmoscap_3p3_dw] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[pmoscap_3p3_dw] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[pmoscap_3p3_dw] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[pmoscap_3p3_dw] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_pmos_03v3_dn] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_pmos_03v3_dn] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_pmos_03v3_dn] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_pmos_03v3_dn] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_pmos_03v3_dn] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_pmos_03v3_dn] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_pmos_03v3_dn] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_pmos_03v3_dn] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_pmos_03v3_dn] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_pmos_03v3_dn] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_6p0.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0.cdl similarity index 55% rename from rules/klayout/lvs/testing/testcases/pmoscap_6p0.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_06v0.cdl index eb907bc7..6eec19e1 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_6p0.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_6p0 +* Top Cell Name: cap_pmos_06v0 * View Name: schematic * Netlisted on: Nov 24 09:47:13 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_6p0 +* Cell Name: cap_pmos_06v0 * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_6p0 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_pmos_06v0 I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[pmoscap_6p0] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[pmoscap_6p0] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[pmoscap_6p0] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[pmoscap_6p0] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[pmoscap_6p0] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[pmoscap_6p0] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[pmoscap_6p0] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[pmoscap_6p0] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[pmoscap_6p0] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[pmoscap_6p0] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_pmos_06v0] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_pmos_06v0] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_pmos_06v0] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_pmos_06v0] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_pmos_06v0] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_pmos_06v0] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_pmos_06v0] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_pmos_06v0] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_pmos_06v0] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_pmos_06v0] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_6p0_b.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0_b.cdl similarity index 51% rename from rules/klayout/lvs/testing/testcases/pmoscap_6p0_b.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_06v0_b.cdl index 64cacaf5..cfd989a9 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_6p0_b.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0_b.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_6p0_b +* Top Cell Name: cap_pmos_06v0_b * View Name: schematic * Netlisted on: Nov 24 09:47:53 2021 ************************************************************************ @@ -24,24 +24,24 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_6p0_b +* Cell Name: cap_pmos_06v0_b * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_6p0_b I1_0_0_R0_G I1_0_1_R0_G I1_0_2_R0_G I1_1_0_R0_G +.SUBCKT cap_pmos_06v0_b I1_0_0_R0_G I1_0_1_R0_G I1_0_2_R0_G I1_1_0_R0_G + I1_1_1_R0_G I1_1_2_R0_G I1_2_0_R0_G I1_2_1_R0_G I1_2_2_R0_G I1_default_G vdd! *.PININFO I1_0_0_R0_G:I I1_0_1_R0_G:I I1_0_2_R0_G:I I1_1_0_R0_G:I *.PININFO I1_1_1_R0_G:I I1_1_2_R0_G:I I1_2_0_R0_G:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_G:I I1_default_G:I vdd!:I -CI1_2_2_R0 I1_2_2_R0_G vdd! $[pmoscap_6p0_b] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G vdd! $[pmoscap_6p0_b] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G vdd! $[pmoscap_6p0_b] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G vdd! $[pmoscap_6p0_b] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G vdd! $[pmoscap_6p0_b] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G vdd! $[pmoscap_6p0_b] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G vdd! $[pmoscap_6p0_b] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G vdd! $[pmoscap_6p0_b] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G vdd! $[pmoscap_6p0_b] m=1 l=1.000u w=1.000u -CI1_default I1_default_G vdd! $[pmoscap_6p0_b] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G vdd! $[cap_pmos_06v0_b] m=1 l=1.000u w=1.000u +CI1_default I1_default_G vdd! $[cap_pmos_06v0_b] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pmoscap_6p0_dw.cdl b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0_dn.cdl similarity index 54% rename from rules/klayout/lvs/testing/testcases/pmoscap_6p0_dw.cdl rename to rules/klayout/lvs/testing/testcases/cap_pmos_06v0_dn.cdl index f5afc6e3..7af62d64 100644 --- a/rules/klayout/lvs/testing/testcases/pmoscap_6p0_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/cap_pmos_06v0_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pmoscap_6p0_dw +* Top Cell Name: cap_pmos_06v0_dn * View Name: schematic * Netlisted on: Nov 24 09:48:31 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pmoscap_6p0_dw +* Cell Name: cap_pmos_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT pmoscap_6p0_dw I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G +.SUBCKT cap_pmos_06v0_dn I1_0_0_R0_D I1_0_0_R0_G I1_0_1_R0_D I1_0_1_R0_G + I1_0_2_R0_D I1_0_2_R0_G I1_1_0_R0_D I1_1_0_R0_G I1_1_1_R0_D I1_1_1_R0_G + I1_1_2_R0_D I1_1_2_R0_G I1_2_0_R0_D I1_2_0_R0_G I1_2_1_R0_D I1_2_1_R0_G + I1_2_2_R0_D I1_2_2_R0_G I1_default_D I1_default_G @@ -35,15 +35,15 @@ *.PININFO I1_1_1_R0_D:I I1_1_1_R0_G:I I1_1_2_R0_D:I I1_1_2_R0_G:I *.PININFO I1_2_0_R0_D:I I1_2_0_R0_G:I I1_2_1_R0_D:I I1_2_1_R0_G:I *.PININFO I1_2_2_R0_D:I I1_2_2_R0_G:I I1_default_D:I I1_default_G:I -CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[pmoscap_6p0_dw] m=1 l=50.000u w=50.000u -CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[pmoscap_6p0_dw] m=1 l=50.000u w=12.350u -CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[pmoscap_6p0_dw] m=1 l=50.000u w=1.000u -CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[pmoscap_6p0_dw] m=1 l=12.350u w=50.000u -CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[pmoscap_6p0_dw] m=1 l=12.350u w=12.350u -CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[pmoscap_6p0_dw] m=1 l=12.350u w=1.000u -CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[pmoscap_6p0_dw] m=1 l=1.000u w=50.000u -CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[pmoscap_6p0_dw] m=1 l=1.000u w=12.350u -CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[pmoscap_6p0_dw] m=1 l=1.000u w=1.000u -CI1_default I1_default_G I1_default_D $[pmoscap_6p0_dw] m=1 l=5u w=5u +CI1_2_2_R0 I1_2_2_R0_G I1_2_2_R0_D $[cap_pmos_06v0_dn] m=1 l=50.000u w=50.000u +CI1_2_1_R0 I1_2_1_R0_G I1_2_1_R0_D $[cap_pmos_06v0_dn] m=1 l=50.000u w=12.350u +CI1_2_0_R0 I1_2_0_R0_G I1_2_0_R0_D $[cap_pmos_06v0_dn] m=1 l=50.000u w=1.000u +CI1_1_2_R0 I1_1_2_R0_G I1_1_2_R0_D $[cap_pmos_06v0_dn] m=1 l=12.350u w=50.000u +CI1_1_1_R0 I1_1_1_R0_G I1_1_1_R0_D $[cap_pmos_06v0_dn] m=1 l=12.350u w=12.350u +CI1_1_0_R0 I1_1_0_R0_G I1_1_0_R0_D $[cap_pmos_06v0_dn] m=1 l=12.350u w=1.000u +CI1_0_2_R0 I1_0_2_R0_G I1_0_2_R0_D $[cap_pmos_06v0_dn] m=1 l=1.000u w=50.000u +CI1_0_1_R0 I1_0_1_R0_G I1_0_1_R0_D $[cap_pmos_06v0_dn] m=1 l=1.000u w=12.350u +CI1_0_0_R0 I1_0_0_R0_G I1_0_0_R0_D $[cap_pmos_06v0_dn] m=1 l=1.000u w=1.000u +CI1_default I1_default_G I1_default_D $[cap_pmos_06v0_dn] m=1 l=5u w=5u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/dnwps_3p3.cdl b/rules/klayout/lvs/testing/testcases/diode_dw2ps_03v3.cdl similarity index 52% rename from rules/klayout/lvs/testing/testcases/dnwps_3p3.cdl rename to rules/klayout/lvs/testing/testcases/diode_dw2ps_03v3.cdl index 85ea6672..c1fcf6c7 100644 --- a/rules/klayout/lvs/testing/testcases/dnwps_3p3.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_dw2ps_03v3.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: dnwps_3p3 +* Top Cell Name: diode_dw2ps_03v3 * View Name: schematic * Netlisted on: Nov 24 09:04:18 2021 ************************************************************************ @@ -24,26 +24,26 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: dnwps_3p3 +* Cell Name: diode_dw2ps_03v3 * View Name: schematic ************************************************************************ -.SUBCKT dnwps_3p3 I1_0_0_0_0_R0_NEG I1_0_1_0_0_R0_NEG I1_0_2_0_0_R0_NEG +.SUBCKT diode_dw2ps_03v3 I1_0_0_0_0_R0_NEG I1_0_1_0_0_R0_NEG I1_0_2_0_0_R0_NEG + I1_1_0_0_0_R0_NEG I1_1_1_0_0_R0_NEG I1_1_2_0_0_R0_NEG I1_2_0_0_0_R0_NEG + I1_2_1_0_0_R0_NEG I1_2_2_0_0_R0_NEG I1_default_NEG gnd! *.PININFO I1_0_0_0_0_R0_NEG:I I1_0_1_0_0_R0_NEG:I I1_0_2_0_0_R0_NEG:I *.PININFO I1_1_0_0_0_R0_NEG:I I1_1_1_0_0_R0_NEG:I I1_1_2_0_0_R0_NEG:I *.PININFO I1_2_0_0_0_R0_NEG:I I1_2_1_0_0_R0_NEG:I I1_2_2_0_0_R0_NEG:I *.PININFO I1_default_NEG:I gnd!:I -DI1_2_2_0_0_R0 gnd! I1_2_2_0_0_R0_NEG dnwps_3p3 10n 400e-6 m=1 -DI1_2_1_0_0_R0 gnd! I1_2_1_0_0_R0_NEG dnwps_3p3 1.034n 220.68e-6 m=1 -DI1_2_0_0_0_R0 gnd! I1_2_0_0_0_R0_NEG dnwps_3p3 170p 203.4e-6 m=1 -DI1_1_2_0_0_R0 gnd! I1_1_2_0_0_R0_NEG dnwps_3p3 1.034n 220.68e-6 m=1 -DI1_1_1_0_0_R0 gnd! I1_1_1_0_0_R0_NEG dnwps_3p3 106.916p 41.36e-6 m=1 -DI1_1_0_0_0_R0 gnd! I1_1_0_0_0_R0_NEG dnwps_3p3 17.578p 24.08e-6 m=1 -DI1_0_2_0_0_R0 gnd! I1_0_2_0_0_R0_NEG dnwps_3p3 170p 203.4e-6 m=1 -DI1_0_1_0_0_R0 gnd! I1_0_1_0_0_R0_NEG dnwps_3p3 17.578p 24.08e-6 m=1 -DI1_0_0_0_0_R0 gnd! I1_0_0_0_0_R0_NEG dnwps_3p3 3.1535p 7.11e-6 m=1 -DI1_default gnd! I1_default_NEG dnwps_3p3 100e-12 40e-6 m=1 +DI1_2_2_0_0_R0 gnd! I1_2_2_0_0_R0_NEG diode_dw2ps_03v3 10n 400e-6 m=1 +DI1_2_1_0_0_R0 gnd! I1_2_1_0_0_R0_NEG diode_dw2ps_03v3 1.034n 220.68e-6 m=1 +DI1_2_0_0_0_R0 gnd! I1_2_0_0_0_R0_NEG diode_dw2ps_03v3 170p 203.4e-6 m=1 +DI1_1_2_0_0_R0 gnd! I1_1_2_0_0_R0_NEG diode_dw2ps_03v3 1.034n 220.68e-6 m=1 +DI1_1_1_0_0_R0 gnd! I1_1_1_0_0_R0_NEG diode_dw2ps_03v3 106.916p 41.36e-6 m=1 +DI1_1_0_0_0_R0 gnd! I1_1_0_0_0_R0_NEG diode_dw2ps_03v3 17.578p 24.08e-6 m=1 +DI1_0_2_0_0_R0 gnd! I1_0_2_0_0_R0_NEG diode_dw2ps_03v3 170p 203.4e-6 m=1 +DI1_0_1_0_0_R0 gnd! I1_0_1_0_0_R0_NEG diode_dw2ps_03v3 17.578p 24.08e-6 m=1 +DI1_0_0_0_0_R0 gnd! I1_0_0_0_0_R0_NEG diode_dw2ps_03v3 3.1535p 7.11e-6 m=1 +DI1_default gnd! I1_default_NEG diode_dw2ps_03v3 100e-12 40e-6 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/dnwps_6p0.cdl b/rules/klayout/lvs/testing/testcases/diode_dw2ps_06v0.cdl similarity index 52% rename from rules/klayout/lvs/testing/testcases/dnwps_6p0.cdl rename to rules/klayout/lvs/testing/testcases/diode_dw2ps_06v0.cdl index 95857893..309b3606 100644 --- a/rules/klayout/lvs/testing/testcases/dnwps_6p0.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_dw2ps_06v0.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: dnwps_6p0 +* Top Cell Name: diode_dw2ps_06v0 * View Name: schematic * Netlisted on: Nov 24 09:05:14 2021 ************************************************************************ @@ -24,26 +24,26 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: dnwps_6p0 +* Cell Name: diode_dw2ps_06v0 * View Name: schematic ************************************************************************ -.SUBCKT dnwps_6p0 I1_0_0_0_0_R0_NEG I1_0_1_0_0_R0_NEG I1_0_2_0_0_R0_NEG +.SUBCKT diode_dw2ps_06v0 I1_0_0_0_0_R0_NEG I1_0_1_0_0_R0_NEG I1_0_2_0_0_R0_NEG + I1_1_0_0_0_R0_NEG I1_1_1_0_0_R0_NEG I1_1_2_0_0_R0_NEG I1_2_0_0_0_R0_NEG + I1_2_1_0_0_R0_NEG I1_2_2_0_0_R0_NEG I1_default_NEG gnd! *.PININFO I1_0_0_0_0_R0_NEG:I I1_0_1_0_0_R0_NEG:I I1_0_2_0_0_R0_NEG:I *.PININFO I1_1_0_0_0_R0_NEG:I I1_1_1_0_0_R0_NEG:I I1_1_2_0_0_R0_NEG:I *.PININFO I1_2_0_0_0_R0_NEG:I I1_2_1_0_0_R0_NEG:I I1_2_2_0_0_R0_NEG:I *.PININFO I1_default_NEG:I gnd!:I -DI1_2_2_0_0_R0 gnd! I1_2_2_0_0_R0_NEG dnwps_6p0 10n 400e-6 m=1 -DI1_2_1_0_0_R0 gnd! I1_2_1_0_0_R0_NEG dnwps_6p0 1.034n 220.68e-6 m=1 -DI1_2_0_0_0_R0 gnd! I1_2_0_0_0_R0_NEG dnwps_6p0 170p 203.4e-6 m=1 -DI1_1_2_0_0_R0 gnd! I1_1_2_0_0_R0_NEG dnwps_6p0 1.034n 220.68e-6 m=1 -DI1_1_1_0_0_R0 gnd! I1_1_1_0_0_R0_NEG dnwps_6p0 106.916p 41.36e-6 m=1 -DI1_1_0_0_0_R0 gnd! I1_1_0_0_0_R0_NEG dnwps_6p0 17.578p 24.08e-6 m=1 -DI1_0_2_0_0_R0 gnd! I1_0_2_0_0_R0_NEG dnwps_6p0 170p 203.4e-6 m=1 -DI1_0_1_0_0_R0 gnd! I1_0_1_0_0_R0_NEG dnwps_6p0 17.578p 24.08e-6 m=1 -DI1_0_0_0_0_R0 gnd! I1_0_0_0_0_R0_NEG dnwps_6p0 3.1535p 7.11e-6 m=1 -DI1_default gnd! I1_default_NEG dnwps_6p0 100e-12 40e-6 m=1 +DI1_2_2_0_0_R0 gnd! I1_2_2_0_0_R0_NEG diode_dw2ps_06v0 10n 400e-6 m=1 +DI1_2_1_0_0_R0 gnd! I1_2_1_0_0_R0_NEG diode_dw2ps_06v0 1.034n 220.68e-6 m=1 +DI1_2_0_0_0_R0 gnd! I1_2_0_0_0_R0_NEG diode_dw2ps_06v0 170p 203.4e-6 m=1 +DI1_1_2_0_0_R0 gnd! I1_1_2_0_0_R0_NEG diode_dw2ps_06v0 1.034n 220.68e-6 m=1 +DI1_1_1_0_0_R0 gnd! I1_1_1_0_0_R0_NEG diode_dw2ps_06v0 106.916p 41.36e-6 m=1 +DI1_1_0_0_0_R0 gnd! I1_1_0_0_0_R0_NEG diode_dw2ps_06v0 17.578p 24.08e-6 m=1 +DI1_0_2_0_0_R0 gnd! I1_0_2_0_0_R0_NEG diode_dw2ps_06v0 170p 203.4e-6 m=1 +DI1_0_1_0_0_R0 gnd! I1_0_1_0_0_R0_NEG diode_dw2ps_06v0 17.578p 24.08e-6 m=1 +DI1_0_0_0_0_R0 gnd! I1_0_0_0_0_R0_NEG diode_dw2ps_06v0 3.1535p 7.11e-6 m=1 +DI1_default gnd! I1_default_NEG diode_dw2ps_06v0 100e-12 40e-6 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3.cdl b/rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3.cdl new file mode 100644 index 00000000..b611e4a4 --- /dev/null +++ b/rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3.cdl @@ -0,0 +1,61 @@ +************************************************************************ +* auCdl Netlist: +* +* Library Name: TCG_Library +* Top Cell Name: diode_nd2ps_03v3 +* View Name: schematic +* Netlisted on: Nov 24 09:16:13 2021 +************************************************************************ + +*.BIPOLAR +*.RESI = 2000 +*.RESVAL +*.CAPVAL +*.DIOPERI +*.DIOAREA +*.EQUATION +*.SCALE METER +*.MEGA +.PARAM + +*.GLOBAL vdd! + +*.PIN vdd! + +************************************************************************ +* Library Name: TCG_Library +* Cell Name: diode_nd2ps_03v3 +* View Name: schematic +************************************************************************ + +.SUBCKT diode_nd2ps_03v3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS ++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS ++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS ++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS ++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS ++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! +*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I +*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I +*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I +*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I +*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I +*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I +DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=10n PJ=400u +DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.32n PJ=226.4u +DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=110p PJ=202.2u +DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=36p PJ=200.72u +DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.32n PJ=226.4u +DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=174.24p PJ=52.8u +DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=14.52p PJ=28.6u +DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=4.752p PJ=27.12u +DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=110p PJ=202.2u +DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=14.52p PJ=28.6u +DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=1.21p PJ=4.4u +DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=396f PJ=2.92u +DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=36p PJ=200.72u +DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=4.752p PJ=27.12u +DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=396f PJ=2.92u +DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nd2ps_03v3 m=1 AREA=203.4f PJ=1.85u +DI1_default vdd! I1_default_MINUS diode_nd2ps_03v3 m=1 AREA=1p PJ=4u +.ENDS + diff --git a/rules/klayout/lvs/testing/testcases/np_3p3_dw.cdl b/rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3_dn.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/np_3p3_dw.cdl rename to rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3_dn.cdl index ca503e92..eef0915a 100644 --- a/rules/klayout/lvs/testing/testcases/np_3p3_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_nd2ps_03v3_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: np_3p3_dw +* Top Cell Name: diode_nd2ps_03v3_dn * View Name: schematic * Netlisted on: Nov 24 09:17:22 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: np_3p3_dw +* Cell Name: diode_nd2ps_03v3_dn * View Name: schematic ************************************************************************ -.SUBCKT np_3p3_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_nd2ps_03v3_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS np_3p3_dw m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS np_3p3_dw m=1 AREA=56.5p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=56.5p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=319.225f PJ=2.26u -DI1_default I1_default_PLUS I1_default_MINUS np_3p3_dw m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_nd2ps_03v3_dn m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0.cdl b/rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0.cdl new file mode 100644 index 00000000..283a2443 --- /dev/null +++ b/rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0.cdl @@ -0,0 +1,61 @@ +************************************************************************ +* auCdl Netlist: +* +* Library Name: TCG_Library +* Top Cell Name: diode_nd2ps_06v0 +* View Name: schematic +* Netlisted on: Nov 24 09:18:14 2021 +************************************************************************ + +*.BIPOLAR +*.RESI = 2000 +*.RESVAL +*.CAPVAL +*.DIOPERI +*.DIOAREA +*.EQUATION +*.SCALE METER +*.MEGA +.PARAM + +*.GLOBAL vdd! + +*.PIN vdd! + +************************************************************************ +* Library Name: TCG_Library +* Cell Name: diode_nd2ps_06v0 +* View Name: schematic +************************************************************************ + +.SUBCKT diode_nd2ps_06v0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS ++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS ++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS ++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS ++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS ++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! +*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I +*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I +*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I +*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I +*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I +*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I +DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=10n PJ=400u +DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.32n PJ=226.4u +DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=110p PJ=202.2u +DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=36p PJ=200.72u +DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.32n PJ=226.4u +DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=174.24p PJ=52.8u +DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=14.52p PJ=28.6u +DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=4.752p PJ=27.12u +DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=110p PJ=202.2u +DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=14.52p PJ=28.6u +DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=1.21p PJ=4.4u +DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=396f PJ=2.92u +DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=36p PJ=200.72u +DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=4.752p PJ=27.12u +DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=396f PJ=2.92u +DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nd2ps_06v0 m=1 AREA=203.4f PJ=1.85u +DI1_default vdd! I1_default_MINUS diode_nd2ps_06v0 m=1 AREA=1p PJ=4u +.ENDS + diff --git a/rules/klayout/lvs/testing/testcases/np_6p0_dw.cdl b/rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0_dn.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/np_6p0_dw.cdl rename to rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0_dn.cdl index b78b7eb8..c3ae3323 100644 --- a/rules/klayout/lvs/testing/testcases/np_6p0_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_nd2ps_06v0_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: np_6p0_dw +* Top Cell Name: diode_nd2ps_06v0_dn * View Name: schematic * Netlisted on: Nov 24 09:18:59 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: np_6p0_dw +* Cell Name: diode_nd2ps_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT np_6p0_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_nd2ps_06v0_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS np_3p3_dw m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS np_3p3_dw m=1 AREA=56.5p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS np_3p3_dw m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS np_3p3_dw m=1 AREA=56.5p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS np_3p3_dw m=1 +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_nd2ps_03v3_dn m=1 + AREA=319.225f PJ=2.26u -DI1_default I1_default_PLUS I1_default_MINUS np_3p3_dw m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_nd2ps_03v3_dn m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/diode_nw2ps_03v3.cdl b/rules/klayout/lvs/testing/testcases/diode_nw2ps_03v3.cdl new file mode 100644 index 00000000..4203aae9 --- /dev/null +++ b/rules/klayout/lvs/testing/testcases/diode_nw2ps_03v3.cdl @@ -0,0 +1,61 @@ +************************************************************************ +* auCdl Netlist: +* +* Library Name: TCG_Library +* Top Cell Name: diode_nw2ps_03v3 +* View Name: schematic +* Netlisted on: Nov 24 09:42:29 2021 +************************************************************************ + +*.BIPOLAR +*.RESI = 2000 +*.RESVAL +*.CAPVAL +*.DIOPERI +*.DIOAREA +*.EQUATION +*.SCALE METER +*.MEGA +.PARAM + +*.GLOBAL vdd! + +*.PIN vdd! + +************************************************************************ +* Library Name: TCG_Library +* Cell Name: diode_nw2ps_03v3 +* View Name: schematic +************************************************************************ + +.SUBCKT diode_nw2ps_03v3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS ++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS ++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS ++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS ++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS ++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! +*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I +*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I +*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I +*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I +*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I +*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I +DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=10n PJ=400u +DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=1.21n PJ=224.2u +DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=123p PJ=202.46u +DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=86p PJ=201.72u +DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=1.21n PJ=224.2u +DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=146.41p PJ=48.4u +DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=14.883p PJ=26.66u +DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=10.406p PJ=25.92u +DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=123p PJ=202.46u +DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=14.883p PJ=26.66u +DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=1.5129p PJ=4.92u +DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=1.0578p PJ=4.18u +DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=86p PJ=201.72u +DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=10.406p PJ=25.92u +DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=1.0578p PJ=4.18u +DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nw2ps_03v3 m=1 AREA=739.6f PJ=3.44u +DI1_default vdd! I1_default_MINUS diode_nw2ps_03v3 m=1 AREA=1p PJ=4u +.ENDS + diff --git a/rules/klayout/lvs/testing/testcases/diode_nw2ps_06v0.cdl b/rules/klayout/lvs/testing/testcases/diode_nw2ps_06v0.cdl new file mode 100644 index 00000000..4da7be29 --- /dev/null +++ b/rules/klayout/lvs/testing/testcases/diode_nw2ps_06v0.cdl @@ -0,0 +1,61 @@ +************************************************************************ +* auCdl Netlist: +* +* Library Name: TCG_Library +* Top Cell Name: diode_nw2ps_06v0 +* View Name: schematic +* Netlisted on: Nov 24 09:43:35 2021 +************************************************************************ + +*.BIPOLAR +*.RESI = 2000 +*.RESVAL +*.CAPVAL +*.DIOPERI +*.DIOAREA +*.EQUATION +*.SCALE METER +*.MEGA +.PARAM + +*.GLOBAL vdd! + +*.PIN vdd! + +************************************************************************ +* Library Name: TCG_Library +* Cell Name: diode_nw2ps_06v0 +* View Name: schematic +************************************************************************ + +.SUBCKT diode_nw2ps_06v0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS ++ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS ++ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS ++ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS ++ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS ++ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! +*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I +*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I +*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I +*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I +*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I +*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I +DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=10n PJ=400u +DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=1.21n PJ=224.2u +DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=123p PJ=202.46u +DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=86p PJ=201.72u +DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=1.21n PJ=224.2u +DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=146.41p PJ=48.4u +DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=14.883p PJ=26.66u +DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=10.406p PJ=25.92u +DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=123p PJ=202.46u +DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=14.883p PJ=26.66u +DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=1.5129p PJ=4.92u +DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=1.0578p PJ=4.18u +DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=86p PJ=201.72u +DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=10.406p PJ=25.92u +DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=1.0578p PJ=4.18u +DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS diode_nw2ps_06v0 m=1 AREA=739.6f PJ=3.44u +DI1_default vdd! I1_default_MINUS diode_nw2ps_06v0 m=1 AREA=1p PJ=4u +.ENDS + diff --git a/rules/klayout/lvs/testing/testcases/pn_3p3.cdl b/rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3.cdl similarity index 58% rename from rules/klayout/lvs/testing/testcases/pn_3p3.cdl rename to rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3.cdl index 4fe965d2..db766545 100644 --- a/rules/klayout/lvs/testing/testcases/pn_3p3.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pn_3p3 +* Top Cell Name: diode_pd2nw_03v3 * View Name: schematic * Netlisted on: Nov 24 09:49:28 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pn_3p3 +* Cell Name: diode_pd2nw_03v3 * View Name: schematic ************************************************************************ -.SUBCKT pn_3p3 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_pd2nw_03v3 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS pn_3p3 m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS pn_3p3 m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS pn_3p3 m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS pn_3p3 m=1 AREA=36p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=36p + PJ=200.72u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS pn_3p3 m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS pn_3p3 m=1 AREA=174.24p +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=174.24p + PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS pn_3p3 m=1 AREA=14.52p +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=14.52p + PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS pn_3p3 m=1 AREA=4.752p +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=4.752p + PJ=27.12u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS pn_3p3 m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS pn_3p3 m=1 AREA=14.52p +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=14.52p + PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS pn_3p3 m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS pn_3p3 m=1 AREA=396f +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=396f + PJ=2.92u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS pn_3p3 m=1 AREA=36p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=36p + PJ=200.72u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS pn_3p3 m=1 AREA=4.752p +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=4.752p + PJ=27.12u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS pn_3p3 m=1 AREA=396f +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=396f + PJ=2.92u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS pn_3p3 m=1 AREA=203.4f +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_03v3 m=1 AREA=203.4f + PJ=1.85u -DI1_default I1_default_PLUS I1_default_MINUS pn_3p3 m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_03v3 m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pn_3p3_dw.cdl b/rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3_dn.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/pn_3p3_dw.cdl rename to rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3_dn.cdl index f41cde59..eef2026b 100644 --- a/rules/klayout/lvs/testing/testcases/pn_3p3_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pd2nw_03v3_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pn_3p3_dw +* Top Cell Name: diode_pd2nw_03v3_dn * View Name: schematic * Netlisted on: Nov 24 09:50:00 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pn_3p3_dw +* Cell Name: diode_pd2nw_03v3_dn * View Name: schematic ************************************************************************ -.SUBCKT pn_3p3_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_pd2nw_03v3_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS pn_3p3_dw m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS pn_3p3_dw m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS pn_3p3_dw m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS pn_3p3_dw m=1 AREA=56.5p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS pn_3p3_dw m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS pn_3p3_dw m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS pn_3p3_dw m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS pn_3p3_dw m=1 AREA=56.5p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 AREA=56.5p + PJ=201.13u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=7.458p PJ=27.53u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS pn_3p3_dw m=1 +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_03v3_dn m=1 + AREA=319.225f PJ=2.26u -DI1_default I1_default_PLUS I1_default_MINUS pn_3p3_dw m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_03v3_dn m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pn_6p0.cdl b/rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0.cdl similarity index 58% rename from rules/klayout/lvs/testing/testcases/pn_6p0.cdl rename to rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0.cdl index 284ecff3..60c1eb1c 100644 --- a/rules/klayout/lvs/testing/testcases/pn_6p0.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pn_6p0 +* Top Cell Name: diode_pd2nw_06v0 * View Name: schematic * Netlisted on: Nov 24 09:50:38 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pn_6p0 +* Cell Name: diode_pd2nw_06v0 * View Name: schematic ************************************************************************ -.SUBCKT pn_6p0 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_pd2nw_06v0 I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS pn_6p0 m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS pn_6p0 m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS pn_6p0 m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS pn_6p0 m=1 AREA=36p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=36p + PJ=200.72u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS pn_6p0 m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS pn_6p0 m=1 AREA=174.24p +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=174.24p + PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS pn_6p0 m=1 AREA=14.52p +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=14.52p + PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS pn_6p0 m=1 AREA=4.752p +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=4.752p + PJ=27.12u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS pn_6p0 m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS pn_6p0 m=1 AREA=14.52p +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=14.52p + PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS pn_6p0 m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS pn_6p0 m=1 AREA=396f +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=396f + PJ=2.92u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS pn_6p0 m=1 AREA=36p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=36p + PJ=200.72u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS pn_6p0 m=1 AREA=4.752p +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=4.752p + PJ=27.12u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS pn_6p0 m=1 AREA=396f +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=396f + PJ=2.92u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS pn_6p0 m=1 AREA=203.4f +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_06v0 m=1 AREA=203.4f + PJ=1.85u -DI1_default I1_default_PLUS I1_default_MINUS pn_6p0 m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_06v0 m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/pn_6p0_dw.cdl b/rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0_dn.cdl similarity index 59% rename from rules/klayout/lvs/testing/testcases/pn_6p0_dw.cdl rename to rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0_dn.cdl index 83fb8d3a..8b389023 100644 --- a/rules/klayout/lvs/testing/testcases/pn_6p0_dw.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pd2nw_06v0_dn.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: pn_6p0_dw +* Top Cell Name: diode_pd2nw_06v0_dn * View Name: schematic * Netlisted on: Nov 24 09:51:10 2021 ************************************************************************ @@ -22,11 +22,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: pn_6p0_dw +* Cell Name: diode_pd2nw_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT pn_6p0_dw I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS +.SUBCKT diode_pd2nw_06v0_dn I1_0_0_0_0_R0_MINUS I1_0_0_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS + I1_0_1_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS I1_0_2_0_0_R0_PLUS + I1_0_3_0_0_R0_MINUS I1_0_3_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS + I1_1_0_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS I1_1_1_0_0_R0_PLUS @@ -49,38 +49,38 @@ *.PININFO I1_3_1_0_0_R0_PLUS:I I1_3_2_0_0_R0_MINUS:I I1_3_2_0_0_R0_PLUS:I *.PININFO I1_3_3_0_0_R0_MINUS:I I1_3_3_0_0_R0_PLUS:I I1_default_MINUS:I *.PININFO I1_default_PLUS:I -DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS pn_6p0_dw m=1 AREA=10n +DI1_3_3_0_0_R0 I1_3_3_0_0_R0_PLUS I1_3_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=10n + PJ=400u -DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS pn_6p0_dw m=1 AREA=1.32n +DI1_3_2_0_0_R0 I1_3_2_0_0_R0_PLUS I1_3_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.32n + PJ=226.4u -DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS pn_6p0_dw m=1 AREA=110p +DI1_3_1_0_0_R0 I1_3_1_0_0_R0_PLUS I1_3_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=110p + PJ=202.2u -DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS pn_6p0_dw m=1 AREA=56.5p +DI1_3_0_0_0_R0 I1_3_0_0_0_R0_PLUS I1_3_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=56.5p + PJ=201.13u -DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS pn_6p0_dw m=1 AREA=1.32n +DI1_2_3_0_0_R0 I1_2_3_0_0_R0_PLUS I1_2_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.32n + PJ=226.4u -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_PLUS I1_2_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_PLUS I1_2_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_PLUS I1_2_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=7.458p PJ=27.53u -DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS pn_6p0_dw m=1 AREA=110p +DI1_1_3_0_0_R0 I1_1_3_0_0_R0_PLUS I1_1_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=110p + PJ=202.2u -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_PLUS I1_1_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS pn_6p0_dw m=1 AREA=1.21p +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_PLUS I1_1_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=1.21p + PJ=4.4u -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_PLUS I1_1_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS pn_6p0_dw m=1 AREA=56.5p +DI1_0_3_0_0_R0 I1_0_3_0_0_R0_PLUS I1_0_3_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 AREA=56.5p + PJ=201.13u -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_PLUS I1_0_2_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=7.458p PJ=27.53u -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_PLUS I1_0_1_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=621.5f PJ=3.33u -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS pn_6p0_dw m=1 +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_PLUS I1_0_0_0_0_R0_MINUS diode_pd2nw_06v0_dn m=1 + AREA=319.225f PJ=2.26u -DI1_default I1_default_PLUS I1_default_MINUS pn_6p0_dw m=1 AREA=1p PJ=4u +DI1_default I1_default_PLUS I1_default_MINUS diode_pd2nw_06v0_dn m=1 AREA=1p PJ=4u .ENDS diff --git a/rules/klayout/lvs/testing/testcases/dnwpw_3p3.cdl b/rules/klayout/lvs/testing/testcases/diode_pw2dw_03v3.cdl similarity index 52% rename from rules/klayout/lvs/testing/testcases/dnwpw_3p3.cdl rename to rules/klayout/lvs/testing/testcases/diode_pw2dw_03v3.cdl index b7d49257..c22265b2 100644 --- a/rules/klayout/lvs/testing/testcases/dnwpw_3p3.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pw2dw_03v3.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: dnwpw_3p3 +* Top Cell Name: diode_pw2dw_03v3 * View Name: schematic * Netlisted on: Nov 24 09:06:01 2021 ************************************************************************ @@ -24,11 +24,11 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: dnwpw_3p3 +* Cell Name: diode_pw2dw_03v3 * View Name: schematic ************************************************************************ -.SUBCKT dnwpw_3p3 I1_0_0_0_0_0_R0_POS I1_0_1_0_0_0_R0_POS I1_0_2_0_0_0_R0_POS +.SUBCKT diode_pw2dw_03v3 I1_0_0_0_0_0_R0_POS I1_0_1_0_0_0_R0_POS I1_0_2_0_0_0_R0_POS + I1_1_0_0_0_0_R0_POS I1_1_1_0_0_0_R0_POS I1_1_2_0_0_0_R0_POS + I1_2_0_0_0_0_R0_POS I1_2_1_0_0_0_R0_POS I1_2_2_0_0_0_R0_POS I1_default_POS + vdd! @@ -36,15 +36,15 @@ *.PININFO I1_1_0_0_0_0_R0_POS:I I1_1_1_0_0_0_R0_POS:I I1_1_2_0_0_0_R0_POS:I *.PININFO I1_2_0_0_0_0_R0_POS:I I1_2_1_0_0_0_R0_POS:I I1_2_2_0_0_0_R0_POS:I *.PININFO I1_default_POS:I vdd!:I -DI1_2_2_0_0_0_R0 I1_2_2_0_0_0_R0_POS vdd! dnwpw_3p3 10n 400e-6 m=1 -DI1_2_1_0_0_0_R0 I1_2_1_0_0_0_R0_POS vdd! dnwpw_3p3 1.023n 220.46e-6 m=1 -DI1_2_0_0_0_0_R0 I1_2_0_0_0_0_R0_POS vdd! dnwpw_3p3 60p 201.2e-6 m=1 -DI1_1_2_0_0_0_R0 I1_1_2_0_0_0_R0_POS vdd! dnwpw_3p3 1.023n 220.46e-6 m=1 -DI1_1_1_0_0_0_R0 I1_1_1_0_0_0_R0_POS vdd! dnwpw_3p3 104.653p 40.92e-6 m=1 -DI1_1_0_0_0_0_R0 I1_1_0_0_0_0_R0_POS vdd! dnwpw_3p3 6.138p 21.66e-6 m=1 -DI1_0_2_0_0_0_R0 I1_0_2_0_0_0_R0_POS vdd! dnwpw_3p3 60p 201.2e-6 m=1 -DI1_0_1_0_0_0_R0 I1_0_1_0_0_0_R0_POS vdd! dnwpw_3p3 6.138p 21.66e-6 m=1 -DI1_0_0_0_0_0_R0 I1_0_0_0_0_0_R0_POS vdd! dnwpw_3p3 627f 3.29e-6 m=1 -DI1_default I1_default_POS vdd! dnwpw_3p3 100e-12 40e-6 m=1 +DI1_2_2_0_0_0_R0 I1_2_2_0_0_0_R0_POS vdd! diode_pw2dw_03v3 10n 400e-6 m=1 +DI1_2_1_0_0_0_R0 I1_2_1_0_0_0_R0_POS vdd! diode_pw2dw_03v3 1.023n 220.46e-6 m=1 +DI1_2_0_0_0_0_R0 I1_2_0_0_0_0_R0_POS vdd! diode_pw2dw_03v3 60p 201.2e-6 m=1 +DI1_1_2_0_0_0_R0 I1_1_2_0_0_0_R0_POS vdd! diode_pw2dw_03v3 1.023n 220.46e-6 m=1 +DI1_1_1_0_0_0_R0 I1_1_1_0_0_0_R0_POS vdd! diode_pw2dw_03v3 104.653p 40.92e-6 m=1 +DI1_1_0_0_0_0_R0 I1_1_0_0_0_0_R0_POS vdd! diode_pw2dw_03v3 6.138p 21.66e-6 m=1 +DI1_0_2_0_0_0_R0 I1_0_2_0_0_0_R0_POS vdd! diode_pw2dw_03v3 60p 201.2e-6 m=1 +DI1_0_1_0_0_0_R0 I1_0_1_0_0_0_R0_POS vdd! diode_pw2dw_03v3 6.138p 21.66e-6 m=1 +DI1_0_0_0_0_0_R0 I1_0_0_0_0_0_R0_POS vdd! diode_pw2dw_03v3 627f 3.29e-6 m=1 +DI1_default I1_default_POS vdd! diode_pw2dw_03v3 100e-12 40e-6 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/dnwpw_6p0.cdl b/rules/klayout/lvs/testing/testcases/diode_pw2dw_06v0.cdl similarity index 53% rename from rules/klayout/lvs/testing/testcases/dnwpw_6p0.cdl rename to rules/klayout/lvs/testing/testcases/diode_pw2dw_06v0.cdl index 1980a450..ca5ab1ba 100644 --- a/rules/klayout/lvs/testing/testcases/dnwpw_6p0.cdl +++ b/rules/klayout/lvs/testing/testcases/diode_pw2dw_06v0.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: dnwpw_6p0 +* Top Cell Name: diode_pw2dw_06v0 * View Name: schematic * Netlisted on: Nov 24 09:07:04 2021 ************************************************************************ @@ -24,26 +24,26 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: dnwpw_6p0 +* Cell Name: diode_pw2dw_06v0 * View Name: schematic ************************************************************************ -.SUBCKT dnwpw_6p0 I1_0_0_0_0_R0_POS I1_0_1_0_0_R0_POS I1_0_2_0_0_R0_POS +.SUBCKT diode_pw2dw_06v0 I1_0_0_0_0_R0_POS I1_0_1_0_0_R0_POS I1_0_2_0_0_R0_POS + I1_1_0_0_0_R0_POS I1_1_1_0_0_R0_POS I1_1_2_0_0_R0_POS I1_2_0_0_0_R0_POS + I1_2_1_0_0_R0_POS I1_2_2_0_0_R0_POS I1_default_POS vdd! *.PININFO I1_0_0_0_0_R0_POS:I I1_0_1_0_0_R0_POS:I I1_0_2_0_0_R0_POS:I *.PININFO I1_1_0_0_0_R0_POS:I I1_1_1_0_0_R0_POS:I I1_1_2_0_0_R0_POS:I *.PININFO I1_2_0_0_0_R0_POS:I I1_2_1_0_0_R0_POS:I I1_2_2_0_0_R0_POS:I *.PININFO I1_default_POS:I vdd!:I -DI1_2_2_0_0_R0 I1_2_2_0_0_R0_POS vdd! dnwpw_6p0 10n 400e-6 m=1 -DI1_2_1_0_0_R0 I1_2_1_0_0_R0_POS vdd! dnwpw_6p0 1.023n 220.46e-6 m=1 -DI1_2_0_0_0_R0 I1_2_0_0_0_R0_POS vdd! dnwpw_6p0 74p 201.48e-6 m=1 -DI1_1_2_0_0_R0 I1_1_2_0_0_R0_POS vdd! dnwpw_6p0 1.023n 220.46e-6 m=1 -DI1_1_1_0_0_R0 I1_1_1_0_0_R0_POS vdd! dnwpw_6p0 104.653p 40.92e-6 m=1 -DI1_1_0_0_0_R0 I1_1_0_0_0_R0_POS vdd! dnwpw_6p0 7.5702p 21.94e-6 m=1 -DI1_0_2_0_0_R0 I1_0_2_0_0_R0_POS vdd! dnwpw_6p0 74p 201.48e-6 m=1 -DI1_0_1_0_0_R0 I1_0_1_0_0_R0_POS vdd! dnwpw_6p0 7.5702p 21.94e-6 m=1 -DI1_0_0_0_0_R0 I1_0_0_0_0_R0_POS vdd! dnwpw_6p0 595.7f 3.09e-6 m=1 -DI1_default I1_default_POS vdd! dnwpw_6p0 100e-12 40e-6 m=1 +DI1_2_2_0_0_R0 I1_2_2_0_0_R0_POS vdd! diode_pw2dw_06v0 10n 400e-6 m=1 +DI1_2_1_0_0_R0 I1_2_1_0_0_R0_POS vdd! diode_pw2dw_06v0 1.023n 220.46e-6 m=1 +DI1_2_0_0_0_R0 I1_2_0_0_0_R0_POS vdd! diode_pw2dw_06v0 74p 201.48e-6 m=1 +DI1_1_2_0_0_R0 I1_1_2_0_0_R0_POS vdd! diode_pw2dw_06v0 1.023n 220.46e-6 m=1 +DI1_1_1_0_0_R0 I1_1_1_0_0_R0_POS vdd! diode_pw2dw_06v0 104.653p 40.92e-6 m=1 +DI1_1_0_0_0_R0 I1_1_0_0_0_R0_POS vdd! diode_pw2dw_06v0 7.5702p 21.94e-6 m=1 +DI1_0_2_0_0_R0 I1_0_2_0_0_R0_POS vdd! diode_pw2dw_06v0 74p 201.48e-6 m=1 +DI1_0_1_0_0_R0 I1_0_1_0_0_R0_POS vdd! diode_pw2dw_06v0 7.5702p 21.94e-6 m=1 +DI1_0_0_0_0_R0 I1_0_0_0_0_R0_POS vdd! diode_pw2dw_06v0 595.7f 3.09e-6 m=1 +DI1_default I1_default_POS vdd! diode_pw2dw_06v0 100e-12 40e-6 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/np_3p3.cdl b/rules/klayout/lvs/testing/testcases/np_3p3.cdl deleted file mode 100644 index b8600002..00000000 --- a/rules/klayout/lvs/testing/testcases/np_3p3.cdl +++ /dev/null @@ -1,61 +0,0 @@ -************************************************************************ -* auCdl Netlist: -* -* Library Name: TCG_Library -* Top Cell Name: np_3p3 -* View Name: schematic -* Netlisted on: Nov 24 09:16:13 2021 -************************************************************************ - -*.BIPOLAR -*.RESI = 2000 -*.RESVAL -*.CAPVAL -*.DIOPERI -*.DIOAREA -*.EQUATION -*.SCALE METER -*.MEGA -.PARAM - -*.GLOBAL vdd! - -*.PIN vdd! - -************************************************************************ -* Library Name: TCG_Library -* Cell Name: np_3p3 -* View Name: schematic -************************************************************************ - -.SUBCKT np_3p3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS -+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS -+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS -+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS -+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS -+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! -*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I -*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I -*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I -*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I -*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I -*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I -DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS np_3p3 m=1 AREA=10n PJ=400u -DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS np_3p3 m=1 AREA=1.32n PJ=226.4u -DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS np_3p3 m=1 AREA=110p PJ=202.2u -DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS np_3p3 m=1 AREA=36p PJ=200.72u -DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS np_3p3 m=1 AREA=1.32n PJ=226.4u -DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS np_3p3 m=1 AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS np_3p3 m=1 AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS np_3p3 m=1 AREA=4.752p PJ=27.12u -DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS np_3p3 m=1 AREA=110p PJ=202.2u -DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS np_3p3 m=1 AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS np_3p3 m=1 AREA=1.21p PJ=4.4u -DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS np_3p3 m=1 AREA=396f PJ=2.92u -DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS np_3p3 m=1 AREA=36p PJ=200.72u -DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS np_3p3 m=1 AREA=4.752p PJ=27.12u -DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS np_3p3 m=1 AREA=396f PJ=2.92u -DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS np_3p3 m=1 AREA=203.4f PJ=1.85u -DI1_default vdd! I1_default_MINUS np_3p3 m=1 AREA=1p PJ=4u -.ENDS - diff --git a/rules/klayout/lvs/testing/testcases/np_6p0.cdl b/rules/klayout/lvs/testing/testcases/np_6p0.cdl deleted file mode 100644 index e1831ec3..00000000 --- a/rules/klayout/lvs/testing/testcases/np_6p0.cdl +++ /dev/null @@ -1,61 +0,0 @@ -************************************************************************ -* auCdl Netlist: -* -* Library Name: TCG_Library -* Top Cell Name: np_6p0 -* View Name: schematic -* Netlisted on: Nov 24 09:18:14 2021 -************************************************************************ - -*.BIPOLAR -*.RESI = 2000 -*.RESVAL -*.CAPVAL -*.DIOPERI -*.DIOAREA -*.EQUATION -*.SCALE METER -*.MEGA -.PARAM - -*.GLOBAL vdd! - -*.PIN vdd! - -************************************************************************ -* Library Name: TCG_Library -* Cell Name: np_6p0 -* View Name: schematic -************************************************************************ - -.SUBCKT np_6p0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS -+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS -+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS -+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS -+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS -+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! -*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I -*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I -*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I -*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I -*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I -*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I -DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS np_6p0 m=1 AREA=10n PJ=400u -DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS np_6p0 m=1 AREA=1.32n PJ=226.4u -DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS np_6p0 m=1 AREA=110p PJ=202.2u -DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS np_6p0 m=1 AREA=36p PJ=200.72u -DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS np_6p0 m=1 AREA=1.32n PJ=226.4u -DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS np_6p0 m=1 AREA=174.24p PJ=52.8u -DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS np_6p0 m=1 AREA=14.52p PJ=28.6u -DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS np_6p0 m=1 AREA=4.752p PJ=27.12u -DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS np_6p0 m=1 AREA=110p PJ=202.2u -DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS np_6p0 m=1 AREA=14.52p PJ=28.6u -DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS np_6p0 m=1 AREA=1.21p PJ=4.4u -DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS np_6p0 m=1 AREA=396f PJ=2.92u -DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS np_6p0 m=1 AREA=36p PJ=200.72u -DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS np_6p0 m=1 AREA=4.752p PJ=27.12u -DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS np_6p0 m=1 AREA=396f PJ=2.92u -DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS np_6p0 m=1 AREA=203.4f PJ=1.85u -DI1_default vdd! I1_default_MINUS np_6p0 m=1 AREA=1p PJ=4u -.ENDS - diff --git a/rules/klayout/lvs/testing/testcases/vnpn_0p54x2.cdl b/rules/klayout/lvs/testing/testcases/npn_00p54x02p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_0p54x2.cdl rename to rules/klayout/lvs/testing/testcases/npn_00p54x02p00.cdl index a2046bf4..8b7c8c3e 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_0p54x2.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_00p54x02p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_0p54x2 +* Top Cell Name: npn_00p54x02p00 * View Name: schematic * Netlisted on: Nov 24 10:21:29 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_0p54x2 +* Cell Name: npn_00p54x02p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_0p54x2 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_00p54x02p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x2 m=1 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x02p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vnpn_0p54x4.cdl b/rules/klayout/lvs/testing/testcases/npn_00p54x04p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_0p54x4.cdl rename to rules/klayout/lvs/testing/testcases/npn_00p54x04p00.cdl index febc55e9..e50924d5 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_0p54x4.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_00p54x04p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_0p54x4 +* Top Cell Name: npn_00p54x04p00 * View Name: schematic * Netlisted on: Nov 24 10:22:13 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_0p54x4 +* Cell Name: npn_00p54x04p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_0p54x4 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_00p54x04p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x4 m=1 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x04p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vnpn_0p54x8.cdl b/rules/klayout/lvs/testing/testcases/npn_00p54x08p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_0p54x8.cdl rename to rules/klayout/lvs/testing/testcases/npn_00p54x08p00.cdl index ef185ba0..20bfa6cc 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_0p54x8.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_00p54x08p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_0p54x8 +* Top Cell Name: npn_00p54x08p00 * View Name: schematic * Netlisted on: Nov 24 10:24:33 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_0p54x8 +* Cell Name: npn_00p54x08p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_0p54x8 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_00p54x08p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x8 m=1 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x08p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vnpn_0p54x16.cdl b/rules/klayout/lvs/testing/testcases/npn_00p54x16p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_0p54x16.cdl rename to rules/klayout/lvs/testing/testcases/npn_00p54x16p00.cdl index 35213d67..13d3fd55 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_0p54x16.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_00p54x16p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_0p54x16 +* Top Cell Name: npn_00p54x16p00 * View Name: schematic * Netlisted on: Nov 24 10:25:03 2021 ************************************************************************ @@ -22,13 +22,13 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_0p54x16 +* Cell Name: npn_00p54x16p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_0p54x16 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_00p54x16p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_0p54x16 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_00p54x16p00 + m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vnpn_5x5.cdl b/rules/klayout/lvs/testing/testcases/npn_05p00x05p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_5x5.cdl rename to rules/klayout/lvs/testing/testcases/npn_05p00x05p00.cdl index d22f81b5..2aaf2dcf 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_5x5.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_05p00x05p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_5x5 +* Top Cell Name: npn_05p00x05p00 * View Name: schematic * Netlisted on: Nov 24 10:26:06 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_5x5 +* Cell Name: npn_05p00x05p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_5x5 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_05p00x05p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_5x5 m=1 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_05p00x05p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vnpn_10x10.cdl b/rules/klayout/lvs/testing/testcases/npn_10p00x10p00.cdl similarity index 81% rename from rules/klayout/lvs/testing/testcases/vnpn_10x10.cdl rename to rules/klayout/lvs/testing/testcases/npn_10p00x10p00.cdl index 90e049ac..e5aec508 100644 --- a/rules/klayout/lvs/testing/testcases/vnpn_10x10.cdl +++ b/rules/klayout/lvs/testing/testcases/npn_10p00x10p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vnpn_10x10 +* Top Cell Name: npn_10p00x10p00 * View Name: schematic * Netlisted on: Nov 24 10:28:30 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vnpn_10x10 +* Cell Name: npn_10p00x10p00 * View Name: schematic ************************************************************************ -.SUBCKT vnpn_10x10 I1_default_B I1_default_C I1_default_E I1_default_S +.SUBCKT npn_10p00x10p00 I1_default_B I1_default_C I1_default_E I1_default_S *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I I1_default_S:I -QI1_default I1_default_C I1_default_B I1_default_E I1_default_S vnpn_10x10 m=1 +QI1_default I1_default_C I1_default_B I1_default_E I1_default_S npn_10p00x10p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/nwp_3p3.cdl b/rules/klayout/lvs/testing/testcases/nwp_3p3.cdl deleted file mode 100644 index c426726c..00000000 --- a/rules/klayout/lvs/testing/testcases/nwp_3p3.cdl +++ /dev/null @@ -1,61 +0,0 @@ -************************************************************************ -* auCdl Netlist: -* -* Library Name: TCG_Library -* Top Cell Name: nwp_3p3 -* View Name: schematic -* Netlisted on: Nov 24 09:42:29 2021 -************************************************************************ - -*.BIPOLAR -*.RESI = 2000 -*.RESVAL -*.CAPVAL -*.DIOPERI -*.DIOAREA -*.EQUATION -*.SCALE METER -*.MEGA -.PARAM - -*.GLOBAL vdd! - -*.PIN vdd! - -************************************************************************ -* Library Name: TCG_Library -* Cell Name: nwp_3p3 -* View Name: schematic -************************************************************************ - -.SUBCKT nwp_3p3 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS -+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS -+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS -+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS -+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS -+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! -*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I -*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I -*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I -*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I -*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I -*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I -DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS nwp_3p3 m=1 AREA=10n PJ=400u -DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS nwp_3p3 m=1 AREA=1.21n PJ=224.2u -DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS nwp_3p3 m=1 AREA=123p PJ=202.46u -DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS nwp_3p3 m=1 AREA=86p PJ=201.72u -DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS nwp_3p3 m=1 AREA=1.21n PJ=224.2u -DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS nwp_3p3 m=1 AREA=146.41p PJ=48.4u -DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS nwp_3p3 m=1 AREA=14.883p PJ=26.66u -DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS nwp_3p3 m=1 AREA=10.406p PJ=25.92u -DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS nwp_3p3 m=1 AREA=123p PJ=202.46u -DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS nwp_3p3 m=1 AREA=14.883p PJ=26.66u -DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS nwp_3p3 m=1 AREA=1.5129p PJ=4.92u -DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS nwp_3p3 m=1 AREA=1.0578p PJ=4.18u -DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS nwp_3p3 m=1 AREA=86p PJ=201.72u -DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS nwp_3p3 m=1 AREA=10.406p PJ=25.92u -DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS nwp_3p3 m=1 AREA=1.0578p PJ=4.18u -DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS nwp_3p3 m=1 AREA=739.6f PJ=3.44u -DI1_default vdd! I1_default_MINUS nwp_3p3 m=1 AREA=1p PJ=4u -.ENDS - diff --git a/rules/klayout/lvs/testing/testcases/nwp_6p0.cdl b/rules/klayout/lvs/testing/testcases/nwp_6p0.cdl deleted file mode 100644 index 3cc4e4a2..00000000 --- a/rules/klayout/lvs/testing/testcases/nwp_6p0.cdl +++ /dev/null @@ -1,61 +0,0 @@ -************************************************************************ -* auCdl Netlist: -* -* Library Name: TCG_Library -* Top Cell Name: nwp_6p0 -* View Name: schematic -* Netlisted on: Nov 24 09:43:35 2021 -************************************************************************ - -*.BIPOLAR -*.RESI = 2000 -*.RESVAL -*.CAPVAL -*.DIOPERI -*.DIOAREA -*.EQUATION -*.SCALE METER -*.MEGA -.PARAM - -*.GLOBAL vdd! - -*.PIN vdd! - -************************************************************************ -* Library Name: TCG_Library -* Cell Name: nwp_6p0 -* View Name: schematic -************************************************************************ - -.SUBCKT nwp_6p0 I1_0_0_0_0_R0_MINUS I1_0_1_0_0_R0_MINUS I1_0_2_0_0_R0_MINUS -+ I1_0_3_0_0_R0_MINUS I1_1_0_0_0_R0_MINUS I1_1_1_0_0_R0_MINUS -+ I1_1_2_0_0_R0_MINUS I1_1_3_0_0_R0_MINUS I1_2_0_0_0_R0_MINUS -+ I1_2_1_0_0_R0_MINUS I1_2_2_0_0_R0_MINUS I1_2_3_0_0_R0_MINUS -+ I1_3_0_0_0_R0_MINUS I1_3_1_0_0_R0_MINUS I1_3_2_0_0_R0_MINUS -+ I1_3_3_0_0_R0_MINUS I1_default_MINUS vdd! -*.PININFO I1_0_0_0_0_R0_MINUS:I I1_0_1_0_0_R0_MINUS:I I1_0_2_0_0_R0_MINUS:I -*.PININFO I1_0_3_0_0_R0_MINUS:I I1_1_0_0_0_R0_MINUS:I I1_1_1_0_0_R0_MINUS:I -*.PININFO I1_1_2_0_0_R0_MINUS:I I1_1_3_0_0_R0_MINUS:I I1_2_0_0_0_R0_MINUS:I -*.PININFO I1_2_1_0_0_R0_MINUS:I I1_2_2_0_0_R0_MINUS:I I1_2_3_0_0_R0_MINUS:I -*.PININFO I1_3_0_0_0_R0_MINUS:I I1_3_1_0_0_R0_MINUS:I I1_3_2_0_0_R0_MINUS:I -*.PININFO I1_3_3_0_0_R0_MINUS:I I1_default_MINUS:I vdd!:I -DI1_3_3_0_0_R0 vdd! I1_3_3_0_0_R0_MINUS nwp_6p0 m=1 AREA=10n PJ=400u -DI1_3_2_0_0_R0 vdd! I1_3_2_0_0_R0_MINUS nwp_6p0 m=1 AREA=1.21n PJ=224.2u -DI1_3_1_0_0_R0 vdd! I1_3_1_0_0_R0_MINUS nwp_6p0 m=1 AREA=123p PJ=202.46u -DI1_3_0_0_0_R0 vdd! I1_3_0_0_0_R0_MINUS nwp_6p0 m=1 AREA=86p PJ=201.72u -DI1_2_3_0_0_R0 vdd! I1_2_3_0_0_R0_MINUS nwp_6p0 m=1 AREA=1.21n PJ=224.2u -DI1_2_2_0_0_R0 vdd! I1_2_2_0_0_R0_MINUS nwp_6p0 m=1 AREA=146.41p PJ=48.4u -DI1_2_1_0_0_R0 vdd! I1_2_1_0_0_R0_MINUS nwp_6p0 m=1 AREA=14.883p PJ=26.66u -DI1_2_0_0_0_R0 vdd! I1_2_0_0_0_R0_MINUS nwp_6p0 m=1 AREA=10.406p PJ=25.92u -DI1_1_3_0_0_R0 vdd! I1_1_3_0_0_R0_MINUS nwp_6p0 m=1 AREA=123p PJ=202.46u -DI1_1_2_0_0_R0 vdd! I1_1_2_0_0_R0_MINUS nwp_6p0 m=1 AREA=14.883p PJ=26.66u -DI1_1_1_0_0_R0 vdd! I1_1_1_0_0_R0_MINUS nwp_6p0 m=1 AREA=1.5129p PJ=4.92u -DI1_1_0_0_0_R0 vdd! I1_1_0_0_0_R0_MINUS nwp_6p0 m=1 AREA=1.0578p PJ=4.18u -DI1_0_3_0_0_R0 vdd! I1_0_3_0_0_R0_MINUS nwp_6p0 m=1 AREA=86p PJ=201.72u -DI1_0_2_0_0_R0 vdd! I1_0_2_0_0_R0_MINUS nwp_6p0 m=1 AREA=10.406p PJ=25.92u -DI1_0_1_0_0_R0 vdd! I1_0_1_0_0_R0_MINUS nwp_6p0 m=1 AREA=1.0578p PJ=4.18u -DI1_0_0_0_0_R0 vdd! I1_0_0_0_0_R0_MINUS nwp_6p0 m=1 AREA=739.6f PJ=3.44u -DI1_default vdd! I1_default_MINUS nwp_6p0 m=1 AREA=1p PJ=4u -.ENDS - diff --git a/rules/klayout/lvs/testing/testcases/vpnp_0p42x5.cdl b/rules/klayout/lvs/testing/testcases/pnp_05p00x00p42.cdl similarity index 75% rename from rules/klayout/lvs/testing/testcases/vpnp_0p42x5.cdl rename to rules/klayout/lvs/testing/testcases/pnp_05p00x00p42.cdl index 1b1ad625..1693b2d0 100644 --- a/rules/klayout/lvs/testing/testcases/vpnp_0p42x5.cdl +++ b/rules/klayout/lvs/testing/testcases/pnp_05p00x00p42.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vpnp_0p42x5 +* Top Cell Name: pnp_05p00x00p42 * View Name: schematic * Netlisted on: Nov 24 10:29:25 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vpnp_0p42x5 +* Cell Name: pnp_05p00x00p42 * View Name: schematic ************************************************************************ -.SUBCKT vpnp_0p42x5 I1_default_B I1_default_C I1_default_E +.SUBCKT pnp_05p00x00p42 I1_default_B I1_default_C I1_default_E *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I -QI1_default I1_default_C I1_default_B I1_default_E vpnp_0p42x5 m=1 +QI1_default I1_default_C I1_default_B I1_default_E pnp_05p00x00p42 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vpnp_5x5.cdl b/rules/klayout/lvs/testing/testcases/pnp_05p00x05p00.cdl similarity index 75% rename from rules/klayout/lvs/testing/testcases/vpnp_5x5.cdl rename to rules/klayout/lvs/testing/testcases/pnp_05p00x05p00.cdl index 289454b0..a0f61d75 100644 --- a/rules/klayout/lvs/testing/testcases/vpnp_5x5.cdl +++ b/rules/klayout/lvs/testing/testcases/pnp_05p00x05p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vpnp_5x5 +* Top Cell Name: pnp_05p00x05p00 * View Name: schematic * Netlisted on: Nov 24 10:34:45 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vpnp_5x5 +* Cell Name: pnp_05p00x05p00 * View Name: schematic ************************************************************************ -.SUBCKT vpnp_5x5 I1_default_B I1_default_C I1_default_E +.SUBCKT pnp_05p00x05p00 I1_default_B I1_default_C I1_default_E *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I -QI1_default I1_default_C I1_default_B I1_default_E vpnp_5x5 m=1 +QI1_default I1_default_C I1_default_B I1_default_E pnp_05p00x05p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vpnp_0p42x10.cdl b/rules/klayout/lvs/testing/testcases/pnp_10p00x00p42.cdl similarity index 75% rename from rules/klayout/lvs/testing/testcases/vpnp_0p42x10.cdl rename to rules/klayout/lvs/testing/testcases/pnp_10p00x00p42.cdl index 0f585187..bc8a9275 100644 --- a/rules/klayout/lvs/testing/testcases/vpnp_0p42x10.cdl +++ b/rules/klayout/lvs/testing/testcases/pnp_10p00x00p42.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vpnp_0p42x10 +* Top Cell Name: pnp_10p00x00p42 * View Name: schematic * Netlisted on: Nov 24 10:30:23 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vpnp_0p42x10 +* Cell Name: pnp_10p00x00p42 * View Name: schematic ************************************************************************ -.SUBCKT vpnp_0p42x10 I1_default_B I1_default_C I1_default_E +.SUBCKT pnp_10p00x00p42 I1_default_B I1_default_C I1_default_E *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I -QI1_default I1_default_C I1_default_B I1_default_E vpnp_0p42x10 m=1 +QI1_default I1_default_C I1_default_B I1_default_E pnp_10p00x00p42 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/vpnp_10x10.cdl b/rules/klayout/lvs/testing/testcases/pnp_10p00x10p00.cdl similarity index 75% rename from rules/klayout/lvs/testing/testcases/vpnp_10x10.cdl rename to rules/klayout/lvs/testing/testcases/pnp_10p00x10p00.cdl index 339632b4..31021671 100644 --- a/rules/klayout/lvs/testing/testcases/vpnp_10x10.cdl +++ b/rules/klayout/lvs/testing/testcases/pnp_10p00x10p00.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_Library -* Top Cell Name: vpnp_10x10 +* Top Cell Name: pnp_10p00x10p00 * View Name: schematic * Netlisted on: Nov 24 10:36:53 2021 ************************************************************************ @@ -22,12 +22,12 @@ ************************************************************************ * Library Name: TCG_Library -* Cell Name: vpnp_10x10 +* Cell Name: pnp_10p00x10p00 * View Name: schematic ************************************************************************ -.SUBCKT vpnp_10x10 I1_default_B I1_default_C I1_default_E +.SUBCKT pnp_10p00x10p00 I1_default_B I1_default_C I1_default_E *.PININFO I1_default_B:I I1_default_C:I I1_default_E:I -QI1_default I1_default_C I1_default_B I1_default_E vpnp_10x10 m=1 +QI1_default I1_default_C I1_default_B I1_default_E pnp_10p00x10p00 m=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dn_dss.src.cdl index 59344746..588ef343 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_3p3_dw_sab +* Top Cell Name: sample_ggnfet_03v3_dn_dss * View Name: schematic * Netlisted on: Sep 10 15:46:54 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_3p3_dw_sab +* Cell Name: sample_ggnfet_03v3_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_3p3_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_03v3_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -64,105 +64,105 @@ *.PININFO I1_lin_default_wf_4_R0_D:I I1_lin_default_wf_5_R0_D:I *.PININFO I1_lin_default_wf_6_R0_D:I I1_lin_default_wf_7_R0_D:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.500u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.430u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.360u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.300u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ nfet_03v3_dn_dss m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=3 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=2 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nmos_3p3_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D vdd! vdd! vdd! nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D vdd! vdd! vdd! nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dss.src.cdl index 3b84b524..b11ecafd 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_3p3_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_03v3_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_3p3_sab +* Top Cell Name: sample_ggnfet_03v3_dss * View Name: schematic * Netlisted on: Sep 10 16:06:05 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_3p3_sab +* Cell Name: sample_ggnfet_03v3_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_3p3_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_03v3_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -63,91 +63,91 @@ *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I vdd!:I -MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nmos_3p3_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nfet_03v3_dss m=1 + w=200u l=0.500u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nmos_3p3_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nfet_03v3_dss m=1 + w=200u l=0.430u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nmos_3p3_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nfet_03v3_dss m=1 + w=200u l=0.360u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nmos_3p3_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nfet_03v3_dss m=1 + w=200u l=0.300u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! nmos_3p3_sab ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nmos_3p3_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nfet_03v3_dss m=3 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nmos_3p3_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nfet_03v3_dss m=2 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nmos_3p3_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nfet_03v3_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0 d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! nmos_3p3_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D vdd! vdd! vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D vdd! vdd! vdd! nmos_3p3_sab m=1 w=200u l=0.3u nf=8 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D vdd! vdd! vdd! nfet_03v3_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dn_dss.src.cdl index b1319d74..69ebf8e7 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_5p0_dw_sab +* Top Cell Name: sample_ggnfet_05v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:07:40 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_5p0_dw_sab +* Cell Name: sample_ggnfet_05v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_5p0_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_05v0_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -76,155 +76,155 @@ *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I sub!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=4.130u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=3.440u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=2.865u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=2.390u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=1.990u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=1.660u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=1.380u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=1.150u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=0.960u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=0.800u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 + dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 + dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 + dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 + dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 + dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 + dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 + dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 + dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 + dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 + dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_05v0_dn_dss m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=3 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=2 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! nmos_5p0_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D sub! sub! sub! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! nmos_5p0_dw_sab m=1 w=300u l=0.8u ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! nfet_05v0_dn_dss m=1 w=300u l=0.8u + nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dss.src.cdl index b3d1b153..6975360a 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_5p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_05v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_5p0_sab +* Top Cell Name: sample_ggnfet_05v0_dss * View Name: schematic * Netlisted on: Sep 10 16:10:09 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_5p0_sab +* Cell Name: sample_ggnfet_05v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_5p0_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_05v0_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -73,115 +73,115 @@ *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I vdd!:I -MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=4.130u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=3.440u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=2.865u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=2.390u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=1.990u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=1.660u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=1.380u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=1.150u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=0.960u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=0.800u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D vdd! vdd! vdd! nmos_5p0_sab ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 +MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nmos_5p0_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nfet_05v0_dss m=3 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nmos_5p0_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nfet_05v0_dss m=2 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nmos_5p0_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nfet_05v0_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! nmos_5p0_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D vdd! vdd! vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D vdd! vdd! vdd! nmos_5p0_sab m=1 w=300u l=0.8u nf=12 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D vdd! vdd! vdd! nfet_05v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dn_dss.src.cdl index a0841b95..f042172f 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_6p0_dw_sab +* Top Cell Name: sample_ggnfet_06v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:11:50 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_6p0_dw_sab +* Cell Name: sample_ggnfet_06v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_6p0_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_06v0_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -76,155 +76,155 @@ *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=4.130u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=3.440u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=2.865u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=2.390u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=1.990u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=1.660u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=1.380u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=1.150u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.960u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.800u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 + dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 + dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 + dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 + dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 + dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 + dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 + dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 + dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 + dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 + dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 ++ nfet_06v0_dn_dss m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=3 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=2 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nmos_6p0_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D vdd! vdd! vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D vdd! vdd! vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D vdd! vdd! vdd! nmos_6p0_dw_sab m=1 w=300u l=0.8u ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D vdd! vdd! vdd! nfet_06v0_dn_dss m=1 w=300u l=0.8u + nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dss.src.cdl index 6cc1e772..e61d37c8 100644 --- a/rules/klayout/lvs/testing/testcases/sample_ggnmos_6p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_ggnfet_06v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_ggnmos_6p0_sab +* Top Cell Name: sample_ggnfet_06v0_dss * View Name: schematic * Netlisted on: Sep 10 16:15:13 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_ggnmos_6p0_sab +* Cell Name: sample_ggnfet_06v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_ggnmos_6p0_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_ggnfet_06v0_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -73,115 +73,115 @@ *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I sub!:I -MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=720.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=716.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=597.180u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=497.640u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=414.720u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=345.600u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=288.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=240.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=10.000u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=8.560u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=7.135u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=5.945u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=4.955u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=4.130u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=3.440u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=2.865u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=2.390u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=1.990u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=1.660u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=1.380u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=1.150u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=0.960u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=0.800u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! nmos_6p0_sab ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 +MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=450.000u l=0.8u nf=18 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=400.000u l=0.8u nf=16 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=350.000u l=0.8u nf=14 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300.000u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=250.000u l=0.8u nf=10 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=200.000u l=0.8u nf=8 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! nmos_6p0_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! nfet_06v0_dss m=3 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! nmos_6p0_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! nfet_06v0_dss m=2 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! nmos_6p0_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! nfet_06v0_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0 d_sab=3.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! nmos_6p0_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! nmos_6p0_sab m=1 w=300u l=0.8u nf=12 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! nfet_06v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dn_dss.src.cdl index aefe7685..5d923be3 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_3p3_dw_sab +* Top Cell Name: sample_gppfet_03v3_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:16:56 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_3p3_dw_sab +* Cell Name: sample_gppfet_03v3_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_3p3_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_03v3_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -64,105 +64,105 @@ *.PININFO I1_lin_default_wf_4_R0_D:I I1_lin_default_wf_5_R0_D:I *.PININFO I1_lin_default_wf_6_R0_D:I I1_lin_default_wf_7_R0_D:I sub!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=1 w=200u l=0.500u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=1 w=200u l=0.430u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=1 w=200u l=0.360u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=1 w=200u l=0.300u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 ++ pfet_03v3_dn_dss m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=3 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=2 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_3p3_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0 d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0 d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D sub! sub! sub! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dss.src.cdl index 063fcb66..27254732 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_3p3_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_03v3_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_3p3_sab +* Top Cell Name: sample_gppfet_03v3_dss * View Name: schematic * Netlisted on: Sep 10 16:18:34 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_3p3_sab +* Cell Name: sample_gppfet_03v3_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_3p3_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_03v3_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -63,91 +63,91 @@ *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_5_R0_D:I I1_lin_default_wf_6_R0_D:I *.PININFO I1_lin_default_wf_7_R0_D:I sub!:I -MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=480.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=477.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=398.120u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=331.760u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=276.480u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=230.400u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=192.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=160.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_3p3_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_03v3_dss m=1 + w=200u l=0.500u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_3p3_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_03v3_dss m=1 + w=200u l=0.430u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_3p3_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_03v3_dss m=1 + w=200u l=0.360u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_3p3_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_03v3_dss m=1 + w=200u l=0.300u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pmos_3p3_sab ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=400.000u l=0.3u nf=16 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=350.000u l=0.3u nf=14 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=300.000u l=0.3u nf=12 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=250.000u l=0.3u nf=10 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=200.000u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_3p3_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_03v3_dss m=3 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_3p3_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_03v3_dss m=2 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_3p3_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_03v3_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0 d_sab=1.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pmos_3p3_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_3p3_sab m=1 w=200u l=0.3u nf=8 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_03v3_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dn_dss.src.cdl index 66f740f1..3d63caee 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_5p0_dw_sab +* Top Cell Name: sample_gppfet_05v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:20:10 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_5p0_dw_sab +* Cell Name: sample_gppfet_05v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_5p0_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_05v0_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -74,150 +74,150 @@ *.PININFO I1_lin_default_wf_2_R0_D:I I1_lin_default_wf_3_R0_D:I *.PININFO I1_lin_default_wf_4_R0_D:I sub!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=3.610u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=3.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=2.510u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=2.090u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=1.740u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=1.450u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=1.210u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=1.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=0.840u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=0.700u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 + dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 + dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 + dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 + dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 + dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 + dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 + dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 + dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 + dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 + dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_05v0_dn_dss m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=3 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=2 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_5p0_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D sub! sub! sub! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_5p0_dw_sab m=1 w=450u l=0.7u ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_05v0_dn_dss m=1 w=450u l=0.7u + nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dss.src.cdl index fcecb817..15b5d86d 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_5p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_05v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_5p0_sab +* Top Cell Name: sample_gppfet_05v0_dss * View Name: schematic * Netlisted on: Sep 10 16:21:46 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_5p0_sab +* Cell Name: sample_gppfet_05v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_5p0_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_05v0_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -72,113 +72,113 @@ *.PININFO I1_lin_default_strapSD_0_R0_D:I I1_lin_default_wf_0_R0_D:I *.PININFO I1_lin_default_wf_1_R0_D:I I1_lin_default_wf_2_R0_D:I *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I sub!:I -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=3.610u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=3.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=2.510u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=2.090u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=1.740u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=1.450u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=1.210u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=1.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=0.840u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=0.700u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! pmos_5p0_sab ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 +MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_5p0_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_05v0_dss m=3 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_5p0_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_05v0_dss m=2 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_5p0_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_05v0_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pmos_5p0_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_5p0_sab m=1 w=450u l=0.7u nf=18 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_05v0_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dn_dss.src.cdl similarity index 64% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dn_dss.src.cdl index a41ff5da..81f86c30 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_6p0_dw_sab +* Top Cell Name: sample_gppfet_06v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:24:13 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_6p0_dw_sab +* Cell Name: sample_gppfet_06v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_6p0_dw_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_06v0_dn_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -74,150 +74,150 @@ *.PININFO I1_lin_default_wf_2_R0_D:I I1_lin_default_wf_3_R0_D:I *.PININFO I1_lin_default_wf_4_R0_D:I sub!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=3.610u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=3.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=2.510u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=2.090u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=1.740u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=1.450u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=1.210u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=1.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=0.840u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=0.700u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 + dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 + dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 + dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 + dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 + dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 + dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 + dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 + dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 + dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 + dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 ++ pfet_06v0_dn_dss m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 + dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=3 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=2 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_6p0_dw_sab +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D sub! sub! sub! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_6p0_dw_sab m=1 w=450u l=0.7u ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_06v0_dn_dss m=1 w=450u l=0.7u + nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dss.src.cdl similarity index 73% rename from rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dss.src.cdl index a2358fff..3ccba1d9 100644 --- a/rules/klayout/lvs/testing/testcases/sample_gppmos_6p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_gppfet_06v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_gppmos_6p0_sab +* Top Cell Name: sample_gppfet_06v0_dss * View Name: schematic * Netlisted on: Sep 10 16:26:13 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_gppmos_6p0_sab +* Cell Name: sample_gppfet_06v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_gppmos_6p0_sab I1_default_D I1_lin_default_d_sab_0_R0_D +.SUBCKT sample_gppfet_06v0_dss I1_default_D I1_lin_default_d_sab_0_R0_D + I1_lin_default_d_sab_1_R0_D I1_lin_default_d_sab_2_R0_D + I1_lin_default_d_sab_3_R0_D I1_lin_default_d_sab_4_R0_D + I1_lin_default_d_sab_5_R0_D I1_lin_default_d_sab_6_R0_D @@ -72,113 +72,113 @@ *.PININFO I1_lin_default_strapSD_0_R0_D:I I1_lin_default_wf_0_R0_D:I *.PININFO I1_lin_default_wf_1_R0_D:I I1_lin_default_wf_2_R0_D:I *.PININFO I1_lin_default_wf_3_R0_D:I I1_lin_default_wf_4_R0_D:I sub!:I -MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=720.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=622.080u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=518.400u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=432.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=360.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=10.000u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=8.985u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=7.490u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=6.240u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=5.200u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=4.335u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=3.610u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=3.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=2.510u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=2.090u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=1.740u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=1.450u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=1.210u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=1.010u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=0.840u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=0.700u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! pmos_6p0_sab ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 +MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=600.000u l=0.7u nf=24 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=550.000u l=0.7u nf=22 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=500.000u l=0.7u nf=20 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450.000u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=400.000u l=0.7u nf=16 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=350.000u l=0.7u nf=14 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=300.000u l=0.7u nf=12 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pmos_6p0_sab m=3 +MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D sub! sub! sub! pfet_06v0_dss m=3 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=3 dtemp=0 -MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pmos_6p0_sab m=2 +MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D sub! sub! sub! pfet_06v0_dss m=2 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=2 dtemp=0 -MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pmos_6p0_sab m=1 +MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D sub! sub! sub! pfet_06v0_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0 d_sab=2.78u par=1 dtemp=0 -MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pmos_6p0_sab +MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D sub! sub! sub! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D sub! sub! sub! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D sub! sub! sub! pmos_6p0_sab m=1 w=450u l=0.7u nf=18 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D sub! sub! sub! pfet_06v0_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_nmos_3p3.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_03v3.src.cdl index 8500dccc..5334aadb 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_3p3 +* Top Cell Name: sample_nfet_03v3 * View Name: schematic * Netlisted on: Sep 10 16:28:03 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_3p3 +* Cell Name: sample_nfet_03v3 * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_3p3 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_03v3 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -326,422 +326,422 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MI1_lin_default_fingerW_34_R0 I1_lin_default_fingerW_34_R0_D -+ I1_lin_default_fingerW_34_R0_G I1_lin_default_fingerW_34_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_34_R0_G I1_lin_default_fingerW_34_R0_S vdd! nfet_03v3 + m=1 w=1e-3 l=280n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 pd=1.0052e-3 + nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_33_R0 I1_lin_default_fingerW_33_R0_D -+ I1_lin_default_fingerW_33_R0_G I1_lin_default_fingerW_33_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_33_R0_G I1_lin_default_fingerW_33_R0_S vdd! nfet_03v3 + m=1 w=90.24e-6 l=280n nf=1 as=39.7056e-12 ad=39.7056e-12 ps=181.36e-6 + pd=181.36e-6 nrd=0.004876 nrs=0.004876 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nfet_03v3 + m=1 w=75.2e-6 l=280n nf=1 as=33.088e-12 ad=33.088e-12 ps=151.28e-6 + pd=151.28e-6 nrd=0.005851 nrs=0.005851 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nfet_03v3 + m=1 w=62.665e-6 l=280n nf=1 as=27.5726e-12 ad=27.5726e-12 ps=126.21e-6 + pd=126.21e-6 nrd=0.007021 nrs=0.007021 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nfet_03v3 + m=1 w=52.225e-6 l=280n nf=1 as=22.979e-12 ad=22.979e-12 ps=105.33e-6 + pd=105.33e-6 nrd=0.008425 nrs=0.008425 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nfet_03v3 + m=1 w=43.52e-6 l=280n nf=1 as=19.1488e-12 ad=19.1488e-12 ps=87.92e-6 + pd=87.92e-6 nrd=0.010110 nrs=0.010110 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nfet_03v3 + m=1 w=36.265e-6 l=280n nf=1 as=15.9566e-12 ad=15.9566e-12 ps=73.41e-6 + pd=73.41e-6 nrd=0.012133 nrs=0.012133 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nfet_03v3 + m=1 w=30.22e-6 l=280n nf=1 as=13.2968e-12 ad=13.2968e-12 ps=61.32e-6 + pd=61.32e-6 nrd=0.014560 nrs=0.014560 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nfet_03v3 + m=1 w=25.185e-6 l=280n nf=1 as=11.0814e-12 ad=11.0814e-12 ps=51.25e-6 + pd=51.25e-6 nrd=0.017471 nrs=0.017471 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nfet_03v3 + m=1 w=20.985e-6 l=280n nf=1 as=9.2334e-12 ad=9.2334e-12 ps=42.85e-6 + pd=42.85e-6 nrd=0.020967 nrs=0.020967 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nfet_03v3 + m=1 w=17.49e-6 l=280n nf=1 as=7.6956e-12 ad=7.6956e-12 ps=35.86e-6 + pd=35.86e-6 nrd=0.025157 nrs=0.025157 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nfet_03v3 + m=1 w=14.575e-6 l=280n nf=1 as=6.413e-12 ad=6.413e-12 ps=30.03e-6 + pd=30.03e-6 nrd=0.030189 nrs=0.030189 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nfet_03v3 + m=1 w=12.145e-6 l=280n nf=1 as=5.3438e-12 ad=5.3438e-12 ps=25.17e-6 + pd=25.17e-6 nrd=0.036229 nrs=0.036229 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nfet_03v3 + m=1 w=10.12e-6 l=280n nf=1 as=4.4528e-12 ad=4.4528e-12 ps=21.12e-6 + pd=21.12e-6 nrd=0.043478 nrs=0.043478 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nfet_03v3 + m=1 w=8.435e-6 l=280n nf=1 as=3.7114e-12 ad=3.7114e-12 ps=17.75e-6 + pd=17.75e-6 nrd=0.052164 nrs=0.052164 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nfet_03v3 + m=1 w=7.03e-6 l=280n nf=1 as=3.0932e-12 ad=3.0932e-12 ps=14.94e-6 + pd=14.94e-6 nrd=0.062589 nrs=0.062589 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nfet_03v3 + m=1 w=5.855e-6 l=280n nf=1 as=2.5762e-12 ad=2.5762e-12 ps=12.59e-6 + pd=12.59e-6 nrd=0.075149 nrs=0.075149 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nfet_03v3 + m=1 w=4.88e-6 l=280n nf=1 as=2.1472e-12 ad=2.1472e-12 ps=10.64e-6 + pd=10.64e-6 nrd=0.090164 nrs=0.090164 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nfet_03v3 + m=1 w=4.065e-6 l=280n nf=1 as=1.7886e-12 ad=1.7886e-12 ps=9.01e-6 pd=9.01e-6 + nrd=0.108241 nrs=0.108241 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nfet_03v3 + m=1 w=3.39e-6 l=280n nf=1 as=1.4916e-12 ad=1.4916e-12 ps=7.66e-6 pd=7.66e-6 + nrd=0.129794 nrs=0.129794 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nfet_03v3 + m=1 w=2.825e-6 l=280n nf=1 as=1.243e-12 ad=1.243e-12 ps=6.53e-6 pd=6.53e-6 + nrd=0.155752 nrs=0.155752 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nfet_03v3 + m=1 w=2.355e-6 l=280n nf=1 as=1.0362e-12 ad=1.0362e-12 ps=5.59e-6 pd=5.59e-6 + nrd=0.186837 nrs=0.186837 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nfet_03v3 + m=1 w=1.96e-6 l=280n nf=1 as=862.4e-15 ad=862.4e-15 ps=4.8e-6 pd=4.8e-6 + nrd=0.224490 nrs=0.224490 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nfet_03v3 + m=1 w=1.635e-6 l=280n nf=1 as=719.4e-15 ad=719.4e-15 ps=4.15e-6 pd=4.15e-6 + nrd=0.269113 nrs=0.269113 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nfet_03v3 + m=1 w=1.36e-6 l=280n nf=1 as=598.4e-15 ad=598.4e-15 ps=3.6e-6 pd=3.6e-6 + nrd=0.323529 nrs=0.323529 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nfet_03v3 + m=1 w=1.135e-6 l=280n nf=1 as=499.4e-15 ad=499.4e-15 ps=3.15e-6 pd=3.15e-6 + nrd=0.387665 nrs=0.387665 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nfet_03v3 + m=1 w=945e-9 l=280n nf=1 as=415.8e-15 ad=415.8e-15 ps=2.77e-6 pd=2.77e-6 + nrd=0.465608 nrs=0.465608 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nfet_03v3 + m=1 w=790e-9 l=280n nf=1 as=347.6e-15 ad=347.6e-15 ps=2.46e-6 pd=2.46e-6 + nrd=0.556962 nrs=0.556962 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nfet_03v3 + m=1 w=655e-9 l=280n nf=1 as=288.2e-15 ad=288.2e-15 ps=2.19e-6 pd=2.19e-6 + nrd=0.671756 nrs=0.671756 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nfet_03v3 + m=1 w=545e-9 l=280n nf=1 as=239.8e-15 ad=239.8e-15 ps=1.97e-6 pd=1.97e-6 + nrd=0.807339 nrs=0.807339 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nfet_03v3 + m=1 w=455e-9 l=280n nf=1 as=200.2e-15 ad=200.2e-15 ps=1.79e-6 pd=1.79e-6 + nrd=0.967033 nrs=0.967033 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nfet_03v3 + m=1 w=380e-9 l=280n nf=1 as=167.2e-15 ad=167.2e-15 ps=1.64e-6 pd=1.64e-6 + nrd=1.157895 nrs=1.157895 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nfet_03v3 + m=1 w=315e-9 l=280n nf=1 as=161.1e-15 ad=161.1e-15 ps=1.64e-6 pd=1.64e-6 + nrd=1.623583 nrs=1.623583 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nfet_03v3 + m=1 w=265e-9 l=280n nf=1 as=156.1e-15 ad=156.1e-15 ps=1.64e-6 pd=1.64e-6 + nrd=2.222855 nrs=2.222855 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nfet_03v3 + m=1 w=220e-9 l=280n nf=1 as=151.6e-15 ad=151.6e-15 ps=1.64e-6 pd=1.64e-6 + nrd=3.132231 nrs=3.132231 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_l_29_R0 I1_lin_default_l_29_R0_D I1_lin_default_l_29_R0_G -+ I1_lin_default_l_29_R0_S vdd! nmos_3p3 m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_29_R0_S vdd! nfet_03v3 m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_28_R0 I1_lin_default_l_28_R0_D I1_lin_default_l_28_R0_G -+ I1_lin_default_l_28_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=46.155u nf=1 ++ I1_lin_default_l_28_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=46.155u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_27_R0 I1_lin_default_l_27_R0_D I1_lin_default_l_27_R0_G -+ I1_lin_default_l_27_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=38.465u nf=1 ++ I1_lin_default_l_27_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=38.465u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_26_R0 I1_lin_default_l_26_R0_D I1_lin_default_l_26_R0_G -+ I1_lin_default_l_26_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=32.055u nf=1 ++ I1_lin_default_l_26_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=32.055u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=26.710u nf=1 ++ I1_lin_default_l_25_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=26.710u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=22.260u nf=1 ++ I1_lin_default_l_24_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=22.260u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=18.550u nf=1 ++ I1_lin_default_l_23_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=18.550u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=15.460u nf=1 ++ I1_lin_default_l_22_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=15.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=12.880u nf=1 ++ I1_lin_default_l_21_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=12.880u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=10.735u nf=1 ++ I1_lin_default_l_20_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=10.735u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=8.945u nf=1 ++ I1_lin_default_l_19_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=8.945u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=7.455u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=7.455u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=6.210u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=6.210u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=5.175u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=5.175u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=4.315u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=4.315u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=3.595u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=3.595u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=2.995u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=2.995u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=2.495u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=2.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=2.080u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=2.080u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=1.735u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=1.735u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=1.445u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=1.445u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=1.205u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=1.205u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=1.005u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=1.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.835u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.835u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.695u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.695u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.580u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.485u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.485u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.405u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.405u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.335u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.335u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=0.280u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=0.280u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_3p3 m=1 w=36e-6 l=280n nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_03v3 m=1 w=36e-6 l=280n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_3p3 m=1 w=18.36e-6 l=280n nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_03v3 m=1 w=18.36e-6 l=280n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_3p3 m=100 w=360e-9 l=280n nf=1 ++ I1_lin_default_m_2_R0_S vdd! nfet_03v3 m=100 w=360e-9 l=280n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_3p3 m=51 w=1.8e-6 l=280n nf=5 as=532.8e-15 ++ I1_lin_default_m_1_R0_S vdd! nfet_03v3 m=51 w=1.8e-6 l=280n nf=5 as=532.8e-15 + ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 sa=0.440u + sb=0.440u sd=0.520u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S vdd! nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_3p3 m=1 w=720e-9 l=280n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 ++ vdd! nfet_03v3 m=1 w=720e-9 l=280n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 + pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ vdd! nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ vdd! nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nmos_3p3 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nfet_03v3 + m=1 w=16.08e-6 l=280n nf=3 as=5.1456e-12 ad=5.1456e-12 ps=23.36e-6 + pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nmos_3p3 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nfet_03v3 + m=1 w=26.8e-6 l=280n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nmos_3p3 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nfet_03v3 m=1 + w=16.8e-6 l=280n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_3p3 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_03v3 m=1 + w=13.6e-6 l=280n nf=10 as=4.0256e-12 ad=3.536e-12 ps=22.24e-6 pd=18.8e-6 + nrd=0.019118 nrs=0.021765 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_3p3 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_03v3 m=1 + w=1.08e-6 l=280n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 pd=3.36e-6 + nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_3p3 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_03v3 m=1 + w=720e-9 l=280n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 pd=1.76e-6 + nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nmos_3p3 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nmos_3p3 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_3p3 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_03v3 m=1 + w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_3p3 m=1 w=25.08e-6 l=280n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 ++ nfet_03v3 m=1 w=25.08e-6 l=280n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 + pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_3p3 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_03v3 m=1 w=360e-9 + l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dn_dss.src.cdl similarity index 84% rename from rules/klayout/lvs/testing/testcases/sample_nmos_3p3_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dn_dss.src.cdl index 305a9434..a82b2082 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_3p3_dw_sab +* Top Cell Name: sample_nfet_03v3_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:29:36 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_3p3_dw_sab +* Cell Name: sample_nfet_03v3_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_3p3_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_03v3_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -173,165 +173,165 @@ *.PININFO I1_lin_default_wf_7_R0_D:I I1_lin_default_wf_7_R0_G:I *.PININFO I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_3p3_dw_sab m=1 w=480.000u l=0.3u nf=8 ++ I1_lin_default_wf_7_R0_S vdd! nfet_03v3_dn_dss m=1 w=480.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_3p3_dw_sab m=1 w=477.760u l=0.3u nf=8 ++ I1_lin_default_wf_6_R0_S vdd! nfet_03v3_dn_dss m=1 w=477.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_3p3_dw_sab m=1 w=398.120u l=0.3u nf=8 ++ I1_lin_default_wf_5_R0_S vdd! nfet_03v3_dn_dss m=1 w=398.120u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_3p3_dw_sab m=1 w=331.760u l=0.3u nf=8 ++ I1_lin_default_wf_4_R0_S vdd! nfet_03v3_dn_dss m=1 w=331.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_3p3_dw_sab m=1 w=276.480u l=0.3u nf=8 ++ I1_lin_default_wf_3_R0_S vdd! nfet_03v3_dn_dss m=1 w=276.480u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_3p3_dw_sab m=1 w=230.400u l=0.3u nf=8 ++ I1_lin_default_wf_2_R0_S vdd! nfet_03v3_dn_dss m=1 w=230.400u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_3p3_dw_sab m=1 w=192.000u l=0.3u nf=8 ++ I1_lin_default_wf_1_R0_S vdd! nfet_03v3_dn_dss m=1 w=192.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_3p3_dw_sab m=1 w=160.000u l=0.3u nf=8 ++ I1_lin_default_wf_0_R0_S vdd! nfet_03v3_dn_dss m=1 w=160.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.500u nf=8 ++ I1_lin_default_l_3_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.500u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.430u nf=8 ++ I1_lin_default_l_2_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.430u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.360u nf=8 ++ I1_lin_default_l_1_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.360u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.300u nf=8 ++ I1_lin_default_l_0_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.300u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_3p3_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_13_R0 I1_lin_default_nf_13_R0_D I1_lin_default_nf_13_R0_G -+ I1_lin_default_nf_13_R0_S vdd! nmos_3p3_dw_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_13_R0_S vdd! nfet_03v3_dn_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_12_R0 I1_lin_default_nf_12_R0_D I1_lin_default_nf_12_R0_G -+ I1_lin_default_nf_12_R0_S vdd! nmos_3p3_dw_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_12_R0_S vdd! nfet_03v3_dn_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_11_R0 I1_lin_default_nf_11_R0_D I1_lin_default_nf_11_R0_G -+ I1_lin_default_nf_11_R0_S vdd! nmos_3p3_dw_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_11_R0_S vdd! nfet_03v3_dn_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S vdd! nmos_3p3_dw_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_10_R0_S vdd! nfet_03v3_dn_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S vdd! nmos_3p3_dw_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_9_R0_S vdd! nfet_03v3_dn_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S vdd! nmos_3p3_dw_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_8_R0_S vdd! nfet_03v3_dn_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_3p3_dw_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_7_R0_S vdd! nfet_03v3_dn_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_3p3_dw_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_6_R0_S vdd! nfet_03v3_dn_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_3p3_dw_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_5_R0_S vdd! nfet_03v3_dn_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_3p3_dw_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_4_R0_S vdd! nfet_03v3_dn_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_3p3_dw_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_3_R0_S vdd! nfet_03v3_dn_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_3p3_dw_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_2_R0_S vdd! nfet_03v3_dn_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_3p3_dw_sab m=1 w=100.000u l=0.3u nf=4 ++ I1_lin_default_nf_1_R0_S vdd! nfet_03v3_dn_dss m=1 w=100.000u l=0.3u nf=4 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_3p3_dw_sab m=1 w=100.000u l=0.3u nf=4 ++ I1_lin_default_nf_0_R0_S vdd! nfet_03v3_dn_dss m=1 w=100.000u l=0.3u nf=4 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_3p3_dw_sab m=3 w=200u l=0.3u nf=8 ++ I1_lin_default_m_2_R0_S vdd! nfet_03v3_dn_dss m=3 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_3p3_dw_sab m=2 w=200u l=0.3u nf=8 ++ I1_lin_default_m_1_R0_S vdd! nfet_03v3_dn_dss m=2 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_m_0_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_gns_1_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0 d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S vdd! nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_gns_0_R0_S vdd! nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D + I1_lin_default_guardRing_1_R0_G I1_lin_default_guardRing_1_R0_S vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S vdd! -+ nmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_3p3_dw_sab m=1 ++ nfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_03v3_dn_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_nmos_3p3_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dss.src.cdl index 6833afb7..91baf609 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_3p3_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_03v3_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_3p3_sab +* Top Cell Name: sample_nfet_03v3_dss * View Name: schematic * Netlisted on: Sep 10 16:34:07 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_3p3_sab +* Cell Name: sample_nfet_03v3_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_3p3_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_03v3_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -157,150 +157,150 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_3p3_sab m=1 w=480.000u l=0.3u nf=8 ++ I1_lin_default_wf_7_R0_S vdd! nfet_03v3_dss m=1 w=480.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_3p3_sab m=1 w=477.760u l=0.3u nf=8 ++ I1_lin_default_wf_6_R0_S vdd! nfet_03v3_dss m=1 w=477.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_3p3_sab m=1 w=398.120u l=0.3u nf=8 ++ I1_lin_default_wf_5_R0_S vdd! nfet_03v3_dss m=1 w=398.120u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_3p3_sab m=1 w=331.760u l=0.3u nf=8 ++ I1_lin_default_wf_4_R0_S vdd! nfet_03v3_dss m=1 w=331.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_3p3_sab m=1 w=276.480u l=0.3u nf=8 ++ I1_lin_default_wf_3_R0_S vdd! nfet_03v3_dss m=1 w=276.480u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_3p3_sab m=1 w=230.400u l=0.3u nf=8 ++ I1_lin_default_wf_2_R0_S vdd! nfet_03v3_dss m=1 w=230.400u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_3p3_sab m=1 w=192.000u l=0.3u nf=8 ++ I1_lin_default_wf_1_R0_S vdd! nfet_03v3_dss m=1 w=192.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_3p3_sab m=1 w=160.000u l=0.3u nf=8 ++ I1_lin_default_wf_0_R0_S vdd! nfet_03v3_dss m=1 w=160.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_3p3_sab m=1 w=200u l=0.500u nf=8 ++ I1_lin_default_l_3_R0_S vdd! nfet_03v3_dss m=1 w=200u l=0.500u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_3p3_sab m=1 w=200u l=0.430u nf=8 ++ I1_lin_default_l_2_R0_S vdd! nfet_03v3_dss m=1 w=200u l=0.430u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_3p3_sab m=1 w=200u l=0.360u nf=8 ++ I1_lin_default_l_1_R0_S vdd! nfet_03v3_dss m=1 w=200u l=0.360u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_3p3_sab m=1 w=200u l=0.300u nf=8 ++ I1_lin_default_l_0_R0_S vdd! nfet_03v3_dss m=1 w=200u l=0.300u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_3p3_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_12_R0 I1_lin_default_nf_12_R0_D I1_lin_default_nf_12_R0_G -+ I1_lin_default_nf_12_R0_S vdd! nmos_3p3_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_12_R0_S vdd! nfet_03v3_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_11_R0 I1_lin_default_nf_11_R0_D I1_lin_default_nf_11_R0_G -+ I1_lin_default_nf_11_R0_S vdd! nmos_3p3_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_11_R0_S vdd! nfet_03v3_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S vdd! nmos_3p3_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_10_R0_S vdd! nfet_03v3_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S vdd! nmos_3p3_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_9_R0_S vdd! nfet_03v3_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S vdd! nmos_3p3_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_8_R0_S vdd! nfet_03v3_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_3p3_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_7_R0_S vdd! nfet_03v3_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_3p3_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_6_R0_S vdd! nfet_03v3_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_3p3_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_5_R0_S vdd! nfet_03v3_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_3p3_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_4_R0_S vdd! nfet_03v3_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_3p3_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_3_R0_S vdd! nfet_03v3_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_3p3_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_2_R0_S vdd! nfet_03v3_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_3p3_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_1_R0_S vdd! nfet_03v3_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_3p3_sab m=1 w=100.000u l=0.3u nf=4 ++ I1_lin_default_nf_0_R0_S vdd! nfet_03v3_dss m=1 w=100.000u l=0.3u nf=4 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_3p3_sab m=3 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_2_R0_S vdd! nfet_03v3_dss m=3 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_3p3_sab m=2 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_1_R0_S vdd! nfet_03v3_dss m=2 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_0_R0_S vdd! nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_3p3_sab m=1 ++ nfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_03v3_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_nmos_5p0.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_05v0.src.cdl index 92a009cd..ee081459 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_5p0 +* Top Cell Name: sample_nfet_05v0 * View Name: schematic * Netlisted on: Sep 10 16:35:34 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_5p0 +* Cell Name: sample_nfet_05v0 * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_5p0 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_05v0 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -310,400 +310,400 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MMN0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S vdd! nmos_5p0 m=1 w=7.08e-6 l=600n nf=3 ++ I1_lin_default_sFirst_0_R0_S vdd! nfet_05v0 m=1 w=7.08e-6 l=600n nf=3 + as=2.2656e-12 ad=2.2656e-12 ps=11.36e-6 pd=11.36e-6 nrd=0.045198 + nrs=0.045198 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nfet_05v0 + m=1 w=100e-6 l=600n nf=1 as=44e-12 ad=44e-12 ps=200.88e-6 pd=200.88e-6 + nrd=0.004400 nrs=0.004400 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nfet_05v0 + m=1 w=85.455e-6 l=600n nf=1 as=37.6002e-12 ad=37.6002e-12 ps=171.79e-6 + pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nfet_05v0 + m=1 w=71.215e-6 l=600n nf=1 as=31.3346e-12 ad=31.3346e-12 ps=143.31e-6 + pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nfet_05v0 + m=1 w=59.345e-6 l=600n nf=1 as=26.1118e-12 ad=26.1118e-12 ps=119.57e-6 + pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nfet_05v0 + m=1 w=49.455e-6 l=600n nf=1 as=21.7602e-12 ad=21.7602e-12 ps=99.79e-6 + pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nfet_05v0 + m=1 w=41.21e-6 l=600n nf=1 as=18.1324e-12 ad=18.1324e-12 ps=83.3e-6 + pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nfet_05v0 + m=1 w=34.345e-6 l=600n nf=1 as=15.1118e-12 ad=15.1118e-12 ps=69.57e-6 + pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nfet_05v0 + m=1 w=28.62e-6 l=600n nf=1 as=12.5928e-12 ad=12.5928e-12 ps=58.12e-6 + pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nfet_05v0 + m=1 w=23.85e-6 l=600n nf=1 as=10.494e-12 ad=10.494e-12 ps=48.58e-6 + pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nfet_05v0 + m=1 w=19.875e-6 l=600n nf=1 as=8.745e-12 ad=8.745e-12 ps=40.63e-6 + pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nfet_05v0 + m=1 w=16.56e-6 l=600n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 pd=34e-6 + nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nfet_05v0 + m=1 w=13.8e-6 l=600n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 pd=28.48e-6 + nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nfet_05v0 + m=1 w=11.5e-6 l=600n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 pd=23.88e-6 + nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nfet_05v0 + m=1 w=9.585e-6 l=600n nf=1 as=4.2174e-12 ad=4.2174e-12 ps=20.05e-6 + pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nfet_05v0 + m=1 w=7.985e-6 l=600n nf=1 as=3.5134e-12 ad=3.5134e-12 ps=16.85e-6 + pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nfet_05v0 + m=1 w=6.655e-6 l=600n nf=1 as=2.9282e-12 ad=2.9282e-12 ps=14.19e-6 + pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nfet_05v0 + m=1 w=5.545e-6 l=600n nf=1 as=2.4398e-12 ad=2.4398e-12 ps=11.97e-6 + pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nfet_05v0 + m=1 w=4.62e-6 l=600n nf=1 as=2.0328e-12 ad=2.0328e-12 ps=10.12e-6 + pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nfet_05v0 + m=1 w=3.85e-6 l=600n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 pd=8.58e-6 + nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nfet_05v0 + m=1 w=3.21e-6 l=600n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 pd=7.3e-6 + nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nfet_05v0 + m=1 w=2.675e-6 l=600n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 pd=6.23e-6 + nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nfet_05v0 + m=1 w=2.23e-6 l=600n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 pd=5.34e-6 + nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nfet_05v0 + m=1 w=1.86e-6 l=600n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 pd=4.6e-6 + nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nfet_05v0 + m=1 w=1.55e-6 l=600n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nfet_05v0 + m=1 w=1.29e-6 l=600n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nfet_05v0 + m=1 w=1.075e-6 l=600n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nfet_05v0 + m=1 w=895e-9 l=600n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nfet_05v0 + m=1 w=745e-9 l=600n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nfet_05v0 + m=1 w=620e-9 l=600n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nfet_05v0 + m=1 w=520e-9 l=600n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nfet_05v0 + m=1 w=430e-9 l=600n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nfet_05v0 + m=1 w=300e-9 l=600n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S vdd! nmos_5p0 m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_25_R0_S vdd! nfet_05v0 m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=47.700u nf=1 ++ I1_lin_default_l_24_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=47.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=39.750u nf=1 ++ I1_lin_default_l_23_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=39.750u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=33.125u nf=1 ++ I1_lin_default_l_22_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=33.125u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=27.605u nf=1 ++ I1_lin_default_l_21_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=27.605u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=23.005u nf=1 ++ I1_lin_default_l_20_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=23.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=19.170u nf=1 ++ I1_lin_default_l_19_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=19.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=15.975u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=15.975u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=13.310u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=13.310u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=11.095u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=11.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=9.245u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=9.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=7.705u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=7.705u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=6.420u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=6.420u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=5.350u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=5.350u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=4.460u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=4.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=3.715u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=3.715u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=3.095u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=3.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=2.580u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=2.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=2.150u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=2.150u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=1.790u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=1.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=1.495u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=1.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=1.245u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=1.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=1.035u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=1.035u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=0.865u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=0.865u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=0.720u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=0.720u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=0.600u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=0.600u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_5p0 m=1 w=86e-6 l=600n nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_05v0 m=1 w=86e-6 l=600n nf=100 + as=22.6696e-12 ad=22.36e-12 ps=140.44e-6 pd=138e-6 nrd=0.003023 nrs=0.003065 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_5p0 m=1 w=28.56e-6 l=600n nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_05v0 m=1 w=28.56e-6 l=600n nf=51 + as=7.5264e-12 ad=7.5264e-12 ps=56e-6 pd=56e-6 nrd=0.009227 nrs=0.009227 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_5p0 m=100 w=360e-9 l=600n nf=1 ++ I1_lin_default_m_2_R0_S vdd! nfet_05v0 m=100 w=360e-9 l=600n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_5p0 m=51 w=360e-9 l=600n nf=1 as=158.4e-15 ++ I1_lin_default_m_1_R0_S vdd! nfet_05v0 m=51 w=360e-9 l=600n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S vdd! nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ vdd! nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ vdd! nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ vdd! nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nmos_5p0 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nfet_05v0 + m=1 w=16.08e-6 l=600n nf=3 as=5.1456e-12 ad=5.1456e-12 ps=23.36e-6 + pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nmos_5p0 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nfet_05v0 + m=1 w=26.8e-6 l=600n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nmos_5p0 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nfet_05v0 m=1 + w=16.8e-6 l=600n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_5p0 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_05v0 m=1 + w=53.6e-6 l=600n nf=10 as=15.8656e-12 ad=13.936e-12 ps=70.24e-6 pd=58.8e-6 + nrd=0.004851 nrs=0.005522 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_5p0 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_05v0 m=1 + w=720e-9 l=600n nf=2 as=187.2e-15 ad=316.8e-15 ps=1.76e-6 pd=3.2e-6 + nrd=0.611111 nrs=0.361111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_5p0 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_05v0 m=1 + w=720e-9 l=600n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 pd=1.76e-6 + nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nmos_5p0 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=169.2e-15 ad=158.4e-15 ps=1.66e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.305556 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nmos_5p0 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nfet_05v0 + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_5p0 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_05v0 m=1 + w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_5p0 m=1 w=25.08e-6 l=600n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 ++ nfet_05v0 m=1 w=25.08e-6 l=600n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 + pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_5p0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0 m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_5p0 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_05v0 m=1 w=360e-9 + l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn.src.cdl similarity index 88% rename from rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn.src.cdl index d7141f67..eac559c5 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_5p0_dw +* Top Cell Name: sample_nfet_05v0_dn * View Name: schematic * Netlisted on: Sep 10 16:38:58 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_5p0_dw +* Cell Name: sample_nfet_05v0_dn * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_5p0_dw I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_05v0_dn I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -310,418 +310,418 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MMN0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S vdd! nmos_5p0_dw m=1 w=16.8e-6 l=600n nf=5 ++ I1_lin_default_sFirst_0_R0_S vdd! nfet_05v0_dn m=1 w=16.8e-6 l=600n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D + I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! -+ nmos_5p0_dw m=1 w=1e-3 l=600n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 ++ nfet_05v0_dn m=1 w=1e-3 l=600n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 + pd=1.0052e-3 nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D + I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! -+ nmos_5p0_dw m=1 w=85.455e-6 l=600n nf=1 as=37.6002e-12 ad=37.6002e-12 ++ nfet_05v0_dn m=1 w=85.455e-6 l=600n nf=1 as=37.6002e-12 ad=37.6002e-12 + ps=171.79e-6 pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D + I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! -+ nmos_5p0_dw m=1 w=71.215e-6 l=600n nf=1 as=31.3346e-12 ad=31.3346e-12 ++ nfet_05v0_dn m=1 w=71.215e-6 l=600n nf=1 as=31.3346e-12 ad=31.3346e-12 + ps=143.31e-6 pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D + I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! -+ nmos_5p0_dw m=1 w=59.345e-6 l=600n nf=1 as=26.1118e-12 ad=26.1118e-12 ++ nfet_05v0_dn m=1 w=59.345e-6 l=600n nf=1 as=26.1118e-12 ad=26.1118e-12 + ps=119.57e-6 pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D + I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! -+ nmos_5p0_dw m=1 w=49.455e-6 l=600n nf=1 as=21.7602e-12 ad=21.7602e-12 ++ nfet_05v0_dn m=1 w=49.455e-6 l=600n nf=1 as=21.7602e-12 ad=21.7602e-12 + ps=99.79e-6 pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D + I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! -+ nmos_5p0_dw m=1 w=41.21e-6 l=600n nf=1 as=18.1324e-12 ad=18.1324e-12 ++ nfet_05v0_dn m=1 w=41.21e-6 l=600n nf=1 as=18.1324e-12 ad=18.1324e-12 + ps=83.3e-6 pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D + I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! -+ nmos_5p0_dw m=1 w=34.345e-6 l=600n nf=1 as=15.1118e-12 ad=15.1118e-12 ++ nfet_05v0_dn m=1 w=34.345e-6 l=600n nf=1 as=15.1118e-12 ad=15.1118e-12 + ps=69.57e-6 pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D + I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! -+ nmos_5p0_dw m=1 w=28.62e-6 l=600n nf=1 as=12.5928e-12 ad=12.5928e-12 ++ nfet_05v0_dn m=1 w=28.62e-6 l=600n nf=1 as=12.5928e-12 ad=12.5928e-12 + ps=58.12e-6 pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D + I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! -+ nmos_5p0_dw m=1 w=23.85e-6 l=600n nf=1 as=10.494e-12 ad=10.494e-12 ++ nfet_05v0_dn m=1 w=23.85e-6 l=600n nf=1 as=10.494e-12 ad=10.494e-12 + ps=48.58e-6 pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D + I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! -+ nmos_5p0_dw m=1 w=19.875e-6 l=600n nf=1 as=8.745e-12 ad=8.745e-12 ++ nfet_05v0_dn m=1 w=19.875e-6 l=600n nf=1 as=8.745e-12 ad=8.745e-12 + ps=40.63e-6 pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D + I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! -+ nmos_5p0_dw m=1 w=16.56e-6 l=600n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 ++ nfet_05v0_dn m=1 w=16.56e-6 l=600n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 + pd=34e-6 nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D + I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! -+ nmos_5p0_dw m=1 w=13.8e-6 l=600n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 ++ nfet_05v0_dn m=1 w=13.8e-6 l=600n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 + pd=28.48e-6 nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D + I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! -+ nmos_5p0_dw m=1 w=11.5e-6 l=600n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 ++ nfet_05v0_dn m=1 w=11.5e-6 l=600n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 + pd=23.88e-6 nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D + I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! -+ nmos_5p0_dw m=1 w=9.585e-6 l=600n nf=1 as=4.2174e-12 ad=4.2174e-12 ++ nfet_05v0_dn m=1 w=9.585e-6 l=600n nf=1 as=4.2174e-12 ad=4.2174e-12 + ps=20.05e-6 pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D + I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! -+ nmos_5p0_dw m=1 w=7.985e-6 l=600n nf=1 as=3.5134e-12 ad=3.5134e-12 ++ nfet_05v0_dn m=1 w=7.985e-6 l=600n nf=1 as=3.5134e-12 ad=3.5134e-12 + ps=16.85e-6 pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D + I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! -+ nmos_5p0_dw m=1 w=6.655e-6 l=600n nf=1 as=2.9282e-12 ad=2.9282e-12 ++ nfet_05v0_dn m=1 w=6.655e-6 l=600n nf=1 as=2.9282e-12 ad=2.9282e-12 + ps=14.19e-6 pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D + I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! -+ nmos_5p0_dw m=1 w=5.545e-6 l=600n nf=1 as=2.4398e-12 ad=2.4398e-12 ++ nfet_05v0_dn m=1 w=5.545e-6 l=600n nf=1 as=2.4398e-12 ad=2.4398e-12 + ps=11.97e-6 pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D + I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! -+ nmos_5p0_dw m=1 w=4.62e-6 l=600n nf=1 as=2.0328e-12 ad=2.0328e-12 ++ nfet_05v0_dn m=1 w=4.62e-6 l=600n nf=1 as=2.0328e-12 ad=2.0328e-12 + ps=10.12e-6 pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D + I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! -+ nmos_5p0_dw m=1 w=3.85e-6 l=600n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 ++ nfet_05v0_dn m=1 w=3.85e-6 l=600n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 + pd=8.58e-6 nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D + I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! -+ nmos_5p0_dw m=1 w=3.21e-6 l=600n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 ++ nfet_05v0_dn m=1 w=3.21e-6 l=600n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 + pd=7.3e-6 nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D + I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! -+ nmos_5p0_dw m=1 w=2.675e-6 l=600n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 ++ nfet_05v0_dn m=1 w=2.675e-6 l=600n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 + pd=6.23e-6 nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D + I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! -+ nmos_5p0_dw m=1 w=2.23e-6 l=600n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 ++ nfet_05v0_dn m=1 w=2.23e-6 l=600n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 + pd=5.34e-6 nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D + I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! -+ nmos_5p0_dw m=1 w=1.86e-6 l=600n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 ++ nfet_05v0_dn m=1 w=1.86e-6 l=600n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 + pd=4.6e-6 nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nfet_05v0_dn + m=1 w=1.55e-6 l=600n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nfet_05v0_dn + m=1 w=1.29e-6 l=600n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nfet_05v0_dn + m=1 w=1.075e-6 l=600n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nfet_05v0_dn + m=1 w=895e-9 l=600n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nfet_05v0_dn + m=1 w=745e-9 l=600n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nfet_05v0_dn + m=1 w=620e-9 l=600n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nfet_05v0_dn + m=1 w=520e-9 l=600n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nfet_05v0_dn + m=1 w=430e-9 l=600n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nfet_05v0_dn + m=1 w=300e-9 l=600n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S vdd! nmos_5p0_dw m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_25_R0_S vdd! nfet_05v0_dn m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=47.700u nf=1 ++ I1_lin_default_l_24_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=47.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=39.750u nf=1 ++ I1_lin_default_l_23_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=39.750u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=33.125u nf=1 ++ I1_lin_default_l_22_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=33.125u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=27.605u nf=1 ++ I1_lin_default_l_21_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=27.605u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=23.005u nf=1 ++ I1_lin_default_l_20_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=23.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=19.170u nf=1 ++ I1_lin_default_l_19_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=19.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=15.975u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=15.975u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=13.310u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=13.310u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=11.095u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=11.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=9.245u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=9.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=7.705u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=7.705u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=6.420u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=6.420u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=5.350u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=5.350u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=4.460u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=4.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=3.715u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=3.715u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=3.095u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=3.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=2.580u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=2.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=2.150u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=2.150u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=1.790u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=1.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=1.495u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=1.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=1.245u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=1.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=1.035u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=1.035u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=0.865u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=0.865u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=0.720u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=0.720u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=0.600u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=0.600u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_5p0_dw m=1 w=36e-6 l=600n nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_05v0_dn m=1 w=36e-6 l=600n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_5p0_dw m=1 w=18.36e-6 l=600n nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_05v0_dn m=1 w=18.36e-6 l=600n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 ++ I1_lin_default_nf_0_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_5p0_dw m=100 w=360e-9 l=600n nf=1 ++ I1_lin_default_m_2_R0_S vdd! nfet_05v0_dn m=100 w=360e-9 l=600n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_5p0_dw m=51 w=360e-9 l=600n nf=1 ++ I1_lin_default_m_1_R0_S vdd! nfet_05v0_dn m=51 w=360e-9 l=600n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 ++ I1_lin_default_m_0_R0_S vdd! nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_5p0_dw m=1 w=720e-9 l=600n nf=2 as=316.8e-15 ad=187.2e-15 ++ vdd! nfet_05v0_dn m=1 w=720e-9 l=600n nf=2 as=316.8e-15 ad=187.2e-15 + ps=3.2e-6 pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u + dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_5p0_dw m=1 w=900e-9 l=600n nf=3 as=529.2e-15 ad=529.2e-15 ++ vdd! nfet_05v0_dn m=1 w=900e-9 l=600n nf=3 as=529.2e-15 ad=529.2e-15 + ps=4.68e-6 pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u + sd=0.960u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_5p0_dw m=1 w=1.08e-6 l=600n nf=3 as=345.6e-15 ad=345.6e-15 ++ vdd! nfet_05v0_dn m=1 w=1.08e-6 l=600n nf=3 as=345.6e-15 ad=345.6e-15 + ps=3.36e-6 pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D + I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! -+ nmos_5p0_dw m=1 w=16.08e-6 l=600n nf=3 as=5.1456e-12 ad=5.1456e-12 ++ nfet_05v0_dn m=1 w=16.08e-6 l=600n nf=3 as=5.1456e-12 ad=5.1456e-12 + ps=23.36e-6 pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D + I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D + I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nfet_05v0_dn + m=1 w=26.8e-6 l=600n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nfet_05v0_dn + m=1 w=16.8e-6 l=600n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 + pd=23.12e-6 nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_05v0_dn + m=1 w=10.08e-6 l=600n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_05v0_dn + m=1 w=6.72e-6 l=600n nf=2 as=1.7472e-12 ad=2.9568e-12 ps=7.76e-6 pd=15.2e-6 + nrd=0.065476 nrs=0.038690 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_05v0_dn + m=1 w=6.72e-6 l=600n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nfet_05v0_dn + m=1 w=10.08e-6 l=600n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D + I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_5p0_dw ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_05v0_dn + m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_5p0_dw m=1 w=25.08e-6 l=600n nf=3 as=8.0256e-12 ad=8.0256e-12 ++ nfet_05v0_dn m=1 w=25.08e-6 l=600n nf=3 as=8.0256e-12 ad=8.0256e-12 + ps=35.36e-6 pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_5p0_dw m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_05v0_dn m=1 w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_5p0_dw m=1 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_05v0_dn m=1 + w=360e-9 l=600n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn_dss.src.cdl similarity index 84% rename from rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn_dss.src.cdl index 6b87c2e1..1e9317fa 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_5p0_dw_sab +* Top Cell Name: sample_nfet_05v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:40:15 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_5p0_dw_sab +* Cell Name: sample_nfet_05v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_5p0_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_05v0_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -183,180 +183,180 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_5p0_dw_sab m=1 w=720.000u l=0.8u nf=12 ++ I1_lin_default_wf_7_R0_S vdd! nfet_05v0_dn_dss m=1 w=720.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_5p0_dw_sab m=1 w=716.640u l=0.8u nf=12 ++ I1_lin_default_wf_6_R0_S vdd! nfet_05v0_dn_dss m=1 w=716.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_5p0_dw_sab m=1 w=597.180u l=0.8u nf=12 ++ I1_lin_default_wf_5_R0_S vdd! nfet_05v0_dn_dss m=1 w=597.180u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_5p0_dw_sab m=1 w=497.640u l=0.8u nf=12 ++ I1_lin_default_wf_4_R0_S vdd! nfet_05v0_dn_dss m=1 w=497.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_5p0_dw_sab m=1 w=414.720u l=0.8u nf=12 ++ I1_lin_default_wf_3_R0_S vdd! nfet_05v0_dn_dss m=1 w=414.720u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_5p0_dw_sab m=1 w=345.600u l=0.8u nf=12 ++ I1_lin_default_wf_2_R0_S vdd! nfet_05v0_dn_dss m=1 w=345.600u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_5p0_dw_sab m=1 w=288.000u l=0.8u nf=12 ++ I1_lin_default_wf_1_R0_S vdd! nfet_05v0_dn_dss m=1 w=288.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_5p0_dw_sab m=1 w=240.000u l=0.8u nf=12 ++ I1_lin_default_wf_0_R0_S vdd! nfet_05v0_dn_dss m=1 w=240.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=10.000u nf=12 ++ I1_lin_default_l_14_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=10.000u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=8.560u nf=12 ++ I1_lin_default_l_13_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=8.560u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=7.135u nf=12 ++ I1_lin_default_l_12_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=7.135u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=5.945u nf=12 ++ I1_lin_default_l_11_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=5.945u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=4.955u nf=12 ++ I1_lin_default_l_10_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=4.955u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=4.130u nf=12 ++ I1_lin_default_l_9_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=4.130u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=3.440u nf=12 ++ I1_lin_default_l_8_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=3.440u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=2.865u nf=12 ++ I1_lin_default_l_7_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=2.865u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=2.390u nf=12 ++ I1_lin_default_l_6_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=2.390u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=1.990u nf=12 ++ I1_lin_default_l_5_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=1.990u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=1.660u nf=12 ++ I1_lin_default_l_4_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=1.660u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=1.380u nf=12 ++ I1_lin_default_l_3_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=1.380u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=1.150u nf=12 ++ I1_lin_default_l_2_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=1.150u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=0.960u nf=12 ++ I1_lin_default_l_1_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=0.960u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=0.800u nf=12 ++ I1_lin_default_l_0_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=0.800u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_5p0_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_05v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S vdd! nmos_5p0_dw_sab m=1 w=450.000u l=0.8u nf=18 ++ I1_lin_default_nf_8_R0_S vdd! nfet_05v0_dn_dss m=1 w=450.000u l=0.8u nf=18 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_5p0_dw_sab m=1 w=400.000u l=0.8u nf=16 ++ I1_lin_default_nf_7_R0_S vdd! nfet_05v0_dn_dss m=1 w=400.000u l=0.8u nf=16 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_5p0_dw_sab m=1 w=350.000u l=0.8u nf=14 ++ I1_lin_default_nf_6_R0_S vdd! nfet_05v0_dn_dss m=1 w=350.000u l=0.8u nf=14 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_5p0_dw_sab m=1 w=300.000u l=0.8u nf=12 ++ I1_lin_default_nf_5_R0_S vdd! nfet_05v0_dn_dss m=1 w=300.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_5p0_dw_sab m=1 w=250.000u l=0.8u nf=10 ++ I1_lin_default_nf_4_R0_S vdd! nfet_05v0_dn_dss m=1 w=250.000u l=0.8u nf=10 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_5p0_dw_sab m=1 w=200.000u l=0.8u nf=8 ++ I1_lin_default_nf_3_R0_S vdd! nfet_05v0_dn_dss m=1 w=200.000u l=0.8u nf=8 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_5p0_dw_sab m=1 w=150.000u l=0.8u nf=6 ++ I1_lin_default_nf_2_R0_S vdd! nfet_05v0_dn_dss m=1 w=150.000u l=0.8u nf=6 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_5p0_dw_sab m=1 w=100.000u l=0.8u nf=4 ++ I1_lin_default_nf_1_R0_S vdd! nfet_05v0_dn_dss m=1 w=100.000u l=0.8u nf=4 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_5p0_dw_sab m=3 w=300u l=0.8u nf=12 ++ I1_lin_default_m_2_R0_S vdd! nfet_05v0_dn_dss m=3 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_5p0_dw_sab m=2 w=300u l=0.8u nf=12 ++ I1_lin_default_m_1_R0_S vdd! nfet_05v0_dn_dss m=2 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_m_0_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_1_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0 d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S vdd! nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_0_R0_S vdd! nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D + I1_lin_default_guardRing_1_R0_G I1_lin_default_guardRing_1_R0_S vdd! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S vdd! -+ nmos_5p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_5p0_dw_sab m=1 ++ nfet_05v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_05v0_dn_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_nmos_5p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dss.src.cdl index 9c4156ef..725ecb57 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_5p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_05v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_5p0_sab +* Top Cell Name: sample_nfet_05v0_dss * View Name: schematic * Netlisted on: Sep 10 16:41:40 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_5p0_sab +* Cell Name: sample_nfet_05v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_5p0_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_05v0_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -177,174 +177,174 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_5p0_sab m=1 w=720.000u l=0.8u nf=12 ++ I1_lin_default_wf_7_R0_S vdd! nfet_05v0_dss m=1 w=720.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_5p0_sab m=1 w=716.640u l=0.8u nf=12 ++ I1_lin_default_wf_6_R0_S vdd! nfet_05v0_dss m=1 w=716.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_5p0_sab m=1 w=597.180u l=0.8u nf=12 ++ I1_lin_default_wf_5_R0_S vdd! nfet_05v0_dss m=1 w=597.180u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_5p0_sab m=1 w=497.640u l=0.8u nf=12 ++ I1_lin_default_wf_4_R0_S vdd! nfet_05v0_dss m=1 w=497.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_5p0_sab m=1 w=414.720u l=0.8u nf=12 ++ I1_lin_default_wf_3_R0_S vdd! nfet_05v0_dss m=1 w=414.720u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_5p0_sab m=1 w=345.600u l=0.8u nf=12 ++ I1_lin_default_wf_2_R0_S vdd! nfet_05v0_dss m=1 w=345.600u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_5p0_sab m=1 w=288.000u l=0.8u nf=12 ++ I1_lin_default_wf_1_R0_S vdd! nfet_05v0_dss m=1 w=288.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_5p0_sab m=1 w=240.000u l=0.8u nf=12 ++ I1_lin_default_wf_0_R0_S vdd! nfet_05v0_dss m=1 w=240.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_5p0_sab m=1 w=300u l=10.000u nf=12 ++ I1_lin_default_l_14_R0_S vdd! nfet_05v0_dss m=1 w=300u l=10.000u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_5p0_sab m=1 w=300u l=8.560u nf=12 ++ I1_lin_default_l_13_R0_S vdd! nfet_05v0_dss m=1 w=300u l=8.560u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_5p0_sab m=1 w=300u l=7.135u nf=12 ++ I1_lin_default_l_12_R0_S vdd! nfet_05v0_dss m=1 w=300u l=7.135u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_5p0_sab m=1 w=300u l=5.945u nf=12 ++ I1_lin_default_l_11_R0_S vdd! nfet_05v0_dss m=1 w=300u l=5.945u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_5p0_sab m=1 w=300u l=4.955u nf=12 ++ I1_lin_default_l_10_R0_S vdd! nfet_05v0_dss m=1 w=300u l=4.955u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_5p0_sab m=1 w=300u l=4.130u nf=12 ++ I1_lin_default_l_9_R0_S vdd! nfet_05v0_dss m=1 w=300u l=4.130u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_5p0_sab m=1 w=300u l=3.440u nf=12 ++ I1_lin_default_l_8_R0_S vdd! nfet_05v0_dss m=1 w=300u l=3.440u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_5p0_sab m=1 w=300u l=2.865u nf=12 ++ I1_lin_default_l_7_R0_S vdd! nfet_05v0_dss m=1 w=300u l=2.865u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_5p0_sab m=1 w=300u l=2.390u nf=12 ++ I1_lin_default_l_6_R0_S vdd! nfet_05v0_dss m=1 w=300u l=2.390u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_5p0_sab m=1 w=300u l=1.990u nf=12 ++ I1_lin_default_l_5_R0_S vdd! nfet_05v0_dss m=1 w=300u l=1.990u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_5p0_sab m=1 w=300u l=1.660u nf=12 ++ I1_lin_default_l_4_R0_S vdd! nfet_05v0_dss m=1 w=300u l=1.660u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_5p0_sab m=1 w=300u l=1.380u nf=12 ++ I1_lin_default_l_3_R0_S vdd! nfet_05v0_dss m=1 w=300u l=1.380u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_5p0_sab m=1 w=300u l=1.150u nf=12 ++ I1_lin_default_l_2_R0_S vdd! nfet_05v0_dss m=1 w=300u l=1.150u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_5p0_sab m=1 w=300u l=0.960u nf=12 ++ I1_lin_default_l_1_R0_S vdd! nfet_05v0_dss m=1 w=300u l=0.960u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_5p0_sab m=1 w=300u l=0.800u nf=12 ++ I1_lin_default_l_0_R0_S vdd! nfet_05v0_dss m=1 w=300u l=0.800u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_5p0_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_05v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S vdd! nmos_5p0_sab m=1 w=450.000u l=0.8u nf=18 ++ I1_lin_default_nf_8_R0_S vdd! nfet_05v0_dss m=1 w=450.000u l=0.8u nf=18 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_5p0_sab m=1 w=400.000u l=0.8u nf=16 ++ I1_lin_default_nf_7_R0_S vdd! nfet_05v0_dss m=1 w=400.000u l=0.8u nf=16 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_5p0_sab m=1 w=350.000u l=0.8u nf=14 ++ I1_lin_default_nf_6_R0_S vdd! nfet_05v0_dss m=1 w=350.000u l=0.8u nf=14 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_5p0_sab m=1 w=300.000u l=0.8u nf=12 ++ I1_lin_default_nf_5_R0_S vdd! nfet_05v0_dss m=1 w=300.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_5p0_sab m=1 w=250.000u l=0.8u nf=10 ++ I1_lin_default_nf_4_R0_S vdd! nfet_05v0_dss m=1 w=250.000u l=0.8u nf=10 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_5p0_sab m=1 w=200.000u l=0.8u nf=8 ++ I1_lin_default_nf_3_R0_S vdd! nfet_05v0_dss m=1 w=200.000u l=0.8u nf=8 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_5p0_sab m=1 w=150.000u l=0.8u nf=6 ++ I1_lin_default_nf_2_R0_S vdd! nfet_05v0_dss m=1 w=150.000u l=0.8u nf=6 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_5p0_sab m=1 w=100.000u l=0.8u nf=4 ++ I1_lin_default_nf_1_R0_S vdd! nfet_05v0_dss m=1 w=100.000u l=0.8u nf=4 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_5p0_sab m=3 w=300u l=0.8u nf=12 ++ I1_lin_default_m_2_R0_S vdd! nfet_05v0_dss m=3 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_5p0_sab m=2 w=300u l=0.8u nf=12 ++ I1_lin_default_m_1_R0_S vdd! nfet_05v0_dss m=2 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_5p0_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_m_0_R0_S vdd! nfet_05v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S vdd! nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0 ++ I1_lin_default_gns_1_R0_S vdd! nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0 + d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S vdd! nmos_5p0_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_0_R0_S vdd! nfet_05v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_5p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_5p0_sab m=1 ++ nfet_05v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_05v0_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_nmos_6p0.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_06v0.src.cdl index ece4d3a1..6ad0d665 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_6p0 +* Top Cell Name: sample_nfet_06v0 * View Name: schematic * Netlisted on: Sep 10 16:42:59 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_6p0 +* Cell Name: sample_nfet_06v0 * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_6p0 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_06v0 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -307,401 +307,401 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MMN0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S vdd! nmos_6p0 m=1 w=16.8e-6 l=700n nf=5 ++ I1_lin_default_sFirst_0_R0_S vdd! nfet_06v0 m=1 w=16.8e-6 l=700n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! nfet_06v0 + m=1 w=1e-3 l=700n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 pd=1.0052e-3 + nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! nfet_06v0 + m=1 w=85.455e-6 l=700n nf=1 as=37.6002e-12 ad=37.6002e-12 ps=171.79e-6 + pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! nfet_06v0 + m=1 w=71.215e-6 l=700n nf=1 as=31.3346e-12 ad=31.3346e-12 ps=143.31e-6 + pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! nfet_06v0 + m=1 w=59.345e-6 l=700n nf=1 as=26.1118e-12 ad=26.1118e-12 ps=119.57e-6 + pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! nfet_06v0 + m=1 w=49.455e-6 l=700n nf=1 as=21.7602e-12 ad=21.7602e-12 ps=99.79e-6 + pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! nfet_06v0 + m=1 w=41.21e-6 l=700n nf=1 as=18.1324e-12 ad=18.1324e-12 ps=83.3e-6 + pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! nfet_06v0 + m=1 w=34.345e-6 l=700n nf=1 as=15.1118e-12 ad=15.1118e-12 ps=69.57e-6 + pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! nfet_06v0 + m=1 w=28.62e-6 l=700n nf=1 as=12.5928e-12 ad=12.5928e-12 ps=58.12e-6 + pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! nfet_06v0 + m=1 w=23.85e-6 l=700n nf=1 as=10.494e-12 ad=10.494e-12 ps=48.58e-6 + pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! nfet_06v0 + m=1 w=19.875e-6 l=700n nf=1 as=8.745e-12 ad=8.745e-12 ps=40.63e-6 + pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! nfet_06v0 + m=1 w=16.56e-6 l=700n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 pd=34e-6 + nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! nfet_06v0 + m=1 w=13.8e-6 l=700n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 pd=28.48e-6 + nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! nfet_06v0 + m=1 w=11.5e-6 l=700n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 pd=23.88e-6 + nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! nfet_06v0 + m=1 w=9.585e-6 l=700n nf=1 as=4.2174e-12 ad=4.2174e-12 ps=20.05e-6 + pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! nfet_06v0 + m=1 w=7.985e-6 l=700n nf=1 as=3.5134e-12 ad=3.5134e-12 ps=16.85e-6 + pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! nfet_06v0 + m=1 w=6.655e-6 l=700n nf=1 as=2.9282e-12 ad=2.9282e-12 ps=14.19e-6 + pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! nfet_06v0 + m=1 w=5.545e-6 l=700n nf=1 as=2.4398e-12 ad=2.4398e-12 ps=11.97e-6 + pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! nfet_06v0 + m=1 w=4.62e-6 l=700n nf=1 as=2.0328e-12 ad=2.0328e-12 ps=10.12e-6 + pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! nfet_06v0 + m=1 w=3.85e-6 l=700n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 pd=8.58e-6 + nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! nfet_06v0 + m=1 w=3.21e-6 l=700n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 pd=7.3e-6 + nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! nfet_06v0 + m=1 w=2.675e-6 l=700n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 pd=6.23e-6 + nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! nfet_06v0 + m=1 w=2.23e-6 l=700n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 pd=5.34e-6 + nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! nfet_06v0 + m=1 w=1.86e-6 l=700n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 pd=4.6e-6 + nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nfet_06v0 + m=1 w=1.55e-6 l=700n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nfet_06v0 + m=1 w=1.29e-6 l=700n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nfet_06v0 + m=1 w=1.075e-6 l=700n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nfet_06v0 + m=1 w=895e-9 l=700n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nfet_06v0 + m=1 w=745e-9 l=700n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nfet_06v0 + m=1 w=620e-9 l=700n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nfet_06v0 + m=1 w=520e-9 l=700n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nfet_06v0 + m=1 w=430e-9 l=700n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nfet_06v0 + m=1 w=300e-9 l=700n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S vdd! nmos_6p0 m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_24_R0_S vdd! nfet_06v0 m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=46.375u nf=1 ++ I1_lin_default_l_23_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=46.375u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=38.645u nf=1 ++ I1_lin_default_l_22_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=38.645u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=32.205u nf=1 ++ I1_lin_default_l_21_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=32.205u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=26.835u nf=1 ++ I1_lin_default_l_20_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=26.835u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=22.365u nf=1 ++ I1_lin_default_l_19_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=22.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=18.635u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=18.635u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=15.530u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=15.530u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=12.940u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=12.940u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=10.785u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=10.785u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=8.985u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=8.985u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=7.490u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=7.490u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=6.240u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=6.240u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=5.200u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=5.200u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=4.335u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=4.335u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=3.610u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=3.610u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=3.010u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=3.010u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=2.510u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=2.510u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=2.090u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=2.090u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=1.740u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=1.740u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=1.450u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=1.450u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=1.210u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=1.210u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=1.010u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=1.010u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=0.840u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=0.840u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=0.700u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=0.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_6p0 m=1 w=66e-6 l=700n nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_06v0 m=1 w=66e-6 l=700n nf=100 + as=17.3976e-12 ad=17.16e-12 ps=120.04e-6 pd=118e-6 nrd=0.003939 nrs=0.003994 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_6p0 m=1 w=28.56e-6 l=700n nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_06v0 m=1 w=28.56e-6 l=700n nf=51 + as=7.5264e-12 ad=7.5264e-12 ps=56e-6 pd=56e-6 nrd=0.009227 nrs=0.009227 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_6p0 m=100 w=360e-9 l=700n nf=1 ++ I1_lin_default_m_2_R0_S vdd! nfet_06v0 m=100 w=360e-9 l=700n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_6p0 m=51 w=360e-9 l=700n nf=1 as=158.4e-15 ++ I1_lin_default_m_1_R0_S vdd! nfet_06v0 m=51 w=360e-9 l=700n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S vdd! nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_6p0 m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 ++ vdd! nfet_06v0 m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 + pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_6p0 m=1 w=900e-9 l=700n nf=3 as=529.2e-15 ad=529.2e-15 ps=4.68e-6 ++ vdd! nfet_06v0 m=1 w=900e-9 l=700n nf=3 as=529.2e-15 ad=529.2e-15 ps=4.68e-6 + pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u sd=0.960u dtemp=0 + par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_6p0 m=1 w=1.08e-6 l=700n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 ++ vdd! nfet_06v0 m=1 w=1.08e-6 l=700n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 + pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nmos_6p0 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! nfet_06v0 + m=1 w=16.08e-6 l=700n nf=3 as=5.1456e-12 ad=5.1456e-12 ps=23.36e-6 + pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nmos_6p0 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nfet_06v0 + m=1 w=26.8e-6 l=700n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nmos_6p0 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nfet_06v0 m=1 + w=16.8e-6 l=700n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_6p0 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_06v0 m=1 + w=10.08e-6 l=700n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 pd=15.36e-6 + nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_6p0 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_06v0 m=1 + w=6.72e-6 l=700n nf=2 as=1.7472e-12 ad=2.9568e-12 ps=7.76e-6 pd=15.2e-6 + nrd=0.065476 nrs=0.038690 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_6p0 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_06v0 m=1 + w=6.72e-6 l=700n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nmos_6p0 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nfet_06v0 + m=1 w=10.08e-6 l=700n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nfet_06v0 + m=1 w=10.08e-6 l=700n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nmos_6p0 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! nfet_06v0 + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_6p0 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_06v0 m=1 + w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_6p0 m=1 w=25.08e-6 l=700n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 ++ nfet_06v0 m=1 w=25.08e-6 l=700n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 + pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_6p0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0 m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_6p0 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_06v0 m=1 w=360e-9 + l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn.src.cdl similarity index 87% rename from rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn.src.cdl index 3fec8b47..5766ac3d 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_6p0_dw +* Top Cell Name: sample_nfet_06v0_dn * View Name: schematic * Netlisted on: Sep 10 16:44:16 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_6p0_dw +* Cell Name: sample_nfet_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_6p0_dw I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_06v0_dn I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -296,438 +296,438 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MMN10 I1_lin_default_sdWidth_9_R0_D I1_lin_default_sdWidth_9_R0_G -+ I1_lin_default_sdWidth_9_R0_S vdd! nmos_6p0_dw m=1 w=26.8e-6 l=700n nf=5 ++ I1_lin_default_sdWidth_9_R0_S vdd! nfet_06v0_dn m=1 w=26.8e-6 l=700n nf=5 + as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 pd=39.74e-6 nrd=0.028284 + nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 par=1 MMN9 I1_lin_default_sdWidth_8_R0_D I1_lin_default_sdWidth_8_R0_G -+ I1_lin_default_sdWidth_8_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_8_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 nrd=3.333333 nrs=3.333333 + sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MMN8 I1_lin_default_sdWidth_7_R0_D I1_lin_default_sdWidth_7_R0_G -+ I1_lin_default_sdWidth_7_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_7_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 nrd=2.875000 nrs=2.875000 + sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MMN7 I1_lin_default_sdWidth_6_R0_D I1_lin_default_sdWidth_6_R0_G -+ I1_lin_default_sdWidth_6_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_6_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 nrd=2.486111 nrs=2.486111 + sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MMN6 I1_lin_default_sdWidth_5_R0_D I1_lin_default_sdWidth_5_R0_G -+ I1_lin_default_sdWidth_5_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_5_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 nrd=2.166667 nrs=2.166667 + sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MMN5 I1_lin_default_sdWidth_4_R0_D I1_lin_default_sdWidth_4_R0_G -+ I1_lin_default_sdWidth_4_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_4_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 nrd=1.902778 nrs=1.902778 + sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_6p0_dw m=1 w=16.08e-6 l=700n nf=3 as=5.1456e-12 ad=5.1456e-12 ++ nfet_06v0_dn m=1 w=16.08e-6 l=700n nf=3 as=5.1456e-12 ad=5.1456e-12 + ps=23.36e-6 pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MMN4 I1_lin_default_sdWidth_3_R0_D I1_lin_default_sdWidth_3_R0_G -+ I1_lin_default_sdWidth_3_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_3_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 nrd=1.680556 nrs=1.680556 + sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_6p0_dw m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ++ vdd! nfet_06v0_dn m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 + ps=3.2e-6 pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u + dtemp=0 par=1 MMN3 I1_lin_default_sdWidth_2_R0_D I1_lin_default_sdWidth_2_R0_G -+ I1_lin_default_sdWidth_2_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_2_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 nrd=1.500000 nrs=1.500000 + sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_06v0_dn + m=1 w=10.08e-6 l=700n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_6p0_dw m=1 w=900e-9 l=700n nf=3 as=529.2e-15 ad=529.2e-15 ++ vdd! nfet_06v0_dn m=1 w=900e-9 l=700n nf=3 as=529.2e-15 ad=529.2e-15 + ps=4.68e-6 pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u + sd=0.960u dtemp=0 par=1 MMN2 I1_lin_default_sdWidth_1_R0_D I1_lin_default_sdWidth_1_R0_G -+ I1_lin_default_sdWidth_1_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_1_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 nrd=1.347222 nrs=1.347222 + sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_06v0_dn + m=1 w=6.72e-6 l=700n nf=2 as=1.7472e-12 ad=2.9568e-12 ps=7.76e-6 pd=15.2e-6 + nrd=0.065476 nrs=0.038690 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! nfet_06v0_dn + m=1 w=10.08e-6 l=700n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_6p0_dw m=1 w=1.08e-6 l=700n nf=3 as=345.6e-15 ad=345.6e-15 ++ vdd! nfet_06v0_dn m=1 w=1.08e-6 l=700n nf=3 as=345.6e-15 ad=345.6e-15 + ps=3.36e-6 pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MMN1 I1_lin_default_sdWidth_0_R0_D I1_lin_default_sdWidth_0_R0_G -+ I1_lin_default_sdWidth_0_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_sdWidth_0_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_06v0_dn + m=1 w=6.72e-6 l=700n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D + I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MMN0 I1_default_D I1_default_G I1_default_S vdd! nmos_6p0_dw m=1 w=360e-9 +MMN0 I1_default_D I1_default_G I1_default_S vdd! nfet_06v0_dn m=1 w=360e-9 + l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D + I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S vdd! -+ nmos_6p0_dw m=1 w=1e-3 l=700n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 ++ nfet_06v0_dn m=1 w=1e-3 l=700n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 + pd=1.0052e-3 nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D + I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S vdd! -+ nmos_6p0_dw m=1 w=85.455e-6 l=700n nf=1 as=37.6002e-12 ad=37.6002e-12 ++ nfet_06v0_dn m=1 w=85.455e-6 l=700n nf=1 as=37.6002e-12 ad=37.6002e-12 + ps=171.79e-6 pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D + I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S vdd! -+ nmos_6p0_dw m=1 w=71.215e-6 l=700n nf=1 as=31.3346e-12 ad=31.3346e-12 ++ nfet_06v0_dn m=1 w=71.215e-6 l=700n nf=1 as=31.3346e-12 ad=31.3346e-12 + ps=143.31e-6 pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D + I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S vdd! -+ nmos_6p0_dw m=1 w=59.345e-6 l=700n nf=1 as=26.1118e-12 ad=26.1118e-12 ++ nfet_06v0_dn m=1 w=59.345e-6 l=700n nf=1 as=26.1118e-12 ad=26.1118e-12 + ps=119.57e-6 pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D + I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S vdd! -+ nmos_6p0_dw m=1 w=49.455e-6 l=700n nf=1 as=21.7602e-12 ad=21.7602e-12 ++ nfet_06v0_dn m=1 w=49.455e-6 l=700n nf=1 as=21.7602e-12 ad=21.7602e-12 + ps=99.79e-6 pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D + I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! -+ nmos_6p0_dw m=1 w=41.21e-6 l=700n nf=1 as=18.1324e-12 ad=18.1324e-12 ++ nfet_06v0_dn m=1 w=41.21e-6 l=700n nf=1 as=18.1324e-12 ad=18.1324e-12 + ps=83.3e-6 pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D + I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! -+ nmos_6p0_dw m=1 w=34.345e-6 l=700n nf=1 as=15.1118e-12 ad=15.1118e-12 ++ nfet_06v0_dn m=1 w=34.345e-6 l=700n nf=1 as=15.1118e-12 ad=15.1118e-12 + ps=69.57e-6 pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D + I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! -+ nmos_6p0_dw m=1 w=28.62e-6 l=700n nf=1 as=12.5928e-12 ad=12.5928e-12 ++ nfet_06v0_dn m=1 w=28.62e-6 l=700n nf=1 as=12.5928e-12 ad=12.5928e-12 + ps=58.12e-6 pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D + I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! -+ nmos_6p0_dw m=1 w=23.85e-6 l=700n nf=1 as=10.494e-12 ad=10.494e-12 ++ nfet_06v0_dn m=1 w=23.85e-6 l=700n nf=1 as=10.494e-12 ad=10.494e-12 + ps=48.58e-6 pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D + I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! -+ nmos_6p0_dw m=1 w=19.875e-6 l=700n nf=1 as=8.745e-12 ad=8.745e-12 ++ nfet_06v0_dn m=1 w=19.875e-6 l=700n nf=1 as=8.745e-12 ad=8.745e-12 + ps=40.63e-6 pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D + I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! -+ nmos_6p0_dw m=1 w=16.56e-6 l=700n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 ++ nfet_06v0_dn m=1 w=16.56e-6 l=700n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 + pd=34e-6 nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D + I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! -+ nmos_6p0_dw m=1 w=13.8e-6 l=700n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 ++ nfet_06v0_dn m=1 w=13.8e-6 l=700n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 + pd=28.48e-6 nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D + I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! -+ nmos_6p0_dw m=1 w=11.5e-6 l=700n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 ++ nfet_06v0_dn m=1 w=11.5e-6 l=700n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 + pd=23.88e-6 nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D + I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! -+ nmos_6p0_dw m=1 w=9.585e-6 l=700n nf=1 as=4.2174e-12 ad=4.2174e-12 ++ nfet_06v0_dn m=1 w=9.585e-6 l=700n nf=1 as=4.2174e-12 ad=4.2174e-12 + ps=20.05e-6 pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D + I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! -+ nmos_6p0_dw m=1 w=7.985e-6 l=700n nf=1 as=3.5134e-12 ad=3.5134e-12 ++ nfet_06v0_dn m=1 w=7.985e-6 l=700n nf=1 as=3.5134e-12 ad=3.5134e-12 + ps=16.85e-6 pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D + I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! -+ nmos_6p0_dw m=1 w=6.655e-6 l=700n nf=1 as=2.9282e-12 ad=2.9282e-12 ++ nfet_06v0_dn m=1 w=6.655e-6 l=700n nf=1 as=2.9282e-12 ad=2.9282e-12 + ps=14.19e-6 pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D + I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! -+ nmos_6p0_dw m=1 w=5.545e-6 l=700n nf=1 as=2.4398e-12 ad=2.4398e-12 ++ nfet_06v0_dn m=1 w=5.545e-6 l=700n nf=1 as=2.4398e-12 ad=2.4398e-12 + ps=11.97e-6 pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D + I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! -+ nmos_6p0_dw m=1 w=4.62e-6 l=700n nf=1 as=2.0328e-12 ad=2.0328e-12 ++ nfet_06v0_dn m=1 w=4.62e-6 l=700n nf=1 as=2.0328e-12 ad=2.0328e-12 + ps=10.12e-6 pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D + I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! -+ nmos_6p0_dw m=1 w=3.85e-6 l=700n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 ++ nfet_06v0_dn m=1 w=3.85e-6 l=700n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 + pd=8.58e-6 nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D + I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! -+ nmos_6p0_dw m=1 w=3.21e-6 l=700n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 ++ nfet_06v0_dn m=1 w=3.21e-6 l=700n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 + pd=7.3e-6 nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D + I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! -+ nmos_6p0_dw m=1 w=2.675e-6 l=700n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 ++ nfet_06v0_dn m=1 w=2.675e-6 l=700n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 + pd=6.23e-6 nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D + I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! -+ nmos_6p0_dw m=1 w=2.23e-6 l=700n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 ++ nfet_06v0_dn m=1 w=2.23e-6 l=700n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 + pd=5.34e-6 nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D + I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! -+ nmos_6p0_dw m=1 w=1.86e-6 l=700n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 ++ nfet_06v0_dn m=1 w=1.86e-6 l=700n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 + pd=4.6e-6 nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! nfet_06v0_dn + m=1 w=1.55e-6 l=700n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! nfet_06v0_dn + m=1 w=1.29e-6 l=700n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! nfet_06v0_dn + m=1 w=1.075e-6 l=700n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! nfet_06v0_dn + m=1 w=895e-9 l=700n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! nfet_06v0_dn + m=1 w=745e-9 l=700n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! nfet_06v0_dn + m=1 w=620e-9 l=700n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! nfet_06v0_dn + m=1 w=520e-9 l=700n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! nfet_06v0_dn + m=1 w=430e-9 l=700n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! nfet_06v0_dn + m=1 w=300e-9 l=700n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S vdd! nmos_6p0_dw m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_24_R0_S vdd! nfet_06v0_dn m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=46.375u nf=1 ++ I1_lin_default_l_23_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=46.375u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=38.645u nf=1 ++ I1_lin_default_l_22_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=38.645u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=32.205u nf=1 ++ I1_lin_default_l_21_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=32.205u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=26.835u nf=1 ++ I1_lin_default_l_20_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=26.835u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=22.365u nf=1 ++ I1_lin_default_l_19_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=22.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=18.635u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=18.635u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=15.530u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=15.530u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=12.940u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=12.940u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=10.785u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=10.785u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=8.985u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=8.985u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=7.490u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=7.490u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=6.240u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=6.240u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=5.200u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=5.200u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=4.335u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=4.335u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=3.610u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=3.610u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=3.010u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=3.010u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=2.510u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=2.510u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=2.090u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=2.090u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=1.740u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=1.740u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=1.450u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=1.450u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=1.210u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=1.210u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=1.010u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=1.010u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=0.840u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=0.840u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=0.700u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=0.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_6p0_dw m=1 w=36e-6 l=700n nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_06v0_dn m=1 w=36e-6 l=700n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_6p0_dw m=1 w=18.36e-6 l=700n nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_06v0_dn m=1 w=18.36e-6 l=700n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_6p0_dw m=1 w=360e-9 l=700n nf=1 ++ I1_lin_default_nf_0_R0_S vdd! nfet_06v0_dn m=1 w=360e-9 l=700n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D + I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! -+ nmos_6p0_dw m=1 w=16.08e-6 l=700n nf=3 as=5.1456e-12 ad=5.1456e-12 ++ nfet_06v0_dn m=1 w=16.08e-6 l=700n nf=3 as=5.1456e-12 ad=5.1456e-12 + ps=23.36e-6 pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D + I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! -+ nmos_6p0_dw m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 ++ nfet_06v0_dn m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 + pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D + I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! -+ nmos_6p0_dw m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 ++ nfet_06v0_dn m=1 w=720e-9 l=700n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 + pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! nfet_06v0_dn + m=1 w=26.8e-6 l=700n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nmos_6p0_dw ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! nfet_06v0_dn + m=1 w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_6p0_dw m=1 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_06v0_dn m=1 + w=360e-9 l=700n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn_dss.src.cdl similarity index 84% rename from rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn_dss.src.cdl index c9d84d23..b1b77cbc 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_6p0_dw_sab +* Top Cell Name: sample_nfet_06v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:46:35 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_6p0_dw_sab +* Cell Name: sample_nfet_06v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_6p0_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_06v0_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -183,180 +183,180 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_6p0_dw_sab m=1 w=720.000u l=0.8u nf=12 ++ I1_lin_default_wf_7_R0_S vdd! nfet_06v0_dn_dss m=1 w=720.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_6p0_dw_sab m=1 w=716.640u l=0.8u nf=12 ++ I1_lin_default_wf_6_R0_S vdd! nfet_06v0_dn_dss m=1 w=716.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_6p0_dw_sab m=1 w=597.180u l=0.8u nf=12 ++ I1_lin_default_wf_5_R0_S vdd! nfet_06v0_dn_dss m=1 w=597.180u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_6p0_dw_sab m=1 w=497.640u l=0.8u nf=12 ++ I1_lin_default_wf_4_R0_S vdd! nfet_06v0_dn_dss m=1 w=497.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_6p0_dw_sab m=1 w=414.720u l=0.8u nf=12 ++ I1_lin_default_wf_3_R0_S vdd! nfet_06v0_dn_dss m=1 w=414.720u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_6p0_dw_sab m=1 w=345.600u l=0.8u nf=12 ++ I1_lin_default_wf_2_R0_S vdd! nfet_06v0_dn_dss m=1 w=345.600u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_6p0_dw_sab m=1 w=288.000u l=0.8u nf=12 ++ I1_lin_default_wf_1_R0_S vdd! nfet_06v0_dn_dss m=1 w=288.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_6p0_dw_sab m=1 w=240.000u l=0.8u nf=12 ++ I1_lin_default_wf_0_R0_S vdd! nfet_06v0_dn_dss m=1 w=240.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=10.000u nf=12 ++ I1_lin_default_l_14_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=10.000u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=8.560u nf=12 ++ I1_lin_default_l_13_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=8.560u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=7.135u nf=12 ++ I1_lin_default_l_12_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=7.135u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=5.945u nf=12 ++ I1_lin_default_l_11_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=5.945u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=4.955u nf=12 ++ I1_lin_default_l_10_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=4.955u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=4.130u nf=12 ++ I1_lin_default_l_9_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=4.130u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=3.440u nf=12 ++ I1_lin_default_l_8_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=3.440u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=2.865u nf=12 ++ I1_lin_default_l_7_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=2.865u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=2.390u nf=12 ++ I1_lin_default_l_6_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=2.390u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=1.990u nf=12 ++ I1_lin_default_l_5_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=1.990u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=1.660u nf=12 ++ I1_lin_default_l_4_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=1.660u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=1.380u nf=12 ++ I1_lin_default_l_3_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=1.380u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=1.150u nf=12 ++ I1_lin_default_l_2_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=1.150u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=0.960u nf=12 ++ I1_lin_default_l_1_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=0.960u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=0.800u nf=12 ++ I1_lin_default_l_0_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=0.800u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_6p0_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_06v0_dn_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_6p0_dw_sab m=1 w=450.000u l=0.8u nf=18 ++ I1_lin_default_nf_7_R0_S vdd! nfet_06v0_dn_dss m=1 w=450.000u l=0.8u nf=18 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_6p0_dw_sab m=1 w=400.000u l=0.8u nf=16 ++ I1_lin_default_nf_6_R0_S vdd! nfet_06v0_dn_dss m=1 w=400.000u l=0.8u nf=16 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_6p0_dw_sab m=1 w=350.000u l=0.8u nf=14 ++ I1_lin_default_nf_5_R0_S vdd! nfet_06v0_dn_dss m=1 w=350.000u l=0.8u nf=14 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_6p0_dw_sab m=1 w=300.000u l=0.8u nf=12 ++ I1_lin_default_nf_4_R0_S vdd! nfet_06v0_dn_dss m=1 w=300.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_6p0_dw_sab m=1 w=250.000u l=0.8u nf=10 ++ I1_lin_default_nf_3_R0_S vdd! nfet_06v0_dn_dss m=1 w=250.000u l=0.8u nf=10 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_6p0_dw_sab m=1 w=200.000u l=0.8u nf=8 ++ I1_lin_default_nf_2_R0_S vdd! nfet_06v0_dn_dss m=1 w=200.000u l=0.8u nf=8 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_6p0_dw_sab m=1 w=150.000u l=0.8u nf=6 ++ I1_lin_default_nf_1_R0_S vdd! nfet_06v0_dn_dss m=1 w=150.000u l=0.8u nf=6 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_6p0_dw_sab m=1 w=100.000u l=0.8u nf=4 ++ I1_lin_default_nf_0_R0_S vdd! nfet_06v0_dn_dss m=1 w=100.000u l=0.8u nf=4 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_6p0_dw_sab m=3 w=300u l=0.8u nf=12 ++ I1_lin_default_m_2_R0_S vdd! nfet_06v0_dn_dss m=3 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_6p0_dw_sab m=2 w=300u l=0.8u nf=12 ++ I1_lin_default_m_1_R0_S vdd! nfet_06v0_dn_dss m=2 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_m_0_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_1_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0 d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S vdd! nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_0_R0_S vdd! nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_1_R0 I1_lin_default_guardRing_1_R0_D + I1_lin_default_guardRing_1_R0_G I1_lin_default_guardRing_1_R0_S vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S vdd! -+ nmos_6p0_dw_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_6p0_dw_sab m=1 ++ nfet_06v0_dn_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_06v0_dn_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_nmos_6p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dss.src.cdl index 2748be70..c5b17312 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_6p0_sab +* Top Cell Name: sample_nfet_06v0_dss * View Name: schematic * Netlisted on: Sep 10 16:49:48 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_6p0_sab +* Cell Name: sample_nfet_06v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_6p0_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_06v0_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -177,174 +177,174 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I vdd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S vdd! nmos_6p0_sab m=1 w=720.000u l=0.8u nf=12 ++ I1_lin_default_wf_7_R0_S vdd! nfet_06v0_dss m=1 w=720.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S vdd! nmos_6p0_sab m=1 w=716.640u l=0.8u nf=12 ++ I1_lin_default_wf_6_R0_S vdd! nfet_06v0_dss m=1 w=716.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S vdd! nmos_6p0_sab m=1 w=597.180u l=0.8u nf=12 ++ I1_lin_default_wf_5_R0_S vdd! nfet_06v0_dss m=1 w=597.180u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S vdd! nmos_6p0_sab m=1 w=497.640u l=0.8u nf=12 ++ I1_lin_default_wf_4_R0_S vdd! nfet_06v0_dss m=1 w=497.640u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S vdd! nmos_6p0_sab m=1 w=414.720u l=0.8u nf=12 ++ I1_lin_default_wf_3_R0_S vdd! nfet_06v0_dss m=1 w=414.720u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S vdd! nmos_6p0_sab m=1 w=345.600u l=0.8u nf=12 ++ I1_lin_default_wf_2_R0_S vdd! nfet_06v0_dss m=1 w=345.600u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S vdd! nmos_6p0_sab m=1 w=288.000u l=0.8u nf=12 ++ I1_lin_default_wf_1_R0_S vdd! nfet_06v0_dss m=1 w=288.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S vdd! nmos_6p0_sab m=1 w=240.000u l=0.8u nf=12 ++ I1_lin_default_wf_0_R0_S vdd! nfet_06v0_dss m=1 w=240.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_6p0_sab m=1 w=300u l=10.000u nf=12 ++ I1_lin_default_l_14_R0_S vdd! nfet_06v0_dss m=1 w=300u l=10.000u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_6p0_sab m=1 w=300u l=8.560u nf=12 ++ I1_lin_default_l_13_R0_S vdd! nfet_06v0_dss m=1 w=300u l=8.560u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_6p0_sab m=1 w=300u l=7.135u nf=12 ++ I1_lin_default_l_12_R0_S vdd! nfet_06v0_dss m=1 w=300u l=7.135u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_6p0_sab m=1 w=300u l=5.945u nf=12 ++ I1_lin_default_l_11_R0_S vdd! nfet_06v0_dss m=1 w=300u l=5.945u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_6p0_sab m=1 w=300u l=4.955u nf=12 ++ I1_lin_default_l_10_R0_S vdd! nfet_06v0_dss m=1 w=300u l=4.955u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_6p0_sab m=1 w=300u l=4.130u nf=12 ++ I1_lin_default_l_9_R0_S vdd! nfet_06v0_dss m=1 w=300u l=4.130u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_6p0_sab m=1 w=300u l=3.440u nf=12 ++ I1_lin_default_l_8_R0_S vdd! nfet_06v0_dss m=1 w=300u l=3.440u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_6p0_sab m=1 w=300u l=2.865u nf=12 ++ I1_lin_default_l_7_R0_S vdd! nfet_06v0_dss m=1 w=300u l=2.865u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_6p0_sab m=1 w=300u l=2.390u nf=12 ++ I1_lin_default_l_6_R0_S vdd! nfet_06v0_dss m=1 w=300u l=2.390u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_6p0_sab m=1 w=300u l=1.990u nf=12 ++ I1_lin_default_l_5_R0_S vdd! nfet_06v0_dss m=1 w=300u l=1.990u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_6p0_sab m=1 w=300u l=1.660u nf=12 ++ I1_lin_default_l_4_R0_S vdd! nfet_06v0_dss m=1 w=300u l=1.660u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_6p0_sab m=1 w=300u l=1.380u nf=12 ++ I1_lin_default_l_3_R0_S vdd! nfet_06v0_dss m=1 w=300u l=1.380u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_6p0_sab m=1 w=300u l=1.150u nf=12 ++ I1_lin_default_l_2_R0_S vdd! nfet_06v0_dss m=1 w=300u l=1.150u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_6p0_sab m=1 w=300u l=0.960u nf=12 ++ I1_lin_default_l_1_R0_S vdd! nfet_06v0_dss m=1 w=300u l=0.960u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_6p0_sab m=1 w=300u l=0.800u nf=12 ++ I1_lin_default_l_0_R0_S vdd! nfet_06v0_dss m=1 w=300u l=0.800u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.780u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.655u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.545u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.455u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.380u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.315u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.265u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nmos_6p0_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S vdd! nfet_06v0_dss + m=1 w=300u l=0.8u nf=12 s_sab=0.220u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S vdd! nmos_6p0_sab m=1 w=450.000u l=0.8u nf=18 ++ I1_lin_default_nf_8_R0_S vdd! nfet_06v0_dss m=1 w=450.000u l=0.8u nf=18 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S vdd! nmos_6p0_sab m=1 w=400.000u l=0.8u nf=16 ++ I1_lin_default_nf_7_R0_S vdd! nfet_06v0_dss m=1 w=400.000u l=0.8u nf=16 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S vdd! nmos_6p0_sab m=1 w=350.000u l=0.8u nf=14 ++ I1_lin_default_nf_6_R0_S vdd! nfet_06v0_dss m=1 w=350.000u l=0.8u nf=14 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S vdd! nmos_6p0_sab m=1 w=300.000u l=0.8u nf=12 ++ I1_lin_default_nf_5_R0_S vdd! nfet_06v0_dss m=1 w=300.000u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S vdd! nmos_6p0_sab m=1 w=250.000u l=0.8u nf=10 ++ I1_lin_default_nf_4_R0_S vdd! nfet_06v0_dss m=1 w=250.000u l=0.8u nf=10 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S vdd! nmos_6p0_sab m=1 w=200.000u l=0.8u nf=8 ++ I1_lin_default_nf_3_R0_S vdd! nfet_06v0_dss m=1 w=200.000u l=0.8u nf=8 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_6p0_sab m=1 w=150.000u l=0.8u nf=6 ++ I1_lin_default_nf_2_R0_S vdd! nfet_06v0_dss m=1 w=150.000u l=0.8u nf=6 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_6p0_sab m=1 w=100.000u l=0.8u nf=4 ++ I1_lin_default_nf_1_R0_S vdd! nfet_06v0_dss m=1 w=100.000u l=0.8u nf=4 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_6p0_sab m=3 w=300u l=0.8u nf=12 ++ I1_lin_default_m_2_R0_S vdd! nfet_06v0_dss m=3 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_6p0_sab m=2 w=300u l=0.8u nf=12 ++ I1_lin_default_m_1_R0_S vdd! nfet_06v0_dss m=2 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_6p0_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_m_0_R0_S vdd! nfet_06v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S vdd! nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0 ++ I1_lin_default_gns_1_R0_S vdd! nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0 + d_sab=3.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S vdd! nmos_6p0_sab m=1 w=300u l=0.8u nf=12 ++ I1_lin_default_gns_0_R0_S vdd! nfet_06v0_dss m=1 w=300u l=0.8u nf=12 + s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S vdd! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S vdd! -+ nmos_6p0_sab m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_6p0_sab m=1 ++ nfet_06v0_dss m=1 w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_06v0_dss m=1 + w=300u l=0.8u nf=12 s_sab=0.28u d_sab=3.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_nat.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_nvt.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_nmos_6p0_nat.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_06v0_nvt.src.cdl index 1837e02d..5793ae12 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_6p0_nat.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_06v0_nvt.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_6p0_nat +* Top Cell Name: sample_nfet_06v0_nvt * View Name: schematic * Netlisted on: Sep 10 16:48:15 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_6p0_nat +* Cell Name: sample_nfet_06v0_nvt * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_6p0_nat I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_06v0_nvt I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -280,376 +280,376 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I vdd!:I MMN0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S vdd! nmos_6p0_nat m=1 w=8.4e-6 l=1.8u nf=3 ++ I1_lin_default_sFirst_0_R0_S vdd! nfet_06v0_nvt m=1 w=8.4e-6 l=1.8u nf=3 + as=2.688e-12 ad=2.688e-12 ps=13.12e-6 pd=13.12e-6 nrd=0.038095 nrs=0.038095 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D + I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S vdd! -+ nmos_6p0_nat m=1 w=500e-6 l=1.8u nf=5 as=148e-12 ad=148e-12 ps=602.96e-6 ++ nfet_06v0_nvt m=1 w=500e-6 l=1.8u nf=5 as=148e-12 ad=148e-12 ps=602.96e-6 + pd=602.96e-6 nrd=0.000592 nrs=0.000592 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D + I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S vdd! -+ nmos_6p0_nat m=1 w=90.435e-6 l=1.8u nf=1 as=39.7914e-12 ad=39.7914e-12 ++ nfet_06v0_nvt m=1 w=90.435e-6 l=1.8u nf=1 as=39.7914e-12 ad=39.7914e-12 + ps=181.75e-6 pd=181.75e-6 nrd=0.004865 nrs=0.004865 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D + I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S vdd! -+ nmos_6p0_nat m=1 w=75.365e-6 l=1.8u nf=1 as=33.1606e-12 ad=33.1606e-12 ++ nfet_06v0_nvt m=1 w=75.365e-6 l=1.8u nf=1 as=33.1606e-12 ad=33.1606e-12 + ps=151.61e-6 pd=151.61e-6 nrd=0.005838 nrs=0.005838 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D + I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S vdd! -+ nmos_6p0_nat m=1 w=62.8e-6 l=1.8u nf=1 as=27.632e-12 ad=27.632e-12 ++ nfet_06v0_nvt m=1 w=62.8e-6 l=1.8u nf=1 as=27.632e-12 ad=27.632e-12 + ps=126.48e-6 pd=126.48e-6 nrd=0.007006 nrs=0.007006 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D + I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S vdd! -+ nmos_6p0_nat m=1 w=52.335e-6 l=1.8u nf=1 as=23.0274e-12 ad=23.0274e-12 ++ nfet_06v0_nvt m=1 w=52.335e-6 l=1.8u nf=1 as=23.0274e-12 ad=23.0274e-12 + ps=105.55e-6 pd=105.55e-6 nrd=0.008407 nrs=0.008407 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D + I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S vdd! -+ nmos_6p0_nat m=1 w=43.615e-6 l=1.8u nf=1 as=19.1906e-12 ad=19.1906e-12 ++ nfet_06v0_nvt m=1 w=43.615e-6 l=1.8u nf=1 as=19.1906e-12 ad=19.1906e-12 + ps=88.11e-6 pd=88.11e-6 nrd=0.010088 nrs=0.010088 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D + I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S vdd! -+ nmos_6p0_nat m=1 w=36.345e-6 l=1.8u nf=1 as=15.9918e-12 ad=15.9918e-12 ++ nfet_06v0_nvt m=1 w=36.345e-6 l=1.8u nf=1 as=15.9918e-12 ad=15.9918e-12 + ps=73.57e-6 pd=73.57e-6 nrd=0.012106 nrs=0.012106 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D + I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S vdd! -+ nmos_6p0_nat m=1 w=30.285e-6 l=1.8u nf=1 as=13.3254e-12 ad=13.3254e-12 ++ nfet_06v0_nvt m=1 w=30.285e-6 l=1.8u nf=1 as=13.3254e-12 ad=13.3254e-12 + ps=61.45e-6 pd=61.45e-6 nrd=0.014529 nrs=0.014529 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D + I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S vdd! -+ nmos_6p0_nat m=1 w=25.24e-6 l=1.8u nf=1 as=11.1056e-12 ad=11.1056e-12 ++ nfet_06v0_nvt m=1 w=25.24e-6 l=1.8u nf=1 as=11.1056e-12 ad=11.1056e-12 + ps=51.36e-6 pd=51.36e-6 nrd=0.017433 nrs=0.017433 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D + I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S vdd! -+ nmos_6p0_nat m=1 w=21.03e-6 l=1.8u nf=1 as=9.2532e-12 ad=9.2532e-12 ++ nfet_06v0_nvt m=1 w=21.03e-6 l=1.8u nf=1 as=9.2532e-12 ad=9.2532e-12 + ps=42.94e-6 pd=42.94e-6 nrd=0.020922 nrs=0.020922 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D + I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S vdd! -+ nmos_6p0_nat m=1 w=17.525e-6 l=1.8u nf=1 as=7.711e-12 ad=7.711e-12 ++ nfet_06v0_nvt m=1 w=17.525e-6 l=1.8u nf=1 as=7.711e-12 ad=7.711e-12 + ps=35.93e-6 pd=35.93e-6 nrd=0.025107 nrs=0.025107 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D + I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S vdd! -+ nmos_6p0_nat m=1 w=14.605e-6 l=1.8u nf=1 as=6.4262e-12 ad=6.4262e-12 ++ nfet_06v0_nvt m=1 w=14.605e-6 l=1.8u nf=1 as=6.4262e-12 ad=6.4262e-12 + ps=30.09e-6 pd=30.09e-6 nrd=0.030127 nrs=0.030127 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D + I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S vdd! -+ nmos_6p0_nat m=1 w=12.17e-6 l=1.8u nf=1 as=5.3548e-12 ad=5.3548e-12 ++ nfet_06v0_nvt m=1 w=12.17e-6 l=1.8u nf=1 as=5.3548e-12 ad=5.3548e-12 + ps=25.22e-6 pd=25.22e-6 nrd=0.036154 nrs=0.036154 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D + I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S vdd! -+ nmos_6p0_nat m=1 w=10.145e-6 l=1.8u nf=1 as=4.4638e-12 ad=4.4638e-12 ++ nfet_06v0_nvt m=1 w=10.145e-6 l=1.8u nf=1 as=4.4638e-12 ad=4.4638e-12 + ps=21.17e-6 pd=21.17e-6 nrd=0.043371 nrs=0.043371 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D + I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S vdd! -+ nmos_6p0_nat m=1 w=8.45e-6 l=1.8u nf=1 as=3.718e-12 ad=3.718e-12 ps=17.78e-6 ++ nfet_06v0_nvt m=1 w=8.45e-6 l=1.8u nf=1 as=3.718e-12 ad=3.718e-12 ps=17.78e-6 + pd=17.78e-6 nrd=0.052071 nrs=0.052071 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D + I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S vdd! -+ nmos_6p0_nat m=1 w=7.045e-6 l=1.8u nf=1 as=3.0998e-12 ad=3.0998e-12 ++ nfet_06v0_nvt m=1 w=7.045e-6 l=1.8u nf=1 as=3.0998e-12 ad=3.0998e-12 + ps=14.97e-6 pd=14.97e-6 nrd=0.062456 nrs=0.062456 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D + I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S vdd! -+ nmos_6p0_nat m=1 w=5.87e-6 l=1.8u nf=1 as=2.5828e-12 ad=2.5828e-12 ++ nfet_06v0_nvt m=1 w=5.87e-6 l=1.8u nf=1 as=2.5828e-12 ad=2.5828e-12 + ps=12.62e-6 pd=12.62e-6 nrd=0.074957 nrs=0.074957 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D + I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S vdd! -+ nmos_6p0_nat m=1 w=4.89e-6 l=1.8u nf=1 as=2.1516e-12 ad=2.1516e-12 ++ nfet_06v0_nvt m=1 w=4.89e-6 l=1.8u nf=1 as=2.1516e-12 ad=2.1516e-12 + ps=10.66e-6 pd=10.66e-6 nrd=0.089980 nrs=0.089980 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D + I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S vdd! -+ nmos_6p0_nat m=1 w=4.075e-6 l=1.8u nf=1 as=1.793e-12 ad=1.793e-12 ps=9.03e-6 ++ nfet_06v0_nvt m=1 w=4.075e-6 l=1.8u nf=1 as=1.793e-12 ad=1.793e-12 ps=9.03e-6 + pd=9.03e-6 nrd=0.107975 nrs=0.107975 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D + I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S vdd! -+ nmos_6p0_nat m=1 w=3.395e-6 l=1.8u nf=1 as=1.4938e-12 ad=1.4938e-12 ++ nfet_06v0_nvt m=1 w=3.395e-6 l=1.8u nf=1 as=1.4938e-12 ad=1.4938e-12 + ps=7.67e-6 pd=7.67e-6 nrd=0.129602 nrs=0.129602 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D + I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S vdd! -+ nmos_6p0_nat m=1 w=2.83e-6 l=1.8u nf=1 as=1.2452e-12 ad=1.2452e-12 ++ nfet_06v0_nvt m=1 w=2.83e-6 l=1.8u nf=1 as=1.2452e-12 ad=1.2452e-12 + ps=6.54e-6 pd=6.54e-6 nrd=0.155477 nrs=0.155477 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D + I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S vdd! -+ nmos_6p0_nat m=1 w=2.36e-6 l=1.8u nf=1 as=1.0384e-12 ad=1.0384e-12 ps=5.6e-6 ++ nfet_06v0_nvt m=1 w=2.36e-6 l=1.8u nf=1 as=1.0384e-12 ad=1.0384e-12 ps=5.6e-6 + pd=5.6e-6 nrd=0.186441 nrs=0.186441 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D + I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S vdd! -+ nmos_6p0_nat m=1 w=1.965e-6 l=1.8u nf=1 as=864.6e-15 ad=864.6e-15 ps=4.81e-6 ++ nfet_06v0_nvt m=1 w=1.965e-6 l=1.8u nf=1 as=864.6e-15 ad=864.6e-15 ps=4.81e-6 + pd=4.81e-6 nrd=0.223919 nrs=0.223919 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D + I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S vdd! -+ nmos_6p0_nat m=1 w=1.64e-6 l=1.8u nf=1 as=721.6e-15 ad=721.6e-15 ps=4.16e-6 ++ nfet_06v0_nvt m=1 w=1.64e-6 l=1.8u nf=1 as=721.6e-15 ad=721.6e-15 ps=4.16e-6 + pd=4.16e-6 nrd=0.268293 nrs=0.268293 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D + I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S vdd! -+ nmos_6p0_nat m=1 w=1.365e-6 l=1.8u nf=1 as=600.6e-15 ad=600.6e-15 ps=3.61e-6 ++ nfet_06v0_nvt m=1 w=1.365e-6 l=1.8u nf=1 as=600.6e-15 ad=600.6e-15 ps=3.61e-6 + pd=3.61e-6 nrd=0.322344 nrs=0.322344 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D + I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S vdd! -+ nmos_6p0_nat m=1 w=1.14e-6 l=1.8u nf=1 as=501.6e-15 ad=501.6e-15 ps=3.16e-6 ++ nfet_06v0_nvt m=1 w=1.14e-6 l=1.8u nf=1 as=501.6e-15 ad=501.6e-15 ps=3.16e-6 + pd=3.16e-6 nrd=0.385965 nrs=0.385965 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D + I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S vdd! -+ nmos_6p0_nat m=1 w=950e-9 l=1.8u nf=1 as=418e-15 ad=418e-15 ps=2.78e-6 ++ nfet_06v0_nvt m=1 w=950e-9 l=1.8u nf=1 as=418e-15 ad=418e-15 ps=2.78e-6 + pd=2.78e-6 nrd=0.463158 nrs=0.463158 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D + I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_6p0_nat m=1 w=5.6e-6 l=50.000u nf=2 ++ I1_lin_default_l_19_R0_S vdd! nfet_06v0_nvt m=1 w=5.6e-6 l=50.000u nf=2 + as=2.464e-12 ad=1.456e-12 ps=12.96e-6 pd=6.64e-6 nrd=0.046429 nrs=0.078571 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=47.920u nf=1 ++ I1_lin_default_l_18_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=47.920u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=39.935u nf=1 ++ I1_lin_default_l_17_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=39.935u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=33.280u nf=1 ++ I1_lin_default_l_16_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=33.280u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=27.735u nf=1 ++ I1_lin_default_l_15_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=27.735u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=23.110u nf=1 ++ I1_lin_default_l_14_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=23.110u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=19.260u nf=1 ++ I1_lin_default_l_13_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=19.260u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=16.050u nf=1 ++ I1_lin_default_l_12_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=16.050u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=13.375u nf=1 ++ I1_lin_default_l_11_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=13.375u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=11.145u nf=1 ++ I1_lin_default_l_10_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=11.145u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=9.290u nf=1 ++ I1_lin_default_l_9_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=9.290u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=7.740u nf=1 ++ I1_lin_default_l_8_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=7.740u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=6.450u nf=1 ++ I1_lin_default_l_7_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=6.450u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=5.375u nf=1 ++ I1_lin_default_l_6_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=5.375u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=4.480u nf=1 ++ I1_lin_default_l_5_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=4.480u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=3.730u nf=1 ++ I1_lin_default_l_4_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=3.730u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=3.110u nf=1 ++ I1_lin_default_l_3_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=3.110u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=2.590u nf=1 ++ I1_lin_default_l_2_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=2.590u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=2.160u nf=1 ++ I1_lin_default_l_1_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=2.160u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=1.800u nf=1 ++ I1_lin_default_l_0_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=1.800u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S vdd! nmos_6p0_nat m=1 w=80e-6 l=1.8u nf=100 ++ I1_lin_default_nf_2_R0_S vdd! nfet_06v0_nvt m=1 w=80e-6 l=1.8u nf=100 + as=21.088e-12 ad=20.8e-12 ps=134.32e-6 pd=132e-6 nrd=0.003250 nrs=0.003295 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S vdd! nmos_6p0_nat m=1 w=40.8e-6 l=1.8u nf=51 ++ I1_lin_default_nf_1_R0_S vdd! nfet_06v0_nvt m=1 w=40.8e-6 l=1.8u nf=51 + as=10.752e-12 ad=10.752e-12 ps=68.48e-6 pd=68.48e-6 nrd=0.006459 + nrs=0.006459 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 ++ I1_lin_default_nf_0_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 + as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.550000 nrs=0.550000 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S vdd! nmos_6p0_nat m=100 w=800e-9 l=1.8u nf=1 ++ I1_lin_default_m_2_R0_S vdd! nfet_06v0_nvt m=100 w=800e-9 l=1.8u nf=1 + as=35.2e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.55 nrs=0.55 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S vdd! nmos_6p0_nat m=51 w=800e-9 l=1.8u nf=1 ++ I1_lin_default_m_1_R0_S vdd! nfet_06v0_nvt m=51 w=800e-9 l=1.8u nf=1 + as=35.2e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.55 nrs=0.55 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S vdd! nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 ++ I1_lin_default_m_0_R0_S vdd! nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 + as=35.2e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.55 nrs=0.55 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ vdd! nmos_6p0_nat m=1 w=2.4e-6 l=1.8u nf=3 as=768e-15 ad=768e-15 ps=5.12e-6 ++ vdd! nfet_06v0_nvt m=1 w=2.4e-6 l=1.8u nf=3 as=768e-15 ad=768e-15 ps=5.12e-6 + pd=5.12e-6 nrd=0.133333 nrs=0.133333 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ vdd! nmos_6p0_nat m=1 w=1.6e-6 l=1.8u nf=2 as=704e-15 ad=416e-15 ps=4.96e-6 ++ vdd! nfet_06v0_nvt m=1 w=1.6e-6 l=1.8u nf=2 as=704e-15 ad=416e-15 ps=4.96e-6 + pd=2.64e-6 nrd=0.162500 nrs=0.275000 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ vdd! nmos_6p0_nat m=1 w=5.6e-6 l=1.8u nf=2 as=2.464e-12 ad=1.456e-12 ++ vdd! nfet_06v0_nvt m=1 w=5.6e-6 l=1.8u nf=2 as=2.464e-12 ad=1.456e-12 + ps=12.96e-6 pd=6.64e-6 nrd=0.046429 nrs=0.078571 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D + I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S vdd! -+ nmos_6p0_nat m=1 w=5.6e-6 l=1.8u nf=2 as=2.464e-12 ad=1.456e-12 ps=12.96e-6 ++ nfet_06v0_nvt m=1 w=5.6e-6 l=1.8u nf=2 as=2.464e-12 ad=1.456e-12 ps=12.96e-6 + pd=6.64e-6 nrd=0.046429 nrs=0.078571 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D + I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=35.2e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=35.2e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.55 nrs=0.55 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D + I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=1.6e-6 l=1.8u nf=2 as=704e-15 ad=416e-15 ps=4.96e-6 ++ nfet_06v0_nvt m=1 w=1.6e-6 l=1.8u nf=2 as=704e-15 ad=416e-15 ps=4.96e-6 + pd=2.64e-6 nrd=0.162500 nrs=0.275000 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D + I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S vdd! -+ nmos_6p0_nat m=1 w=29e-6 l=1.8u nf=5 as=21.982e-12 ad=21.982e-12 ps=42.38e-6 ++ nfet_06v0_nvt m=1 w=29e-6 l=1.8u nf=5 as=21.982e-12 ad=21.982e-12 ps=42.38e-6 + pd=42.38e-6 nrd=0.026138 nrs=0.026138 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D + I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=960e-15 ad=960e-15 ps=4e-6 pd=4e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=960e-15 ad=960e-15 ps=4e-6 pd=4e-6 + nrd=1.500000 nrs=1.500000 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D + I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=828e-15 ad=828e-15 ps=3.67e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=828e-15 ad=828e-15 ps=3.67e-6 + pd=3.67e-6 nrd=1.293750 nrs=1.293750 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D + I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=716e-15 ad=716e-15 ps=3.39e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=716e-15 ad=716e-15 ps=3.39e-6 + pd=3.39e-6 nrd=1.118750 nrs=1.118750 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D + I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=624e-15 ad=624e-15 ps=3.16e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=624e-15 ad=624e-15 ps=3.16e-6 + pd=3.16e-6 nrd=0.975000 nrs=0.975000 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D + I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=548e-15 ad=548e-15 ps=2.97e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=548e-15 ad=548e-15 ps=2.97e-6 + pd=2.97e-6 nrd=0.856250 nrs=0.856250 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D + I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=484e-15 ad=484e-15 ps=2.81e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=484e-15 ad=484e-15 ps=2.81e-6 + pd=2.81e-6 nrd=0.756250 nrs=0.756250 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D + I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=432e-15 ad=432e-15 ps=2.68e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=432e-15 ad=432e-15 ps=2.68e-6 + pd=2.68e-6 nrd=0.675000 nrs=0.675000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D + I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=388e-15 ad=388e-15 ps=2.57e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=388e-15 ad=388e-15 ps=2.57e-6 + pd=2.57e-6 nrd=0.606250 nrs=0.606250 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D + I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nmos_6p0_nat ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S vdd! nfet_06v0_nvt + m=1 w=5.6e-6 l=1.8u nf=2 as=2.464e-12 ad=1.456e-12 ps=12.96e-6 pd=6.64e-6 + nrd=0.046429 nrs=0.078571 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nmos_6p0_nat ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S vdd! nfet_06v0_nvt + m=1 w=11.4e-6 l=1.8u nf=3 as=3.648e-12 ad=3.648e-12 ps=17.12e-6 pd=17.12e-6 + nrd=0.028070 nrs=0.028070 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nmos_6p0_nat ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S vdd! nfet_06v0_nvt + m=1 w=7.6e-6 l=1.8u nf=2 as=1.976e-12 ad=3.344e-12 ps=8.64e-6 pd=16.96e-6 + nrd=0.057895 nrs=0.034211 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nmos_6p0_nat ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S vdd! nfet_06v0_nvt + m=1 w=7.6e-6 l=1.8u nf=2 as=3.344e-12 ad=1.976e-12 ps=16.96e-6 pd=8.64e-6 + nrd=0.034211 nrs=0.057895 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D + I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=376e-15 ad=352e-15 ps=2.54e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=376e-15 ad=352e-15 ps=2.54e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.587500 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D + I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D + I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nmos_6p0_nat ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S vdd! nfet_06v0_nvt + m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 + nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S vdd! -+ nmos_6p0_nat m=1 w=11.4e-6 l=1.8u nf=3 as=3.648e-12 ad=3.648e-12 ps=17.12e-6 ++ nfet_06v0_nvt m=1 w=11.4e-6 l=1.8u nf=3 as=3.648e-12 ad=3.648e-12 ps=17.12e-6 + pd=17.12e-6 nrd=0.028070 nrs=0.028070 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S vdd! -+ nmos_6p0_nat m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 ++ nfet_06v0_nvt m=1 w=800e-9 l=1.8u nf=1 as=352e-15 ad=352e-15 ps=2.48e-6 + pd=2.48e-6 nrd=0.550000 nrs=0.550000 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_6p0_nat m=1 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_06v0_nvt m=1 + w=800e-9 l=1.8u nf=1 as=35.2e-15 ad=352e-15 ps=2.48e-6 pd=2.48e-6 nrd=0.55 + nrs=0.55 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_nmos_10p0_asym.src.cdl b/rules/klayout/lvs/testing/testcases/sample_nfet_10v0_asym.src.cdl similarity index 82% rename from rules/klayout/lvs/testing/testcases/sample_nmos_10p0_asym.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_nfet_10v0_asym.src.cdl index e3c6871f..4094509b 100644 --- a/rules/klayout/lvs/testing/testcases/sample_nmos_10p0_asym.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_nfet_10v0_asym.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_nmos_10p0_asym +* Top Cell Name: sample_nfet_10v0_asym * View Name: schematic * Netlisted on: Sep 10 16:51:00 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_nmos_10p0_asym +* Cell Name: sample_nfet_10v0_asym * View Name: schematic ************************************************************************ -.SUBCKT sample_nmos_10p0_asym I1_default_D I1_default_G I1_default_S +.SUBCKT sample_nfet_10v0_asym I1_default_D I1_default_G I1_default_S + I1_lin_default_Bodytie_0_R0_D I1_lin_default_Bodytie_0_R0_G + I1_lin_default_Bodytie_0_R0_S I1_lin_default_Bodytie_1_R0_D + I1_lin_default_Bodytie_1_R0_G I1_lin_default_ConnectGates_0_R0_D @@ -154,111 +154,111 @@ *.PININFO I1_lin_default_l_19_R0_S:I I1_lin_default_l_20_R0_D:I *.PININFO I1_lin_default_l_20_R0_G:I I1_lin_default_l_20_R0_S:I vdd!:I MI1_lin_default_MCELL_2_R0 I1_lin_default_MCELL_2_R0_D -+ I1_lin_default_MCELL_2_R0_G I1_lin_default_MCELL_2_R0_S vdd! nmos_10p0_asym ++ I1_lin_default_MCELL_2_R0_G I1_lin_default_MCELL_2_R0_S vdd! nfet_10v0_asym + m=100.0 w=8u l=600.0n nf=2 MI1_lin_default_MCELL_1_R0 I1_lin_default_MCELL_1_R0_D -+ I1_lin_default_MCELL_1_R0_G I1_lin_default_MCELL_1_R0_S vdd! nmos_10p0_asym ++ I1_lin_default_MCELL_1_R0_G I1_lin_default_MCELL_1_R0_S vdd! nfet_10v0_asym + m=51.0 w=8u l=600.0n nf=2 MI1_lin_default_MCELL_0_R0 I1_lin_default_MCELL_0_R0_D -+ I1_lin_default_MCELL_0_R0_G I1_lin_default_MCELL_0_R0_S vdd! nmos_10p0_asym ++ I1_lin_default_MCELL_0_R0_G I1_lin_default_MCELL_0_R0_S vdd! nfet_10v0_asym + m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=20u nf=2 ++ I1_lin_default_l_20_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=20u nf=2 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=19.17u nf=2 ++ I1_lin_default_l_19_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=19.17u nf=2 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=15.975u nf=2 ++ I1_lin_default_l_18_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=15.975u nf=2 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=13.31u nf=2 ++ I1_lin_default_l_17_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=13.31u nf=2 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=11.095u nf=2 ++ I1_lin_default_l_16_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=11.095u nf=2 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=9.245u nf=2 ++ I1_lin_default_l_15_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=9.245u nf=2 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=7.705u nf=2 ++ I1_lin_default_l_14_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=7.705u nf=2 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=6.42u nf=2 ++ I1_lin_default_l_13_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=6.42u nf=2 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=5.35u nf=2 ++ I1_lin_default_l_12_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=5.35u nf=2 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=4.46u nf=2 ++ I1_lin_default_l_11_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=4.46u nf=2 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=3.715u nf=2 ++ I1_lin_default_l_10_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=3.715u nf=2 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=3.095u nf=2 ++ I1_lin_default_l_9_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=3.095u nf=2 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=2.58u nf=2 ++ I1_lin_default_l_8_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=2.58u nf=2 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=2.15u nf=2 ++ I1_lin_default_l_7_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=2.15u nf=2 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=1.79u nf=2 ++ I1_lin_default_l_6_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=1.79u nf=2 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=1.495u nf=2 ++ I1_lin_default_l_5_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=1.495u nf=2 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=1.245u nf=2 ++ I1_lin_default_l_4_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=1.245u nf=2 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=1.035u nf=2 ++ I1_lin_default_l_3_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=1.035u nf=2 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=865n nf=2 ++ I1_lin_default_l_2_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=865n nf=2 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=720n nf=2 ++ I1_lin_default_l_1_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=720n nf=2 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=600n nf=2 ++ I1_lin_default_l_0_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=600n nf=2 MI1_lin_default_fw_14_R0 I1_lin_default_fw_14_R0_D I1_lin_default_fw_14_R0_G -+ I1_lin_default_fw_14_R0_S vdd! nmos_10p0_asym m=1.0 w=100u l=600.0n nf=2 ++ I1_lin_default_fw_14_R0_S vdd! nfet_10v0_asym m=1.0 w=100u l=600.0n nf=2 MI1_lin_default_fw_13_R0 I1_lin_default_fw_13_R0_D I1_lin_default_fw_13_R0_G -+ I1_lin_default_fw_13_R0_S vdd! nmos_10p0_asym m=1.0 w=85.59u l=600.0n nf=2 ++ I1_lin_default_fw_13_R0_S vdd! nfet_10v0_asym m=1.0 w=85.59u l=600.0n nf=2 MI1_lin_default_fw_12_R0 I1_lin_default_fw_12_R0_D I1_lin_default_fw_12_R0_G -+ I1_lin_default_fw_12_R0_S vdd! nmos_10p0_asym m=1.0 w=71.33u l=600.0n nf=2 ++ I1_lin_default_fw_12_R0_S vdd! nfet_10v0_asym m=1.0 w=71.33u l=600.0n nf=2 MI1_lin_default_fw_11_R0 I1_lin_default_fw_11_R0_D I1_lin_default_fw_11_R0_G -+ I1_lin_default_fw_11_R0_S vdd! nmos_10p0_asym m=1.0 w=59.44u l=600.0n nf=2 ++ I1_lin_default_fw_11_R0_S vdd! nfet_10v0_asym m=1.0 w=59.44u l=600.0n nf=2 MI1_lin_default_fw_10_R0 I1_lin_default_fw_10_R0_D I1_lin_default_fw_10_R0_G -+ I1_lin_default_fw_10_R0_S vdd! nmos_10p0_asym m=1.0 w=49.53u l=600.0n nf=2 ++ I1_lin_default_fw_10_R0_S vdd! nfet_10v0_asym m=1.0 w=49.53u l=600.0n nf=2 MI1_lin_default_fw_9_R0 I1_lin_default_fw_9_R0_D I1_lin_default_fw_9_R0_G -+ I1_lin_default_fw_9_R0_S vdd! nmos_10p0_asym m=1.0 w=41.28u l=600.0n nf=2 ++ I1_lin_default_fw_9_R0_S vdd! nfet_10v0_asym m=1.0 w=41.28u l=600.0n nf=2 MI1_lin_default_fw_8_R0 I1_lin_default_fw_8_R0_D I1_lin_default_fw_8_R0_G -+ I1_lin_default_fw_8_R0_S vdd! nmos_10p0_asym m=1.0 w=34.4u l=600.0n nf=2 ++ I1_lin_default_fw_8_R0_S vdd! nfet_10v0_asym m=1.0 w=34.4u l=600.0n nf=2 MI1_lin_default_fw_7_R0 I1_lin_default_fw_7_R0_D I1_lin_default_fw_7_R0_G -+ I1_lin_default_fw_7_R0_S vdd! nmos_10p0_asym m=1.0 w=28.67u l=600.0n nf=2 ++ I1_lin_default_fw_7_R0_S vdd! nfet_10v0_asym m=1.0 w=28.67u l=600.0n nf=2 MI1_lin_default_fw_6_R0 I1_lin_default_fw_6_R0_D I1_lin_default_fw_6_R0_G -+ I1_lin_default_fw_6_R0_S vdd! nmos_10p0_asym m=1.0 w=23.89u l=600.0n nf=2 ++ I1_lin_default_fw_6_R0_S vdd! nfet_10v0_asym m=1.0 w=23.89u l=600.0n nf=2 MI1_lin_default_fw_5_R0 I1_lin_default_fw_5_R0_D I1_lin_default_fw_5_R0_G -+ I1_lin_default_fw_5_R0_S vdd! nmos_10p0_asym m=1.0 w=19.91u l=600.0n nf=2 ++ I1_lin_default_fw_5_R0_S vdd! nfet_10v0_asym m=1.0 w=19.91u l=600.0n nf=2 MI1_lin_default_fw_4_R0 I1_lin_default_fw_4_R0_D I1_lin_default_fw_4_R0_G -+ I1_lin_default_fw_4_R0_S vdd! nmos_10p0_asym m=1.0 w=16.59u l=600.0n nf=2 ++ I1_lin_default_fw_4_R0_S vdd! nfet_10v0_asym m=1.0 w=16.59u l=600.0n nf=2 MI1_lin_default_fw_3_R0 I1_lin_default_fw_3_R0_D I1_lin_default_fw_3_R0_G -+ I1_lin_default_fw_3_R0_S vdd! nmos_10p0_asym m=1.0 w=13.82u l=600.0n nf=2 ++ I1_lin_default_fw_3_R0_S vdd! nfet_10v0_asym m=1.0 w=13.82u l=600.0n nf=2 MI1_lin_default_fw_2_R0 I1_lin_default_fw_2_R0_D I1_lin_default_fw_2_R0_G -+ I1_lin_default_fw_2_R0_S vdd! nmos_10p0_asym m=1.0 w=11.52u l=600.0n nf=2 ++ I1_lin_default_fw_2_R0_S vdd! nfet_10v0_asym m=1.0 w=11.52u l=600.0n nf=2 MI1_lin_default_fw_1_R0 I1_lin_default_fw_1_R0_D I1_lin_default_fw_1_R0_G -+ I1_lin_default_fw_1_R0_S vdd! nmos_10p0_asym m=1.0 w=9.6u l=600.0n nf=2 ++ I1_lin_default_fw_1_R0_S vdd! nfet_10v0_asym m=1.0 w=9.6u l=600.0n nf=2 MI1_lin_default_fw_0_R0 I1_lin_default_fw_0_R0_D I1_lin_default_fw_0_R0_G -+ I1_lin_default_fw_0_R0_S vdd! nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ I1_lin_default_fw_0_R0_S vdd! nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_2_R0 I1_lin_default_ConnectGates_2_R0_D + I1_lin_default_ConnectGates_2_R0_G I1_lin_default_ConnectGates_2_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_1_R0 I1_lin_default_ConnectGates_1_R0_D + I1_lin_default_ConnectGates_1_R0_G I1_lin_default_ConnectGates_1_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_0_R0 I1_lin_default_ConnectGates_0_R0_D + I1_lin_default_ConnectGates_0_R0_G I1_lin_default_ConnectGates_0_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_2_R0 I1_lin_default_ConnectSD_2_R0_D + I1_lin_default_ConnectSD_2_R0_G I1_lin_default_ConnectSD_2_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_1_R0 I1_lin_default_ConnectSD_1_R0_D + I1_lin_default_ConnectSD_1_R0_G I1_lin_default_ConnectSD_1_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_0_R0 I1_lin_default_ConnectSD_0_R0_D + I1_lin_default_ConnectSD_0_R0_G I1_lin_default_ConnectSD_0_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_Bodytie_1_R0 I1_lin_default_Bodytie_1_R0_D -+ I1_lin_default_Bodytie_1_R0_G vdd! vdd! nmos_10p0_asym m=1.0 w=8u l=600.0n ++ I1_lin_default_Bodytie_1_R0_G vdd! vdd! nfet_10v0_asym m=1.0 w=8u l=600.0n + nf=2 MI1_lin_default_Bodytie_0_R0 I1_lin_default_Bodytie_0_R0_D + I1_lin_default_Bodytie_0_R0_G I1_lin_default_Bodytie_0_R0_S vdd! -+ nmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 -MI1_default I1_default_D I1_default_G I1_default_S vdd! nmos_10p0_asym m=1.0 ++ nfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 +MI1_default I1_default_D I1_default_G I1_default_S vdd! nfet_10v0_asym m=1.0 + w=8u l=600.0n nf=2 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_pmos_3p3.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_03v3.src.cdl index f0e02dc6..80a2cbca 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_3p3 +* Top Cell Name: sample_pfet_03v3 * View Name: schematic * Netlisted on: Sep 10 16:52:08 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_3p3 +* Cell Name: sample_pfet_03v3 * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_3p3 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_03v3 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -326,428 +326,428 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I gnd!:I MMP1 I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G -+ I1_lin_default_bodytie_0_R0_S gnd! pmos_3p3 m=1 w=720e-9 l=280n nf=2 ++ I1_lin_default_bodytie_0_R0_S gnd! pfet_03v3 m=1 w=720e-9 l=280n nf=2 + as=327.6e-15 ad=187.2e-15 ps=3.26e-6 pd=1.76e-6 nrd=0.361111 nrs=0.631944 + sa=0.470u sb=0.440u sd=0.520u dtemp=0 par=1 MMP0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S gnd! pmos_3p3 m=1 w=16.8e-6 l=280n nf=5 ++ I1_lin_default_sFirst_0_R0_S gnd! pfet_03v3 m=1 w=16.8e-6 l=280n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_34_R0 I1_lin_default_fingerW_34_R0_D -+ I1_lin_default_fingerW_34_R0_G I1_lin_default_fingerW_34_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_34_R0_G I1_lin_default_fingerW_34_R0_S gnd! pfet_03v3 + m=1 w=1e-3 l=280n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 pd=1.0052e-3 + nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_33_R0 I1_lin_default_fingerW_33_R0_D -+ I1_lin_default_fingerW_33_R0_G I1_lin_default_fingerW_33_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_33_R0_G I1_lin_default_fingerW_33_R0_S gnd! pfet_03v3 + m=1 w=90.24e-6 l=280n nf=1 as=39.7056e-12 ad=39.7056e-12 ps=181.36e-6 + pd=181.36e-6 nrd=0.004876 nrs=0.004876 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pfet_03v3 + m=1 w=75.2e-6 l=280n nf=1 as=33.088e-12 ad=33.088e-12 ps=151.28e-6 + pd=151.28e-6 nrd=0.005851 nrs=0.005851 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pfet_03v3 + m=1 w=62.665e-6 l=280n nf=1 as=27.5726e-12 ad=27.5726e-12 ps=126.21e-6 + pd=126.21e-6 nrd=0.007021 nrs=0.007021 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pfet_03v3 + m=1 w=52.225e-6 l=280n nf=1 as=22.979e-12 ad=22.979e-12 ps=105.33e-6 + pd=105.33e-6 nrd=0.008425 nrs=0.008425 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pfet_03v3 + m=1 w=43.52e-6 l=280n nf=1 as=19.1488e-12 ad=19.1488e-12 ps=87.92e-6 + pd=87.92e-6 nrd=0.010110 nrs=0.010110 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pfet_03v3 + m=1 w=36.265e-6 l=280n nf=1 as=15.9566e-12 ad=15.9566e-12 ps=73.41e-6 + pd=73.41e-6 nrd=0.012133 nrs=0.012133 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pfet_03v3 + m=1 w=30.22e-6 l=280n nf=1 as=13.2968e-12 ad=13.2968e-12 ps=61.32e-6 + pd=61.32e-6 nrd=0.014560 nrs=0.014560 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pfet_03v3 + m=1 w=25.185e-6 l=280n nf=1 as=11.0814e-12 ad=11.0814e-12 ps=51.25e-6 + pd=51.25e-6 nrd=0.017471 nrs=0.017471 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pfet_03v3 + m=1 w=20.985e-6 l=280n nf=1 as=9.2334e-12 ad=9.2334e-12 ps=42.85e-6 + pd=42.85e-6 nrd=0.020967 nrs=0.020967 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pfet_03v3 + m=1 w=17.49e-6 l=280n nf=1 as=7.6956e-12 ad=7.6956e-12 ps=35.86e-6 + pd=35.86e-6 nrd=0.025157 nrs=0.025157 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pfet_03v3 + m=1 w=14.575e-6 l=280n nf=1 as=6.413e-12 ad=6.413e-12 ps=30.03e-6 + pd=30.03e-6 nrd=0.030189 nrs=0.030189 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pfet_03v3 + m=1 w=12.145e-6 l=280n nf=1 as=5.3438e-12 ad=5.3438e-12 ps=25.17e-6 + pd=25.17e-6 nrd=0.036229 nrs=0.036229 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pfet_03v3 + m=1 w=10.12e-6 l=280n nf=1 as=4.4528e-12 ad=4.4528e-12 ps=21.12e-6 + pd=21.12e-6 nrd=0.043478 nrs=0.043478 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pfet_03v3 + m=1 w=8.435e-6 l=280n nf=1 as=3.7114e-12 ad=3.7114e-12 ps=17.75e-6 + pd=17.75e-6 nrd=0.052164 nrs=0.052164 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pfet_03v3 + m=1 w=7.03e-6 l=280n nf=1 as=3.0932e-12 ad=3.0932e-12 ps=14.94e-6 + pd=14.94e-6 nrd=0.062589 nrs=0.062589 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pfet_03v3 + m=1 w=5.855e-6 l=280n nf=1 as=2.5762e-12 ad=2.5762e-12 ps=12.59e-6 + pd=12.59e-6 nrd=0.075149 nrs=0.075149 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pfet_03v3 + m=1 w=4.88e-6 l=280n nf=1 as=2.1472e-12 ad=2.1472e-12 ps=10.64e-6 + pd=10.64e-6 nrd=0.090164 nrs=0.090164 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pfet_03v3 + m=1 w=4.065e-6 l=280n nf=1 as=1.7886e-12 ad=1.7886e-12 ps=9.01e-6 pd=9.01e-6 + nrd=0.108241 nrs=0.108241 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pfet_03v3 + m=1 w=3.39e-6 l=280n nf=1 as=1.4916e-12 ad=1.4916e-12 ps=7.66e-6 pd=7.66e-6 + nrd=0.129794 nrs=0.129794 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pfet_03v3 + m=1 w=2.825e-6 l=280n nf=1 as=1.243e-12 ad=1.243e-12 ps=6.53e-6 pd=6.53e-6 + nrd=0.155752 nrs=0.155752 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pfet_03v3 + m=1 w=2.355e-6 l=280n nf=1 as=1.0362e-12 ad=1.0362e-12 ps=5.59e-6 pd=5.59e-6 + nrd=0.186837 nrs=0.186837 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pfet_03v3 + m=1 w=1.96e-6 l=280n nf=1 as=862.4e-15 ad=862.4e-15 ps=4.8e-6 pd=4.8e-6 + nrd=0.224490 nrs=0.224490 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pfet_03v3 + m=1 w=1.635e-6 l=280n nf=1 as=719.4e-15 ad=719.4e-15 ps=4.15e-6 pd=4.15e-6 + nrd=0.269113 nrs=0.269113 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pfet_03v3 + m=1 w=1.36e-6 l=280n nf=1 as=598.4e-15 ad=598.4e-15 ps=3.6e-6 pd=3.6e-6 + nrd=0.323529 nrs=0.323529 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pfet_03v3 + m=1 w=1.135e-6 l=280n nf=1 as=499.4e-15 ad=499.4e-15 ps=3.15e-6 pd=3.15e-6 + nrd=0.387665 nrs=0.387665 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pfet_03v3 + m=1 w=945e-9 l=280n nf=1 as=415.8e-15 ad=415.8e-15 ps=2.77e-6 pd=2.77e-6 + nrd=0.465608 nrs=0.465608 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pfet_03v3 + m=1 w=790e-9 l=280n nf=1 as=347.6e-15 ad=347.6e-15 ps=2.46e-6 pd=2.46e-6 + nrd=0.556962 nrs=0.556962 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pfet_03v3 + m=1 w=655e-9 l=280n nf=1 as=288.2e-15 ad=288.2e-15 ps=2.19e-6 pd=2.19e-6 + nrd=0.671756 nrs=0.671756 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pfet_03v3 + m=1 w=545e-9 l=280n nf=1 as=239.8e-15 ad=239.8e-15 ps=1.97e-6 pd=1.97e-6 + nrd=0.807339 nrs=0.807339 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pfet_03v3 + m=1 w=455e-9 l=280n nf=1 as=200.2e-15 ad=200.2e-15 ps=1.79e-6 pd=1.79e-6 + nrd=0.967033 nrs=0.967033 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pfet_03v3 + m=1 w=380e-9 l=280n nf=1 as=167.2e-15 ad=167.2e-15 ps=1.64e-6 pd=1.64e-6 + nrd=1.157895 nrs=1.157895 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pfet_03v3 + m=1 w=315e-9 l=280n nf=1 as=161.1e-15 ad=161.1e-15 ps=1.64e-6 pd=1.64e-6 + nrd=1.623583 nrs=1.623583 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pfet_03v3 + m=1 w=265e-9 l=280n nf=1 as=156.1e-15 ad=156.1e-15 ps=1.64e-6 pd=1.64e-6 + nrd=2.222855 nrs=2.222855 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pfet_03v3 + m=1 w=220e-9 l=280n nf=1 as=151.6e-15 ad=151.6e-15 ps=1.64e-6 pd=1.64e-6 + nrd=3.132231 nrs=3.132231 sa=0.460u sb=0.460u sd=0u dtemp=0 par=1 MI1_lin_default_l_29_R0 I1_lin_default_l_29_R0_D I1_lin_default_l_29_R0_G -+ I1_lin_default_l_29_R0_S gnd! pmos_3p3 m=1 w=26.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_29_R0_S gnd! pfet_03v3 m=1 w=26.8e-6 l=50.000u nf=5 + as=7.9328e-12 ad=7.9328e-12 ps=35.12e-6 pd=35.12e-6 nrd=0.011045 + nrs=0.011045 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_28_R0 I1_lin_default_l_28_R0_D I1_lin_default_l_28_R0_G -+ I1_lin_default_l_28_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=46.155u nf=1 ++ I1_lin_default_l_28_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=46.155u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_27_R0 I1_lin_default_l_27_R0_D I1_lin_default_l_27_R0_G -+ I1_lin_default_l_27_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=38.465u nf=1 ++ I1_lin_default_l_27_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=38.465u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_26_R0 I1_lin_default_l_26_R0_D I1_lin_default_l_26_R0_G -+ I1_lin_default_l_26_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=32.055u nf=1 ++ I1_lin_default_l_26_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=32.055u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=26.710u nf=1 ++ I1_lin_default_l_25_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=26.710u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=22.260u nf=1 ++ I1_lin_default_l_24_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=22.260u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=18.550u nf=1 ++ I1_lin_default_l_23_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=18.550u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=15.460u nf=1 ++ I1_lin_default_l_22_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=15.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=12.880u nf=1 ++ I1_lin_default_l_21_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=12.880u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=10.735u nf=1 ++ I1_lin_default_l_20_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=10.735u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=8.945u nf=1 ++ I1_lin_default_l_19_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=8.945u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=7.455u nf=1 ++ I1_lin_default_l_18_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=7.455u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=6.210u nf=1 ++ I1_lin_default_l_17_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=6.210u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=5.175u nf=1 ++ I1_lin_default_l_16_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=5.175u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=4.315u nf=1 ++ I1_lin_default_l_15_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=4.315u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=3.595u nf=1 ++ I1_lin_default_l_14_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=3.595u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=2.995u nf=1 ++ I1_lin_default_l_13_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=2.995u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=2.495u nf=1 ++ I1_lin_default_l_12_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=2.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=2.080u nf=1 ++ I1_lin_default_l_11_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=2.080u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=1.735u nf=1 ++ I1_lin_default_l_10_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=1.735u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=1.445u nf=1 ++ I1_lin_default_l_9_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=1.445u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=1.205u nf=1 ++ I1_lin_default_l_8_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=1.205u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=1.005u nf=1 ++ I1_lin_default_l_7_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=1.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.835u nf=1 ++ I1_lin_default_l_6_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.835u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.695u nf=1 ++ I1_lin_default_l_5_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.695u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.580u nf=1 ++ I1_lin_default_l_4_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.485u nf=1 ++ I1_lin_default_l_3_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.485u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.405u nf=1 ++ I1_lin_default_l_2_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.405u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.335u nf=1 ++ I1_lin_default_l_1_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.335u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=0.280u nf=1 ++ I1_lin_default_l_0_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=0.280u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_3p3 m=1 w=36e-6 l=280n nf=100 ++ I1_lin_default_nf_2_R0_S gnd! pfet_03v3 m=1 w=36e-6 l=280n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_3p3 m=1 w=18.36e-6 l=280n nf=51 ++ I1_lin_default_nf_1_R0_S gnd! pfet_03v3 m=1 w=18.36e-6 l=280n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_3p3 m=100 w=360e-9 l=280n nf=1 ++ I1_lin_default_m_2_R0_S gnd! pfet_03v3 m=100 w=360e-9 l=280n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_3p3 m=51 w=360e-9 l=280n nf=1 as=158.4e-15 ++ I1_lin_default_m_1_R0_S gnd! pfet_03v3 m=51 w=360e-9 l=280n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S gnd! pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ gnd! pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ gnd! pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ gnd! pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ gnd! pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ gnd! pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ gnd! pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pmos_3p3 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pfet_03v3 + m=1 w=16.08e-6 l=280n nf=3 as=5.1456e-12 ad=5.1456e-12 ps=23.36e-6 + pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pmos_3p3 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pfet_03v3 + m=1 w=1.8e-6 l=280n nf=5 as=1.3644e-12 ad=1.3644e-12 ps=9.74e-6 pd=9.74e-6 + nrd=0.421111 nrs=0.421111 sa=1.210u sb=1.210u sd=1.290u dtemp=0 par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pmos_3p3 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pfet_03v3 m=1 + w=16.8e-6 l=280n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pmos_3p3 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pfet_03v3 m=1 + w=1.08e-6 l=280n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 pd=3.36e-6 + nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pmos_3p3 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pfet_03v3 m=1 + w=720e-9 l=280n nf=2 as=187.2e-15 ad=316.8e-15 ps=1.76e-6 pd=3.2e-6 + nrd=0.611111 nrs=0.361111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pmos_3p3 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pfet_03v3 m=1 + w=720e-9 l=280n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 pd=1.76e-6 + nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pmos_3p3 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=169.2e-15 ad=158.4e-15 ps=1.66e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.305556 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pmos_3p3 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pfet_03v3 + m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pmos_3p3 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pfet_03v3 m=1 + w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S gnd! -+ pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S gnd! -+ pmos_3p3 m=1 w=26.8e-6 l=280n nf=5 as=7.9328e-12 ad=7.9328e-12 ps=35.12e-6 ++ pfet_03v3 m=1 w=26.8e-6 l=280n nf=5 as=7.9328e-12 ad=7.9328e-12 ps=35.12e-6 + pd=35.12e-6 nrd=0.011045 nrs=0.011045 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S gnd! -+ pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S gnd! -+ pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S gnd! -+ pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S gnd! -+ pmos_3p3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_03v3 m=1 w=360e-9 l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_3p3 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_03v3 m=1 w=360e-9 + l=280n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dn_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_pmos_3p3_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dn_dss.src.cdl index 3c44dde9..ddbaeec6 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_3p3_dw_sab +* Top Cell Name: sample_pfet_03v3_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:53:29 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_3p3_dw_sab +* Cell Name: sample_pfet_03v3_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_3p3_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_03v3_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -151,141 +151,141 @@ *.PININFO I1_lin_default_wf_7_R0_D:I I1_lin_default_wf_7_R0_G:I *.PININFO I1_lin_default_wf_7_R0_S:I gnd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S gnd! pmos_3p3_dw_sab m=1 w=480.000u l=0.3u nf=8 ++ I1_lin_default_wf_7_R0_S gnd! pfet_03v3_dn_dss m=1 w=480.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S gnd! pmos_3p3_dw_sab m=1 w=477.760u l=0.3u nf=8 ++ I1_lin_default_wf_6_R0_S gnd! pfet_03v3_dn_dss m=1 w=477.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S gnd! pmos_3p3_dw_sab m=1 w=398.120u l=0.3u nf=8 ++ I1_lin_default_wf_5_R0_S gnd! pfet_03v3_dn_dss m=1 w=398.120u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_3p3_dw_sab m=1 w=331.760u l=0.3u nf=8 ++ I1_lin_default_wf_4_R0_S gnd! pfet_03v3_dn_dss m=1 w=331.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_3p3_dw_sab m=1 w=276.480u l=0.3u nf=8 ++ I1_lin_default_wf_3_R0_S gnd! pfet_03v3_dn_dss m=1 w=276.480u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_3p3_dw_sab m=1 w=230.400u l=0.3u nf=8 ++ I1_lin_default_wf_2_R0_S gnd! pfet_03v3_dn_dss m=1 w=230.400u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_3p3_dw_sab m=1 w=192.000u l=0.3u nf=8 ++ I1_lin_default_wf_1_R0_S gnd! pfet_03v3_dn_dss m=1 w=192.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_3p3_dw_sab m=1 w=160.000u l=0.3u nf=8 ++ I1_lin_default_wf_0_R0_S gnd! pfet_03v3_dn_dss m=1 w=160.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.500u nf=8 ++ I1_lin_default_l_3_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.500u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.430u nf=8 ++ I1_lin_default_l_2_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.430u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.360u nf=8 ++ I1_lin_default_l_1_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.360u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.300u nf=8 ++ I1_lin_default_l_0_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.300u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_3p3_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_03v3_dn_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_3p3_dw_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_03v3_dn_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_3p3_dw_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_03v3_dn_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_3p3_dw_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_03v3_dn_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_3p3_dw_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_03v3_dn_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_3p3_dw_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_03v3_dn_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_3p3_dw_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_03v3_dn_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_3p3_dw_sab m=1 w=100.000u l=0.3u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_03v3_dn_dss m=1 w=100.000u l=0.3u nf=4 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_3p3_dw_sab m=3 w=200u l=0.3u nf=8 ++ I1_lin_default_m_2_R0_S gnd! pfet_03v3_dn_dss m=3 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_3p3_dw_sab m=2 w=200u l=0.3u nf=8 ++ I1_lin_default_m_1_R0_S gnd! pfet_03v3_dn_dss m=2 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_m_0_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_gns_1_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0 d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S gnd! pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_gns_0_R0_S gnd! pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S gnd! -+ pmos_3p3_dw_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_3p3_dw_sab m=1 ++ pfet_03v3_dn_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_03v3_dn_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dss.src.cdl similarity index 86% rename from rules/klayout/lvs/testing/testcases/sample_pmos_3p3_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dss.src.cdl index 72cf84aa..20a0dc9d 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_3p3_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_03v3_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_3p3_sab +* Top Cell Name: sample_pfet_03v3_dss * View Name: schematic * Netlisted on: Sep 10 16:54:35 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_3p3_sab +* Cell Name: sample_pfet_03v3_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_3p3_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_03v3_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -147,138 +147,138 @@ *.PININFO I1_lin_default_wf_6_R0_S:I I1_lin_default_wf_7_R0_D:I *.PININFO I1_lin_default_wf_7_R0_G:I I1_lin_default_wf_7_R0_S:I gnd!:I MI1_lin_default_wf_7_R0 I1_lin_default_wf_7_R0_D I1_lin_default_wf_7_R0_G -+ I1_lin_default_wf_7_R0_S gnd! pmos_3p3_sab m=1 w=480.000u l=0.3u nf=8 ++ I1_lin_default_wf_7_R0_S gnd! pfet_03v3_dss m=1 w=480.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_6_R0 I1_lin_default_wf_6_R0_D I1_lin_default_wf_6_R0_G -+ I1_lin_default_wf_6_R0_S gnd! pmos_3p3_sab m=1 w=477.760u l=0.3u nf=8 ++ I1_lin_default_wf_6_R0_S gnd! pfet_03v3_dss m=1 w=477.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_5_R0 I1_lin_default_wf_5_R0_D I1_lin_default_wf_5_R0_G -+ I1_lin_default_wf_5_R0_S gnd! pmos_3p3_sab m=1 w=398.120u l=0.3u nf=8 ++ I1_lin_default_wf_5_R0_S gnd! pfet_03v3_dss m=1 w=398.120u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_3p3_sab m=1 w=331.760u l=0.3u nf=8 ++ I1_lin_default_wf_4_R0_S gnd! pfet_03v3_dss m=1 w=331.760u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_3p3_sab m=1 w=276.480u l=0.3u nf=8 ++ I1_lin_default_wf_3_R0_S gnd! pfet_03v3_dss m=1 w=276.480u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_3p3_sab m=1 w=230.400u l=0.3u nf=8 ++ I1_lin_default_wf_2_R0_S gnd! pfet_03v3_dss m=1 w=230.400u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_3p3_sab m=1 w=192.000u l=0.3u nf=8 ++ I1_lin_default_wf_1_R0_S gnd! pfet_03v3_dss m=1 w=192.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_3p3_sab m=1 w=160.000u l=0.3u nf=8 ++ I1_lin_default_wf_0_R0_S gnd! pfet_03v3_dss m=1 w=160.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.500u nf=8 ++ I1_lin_default_l_3_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.500u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.430u nf=8 ++ I1_lin_default_l_2_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.430u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.360u nf=8 ++ I1_lin_default_l_1_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.360u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.300u nf=8 ++ I1_lin_default_l_0_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.300u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.780u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.655u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.545u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.455u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.380u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.315u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.265u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_3p3_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_03v3_dss + m=1 w=200u l=0.3u nf=8 s_sab=0.220u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_3p3_sab m=1 w=400.000u l=0.3u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_03v3_dss m=1 w=400.000u l=0.3u nf=16 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_3p3_sab m=1 w=350.000u l=0.3u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_03v3_dss m=1 w=350.000u l=0.3u nf=14 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_3p3_sab m=1 w=300.000u l=0.3u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_03v3_dss m=1 w=300.000u l=0.3u nf=12 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_3p3_sab m=1 w=250.000u l=0.3u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_03v3_dss m=1 w=250.000u l=0.3u nf=10 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_3p3_sab m=1 w=200.000u l=0.3u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_03v3_dss m=1 w=200.000u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_3p3_sab m=1 w=150.000u l=0.3u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_03v3_dss m=1 w=150.000u l=0.3u nf=6 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_3p3_sab m=1 w=100.000u l=0.3u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_03v3_dss m=1 w=100.000u l=0.3u nf=4 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_3p3_sab m=3 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_2_R0_S gnd! pfet_03v3_dss m=3 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_3p3_sab m=2 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_1_R0_S gnd! pfet_03v3_dss m=2 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u ++ I1_lin_default_m_0_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u + d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0 ++ I1_lin_default_gns_1_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0 + d_sab=1.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S gnd! pmos_3p3_sab m=1 w=200u l=0.3u nf=8 ++ I1_lin_default_gns_0_R0_S gnd! pfet_03v3_dss m=1 w=200u l=0.3u nf=8 + s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_3p3_sab m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_3p3_sab m=1 ++ pfet_03v3_dss m=1 w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_03v3_dss m=1 + w=200u l=0.3u nf=8 s_sab=0.48u d_sab=1.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_pmos_5p0.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_05v0.src.cdl index 8d06016d..4285d313 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_5p0 +* Top Cell Name: sample_pfet_05v0 * View Name: schematic * Netlisted on: Sep 10 16:55:47 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_5p0 +* Cell Name: sample_pfet_05v0 * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_5p0 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_05v0 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -312,408 +312,408 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I gnd!:I MMP0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S gnd! pmos_5p0 m=1 w=16.8e-6 l=500n nf=5 ++ I1_lin_default_sFirst_0_R0_S gnd! pfet_05v0 m=1 w=16.8e-6 l=500n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pfet_05v0 + m=1 w=1e-3 l=500n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 pd=1.0052e-3 + nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pfet_05v0 + m=1 w=85.455e-6 l=500n nf=1 as=37.6002e-12 ad=37.6002e-12 ps=171.79e-6 + pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pfet_05v0 + m=1 w=71.215e-6 l=500n nf=1 as=31.3346e-12 ad=31.3346e-12 ps=143.31e-6 + pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pfet_05v0 + m=1 w=59.345e-6 l=500n nf=1 as=26.1118e-12 ad=26.1118e-12 ps=119.57e-6 + pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pfet_05v0 + m=1 w=49.455e-6 l=500n nf=1 as=21.7602e-12 ad=21.7602e-12 ps=99.79e-6 + pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pfet_05v0 + m=1 w=41.21e-6 l=500n nf=1 as=18.1324e-12 ad=18.1324e-12 ps=83.3e-6 + pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pfet_05v0 + m=1 w=34.345e-6 l=500n nf=1 as=15.1118e-12 ad=15.1118e-12 ps=69.57e-6 + pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pfet_05v0 + m=1 w=28.62e-6 l=500n nf=1 as=12.5928e-12 ad=12.5928e-12 ps=58.12e-6 + pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pfet_05v0 + m=1 w=23.85e-6 l=500n nf=1 as=10.494e-12 ad=10.494e-12 ps=48.58e-6 + pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pfet_05v0 + m=1 w=19.875e-6 l=500n nf=1 as=8.745e-12 ad=8.745e-12 ps=40.63e-6 + pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pfet_05v0 + m=1 w=16.56e-6 l=500n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 pd=34e-6 + nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pfet_05v0 + m=1 w=13.8e-6 l=500n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 pd=28.48e-6 + nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pfet_05v0 + m=1 w=11.5e-6 l=500n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 pd=23.88e-6 + nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pfet_05v0 + m=1 w=9.585e-6 l=500n nf=1 as=4.2174e-12 ad=4.2174e-12 ps=20.05e-6 + pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pfet_05v0 + m=1 w=7.985e-6 l=500n nf=1 as=3.5134e-12 ad=3.5134e-12 ps=16.85e-6 + pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pfet_05v0 + m=1 w=6.655e-6 l=500n nf=1 as=2.9282e-12 ad=2.9282e-12 ps=14.19e-6 + pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pfet_05v0 + m=1 w=5.545e-6 l=500n nf=1 as=2.4398e-12 ad=2.4398e-12 ps=11.97e-6 + pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pfet_05v0 + m=1 w=4.62e-6 l=500n nf=1 as=2.0328e-12 ad=2.0328e-12 ps=10.12e-6 + pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pfet_05v0 + m=1 w=3.85e-6 l=500n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 pd=8.58e-6 + nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pfet_05v0 + m=1 w=3.21e-6 l=500n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 pd=7.3e-6 + nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pfet_05v0 + m=1 w=2.675e-6 l=500n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 pd=6.23e-6 + nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pfet_05v0 + m=1 w=2.23e-6 l=500n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 pd=5.34e-6 + nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pfet_05v0 + m=1 w=1.86e-6 l=500n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 pd=4.6e-6 + nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pfet_05v0 + m=1 w=1.55e-6 l=500n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pfet_05v0 + m=1 w=1.29e-6 l=500n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pfet_05v0 + m=1 w=1.075e-6 l=500n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pfet_05v0 + m=1 w=895e-9 l=500n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pfet_05v0 + m=1 w=745e-9 l=500n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pfet_05v0 + m=1 w=620e-9 l=500n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pfet_05v0 + m=1 w=520e-9 l=500n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pfet_05v0 + m=1 w=430e-9 l=500n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pfet_05v0 + m=1 w=300e-9 l=500n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_26_R0 I1_lin_default_l_26_R0_D I1_lin_default_l_26_R0_G -+ I1_lin_default_l_26_R0_S gnd! pmos_5p0 m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_26_R0_S gnd! pfet_05v0 m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=47.700u nf=1 ++ I1_lin_default_l_25_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=47.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=39.750u nf=1 ++ I1_lin_default_l_24_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=39.750u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=33.125u nf=1 ++ I1_lin_default_l_23_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=33.125u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=27.605u nf=1 ++ I1_lin_default_l_22_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=27.605u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=23.005u nf=1 ++ I1_lin_default_l_21_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=23.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=19.170u nf=1 ++ I1_lin_default_l_20_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=19.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=15.975u nf=1 ++ I1_lin_default_l_19_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=15.975u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=13.310u nf=1 ++ I1_lin_default_l_18_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=13.310u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=11.095u nf=1 ++ I1_lin_default_l_17_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=11.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=9.245u nf=1 ++ I1_lin_default_l_16_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=9.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=7.705u nf=1 ++ I1_lin_default_l_15_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=7.705u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=6.420u nf=1 ++ I1_lin_default_l_14_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=6.420u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=5.350u nf=1 ++ I1_lin_default_l_13_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=5.350u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=4.460u nf=1 ++ I1_lin_default_l_12_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=4.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=3.715u nf=1 ++ I1_lin_default_l_11_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=3.715u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=3.095u nf=1 ++ I1_lin_default_l_10_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=3.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=2.580u nf=1 ++ I1_lin_default_l_9_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=2.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=2.150u nf=1 ++ I1_lin_default_l_8_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=2.150u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=1.790u nf=1 ++ I1_lin_default_l_7_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=1.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=1.495u nf=1 ++ I1_lin_default_l_6_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=1.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=1.245u nf=1 ++ I1_lin_default_l_5_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=1.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=1.035u nf=1 ++ I1_lin_default_l_4_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=1.035u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=0.865u nf=1 ++ I1_lin_default_l_3_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=0.865u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=0.720u nf=1 ++ I1_lin_default_l_2_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=0.720u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=0.600u nf=1 ++ I1_lin_default_l_1_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=0.600u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=0.500u nf=1 ++ I1_lin_default_l_0_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=0.500u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_5p0 m=1 w=36e-6 l=500n nf=100 ++ I1_lin_default_nf_2_R0_S gnd! pfet_05v0 m=1 w=36e-6 l=500n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_5p0 m=1 w=18.36e-6 l=500n nf=51 ++ I1_lin_default_nf_1_R0_S gnd! pfet_05v0 m=1 w=18.36e-6 l=500n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_5p0 m=100 w=360e-9 l=500n nf=1 ++ I1_lin_default_m_2_R0_S gnd! pfet_05v0 m=100 w=360e-9 l=500n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_5p0 m=51 w=360e-9 l=500n nf=1 as=158.4e-15 ++ I1_lin_default_m_1_R0_S gnd! pfet_05v0 m=51 w=360e-9 l=500n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S gnd! pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ gnd! pmos_5p0 m=1 w=720e-9 l=500n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 ++ gnd! pfet_05v0 m=1 w=720e-9 l=500n nf=2 as=316.8e-15 ad=187.2e-15 ps=3.2e-6 + pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ gnd! pmos_5p0 m=1 w=900e-9 l=500n nf=3 as=529.2e-15 ad=529.2e-15 ps=4.68e-6 ++ gnd! pfet_05v0 m=1 w=900e-9 l=500n nf=3 as=529.2e-15 ad=529.2e-15 ps=4.68e-6 + pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u sd=0.960u dtemp=0 + par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ gnd! pmos_5p0 m=1 w=1.08e-6 l=500n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 ++ gnd! pfet_05v0 m=1 w=1.08e-6 l=500n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 + pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pmos_5p0 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pfet_05v0 + m=1 w=16.08e-6 l=500n nf=3 as=5.1456e-12 ad=5.1456e-12 ps=23.36e-6 + pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pmos_5p0 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pfet_05v0 + m=1 w=26.8e-6 l=500n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pmos_5p0 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pfet_05v0 m=1 + w=16.8e-6 l=500n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pmos_5p0 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pfet_05v0 m=1 + w=10.08e-6 l=500n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 pd=15.36e-6 + nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pmos_5p0 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pfet_05v0 m=1 + w=6.72e-6 l=500n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pmos_5p0 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pfet_05v0 m=1 + w=6.72e-6 l=500n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pmos_5p0 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pfet_05v0 + m=1 w=10.08e-6 l=500n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=169.2e-15 ad=158.4e-15 ps=1.66e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.305556 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pmos_5p0 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pfet_05v0 + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pmos_5p0 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pfet_05v0 m=1 + w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S gnd! -+ pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S gnd! -+ pmos_5p0 m=1 w=2.58e-6 l=500n nf=3 as=825.6e-15 ad=825.6e-15 ps=5.36e-6 ++ pfet_05v0 m=1 w=2.58e-6 l=500n nf=3 as=825.6e-15 ad=825.6e-15 ps=5.36e-6 + pd=5.36e-6 nrd=0.124031 nrs=0.124031 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S gnd! -+ pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S gnd! -+ pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S gnd! -+ pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S gnd! -+ pmos_5p0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0 m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_5p0 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_05v0 m=1 w=360e-9 + l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn.src.cdl similarity index 88% rename from rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn.src.cdl index 2d6e3f21..de40a38c 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_5p0_dw +* Top Cell Name: sample_pfet_05v0_dn * View Name: schematic * Netlisted on: Sep 10 16:56:54 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_5p0_dw +* Cell Name: sample_pfet_05v0_dn * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_5p0_dw I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_05v0_dn I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -312,422 +312,422 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I gnd!:I MMP0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S gnd! pmos_5p0_dw m=1 w=16.8e-6 l=500n nf=5 ++ I1_lin_default_sFirst_0_R0_S gnd! pfet_05v0_dn m=1 w=16.8e-6 l=500n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D + I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! -+ pmos_5p0_dw m=1 w=1e-3 l=500n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 ++ pfet_05v0_dn m=1 w=1e-3 l=500n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 + pd=1.0052e-3 nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D + I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! -+ pmos_5p0_dw m=1 w=85.455e-6 l=500n nf=1 as=37.6002e-12 ad=37.6002e-12 ++ pfet_05v0_dn m=1 w=85.455e-6 l=500n nf=1 as=37.6002e-12 ad=37.6002e-12 + ps=171.79e-6 pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D + I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! -+ pmos_5p0_dw m=1 w=71.215e-6 l=500n nf=1 as=31.3346e-12 ad=31.3346e-12 ++ pfet_05v0_dn m=1 w=71.215e-6 l=500n nf=1 as=31.3346e-12 ad=31.3346e-12 + ps=143.31e-6 pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D + I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! -+ pmos_5p0_dw m=1 w=59.345e-6 l=500n nf=1 as=26.1118e-12 ad=26.1118e-12 ++ pfet_05v0_dn m=1 w=59.345e-6 l=500n nf=1 as=26.1118e-12 ad=26.1118e-12 + ps=119.57e-6 pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D + I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! -+ pmos_5p0_dw m=1 w=49.455e-6 l=500n nf=1 as=21.7602e-12 ad=21.7602e-12 ++ pfet_05v0_dn m=1 w=49.455e-6 l=500n nf=1 as=21.7602e-12 ad=21.7602e-12 + ps=99.79e-6 pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D + I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! -+ pmos_5p0_dw m=1 w=41.21e-6 l=500n nf=1 as=18.1324e-12 ad=18.1324e-12 ++ pfet_05v0_dn m=1 w=41.21e-6 l=500n nf=1 as=18.1324e-12 ad=18.1324e-12 + ps=83.3e-6 pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D + I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! -+ pmos_5p0_dw m=1 w=34.345e-6 l=500n nf=1 as=15.1118e-12 ad=15.1118e-12 ++ pfet_05v0_dn m=1 w=34.345e-6 l=500n nf=1 as=15.1118e-12 ad=15.1118e-12 + ps=69.57e-6 pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D + I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! -+ pmos_5p0_dw m=1 w=28.62e-6 l=500n nf=1 as=12.5928e-12 ad=12.5928e-12 ++ pfet_05v0_dn m=1 w=28.62e-6 l=500n nf=1 as=12.5928e-12 ad=12.5928e-12 + ps=58.12e-6 pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D + I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! -+ pmos_5p0_dw m=1 w=23.85e-6 l=500n nf=1 as=10.494e-12 ad=10.494e-12 ++ pfet_05v0_dn m=1 w=23.85e-6 l=500n nf=1 as=10.494e-12 ad=10.494e-12 + ps=48.58e-6 pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D + I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! -+ pmos_5p0_dw m=1 w=19.875e-6 l=500n nf=1 as=8.745e-12 ad=8.745e-12 ++ pfet_05v0_dn m=1 w=19.875e-6 l=500n nf=1 as=8.745e-12 ad=8.745e-12 + ps=40.63e-6 pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D + I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! -+ pmos_5p0_dw m=1 w=16.56e-6 l=500n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 ++ pfet_05v0_dn m=1 w=16.56e-6 l=500n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 + pd=34e-6 nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D + I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! -+ pmos_5p0_dw m=1 w=13.8e-6 l=500n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 ++ pfet_05v0_dn m=1 w=13.8e-6 l=500n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 + pd=28.48e-6 nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D + I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! -+ pmos_5p0_dw m=1 w=11.5e-6 l=500n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 ++ pfet_05v0_dn m=1 w=11.5e-6 l=500n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 + pd=23.88e-6 nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D + I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! -+ pmos_5p0_dw m=1 w=9.585e-6 l=500n nf=1 as=4.2174e-12 ad=4.2174e-12 ++ pfet_05v0_dn m=1 w=9.585e-6 l=500n nf=1 as=4.2174e-12 ad=4.2174e-12 + ps=20.05e-6 pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D + I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! -+ pmos_5p0_dw m=1 w=7.985e-6 l=500n nf=1 as=3.5134e-12 ad=3.5134e-12 ++ pfet_05v0_dn m=1 w=7.985e-6 l=500n nf=1 as=3.5134e-12 ad=3.5134e-12 + ps=16.85e-6 pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D + I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! -+ pmos_5p0_dw m=1 w=6.655e-6 l=500n nf=1 as=2.9282e-12 ad=2.9282e-12 ++ pfet_05v0_dn m=1 w=6.655e-6 l=500n nf=1 as=2.9282e-12 ad=2.9282e-12 + ps=14.19e-6 pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D + I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! -+ pmos_5p0_dw m=1 w=5.545e-6 l=500n nf=1 as=2.4398e-12 ad=2.4398e-12 ++ pfet_05v0_dn m=1 w=5.545e-6 l=500n nf=1 as=2.4398e-12 ad=2.4398e-12 + ps=11.97e-6 pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D + I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! -+ pmos_5p0_dw m=1 w=4.62e-6 l=500n nf=1 as=2.0328e-12 ad=2.0328e-12 ++ pfet_05v0_dn m=1 w=4.62e-6 l=500n nf=1 as=2.0328e-12 ad=2.0328e-12 + ps=10.12e-6 pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D + I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! -+ pmos_5p0_dw m=1 w=3.85e-6 l=500n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 ++ pfet_05v0_dn m=1 w=3.85e-6 l=500n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 + pd=8.58e-6 nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D + I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! -+ pmos_5p0_dw m=1 w=3.21e-6 l=500n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 ++ pfet_05v0_dn m=1 w=3.21e-6 l=500n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 + pd=7.3e-6 nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D + I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! -+ pmos_5p0_dw m=1 w=2.675e-6 l=500n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 ++ pfet_05v0_dn m=1 w=2.675e-6 l=500n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 + pd=6.23e-6 nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D + I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! -+ pmos_5p0_dw m=1 w=2.23e-6 l=500n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 ++ pfet_05v0_dn m=1 w=2.23e-6 l=500n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 + pd=5.34e-6 nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D + I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! -+ pmos_5p0_dw m=1 w=1.86e-6 l=500n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 ++ pfet_05v0_dn m=1 w=1.86e-6 l=500n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 + pd=4.6e-6 nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pfet_05v0_dn + m=1 w=1.55e-6 l=500n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pfet_05v0_dn + m=1 w=1.29e-6 l=500n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pfet_05v0_dn + m=1 w=1.075e-6 l=500n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pfet_05v0_dn + m=1 w=895e-9 l=500n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pfet_05v0_dn + m=1 w=745e-9 l=500n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pfet_05v0_dn + m=1 w=620e-9 l=500n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pfet_05v0_dn + m=1 w=520e-9 l=500n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pfet_05v0_dn + m=1 w=430e-9 l=500n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pfet_05v0_dn + m=1 w=300e-9 l=500n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_26_R0 I1_lin_default_l_26_R0_D I1_lin_default_l_26_R0_G -+ I1_lin_default_l_26_R0_S gnd! pmos_5p0_dw m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_26_R0_S gnd! pfet_05v0_dn m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=47.700u nf=1 ++ I1_lin_default_l_25_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=47.700u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=39.750u nf=1 ++ I1_lin_default_l_24_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=39.750u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=33.125u nf=1 ++ I1_lin_default_l_23_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=33.125u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=27.605u nf=1 ++ I1_lin_default_l_22_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=27.605u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=23.005u nf=1 ++ I1_lin_default_l_21_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=23.005u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=19.170u nf=1 ++ I1_lin_default_l_20_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=19.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=15.975u nf=1 ++ I1_lin_default_l_19_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=15.975u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=13.310u nf=1 ++ I1_lin_default_l_18_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=13.310u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=11.095u nf=1 ++ I1_lin_default_l_17_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=11.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=9.245u nf=1 ++ I1_lin_default_l_16_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=9.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=7.705u nf=1 ++ I1_lin_default_l_15_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=7.705u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=6.420u nf=1 ++ I1_lin_default_l_14_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=6.420u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=5.350u nf=1 ++ I1_lin_default_l_13_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=5.350u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=4.460u nf=1 ++ I1_lin_default_l_12_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=4.460u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=3.715u nf=1 ++ I1_lin_default_l_11_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=3.715u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=3.095u nf=1 ++ I1_lin_default_l_10_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=3.095u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=2.580u nf=1 ++ I1_lin_default_l_9_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=2.580u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=2.150u nf=1 ++ I1_lin_default_l_8_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=2.150u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=1.790u nf=1 ++ I1_lin_default_l_7_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=1.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=1.495u nf=1 ++ I1_lin_default_l_6_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=1.495u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=1.245u nf=1 ++ I1_lin_default_l_5_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=1.245u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=1.035u nf=1 ++ I1_lin_default_l_4_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=1.035u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=0.865u nf=1 ++ I1_lin_default_l_3_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=0.865u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=0.720u nf=1 ++ I1_lin_default_l_2_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=0.720u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=0.600u nf=1 ++ I1_lin_default_l_1_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=0.600u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=0.500u nf=1 ++ I1_lin_default_l_0_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=0.500u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_5p0_dw m=1 w=36e-6 l=500n nf=100 ++ I1_lin_default_nf_2_R0_S gnd! pfet_05v0_dn m=1 w=36e-6 l=500n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_5p0_dw m=1 w=18.36e-6 l=500n nf=51 ++ I1_lin_default_nf_1_R0_S gnd! pfet_05v0_dn m=1 w=18.36e-6 l=500n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 ++ I1_lin_default_nf_0_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_5p0_dw m=100 w=360e-9 l=500n nf=1 ++ I1_lin_default_m_2_R0_S gnd! pfet_05v0_dn m=100 w=360e-9 l=500n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_5p0_dw m=51 w=360e-9 l=500n nf=1 ++ I1_lin_default_m_1_R0_S gnd! pfet_05v0_dn m=51 w=360e-9 l=500n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 ++ I1_lin_default_m_0_R0_S gnd! pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ gnd! pmos_5p0_dw m=1 w=720e-9 l=500n nf=2 as=316.8e-15 ad=187.2e-15 ++ gnd! pfet_05v0_dn m=1 w=720e-9 l=500n nf=2 as=316.8e-15 ad=187.2e-15 + ps=3.2e-6 pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u + dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ gnd! pmos_5p0_dw m=1 w=900e-9 l=500n nf=3 as=529.2e-15 ad=529.2e-15 ++ gnd! pfet_05v0_dn m=1 w=900e-9 l=500n nf=3 as=529.2e-15 ad=529.2e-15 + ps=4.68e-6 pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u + sd=0.960u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ gnd! pmos_5p0_dw m=1 w=1.08e-6 l=500n nf=3 as=345.6e-15 ad=345.6e-15 ++ gnd! pfet_05v0_dn m=1 w=1.08e-6 l=500n nf=3 as=345.6e-15 ad=345.6e-15 + ps=3.36e-6 pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D + I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! -+ pmos_5p0_dw m=1 w=16.08e-6 l=500n nf=3 as=5.1456e-12 ad=5.1456e-12 ++ pfet_05v0_dn m=1 w=16.08e-6 l=500n nf=3 as=5.1456e-12 ad=5.1456e-12 + ps=23.36e-6 pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D + I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D + I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pfet_05v0_dn + m=1 w=26.8e-6 l=500n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pfet_05v0_dn + m=1 w=16.8e-6 l=500n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 + pd=23.12e-6 nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pfet_05v0_dn + m=1 w=10.08e-6 l=500n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pfet_05v0_dn + m=1 w=6.72e-6 l=500n nf=2 as=1.7472e-12 ad=2.9568e-12 ps=7.76e-6 pd=15.2e-6 + nrd=0.065476 nrs=0.038690 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pfet_05v0_dn + m=1 w=6.72e-6 l=500n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pfet_05v0_dn + m=1 w=10.08e-6 l=500n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=169.2e-15 ad=158.4e-15 ps=1.66e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.305556 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D + I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pmos_5p0_dw ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pfet_05v0_dn + m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S gnd! -+ pmos_5p0_dw m=1 w=25.08e-6 l=500n nf=3 as=8.0256e-12 ad=8.0256e-12 ++ pfet_05v0_dn m=1 w=25.08e-6 l=500n nf=3 as=8.0256e-12 ad=8.0256e-12 + ps=35.36e-6 pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S gnd! -+ pmos_5p0_dw m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_05v0_dn m=1 w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_5p0_dw m=1 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_05v0_dn m=1 + w=360e-9 l=500n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn_dss.src.cdl similarity index 84% rename from rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn_dss.src.cdl index c02c9f69..87d9476d 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_5p0_dw_sab +* Top Cell Name: sample_pfet_05v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 16:58:06 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_5p0_dw_sab +* Cell Name: sample_pfet_05v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_5p0_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_05v0_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -183,180 +183,180 @@ *.PININFO I1_lin_default_wf_3_R0_S:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_4_R0_G:I I1_lin_default_wf_4_R0_S:I gnd!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_5p0_dw_sab m=1 w=720.000u l=0.7u nf=18 ++ I1_lin_default_wf_4_R0_S gnd! pfet_05v0_dn_dss m=1 w=720.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_5p0_dw_sab m=1 w=622.080u l=0.7u nf=18 ++ I1_lin_default_wf_3_R0_S gnd! pfet_05v0_dn_dss m=1 w=622.080u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_5p0_dw_sab m=1 w=518.400u l=0.7u nf=18 ++ I1_lin_default_wf_2_R0_S gnd! pfet_05v0_dn_dss m=1 w=518.400u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_5p0_dw_sab m=1 w=432.000u l=0.7u nf=18 ++ I1_lin_default_wf_1_R0_S gnd! pfet_05v0_dn_dss m=1 w=432.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_5p0_dw_sab m=1 w=360.000u l=0.7u nf=18 ++ I1_lin_default_wf_0_R0_S gnd! pfet_05v0_dn_dss m=1 w=360.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=10.000u nf=18 ++ I1_lin_default_l_15_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=10.000u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=8.985u nf=18 ++ I1_lin_default_l_14_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=8.985u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=7.490u nf=18 ++ I1_lin_default_l_13_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=7.490u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=6.240u nf=18 ++ I1_lin_default_l_12_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=6.240u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=5.200u nf=18 ++ I1_lin_default_l_11_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=5.200u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=4.335u nf=18 ++ I1_lin_default_l_10_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=4.335u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=3.610u nf=18 ++ I1_lin_default_l_9_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=3.610u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=3.010u nf=18 ++ I1_lin_default_l_8_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=3.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=2.510u nf=18 ++ I1_lin_default_l_7_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=2.510u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=2.090u nf=18 ++ I1_lin_default_l_6_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=2.090u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=1.740u nf=18 ++ I1_lin_default_l_5_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=1.740u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=1.450u nf=18 ++ I1_lin_default_l_4_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=1.450u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=1.210u nf=18 ++ I1_lin_default_l_3_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=1.210u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=1.010u nf=18 ++ I1_lin_default_l_2_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=1.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=0.840u nf=18 ++ I1_lin_default_l_1_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=0.840u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=0.700u nf=18 ++ I1_lin_default_l_0_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=0.700u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_5p0_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_05v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S gnd! pmos_5p0_dw_sab m=1 w=600.000u l=0.7u nf=24 ++ I1_lin_default_nf_10_R0_S gnd! pfet_05v0_dn_dss m=1 w=600.000u l=0.7u nf=24 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S gnd! pmos_5p0_dw_sab m=1 w=550.000u l=0.7u nf=22 ++ I1_lin_default_nf_9_R0_S gnd! pfet_05v0_dn_dss m=1 w=550.000u l=0.7u nf=22 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S gnd! pmos_5p0_dw_sab m=1 w=500.000u l=0.7u nf=20 ++ I1_lin_default_nf_8_R0_S gnd! pfet_05v0_dn_dss m=1 w=500.000u l=0.7u nf=20 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S gnd! pmos_5p0_dw_sab m=1 w=450.000u l=0.7u nf=18 ++ I1_lin_default_nf_7_R0_S gnd! pfet_05v0_dn_dss m=1 w=450.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_5p0_dw_sab m=1 w=400.000u l=0.7u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_05v0_dn_dss m=1 w=400.000u l=0.7u nf=16 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_5p0_dw_sab m=1 w=350.000u l=0.7u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_05v0_dn_dss m=1 w=350.000u l=0.7u nf=14 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_5p0_dw_sab m=1 w=300.000u l=0.7u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_05v0_dn_dss m=1 w=300.000u l=0.7u nf=12 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_5p0_dw_sab m=1 w=250.000u l=0.7u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_05v0_dn_dss m=1 w=250.000u l=0.7u nf=10 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_5p0_dw_sab m=1 w=200.000u l=0.7u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_05v0_dn_dss m=1 w=200.000u l=0.7u nf=8 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_5p0_dw_sab m=1 w=150.000u l=0.7u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_05v0_dn_dss m=1 w=150.000u l=0.7u nf=6 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_5p0_dw_sab m=1 w=100.000u l=0.7u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_05v0_dn_dss m=1 w=100.000u l=0.7u nf=4 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_5p0_dw_sab m=3 w=450u l=0.7u nf=18 ++ I1_lin_default_m_2_R0_S gnd! pfet_05v0_dn_dss m=3 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_5p0_dw_sab m=2 w=450u l=0.7u nf=18 ++ I1_lin_default_m_1_R0_S gnd! pfet_05v0_dn_dss m=2 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_m_0_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_gns_1_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0 d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S gnd! pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_gns_0_R0_S gnd! pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S gnd! -+ pmos_5p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_5p0_dw_sab m=1 ++ pfet_05v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_05v0_dn_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_pmos_5p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dss.src.cdl index 35a2d4c2..759727e9 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_5p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_05v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_5p0_sab +* Top Cell Name: sample_pfet_05v0_dss * View Name: schematic * Netlisted on: Sep 10 16:59:20 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_5p0_sab +* Cell Name: sample_pfet_05v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_5p0_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_05v0_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -174,171 +174,171 @@ *.PININFO I1_lin_default_wf_4_R0_D:I I1_lin_default_wf_4_R0_G:I *.PININFO I1_lin_default_wf_4_R0_S:I gnd!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_5p0_sab m=1 w=720.000u l=0.7u nf=18 ++ I1_lin_default_wf_4_R0_S gnd! pfet_05v0_dss m=1 w=720.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_5p0_sab m=1 w=622.080u l=0.7u nf=18 ++ I1_lin_default_wf_3_R0_S gnd! pfet_05v0_dss m=1 w=622.080u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_5p0_sab m=1 w=518.400u l=0.7u nf=18 ++ I1_lin_default_wf_2_R0_S gnd! pfet_05v0_dss m=1 w=518.400u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_5p0_sab m=1 w=432.000u l=0.7u nf=18 ++ I1_lin_default_wf_1_R0_S gnd! pfet_05v0_dss m=1 w=432.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_5p0_sab m=1 w=360.000u l=0.7u nf=18 ++ I1_lin_default_wf_0_R0_S gnd! pfet_05v0_dss m=1 w=360.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_5p0_sab m=1 w=450u l=10.000u nf=18 ++ I1_lin_default_l_15_R0_S gnd! pfet_05v0_dss m=1 w=450u l=10.000u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_5p0_sab m=1 w=450u l=8.985u nf=18 ++ I1_lin_default_l_14_R0_S gnd! pfet_05v0_dss m=1 w=450u l=8.985u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_5p0_sab m=1 w=450u l=7.490u nf=18 ++ I1_lin_default_l_13_R0_S gnd! pfet_05v0_dss m=1 w=450u l=7.490u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_5p0_sab m=1 w=450u l=6.240u nf=18 ++ I1_lin_default_l_12_R0_S gnd! pfet_05v0_dss m=1 w=450u l=6.240u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_5p0_sab m=1 w=450u l=5.200u nf=18 ++ I1_lin_default_l_11_R0_S gnd! pfet_05v0_dss m=1 w=450u l=5.200u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_5p0_sab m=1 w=450u l=4.335u nf=18 ++ I1_lin_default_l_10_R0_S gnd! pfet_05v0_dss m=1 w=450u l=4.335u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_5p0_sab m=1 w=450u l=3.610u nf=18 ++ I1_lin_default_l_9_R0_S gnd! pfet_05v0_dss m=1 w=450u l=3.610u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_5p0_sab m=1 w=450u l=3.010u nf=18 ++ I1_lin_default_l_8_R0_S gnd! pfet_05v0_dss m=1 w=450u l=3.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_5p0_sab m=1 w=450u l=2.510u nf=18 ++ I1_lin_default_l_7_R0_S gnd! pfet_05v0_dss m=1 w=450u l=2.510u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_5p0_sab m=1 w=450u l=2.090u nf=18 ++ I1_lin_default_l_6_R0_S gnd! pfet_05v0_dss m=1 w=450u l=2.090u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_5p0_sab m=1 w=450u l=1.740u nf=18 ++ I1_lin_default_l_5_R0_S gnd! pfet_05v0_dss m=1 w=450u l=1.740u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_5p0_sab m=1 w=450u l=1.450u nf=18 ++ I1_lin_default_l_4_R0_S gnd! pfet_05v0_dss m=1 w=450u l=1.450u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_5p0_sab m=1 w=450u l=1.210u nf=18 ++ I1_lin_default_l_3_R0_S gnd! pfet_05v0_dss m=1 w=450u l=1.210u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_5p0_sab m=1 w=450u l=1.010u nf=18 ++ I1_lin_default_l_2_R0_S gnd! pfet_05v0_dss m=1 w=450u l=1.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_5p0_sab m=1 w=450u l=0.840u nf=18 ++ I1_lin_default_l_1_R0_S gnd! pfet_05v0_dss m=1 w=450u l=0.840u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_5p0_sab m=1 w=450u l=0.700u nf=18 ++ I1_lin_default_l_0_R0_S gnd! pfet_05v0_dss m=1 w=450u l=0.700u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_5p0_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_05v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S gnd! pmos_5p0_sab m=1 w=600.000u l=0.7u nf=24 ++ I1_lin_default_nf_10_R0_S gnd! pfet_05v0_dss m=1 w=600.000u l=0.7u nf=24 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S gnd! pmos_5p0_sab m=1 w=550.000u l=0.7u nf=22 ++ I1_lin_default_nf_9_R0_S gnd! pfet_05v0_dss m=1 w=550.000u l=0.7u nf=22 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S gnd! pmos_5p0_sab m=1 w=500.000u l=0.7u nf=20 ++ I1_lin_default_nf_8_R0_S gnd! pfet_05v0_dss m=1 w=500.000u l=0.7u nf=20 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S gnd! pmos_5p0_sab m=1 w=450.000u l=0.7u nf=18 ++ I1_lin_default_nf_7_R0_S gnd! pfet_05v0_dss m=1 w=450.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_5p0_sab m=1 w=400.000u l=0.7u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_05v0_dss m=1 w=400.000u l=0.7u nf=16 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_5p0_sab m=1 w=350.000u l=0.7u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_05v0_dss m=1 w=350.000u l=0.7u nf=14 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_5p0_sab m=1 w=300.000u l=0.7u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_05v0_dss m=1 w=300.000u l=0.7u nf=12 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_5p0_sab m=1 w=250.000u l=0.7u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_05v0_dss m=1 w=250.000u l=0.7u nf=10 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_5p0_sab m=1 w=200.000u l=0.7u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_05v0_dss m=1 w=200.000u l=0.7u nf=8 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_5p0_sab m=1 w=150.000u l=0.7u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_05v0_dss m=1 w=150.000u l=0.7u nf=6 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_5p0_sab m=1 w=100.000u l=0.7u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_05v0_dss m=1 w=100.000u l=0.7u nf=4 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_5p0_sab m=3 w=450u l=0.7u nf=18 ++ I1_lin_default_m_2_R0_S gnd! pfet_05v0_dss m=3 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_5p0_sab m=2 w=450u l=0.7u nf=18 ++ I1_lin_default_m_1_R0_S gnd! pfet_05v0_dss m=2 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_5p0_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_m_0_R0_S gnd! pfet_05v0_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_5p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_5p0_sab m=1 ++ pfet_05v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_05v0_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0.src.cdl similarity index 91% rename from rules/klayout/lvs/testing/testcases/sample_pmos_6p0.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_06v0.src.cdl index 66c3d1d1..e4386a03 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_6p0 +* Top Cell Name: sample_pfet_06v0 * View Name: schematic * Netlisted on: Sep 10 17:00:31 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_6p0 +* Cell Name: sample_pfet_06v0 * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_6p0 I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_06v0 I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -296,387 +296,387 @@ *.PININFO I1_lin_default_tapCntRows_4_R0_S:I I1_lin_default_topTap_0_R0_D:I *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I gnd!:I MMP0 I1_lin_default_sFirst_0_R0_D I1_lin_default_sFirst_0_R0_G -+ I1_lin_default_sFirst_0_R0_S gnd! pmos_6p0 m=1 w=16.8e-6 l=550n nf=5 ++ I1_lin_default_sFirst_0_R0_S gnd! pfet_06v0 m=1 w=16.8e-6 l=550n nf=5 + as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 nrd=0.017619 + nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D -+ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! pfet_06v0 + m=1 w=1e-3 l=550n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 pd=1.0052e-3 + nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D -+ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! pfet_06v0 + m=1 w=85.455e-6 l=550n nf=1 as=37.6002e-12 ad=37.6002e-12 ps=171.79e-6 + pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D -+ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! pfet_06v0 + m=1 w=71.215e-6 l=550n nf=1 as=31.3346e-12 ad=31.3346e-12 ps=143.31e-6 + pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D -+ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! pfet_06v0 + m=1 w=59.345e-6 l=550n nf=1 as=26.1118e-12 ad=26.1118e-12 ps=119.57e-6 + pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u sd=0u dtemp=0 + par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D -+ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! pfet_06v0 + m=1 w=49.455e-6 l=550n nf=1 as=21.7602e-12 ad=21.7602e-12 ps=99.79e-6 + pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D -+ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! pfet_06v0 + m=1 w=41.21e-6 l=550n nf=1 as=18.1324e-12 ad=18.1324e-12 ps=83.3e-6 + pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D -+ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! pfet_06v0 + m=1 w=34.345e-6 l=550n nf=1 as=15.1118e-12 ad=15.1118e-12 ps=69.57e-6 + pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D -+ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! pfet_06v0 + m=1 w=28.62e-6 l=550n nf=1 as=12.5928e-12 ad=12.5928e-12 ps=58.12e-6 + pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D -+ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! pfet_06v0 + m=1 w=23.85e-6 l=550n nf=1 as=10.494e-12 ad=10.494e-12 ps=48.58e-6 + pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D -+ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! pfet_06v0 + m=1 w=19.875e-6 l=550n nf=1 as=8.745e-12 ad=8.745e-12 ps=40.63e-6 + pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D -+ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! pfet_06v0 + m=1 w=16.56e-6 l=550n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 pd=34e-6 + nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D -+ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! pfet_06v0 + m=1 w=13.8e-6 l=550n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 pd=28.48e-6 + nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D -+ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! pfet_06v0 + m=1 w=11.5e-6 l=550n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 pd=23.88e-6 + nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D -+ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! pfet_06v0 + m=1 w=9.585e-6 l=550n nf=1 as=4.2174e-12 ad=4.2174e-12 ps=20.05e-6 + pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D -+ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! pfet_06v0 + m=1 w=7.985e-6 l=550n nf=1 as=3.5134e-12 ad=3.5134e-12 ps=16.85e-6 + pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D -+ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! pfet_06v0 + m=1 w=6.655e-6 l=550n nf=1 as=2.9282e-12 ad=2.9282e-12 ps=14.19e-6 + pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D -+ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! pfet_06v0 + m=1 w=5.545e-6 l=550n nf=1 as=2.4398e-12 ad=2.4398e-12 ps=11.97e-6 + pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D -+ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! pfet_06v0 + m=1 w=4.62e-6 l=550n nf=1 as=2.0328e-12 ad=2.0328e-12 ps=10.12e-6 + pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D -+ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! pfet_06v0 + m=1 w=3.85e-6 l=550n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 pd=8.58e-6 + nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D -+ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! pfet_06v0 + m=1 w=3.21e-6 l=550n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 pd=7.3e-6 + nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D -+ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! pfet_06v0 + m=1 w=2.675e-6 l=550n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 pd=6.23e-6 + nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D -+ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! pfet_06v0 + m=1 w=2.23e-6 l=550n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 pd=5.34e-6 + nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D -+ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! pfet_06v0 + m=1 w=1.86e-6 l=550n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 pd=4.6e-6 + nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pfet_06v0 + m=1 w=1.55e-6 l=550n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pfet_06v0 + m=1 w=1.29e-6 l=550n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pfet_06v0 + m=1 w=1.075e-6 l=550n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pfet_06v0 + m=1 w=895e-9 l=550n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pfet_06v0 + m=1 w=745e-9 l=550n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pfet_06v0 + m=1 w=620e-9 l=550n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pfet_06v0 + m=1 w=520e-9 l=550n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pfet_06v0 + m=1 w=430e-9 l=550n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pfet_06v0 + m=1 w=300e-9 l=550n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S gnd! pmos_6p0 m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_25_R0_S gnd! pfet_06v0 m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=43.725u nf=1 ++ I1_lin_default_l_24_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=43.725u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=36.435u nf=1 ++ I1_lin_default_l_23_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=36.435u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=30.365u nf=1 ++ I1_lin_default_l_22_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=30.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=25.305u nf=1 ++ I1_lin_default_l_21_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=25.305u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=21.085u nf=1 ++ I1_lin_default_l_20_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=21.085u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=17.570u nf=1 ++ I1_lin_default_l_19_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=17.570u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=14.645u nf=1 ++ I1_lin_default_l_18_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=14.645u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=12.200u nf=1 ++ I1_lin_default_l_17_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=12.200u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=10.170u nf=1 ++ I1_lin_default_l_16_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=10.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=8.475u nf=1 ++ I1_lin_default_l_15_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=8.475u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=7.060u nf=1 ++ I1_lin_default_l_14_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=7.060u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=5.885u nf=1 ++ I1_lin_default_l_13_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=5.885u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=4.905u nf=1 ++ I1_lin_default_l_12_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=4.905u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=4.085u nf=1 ++ I1_lin_default_l_11_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=4.085u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=3.405u nf=1 ++ I1_lin_default_l_10_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=3.405u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=2.840u nf=1 ++ I1_lin_default_l_9_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=2.840u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=2.365u nf=1 ++ I1_lin_default_l_8_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=2.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=1.970u nf=1 ++ I1_lin_default_l_7_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=1.970u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=1.640u nf=1 ++ I1_lin_default_l_6_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=1.640u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=1.370u nf=1 ++ I1_lin_default_l_5_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=1.370u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=1.140u nf=1 ++ I1_lin_default_l_4_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=1.140u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=0.950u nf=1 ++ I1_lin_default_l_3_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=0.950u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=0.790u nf=1 ++ I1_lin_default_l_2_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=0.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=0.660u nf=1 ++ I1_lin_default_l_1_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=0.660u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=0.550u nf=1 ++ I1_lin_default_l_0_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=0.550u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_6p0 m=1 w=36e-6 l=550n nf=100 ++ I1_lin_default_nf_2_R0_S gnd! pfet_06v0 m=1 w=36e-6 l=550n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_6p0 m=1 w=18.36e-6 l=550n nf=51 ++ I1_lin_default_nf_1_R0_S gnd! pfet_06v0 m=1 w=18.36e-6 l=550n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ++ I1_lin_default_nf_0_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_6p0 m=100 w=360e-9 l=550n nf=1 ++ I1_lin_default_m_2_R0_S gnd! pfet_06v0 m=100 w=360e-9 l=550n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_6p0 m=51 w=360e-9 l=550n nf=1 as=158.4e-15 ++ I1_lin_default_m_1_R0_S gnd! pfet_06v0 m=51 w=360e-9 l=550n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ++ I1_lin_default_m_0_R0_S gnd! pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 + ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u + sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D -+ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pmos_6p0 ++ I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D -+ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pmos_6p0 ++ I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D -+ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pfet_06v0 + m=1 w=26.8e-6 l=550n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sFirst_0_R0 I1_lin_default_sFirst_0_R0_D -+ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pmos_6p0 m=1 ++ I1_lin_default_sFirst_0_R0_G I1_lin_default_sFirst_0_R0_S gnd! pfet_06v0 m=1 + w=16.8e-6 l=550n nf=5 as=4.9728e-12 ad=4.9728e-12 ps=23.12e-6 pd=23.12e-6 + nrd=0.017619 nrs=0.017619 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pmos_6p0 m=1 ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pfet_06v0 m=1 + w=10.08e-6 l=550n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 pd=15.36e-6 + nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pmos_6p0 m=1 ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pfet_06v0 m=1 + w=6.72e-6 l=550n nf=2 as=1.7472e-12 ad=2.9568e-12 ps=7.76e-6 pd=15.2e-6 + nrd=0.065476 nrs=0.038690 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pmos_6p0 m=1 ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pfet_06v0 m=1 + w=6.72e-6 l=550n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pmos_6p0 ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pfet_06v0 + m=1 w=1.08e-6 l=550n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 pd=3.36e-6 + nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=169.2e-15 ad=158.4e-15 ps=1.66e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.305556 sa=0.470u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D -+ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pmos_6p0 ++ I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! pfet_06v0 + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pmos_6p0 m=1 ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pfet_06v0 m=1 + w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S gnd! -+ pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S gnd! -+ pmos_6p0 m=1 w=25.08e-6 l=550n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 ++ pfet_06v0 m=1 w=25.08e-6 l=550n nf=3 as=8.0256e-12 ad=8.0256e-12 ps=35.36e-6 + pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S gnd! -+ pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S gnd! -+ pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S gnd! -+ pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S gnd! -+ pmos_6p0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0 m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_6p0 m=1 w=360e-9 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_06v0 m=1 w=360e-9 + l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 + nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn.src.cdl similarity index 88% rename from rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn.src.cdl index 0c4be52a..a9eee43c 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_6p0_dw +* Top Cell Name: sample_pfet_06v0_dn * View Name: schematic * Netlisted on: Sep 10 17:01:45 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_6p0_dw +* Cell Name: sample_pfet_06v0_dn * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_6p0_dw I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_06v0_dn I1_default_D I1_default_G I1_default_S + I1_lin_default_bodytie_0_R0_D I1_lin_default_bodytie_0_R0_G + I1_lin_default_bodytie_0_R0_S I1_lin_default_bodytie_1_R0_D + I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S @@ -307,407 +307,407 @@ *.PININFO I1_lin_default_topTap_0_R0_G:I I1_lin_default_topTap_0_R0_S:I gnd!:I MI1_lin_default_fingerW_32_R0 I1_lin_default_fingerW_32_R0_D + I1_lin_default_fingerW_32_R0_G I1_lin_default_fingerW_32_R0_S gnd! -+ pmos_6p0_dw m=1 w=1e-3 l=550n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 ++ pfet_06v0_dn m=1 w=1e-3 l=550n nf=10 as=296e-12 ad=260e-12 ps=1.20592e-3 + pd=1.0052e-3 nrd=0.000260 nrs=0.000296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_fingerW_31_R0 I1_lin_default_fingerW_31_R0_D + I1_lin_default_fingerW_31_R0_G I1_lin_default_fingerW_31_R0_S gnd! -+ pmos_6p0_dw m=1 w=85.455e-6 l=550n nf=1 as=37.6002e-12 ad=37.6002e-12 ++ pfet_06v0_dn m=1 w=85.455e-6 l=550n nf=1 as=37.6002e-12 ad=37.6002e-12 + ps=171.79e-6 pd=171.79e-6 nrd=0.005149 nrs=0.005149 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_30_R0 I1_lin_default_fingerW_30_R0_D + I1_lin_default_fingerW_30_R0_G I1_lin_default_fingerW_30_R0_S gnd! -+ pmos_6p0_dw m=1 w=71.215e-6 l=550n nf=1 as=31.3346e-12 ad=31.3346e-12 ++ pfet_06v0_dn m=1 w=71.215e-6 l=550n nf=1 as=31.3346e-12 ad=31.3346e-12 + ps=143.31e-6 pd=143.31e-6 nrd=0.006178 nrs=0.006178 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_29_R0 I1_lin_default_fingerW_29_R0_D + I1_lin_default_fingerW_29_R0_G I1_lin_default_fingerW_29_R0_S gnd! -+ pmos_6p0_dw m=1 w=59.345e-6 l=550n nf=1 as=26.1118e-12 ad=26.1118e-12 ++ pfet_06v0_dn m=1 w=59.345e-6 l=550n nf=1 as=26.1118e-12 ad=26.1118e-12 + ps=119.57e-6 pd=119.57e-6 nrd=0.007414 nrs=0.007414 sa=0.440u sb=0.440u + sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_28_R0 I1_lin_default_fingerW_28_R0_D + I1_lin_default_fingerW_28_R0_G I1_lin_default_fingerW_28_R0_S gnd! -+ pmos_6p0_dw m=1 w=49.455e-6 l=550n nf=1 as=21.7602e-12 ad=21.7602e-12 ++ pfet_06v0_dn m=1 w=49.455e-6 l=550n nf=1 as=21.7602e-12 ad=21.7602e-12 + ps=99.79e-6 pd=99.79e-6 nrd=0.008897 nrs=0.008897 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_27_R0 I1_lin_default_fingerW_27_R0_D + I1_lin_default_fingerW_27_R0_G I1_lin_default_fingerW_27_R0_S gnd! -+ pmos_6p0_dw m=1 w=41.21e-6 l=550n nf=1 as=18.1324e-12 ad=18.1324e-12 ++ pfet_06v0_dn m=1 w=41.21e-6 l=550n nf=1 as=18.1324e-12 ad=18.1324e-12 + ps=83.3e-6 pd=83.3e-6 nrd=0.010677 nrs=0.010677 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_26_R0 I1_lin_default_fingerW_26_R0_D + I1_lin_default_fingerW_26_R0_G I1_lin_default_fingerW_26_R0_S gnd! -+ pmos_6p0_dw m=1 w=34.345e-6 l=550n nf=1 as=15.1118e-12 ad=15.1118e-12 ++ pfet_06v0_dn m=1 w=34.345e-6 l=550n nf=1 as=15.1118e-12 ad=15.1118e-12 + ps=69.57e-6 pd=69.57e-6 nrd=0.012811 nrs=0.012811 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_25_R0 I1_lin_default_fingerW_25_R0_D + I1_lin_default_fingerW_25_R0_G I1_lin_default_fingerW_25_R0_S gnd! -+ pmos_6p0_dw m=1 w=28.62e-6 l=550n nf=1 as=12.5928e-12 ad=12.5928e-12 ++ pfet_06v0_dn m=1 w=28.62e-6 l=550n nf=1 as=12.5928e-12 ad=12.5928e-12 + ps=58.12e-6 pd=58.12e-6 nrd=0.015374 nrs=0.015374 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_24_R0 I1_lin_default_fingerW_24_R0_D + I1_lin_default_fingerW_24_R0_G I1_lin_default_fingerW_24_R0_S gnd! -+ pmos_6p0_dw m=1 w=23.85e-6 l=550n nf=1 as=10.494e-12 ad=10.494e-12 ++ pfet_06v0_dn m=1 w=23.85e-6 l=550n nf=1 as=10.494e-12 ad=10.494e-12 + ps=48.58e-6 pd=48.58e-6 nrd=0.018449 nrs=0.018449 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_23_R0 I1_lin_default_fingerW_23_R0_D + I1_lin_default_fingerW_23_R0_G I1_lin_default_fingerW_23_R0_S gnd! -+ pmos_6p0_dw m=1 w=19.875e-6 l=550n nf=1 as=8.745e-12 ad=8.745e-12 ++ pfet_06v0_dn m=1 w=19.875e-6 l=550n nf=1 as=8.745e-12 ad=8.745e-12 + ps=40.63e-6 pd=40.63e-6 nrd=0.022138 nrs=0.022138 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_22_R0 I1_lin_default_fingerW_22_R0_D + I1_lin_default_fingerW_22_R0_G I1_lin_default_fingerW_22_R0_S gnd! -+ pmos_6p0_dw m=1 w=16.56e-6 l=550n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 ++ pfet_06v0_dn m=1 w=16.56e-6 l=550n nf=1 as=7.2864e-12 ad=7.2864e-12 ps=34e-6 + pd=34e-6 nrd=0.026570 nrs=0.026570 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_21_R0 I1_lin_default_fingerW_21_R0_D + I1_lin_default_fingerW_21_R0_G I1_lin_default_fingerW_21_R0_S gnd! -+ pmos_6p0_dw m=1 w=13.8e-6 l=550n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 ++ pfet_06v0_dn m=1 w=13.8e-6 l=550n nf=1 as=6.072e-12 ad=6.072e-12 ps=28.48e-6 + pd=28.48e-6 nrd=0.031884 nrs=0.031884 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_20_R0 I1_lin_default_fingerW_20_R0_D + I1_lin_default_fingerW_20_R0_G I1_lin_default_fingerW_20_R0_S gnd! -+ pmos_6p0_dw m=1 w=11.5e-6 l=550n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 ++ pfet_06v0_dn m=1 w=11.5e-6 l=550n nf=1 as=5.06e-12 ad=5.06e-12 ps=23.88e-6 + pd=23.88e-6 nrd=0.038261 nrs=0.038261 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_19_R0 I1_lin_default_fingerW_19_R0_D + I1_lin_default_fingerW_19_R0_G I1_lin_default_fingerW_19_R0_S gnd! -+ pmos_6p0_dw m=1 w=9.585e-6 l=550n nf=1 as=4.2174e-12 ad=4.2174e-12 ++ pfet_06v0_dn m=1 w=9.585e-6 l=550n nf=1 as=4.2174e-12 ad=4.2174e-12 + ps=20.05e-6 pd=20.05e-6 nrd=0.045905 nrs=0.045905 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_18_R0 I1_lin_default_fingerW_18_R0_D + I1_lin_default_fingerW_18_R0_G I1_lin_default_fingerW_18_R0_S gnd! -+ pmos_6p0_dw m=1 w=7.985e-6 l=550n nf=1 as=3.5134e-12 ad=3.5134e-12 ++ pfet_06v0_dn m=1 w=7.985e-6 l=550n nf=1 as=3.5134e-12 ad=3.5134e-12 + ps=16.85e-6 pd=16.85e-6 nrd=0.055103 nrs=0.055103 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_17_R0 I1_lin_default_fingerW_17_R0_D + I1_lin_default_fingerW_17_R0_G I1_lin_default_fingerW_17_R0_S gnd! -+ pmos_6p0_dw m=1 w=6.655e-6 l=550n nf=1 as=2.9282e-12 ad=2.9282e-12 ++ pfet_06v0_dn m=1 w=6.655e-6 l=550n nf=1 as=2.9282e-12 ad=2.9282e-12 + ps=14.19e-6 pd=14.19e-6 nrd=0.066116 nrs=0.066116 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_16_R0 I1_lin_default_fingerW_16_R0_D + I1_lin_default_fingerW_16_R0_G I1_lin_default_fingerW_16_R0_S gnd! -+ pmos_6p0_dw m=1 w=5.545e-6 l=550n nf=1 as=2.4398e-12 ad=2.4398e-12 ++ pfet_06v0_dn m=1 w=5.545e-6 l=550n nf=1 as=2.4398e-12 ad=2.4398e-12 + ps=11.97e-6 pd=11.97e-6 nrd=0.079351 nrs=0.079351 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_15_R0 I1_lin_default_fingerW_15_R0_D + I1_lin_default_fingerW_15_R0_G I1_lin_default_fingerW_15_R0_S gnd! -+ pmos_6p0_dw m=1 w=4.62e-6 l=550n nf=1 as=2.0328e-12 ad=2.0328e-12 ++ pfet_06v0_dn m=1 w=4.62e-6 l=550n nf=1 as=2.0328e-12 ad=2.0328e-12 + ps=10.12e-6 pd=10.12e-6 nrd=0.095238 nrs=0.095238 sa=0.440u sb=0.440u sd=0u + dtemp=0 par=1 MI1_lin_default_fingerW_14_R0 I1_lin_default_fingerW_14_R0_D + I1_lin_default_fingerW_14_R0_G I1_lin_default_fingerW_14_R0_S gnd! -+ pmos_6p0_dw m=1 w=3.85e-6 l=550n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 ++ pfet_06v0_dn m=1 w=3.85e-6 l=550n nf=1 as=1.694e-12 ad=1.694e-12 ps=8.58e-6 + pd=8.58e-6 nrd=0.114286 nrs=0.114286 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_13_R0 I1_lin_default_fingerW_13_R0_D + I1_lin_default_fingerW_13_R0_G I1_lin_default_fingerW_13_R0_S gnd! -+ pmos_6p0_dw m=1 w=3.21e-6 l=550n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 ++ pfet_06v0_dn m=1 w=3.21e-6 l=550n nf=1 as=1.4124e-12 ad=1.4124e-12 ps=7.3e-6 + pd=7.3e-6 nrd=0.137072 nrs=0.137072 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_12_R0 I1_lin_default_fingerW_12_R0_D + I1_lin_default_fingerW_12_R0_G I1_lin_default_fingerW_12_R0_S gnd! -+ pmos_6p0_dw m=1 w=2.675e-6 l=550n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 ++ pfet_06v0_dn m=1 w=2.675e-6 l=550n nf=1 as=1.177e-12 ad=1.177e-12 ps=6.23e-6 + pd=6.23e-6 nrd=0.164486 nrs=0.164486 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_11_R0 I1_lin_default_fingerW_11_R0_D + I1_lin_default_fingerW_11_R0_G I1_lin_default_fingerW_11_R0_S gnd! -+ pmos_6p0_dw m=1 w=2.23e-6 l=550n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 ++ pfet_06v0_dn m=1 w=2.23e-6 l=550n nf=1 as=981.2e-15 ad=981.2e-15 ps=5.34e-6 + pd=5.34e-6 nrd=0.197309 nrs=0.197309 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_10_R0 I1_lin_default_fingerW_10_R0_D + I1_lin_default_fingerW_10_R0_G I1_lin_default_fingerW_10_R0_S gnd! -+ pmos_6p0_dw m=1 w=1.86e-6 l=550n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 ++ pfet_06v0_dn m=1 w=1.86e-6 l=550n nf=1 as=818.4e-15 ad=818.4e-15 ps=4.6e-6 + pd=4.6e-6 nrd=0.236559 nrs=0.236559 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_9_R0 I1_lin_default_fingerW_9_R0_D -+ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_9_R0_G I1_lin_default_fingerW_9_R0_S gnd! pfet_06v0_dn + m=1 w=1.55e-6 l=550n nf=1 as=682e-15 ad=682e-15 ps=3.98e-6 pd=3.98e-6 + nrd=0.283871 nrs=0.283871 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_8_R0 I1_lin_default_fingerW_8_R0_D -+ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_8_R0_G I1_lin_default_fingerW_8_R0_S gnd! pfet_06v0_dn + m=1 w=1.29e-6 l=550n nf=1 as=567.6e-15 ad=567.6e-15 ps=3.46e-6 pd=3.46e-6 + nrd=0.341085 nrs=0.341085 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_7_R0 I1_lin_default_fingerW_7_R0_D -+ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_7_R0_G I1_lin_default_fingerW_7_R0_S gnd! pfet_06v0_dn + m=1 w=1.075e-6 l=550n nf=1 as=473e-15 ad=473e-15 ps=3.03e-6 pd=3.03e-6 + nrd=0.409302 nrs=0.409302 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_6_R0 I1_lin_default_fingerW_6_R0_D -+ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_6_R0_G I1_lin_default_fingerW_6_R0_S gnd! pfet_06v0_dn + m=1 w=895e-9 l=550n nf=1 as=393.8e-15 ad=393.8e-15 ps=2.67e-6 pd=2.67e-6 + nrd=0.491620 nrs=0.491620 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_5_R0 I1_lin_default_fingerW_5_R0_D -+ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_5_R0_G I1_lin_default_fingerW_5_R0_S gnd! pfet_06v0_dn + m=1 w=745e-9 l=550n nf=1 as=327.8e-15 ad=327.8e-15 ps=2.37e-6 pd=2.37e-6 + nrd=0.590604 nrs=0.590604 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_4_R0 I1_lin_default_fingerW_4_R0_D -+ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_4_R0_G I1_lin_default_fingerW_4_R0_S gnd! pfet_06v0_dn + m=1 w=620e-9 l=550n nf=1 as=272.8e-15 ad=272.8e-15 ps=2.12e-6 pd=2.12e-6 + nrd=0.709677 nrs=0.709677 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_3_R0 I1_lin_default_fingerW_3_R0_D -+ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_3_R0_G I1_lin_default_fingerW_3_R0_S gnd! pfet_06v0_dn + m=1 w=520e-9 l=550n nf=1 as=228.8e-15 ad=228.8e-15 ps=1.92e-6 pd=1.92e-6 + nrd=0.846154 nrs=0.846154 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_2_R0 I1_lin_default_fingerW_2_R0_D -+ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_2_R0_G I1_lin_default_fingerW_2_R0_S gnd! pfet_06v0_dn + m=1 w=430e-9 l=550n nf=1 as=189.2e-15 ad=189.2e-15 ps=1.74e-6 pd=1.74e-6 + nrd=1.023256 nrs=1.023256 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_1_R0 I1_lin_default_fingerW_1_R0_D -+ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_1_R0_G I1_lin_default_fingerW_1_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_fingerW_0_R0 I1_lin_default_fingerW_0_R0_D -+ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_fingerW_0_R0_G I1_lin_default_fingerW_0_R0_S gnd! pfet_06v0_dn + m=1 w=300e-9 l=550n nf=1 as=219.6e-15 ad=219.6e-15 ps=2.04e-6 pd=2.04e-6 + nrd=2.440000 nrs=2.440000 sa=0.660u sb=0.660u sd=0u dtemp=0 par=1 MI1_lin_default_l_25_R0 I1_lin_default_l_25_R0_D I1_lin_default_l_25_R0_G -+ I1_lin_default_l_25_R0_S gnd! pmos_6p0_dw m=1 w=1.8e-6 l=50.000u nf=5 ++ I1_lin_default_l_25_R0_S gnd! pfet_06v0_dn m=1 w=1.8e-6 l=50.000u nf=5 + as=532.8e-15 ad=532.8e-15 ps=5.12e-6 pd=5.12e-6 nrd=0.164444 nrs=0.164444 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_l_24_R0 I1_lin_default_l_24_R0_D I1_lin_default_l_24_R0_G -+ I1_lin_default_l_24_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=43.725u nf=1 ++ I1_lin_default_l_24_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=43.725u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_23_R0 I1_lin_default_l_23_R0_D I1_lin_default_l_23_R0_G -+ I1_lin_default_l_23_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=36.435u nf=1 ++ I1_lin_default_l_23_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=36.435u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_22_R0 I1_lin_default_l_22_R0_D I1_lin_default_l_22_R0_G -+ I1_lin_default_l_22_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=30.365u nf=1 ++ I1_lin_default_l_22_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=30.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_21_R0 I1_lin_default_l_21_R0_D I1_lin_default_l_21_R0_G -+ I1_lin_default_l_21_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=25.305u nf=1 ++ I1_lin_default_l_21_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=25.305u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=21.085u nf=1 ++ I1_lin_default_l_20_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=21.085u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=17.570u nf=1 ++ I1_lin_default_l_19_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=17.570u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=14.645u nf=1 ++ I1_lin_default_l_18_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=14.645u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=12.200u nf=1 ++ I1_lin_default_l_17_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=12.200u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=10.170u nf=1 ++ I1_lin_default_l_16_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=10.170u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=8.475u nf=1 ++ I1_lin_default_l_15_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=8.475u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=7.060u nf=1 ++ I1_lin_default_l_14_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=7.060u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=5.885u nf=1 ++ I1_lin_default_l_13_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=5.885u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=4.905u nf=1 ++ I1_lin_default_l_12_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=4.905u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=4.085u nf=1 ++ I1_lin_default_l_11_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=4.085u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=3.405u nf=1 ++ I1_lin_default_l_10_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=3.405u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=2.840u nf=1 ++ I1_lin_default_l_9_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=2.840u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=2.365u nf=1 ++ I1_lin_default_l_8_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=2.365u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=1.970u nf=1 ++ I1_lin_default_l_7_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=1.970u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=1.640u nf=1 ++ I1_lin_default_l_6_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=1.640u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=1.370u nf=1 ++ I1_lin_default_l_5_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=1.370u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=1.140u nf=1 ++ I1_lin_default_l_4_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=1.140u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=0.950u nf=1 ++ I1_lin_default_l_3_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=0.950u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=0.790u nf=1 ++ I1_lin_default_l_2_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=0.790u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=0.660u nf=1 ++ I1_lin_default_l_1_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=0.660u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=0.550u nf=1 ++ I1_lin_default_l_0_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=0.550u nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_6p0_dw m=1 w=36e-6 l=550n nf=100 ++ I1_lin_default_nf_2_R0_S gnd! pfet_06v0_dn m=1 w=36e-6 l=550n nf=100 + as=9.4896e-12 ad=9.36e-12 ps=89.44e-6 pd=88e-6 nrd=0.007222 nrs=0.007322 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_6p0_dw m=1 w=18.36e-6 l=550n nf=51 ++ I1_lin_default_nf_1_R0_S gnd! pfet_06v0_dn m=1 w=18.36e-6 l=550n nf=51 + as=4.8384e-12 ad=4.8384e-12 ps=45.6e-6 pd=45.6e-6 nrd=0.014353 nrs=0.014353 + sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 ++ I1_lin_default_nf_0_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_6p0_dw m=100 w=360e-9 l=550n nf=1 ++ I1_lin_default_m_2_R0_S gnd! pfet_06v0_dn m=100 w=360e-9 l=550n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=100 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_6p0_dw m=51 w=360e-9 l=550n nf=1 ++ I1_lin_default_m_1_R0_S gnd! pfet_06v0_dn m=51 w=360e-9 l=550n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=51 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 ++ I1_lin_default_m_0_R0_S gnd! pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 + as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 nrd=1.222222 nrs=1.222222 + sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_calculatedParam_2_R0 I1_lin_default_calculatedParam_2_R0_D + I1_lin_default_calculatedParam_2_R0_G I1_lin_default_calculatedParam_2_R0_S -+ gnd! pmos_6p0_dw m=1 w=720e-9 l=550n nf=2 as=316.8e-15 ad=187.2e-15 ++ gnd! pfet_06v0_dn m=1 w=720e-9 l=550n nf=2 as=316.8e-15 ad=187.2e-15 + ps=3.2e-6 pd=1.76e-6 nrd=0.361111 nrs=0.611111 sa=0.440u sb=0.440u sd=0.520u + dtemp=0 par=1 MI1_lin_default_calculatedParam_1_R0 I1_lin_default_calculatedParam_1_R0_D + I1_lin_default_calculatedParam_1_R0_G I1_lin_default_calculatedParam_1_R0_S -+ gnd! pmos_6p0_dw m=1 w=900e-9 l=550n nf=3 as=529.2e-15 ad=529.2e-15 ++ gnd! pfet_06v0_dn m=1 w=900e-9 l=550n nf=3 as=529.2e-15 ad=529.2e-15 + ps=4.68e-6 pd=4.68e-6 nrd=0.653333 nrs=0.653333 sa=0.660u sb=0.660u + sd=0.960u dtemp=0 par=1 MI1_lin_default_calculatedParam_0_R0 I1_lin_default_calculatedParam_0_R0_D + I1_lin_default_calculatedParam_0_R0_G I1_lin_default_calculatedParam_0_R0_S -+ gnd! pmos_6p0_dw m=1 w=1.08e-6 l=550n nf=3 as=345.6e-15 ad=345.6e-15 ++ gnd! pfet_06v0_dn m=1 w=1.08e-6 l=550n nf=3 as=345.6e-15 ad=345.6e-15 + ps=3.36e-6 pd=3.36e-6 nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_2_R0 I1_lin_default_gateConn_2_R0_D + I1_lin_default_gateConn_2_R0_G I1_lin_default_gateConn_2_R0_S gnd! -+ pmos_6p0_dw m=1 w=16.08e-6 l=550n nf=3 as=5.1456e-12 ad=5.1456e-12 ++ pfet_06v0_dn m=1 w=16.08e-6 l=550n nf=3 as=5.1456e-12 ad=5.1456e-12 + ps=23.36e-6 pd=23.36e-6 nrd=0.019900 nrs=0.019900 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_gateConn_1_R0 I1_lin_default_gateConn_1_R0_D + I1_lin_default_gateConn_1_R0_G I1_lin_default_gateConn_1_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_gateConn_0_R0 I1_lin_default_gateConn_0_R0_D + I1_lin_default_gateConn_0_R0_G I1_lin_default_gateConn_0_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_9_R0 I1_lin_default_sdWidth_9_R0_D -+ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_9_R0_G I1_lin_default_sdWidth_9_R0_S gnd! pfet_06v0_dn + m=1 w=26.8e-6 l=550n nf=5 as=20.3144e-12 ad=20.3144e-12 ps=39.74e-6 + pd=39.74e-6 nrd=0.028284 nrs=0.028284 sa=1.210u sb=1.210u sd=1.290u dtemp=0 + par=1 MI1_lin_default_sdWidth_8_R0 I1_lin_default_sdWidth_8_R0_D -+ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_8_R0_G I1_lin_default_sdWidth_8_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=432e-15 ad=432e-15 ps=3.12e-6 pd=3.12e-6 + nrd=3.333333 nrs=3.333333 sa=1.200u sb=1.200u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_7_R0 I1_lin_default_sdWidth_7_R0_D -+ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_7_R0_G I1_lin_default_sdWidth_7_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=372.6e-15 ad=372.6e-15 ps=2.79e-6 pd=2.79e-6 + nrd=2.875000 nrs=2.875000 sa=1.035u sb=1.035u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_6_R0 I1_lin_default_sdWidth_6_R0_D -+ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_6_R0_G I1_lin_default_sdWidth_6_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=322.2e-15 ad=322.2e-15 ps=2.51e-6 pd=2.51e-6 + nrd=2.486111 nrs=2.486111 sa=0.895u sb=0.895u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_5_R0 I1_lin_default_sdWidth_5_R0_D -+ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_5_R0_G I1_lin_default_sdWidth_5_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=280.8e-15 ad=280.8e-15 ps=2.28e-6 pd=2.28e-6 + nrd=2.166667 nrs=2.166667 sa=0.780u sb=0.780u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_4_R0 I1_lin_default_sdWidth_4_R0_D -+ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_4_R0_G I1_lin_default_sdWidth_4_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=246.6e-15 ad=246.6e-15 ps=2.09e-6 pd=2.09e-6 + nrd=1.902778 nrs=1.902778 sa=0.685u sb=0.685u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_3_R0 I1_lin_default_sdWidth_3_R0_D -+ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_3_R0_G I1_lin_default_sdWidth_3_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=217.8e-15 ad=217.8e-15 ps=1.93e-6 pd=1.93e-6 + nrd=1.680556 nrs=1.680556 sa=0.605u sb=0.605u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_2_R0 I1_lin_default_sdWidth_2_R0_D -+ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_2_R0_G I1_lin_default_sdWidth_2_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=194.4e-15 ad=194.4e-15 ps=1.8e-6 pd=1.8e-6 + nrd=1.500000 nrs=1.500000 sa=0.540u sb=0.540u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_1_R0 I1_lin_default_sdWidth_1_R0_D -+ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_1_R0_G I1_lin_default_sdWidth_1_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=174.6e-15 ad=174.6e-15 ps=1.69e-6 pd=1.69e-6 + nrd=1.347222 nrs=1.347222 sa=0.485u sb=0.485u sd=0u dtemp=0 par=1 MI1_lin_default_sdWidth_0_R0 I1_lin_default_sdWidth_0_R0_D -+ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdWidth_0_R0_G I1_lin_default_sdWidth_0_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_sdConn_2_R0 I1_lin_default_sdConn_2_R0_D -+ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdConn_2_R0_G I1_lin_default_sdConn_2_R0_S gnd! pfet_06v0_dn + m=1 w=1.08e-6 l=550n nf=3 as=345.6e-15 ad=345.6e-15 ps=3.36e-6 pd=3.36e-6 + nrd=0.296296 nrs=0.296296 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_1_R0 I1_lin_default_sdConn_1_R0_D -+ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdConn_1_R0_G I1_lin_default_sdConn_1_R0_S gnd! pfet_06v0_dn + m=1 w=6.72e-6 l=550n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_sdConn_0_R0 I1_lin_default_sdConn_0_R0_D -+ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_sdConn_0_R0_G I1_lin_default_sdConn_0_R0_S gnd! pfet_06v0_dn + m=1 w=6.72e-6 l=550n nf=2 as=2.9568e-12 ad=1.7472e-12 ps=15.2e-6 pd=7.76e-6 + nrd=0.038690 nrs=0.065476 sa=0.440u sb=0.440u sd=0.520u dtemp=0 par=1 MI1_lin_default_bodytie_1_R0 I1_lin_default_bodytie_1_R0_D -+ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_bodytie_1_R0_G I1_lin_default_bodytie_1_R0_S gnd! pfet_06v0_dn + m=1 w=10.08e-6 l=550n nf=3 as=3.2256e-12 ad=3.2256e-12 ps=15.36e-6 + pd=15.36e-6 nrd=0.031746 nrs=0.031746 sa=0.440u sb=0.440u sd=0.520u dtemp=0 + par=1 MI1_lin_default_bodytie_0_R0 I1_lin_default_bodytie_0_R0_D -+ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_bodytie_0_R0_G I1_lin_default_bodytie_0_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_leftTap_0_R0 I1_lin_default_leftTap_0_R0_D -+ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_leftTap_0_R0_G I1_lin_default_leftTap_0_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_rightTap_0_R0 I1_lin_default_rightTap_0_R0_D + I1_lin_default_rightTap_0_R0_G I1_lin_default_rightTap_0_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_topTap_0_R0 I1_lin_default_topTap_0_R0_D -+ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pmos_6p0_dw ++ I1_lin_default_topTap_0_R0_G I1_lin_default_topTap_0_R0_S gnd! pfet_06v0_dn + m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_bottomTap_0_R0 I1_lin_default_bottomTap_0_R0_D + I1_lin_default_bottomTap_0_R0_G I1_lin_default_bottomTap_0_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_4_R0 I1_lin_default_tapCntRows_4_R0_D + I1_lin_default_tapCntRows_4_R0_G I1_lin_default_tapCntRows_4_R0_S gnd! -+ pmos_6p0_dw m=1 w=25.08e-6 l=550n nf=3 as=8.0256e-12 ad=8.0256e-12 ++ pfet_06v0_dn m=1 w=25.08e-6 l=550n nf=3 as=8.0256e-12 ad=8.0256e-12 + ps=35.36e-6 pd=35.36e-6 nrd=0.012759 nrs=0.012759 sa=0.440u sb=0.440u + sd=0.520u dtemp=0 par=1 MI1_lin_default_tapCntRows_3_R0 I1_lin_default_tapCntRows_3_R0_D + I1_lin_default_tapCntRows_3_R0_G I1_lin_default_tapCntRows_3_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_2_R0 I1_lin_default_tapCntRows_2_R0_D + I1_lin_default_tapCntRows_2_R0_G I1_lin_default_tapCntRows_2_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_1_R0 I1_lin_default_tapCntRows_1_R0_D + I1_lin_default_tapCntRows_1_R0_G I1_lin_default_tapCntRows_1_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 MI1_lin_default_tapCntRows_0_R0 I1_lin_default_tapCntRows_0_R0_D + I1_lin_default_tapCntRows_0_R0_G I1_lin_default_tapCntRows_0_R0_S gnd! -+ pmos_6p0_dw m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 ++ pfet_06v0_dn m=1 w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 + pd=1.6e-6 nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_6p0_dw m=1 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_06v0_dn m=1 + w=360e-9 l=550n nf=1 as=158.4e-15 ad=158.4e-15 ps=1.6e-6 pd=1.6e-6 + nrd=1.222222 nrs=1.222222 sa=0.440u sb=0.440u sd=0u dtemp=0 par=1 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn_dss.src.cdl similarity index 84% rename from rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn_dss.src.cdl index b718fb2e..150126eb 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_dw_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dn_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_6p0_dw_sab +* Top Cell Name: sample_pfet_06v0_dn_dss * View Name: schematic * Netlisted on: Sep 10 17:02:56 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_6p0_dw_sab +* Cell Name: sample_pfet_06v0_dn_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_6p0_dw_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_06v0_dn_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -183,180 +183,180 @@ *.PININFO I1_lin_default_wf_3_R0_S:I I1_lin_default_wf_4_R0_D:I *.PININFO I1_lin_default_wf_4_R0_G:I I1_lin_default_wf_4_R0_S:I gnd!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_6p0_dw_sab m=1 w=720.000u l=0.7u nf=18 ++ I1_lin_default_wf_4_R0_S gnd! pfet_06v0_dn_dss m=1 w=720.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_6p0_dw_sab m=1 w=622.080u l=0.7u nf=18 ++ I1_lin_default_wf_3_R0_S gnd! pfet_06v0_dn_dss m=1 w=622.080u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_6p0_dw_sab m=1 w=518.400u l=0.7u nf=18 ++ I1_lin_default_wf_2_R0_S gnd! pfet_06v0_dn_dss m=1 w=518.400u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_6p0_dw_sab m=1 w=432.000u l=0.7u nf=18 ++ I1_lin_default_wf_1_R0_S gnd! pfet_06v0_dn_dss m=1 w=432.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_6p0_dw_sab m=1 w=360.000u l=0.7u nf=18 ++ I1_lin_default_wf_0_R0_S gnd! pfet_06v0_dn_dss m=1 w=360.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=10.000u nf=18 ++ I1_lin_default_l_15_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=10.000u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=8.985u nf=18 ++ I1_lin_default_l_14_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=8.985u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=7.490u nf=18 ++ I1_lin_default_l_13_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=7.490u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=6.240u nf=18 ++ I1_lin_default_l_12_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=6.240u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=5.200u nf=18 ++ I1_lin_default_l_11_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=5.200u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=4.335u nf=18 ++ I1_lin_default_l_10_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=4.335u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=3.610u nf=18 ++ I1_lin_default_l_9_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=3.610u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=3.010u nf=18 ++ I1_lin_default_l_8_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=3.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=2.510u nf=18 ++ I1_lin_default_l_7_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=2.510u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=2.090u nf=18 ++ I1_lin_default_l_6_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=2.090u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=1.740u nf=18 ++ I1_lin_default_l_5_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=1.740u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=1.450u nf=18 ++ I1_lin_default_l_4_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=1.450u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=1.210u nf=18 ++ I1_lin_default_l_3_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=1.210u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=1.010u nf=18 ++ I1_lin_default_l_2_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=1.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=0.840u nf=18 ++ I1_lin_default_l_1_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=0.840u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=0.700u nf=18 ++ I1_lin_default_l_0_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=0.700u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_6p0_dw_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_06v0_dn_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S gnd! pmos_6p0_dw_sab m=1 w=600.000u l=0.7u nf=24 ++ I1_lin_default_nf_10_R0_S gnd! pfet_06v0_dn_dss m=1 w=600.000u l=0.7u nf=24 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S gnd! pmos_6p0_dw_sab m=1 w=550.000u l=0.7u nf=22 ++ I1_lin_default_nf_9_R0_S gnd! pfet_06v0_dn_dss m=1 w=550.000u l=0.7u nf=22 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S gnd! pmos_6p0_dw_sab m=1 w=500.000u l=0.7u nf=20 ++ I1_lin_default_nf_8_R0_S gnd! pfet_06v0_dn_dss m=1 w=500.000u l=0.7u nf=20 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S gnd! pmos_6p0_dw_sab m=1 w=450.000u l=0.7u nf=18 ++ I1_lin_default_nf_7_R0_S gnd! pfet_06v0_dn_dss m=1 w=450.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_6p0_dw_sab m=1 w=400.000u l=0.7u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_06v0_dn_dss m=1 w=400.000u l=0.7u nf=16 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_6p0_dw_sab m=1 w=350.000u l=0.7u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_06v0_dn_dss m=1 w=350.000u l=0.7u nf=14 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_6p0_dw_sab m=1 w=300.000u l=0.7u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_06v0_dn_dss m=1 w=300.000u l=0.7u nf=12 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_6p0_dw_sab m=1 w=250.000u l=0.7u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_06v0_dn_dss m=1 w=250.000u l=0.7u nf=10 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_6p0_dw_sab m=1 w=200.000u l=0.7u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_06v0_dn_dss m=1 w=200.000u l=0.7u nf=8 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_6p0_dw_sab m=1 w=150.000u l=0.7u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_06v0_dn_dss m=1 w=150.000u l=0.7u nf=6 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_6p0_dw_sab m=1 w=100.000u l=0.7u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_06v0_dn_dss m=1 w=100.000u l=0.7u nf=4 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_6p0_dw_sab m=3 w=450u l=0.7u nf=18 ++ I1_lin_default_m_2_R0_S gnd! pfet_06v0_dn_dss m=3 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_6p0_dw_sab m=2 w=450u l=0.7u nf=18 ++ I1_lin_default_m_1_R0_S gnd! pfet_06v0_dn_dss m=2 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_m_0_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_1_R0 I1_lin_default_gns_1_R0_D I1_lin_default_gns_1_R0_G -+ I1_lin_default_gns_1_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_gns_1_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0 d_sab=2.78u par=1 dtemp=0 MI1_lin_default_gns_0_R0 I1_lin_default_gns_0_R0_D I1_lin_default_gns_0_R0_G -+ I1_lin_default_gns_0_R0_S gnd! pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_gns_0_R0_S gnd! pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_psub_tap_0_R0 I1_lin_default_psub_tap_0_R0_D + I1_lin_default_psub_tap_0_R0_G I1_lin_default_psub_tap_0_R0_S gnd! -+ pmos_6p0_dw_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_6p0_dw_sab m=1 ++ pfet_06v0_dn_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_06v0_dn_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_sab.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dss.src.cdl similarity index 85% rename from rules/klayout/lvs/testing/testcases/sample_pmos_6p0_sab.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dss.src.cdl index 81ec5868..e733808c 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_6p0_sab.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_06v0_dss.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_6p0_sab +* Top Cell Name: sample_pfet_06v0_dss * View Name: schematic * Netlisted on: Sep 10 17:04:16 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_6p0_sab +* Cell Name: sample_pfet_06v0_dss * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_6p0_sab I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_06v0_dss I1_default_D I1_default_G I1_default_S + I1_lin_default_d_sab_0_R0_D I1_lin_default_d_sab_0_R0_G + I1_lin_default_d_sab_0_R0_S I1_lin_default_d_sab_1_R0_D + I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S @@ -174,171 +174,171 @@ *.PININFO I1_lin_default_wf_4_R0_D:I I1_lin_default_wf_4_R0_G:I *.PININFO I1_lin_default_wf_4_R0_S:I gnd!:I MI1_lin_default_wf_4_R0 I1_lin_default_wf_4_R0_D I1_lin_default_wf_4_R0_G -+ I1_lin_default_wf_4_R0_S gnd! pmos_6p0_sab m=1 w=720.000u l=0.7u nf=18 ++ I1_lin_default_wf_4_R0_S gnd! pfet_06v0_dss m=1 w=720.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_3_R0 I1_lin_default_wf_3_R0_D I1_lin_default_wf_3_R0_G -+ I1_lin_default_wf_3_R0_S gnd! pmos_6p0_sab m=1 w=622.080u l=0.7u nf=18 ++ I1_lin_default_wf_3_R0_S gnd! pfet_06v0_dss m=1 w=622.080u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_2_R0 I1_lin_default_wf_2_R0_D I1_lin_default_wf_2_R0_G -+ I1_lin_default_wf_2_R0_S gnd! pmos_6p0_sab m=1 w=518.400u l=0.7u nf=18 ++ I1_lin_default_wf_2_R0_S gnd! pfet_06v0_dss m=1 w=518.400u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_1_R0 I1_lin_default_wf_1_R0_D I1_lin_default_wf_1_R0_G -+ I1_lin_default_wf_1_R0_S gnd! pmos_6p0_sab m=1 w=432.000u l=0.7u nf=18 ++ I1_lin_default_wf_1_R0_S gnd! pfet_06v0_dss m=1 w=432.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_wf_0_R0 I1_lin_default_wf_0_R0_D I1_lin_default_wf_0_R0_G -+ I1_lin_default_wf_0_R0_S gnd! pmos_6p0_sab m=1 w=360.000u l=0.7u nf=18 ++ I1_lin_default_wf_0_R0_S gnd! pfet_06v0_dss m=1 w=360.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_6p0_sab m=1 w=450u l=10.000u nf=18 ++ I1_lin_default_l_15_R0_S gnd! pfet_06v0_dss m=1 w=450u l=10.000u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_6p0_sab m=1 w=450u l=8.985u nf=18 ++ I1_lin_default_l_14_R0_S gnd! pfet_06v0_dss m=1 w=450u l=8.985u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_6p0_sab m=1 w=450u l=7.490u nf=18 ++ I1_lin_default_l_13_R0_S gnd! pfet_06v0_dss m=1 w=450u l=7.490u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_6p0_sab m=1 w=450u l=6.240u nf=18 ++ I1_lin_default_l_12_R0_S gnd! pfet_06v0_dss m=1 w=450u l=6.240u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_6p0_sab m=1 w=450u l=5.200u nf=18 ++ I1_lin_default_l_11_R0_S gnd! pfet_06v0_dss m=1 w=450u l=5.200u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_6p0_sab m=1 w=450u l=4.335u nf=18 ++ I1_lin_default_l_10_R0_S gnd! pfet_06v0_dss m=1 w=450u l=4.335u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_6p0_sab m=1 w=450u l=3.610u nf=18 ++ I1_lin_default_l_9_R0_S gnd! pfet_06v0_dss m=1 w=450u l=3.610u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_6p0_sab m=1 w=450u l=3.010u nf=18 ++ I1_lin_default_l_8_R0_S gnd! pfet_06v0_dss m=1 w=450u l=3.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_6p0_sab m=1 w=450u l=2.510u nf=18 ++ I1_lin_default_l_7_R0_S gnd! pfet_06v0_dss m=1 w=450u l=2.510u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_6p0_sab m=1 w=450u l=2.090u nf=18 ++ I1_lin_default_l_6_R0_S gnd! pfet_06v0_dss m=1 w=450u l=2.090u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_6p0_sab m=1 w=450u l=1.740u nf=18 ++ I1_lin_default_l_5_R0_S gnd! pfet_06v0_dss m=1 w=450u l=1.740u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_6p0_sab m=1 w=450u l=1.450u nf=18 ++ I1_lin_default_l_4_R0_S gnd! pfet_06v0_dss m=1 w=450u l=1.450u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_6p0_sab m=1 w=450u l=1.210u nf=18 ++ I1_lin_default_l_3_R0_S gnd! pfet_06v0_dss m=1 w=450u l=1.210u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_6p0_sab m=1 w=450u l=1.010u nf=18 ++ I1_lin_default_l_2_R0_S gnd! pfet_06v0_dss m=1 w=450u l=1.010u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_6p0_sab m=1 w=450u l=0.840u nf=18 ++ I1_lin_default_l_1_R0_S gnd! pfet_06v0_dss m=1 w=450u l=0.840u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_6p0_sab m=1 w=450u l=0.700u nf=18 ++ I1_lin_default_l_0_R0_S gnd! pfet_06v0_dss m=1 w=450u l=0.700u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_d_sab_9_R0 I1_lin_default_d_sab_9_R0_D -+ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_9_R0_G I1_lin_default_d_sab_9_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.780u par=1 dtemp=0 MI1_lin_default_d_sab_8_R0 I1_lin_default_d_sab_8_R0_D -+ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_8_R0_G I1_lin_default_d_sab_8_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=3.355u par=1 dtemp=0 MI1_lin_default_d_sab_7_R0 I1_lin_default_d_sab_7_R0_D -+ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_7_R0_G I1_lin_default_d_sab_7_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.795u par=1 dtemp=0 MI1_lin_default_d_sab_6_R0 I1_lin_default_d_sab_6_R0_D -+ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_6_R0_G I1_lin_default_d_sab_6_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.330u par=1 dtemp=0 MI1_lin_default_d_sab_5_R0 I1_lin_default_d_sab_5_R0_D -+ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_5_R0_G I1_lin_default_d_sab_5_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.940u par=1 dtemp=0 MI1_lin_default_d_sab_4_R0 I1_lin_default_d_sab_4_R0_D -+ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_4_R0_G I1_lin_default_d_sab_4_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.615u par=1 dtemp=0 MI1_lin_default_d_sab_3_R0 I1_lin_default_d_sab_3_R0_D -+ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_3_R0_G I1_lin_default_d_sab_3_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.350u par=1 dtemp=0 MI1_lin_default_d_sab_2_R0 I1_lin_default_d_sab_2_R0_D -+ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_2_R0_G I1_lin_default_d_sab_2_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=1.125u par=1 dtemp=0 MI1_lin_default_d_sab_1_R0 I1_lin_default_d_sab_1_R0_D -+ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_1_R0_G I1_lin_default_d_sab_1_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.935u par=1 dtemp=0 MI1_lin_default_d_sab_0_R0 I1_lin_default_d_sab_0_R0_D -+ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_d_sab_0_R0_G I1_lin_default_d_sab_0_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=0.780u par=1 dtemp=0 MI1_lin_default_s_sab_7_R0 I1_lin_default_s_sab_7_R0_D -+ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_7_R0_G I1_lin_default_s_sab_7_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.780u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_6_R0 I1_lin_default_s_sab_6_R0_D -+ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_6_R0_G I1_lin_default_s_sab_6_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.655u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_5_R0 I1_lin_default_s_sab_5_R0_D -+ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_5_R0_G I1_lin_default_s_sab_5_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.545u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_4_R0 I1_lin_default_s_sab_4_R0_D -+ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_4_R0_G I1_lin_default_s_sab_4_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.455u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_3_R0 I1_lin_default_s_sab_3_R0_D -+ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_3_R0_G I1_lin_default_s_sab_3_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.380u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_2_R0 I1_lin_default_s_sab_2_R0_D -+ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_2_R0_G I1_lin_default_s_sab_2_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.315u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_1_R0 I1_lin_default_s_sab_1_R0_D -+ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_1_R0_G I1_lin_default_s_sab_1_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.265u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_s_sab_0_R0 I1_lin_default_s_sab_0_R0_D -+ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pmos_6p0_sab ++ I1_lin_default_s_sab_0_R0_G I1_lin_default_s_sab_0_R0_S gnd! pfet_06v0_dss + m=1 w=450u l=0.7u nf=18 s_sab=0.220u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_10_R0 I1_lin_default_nf_10_R0_D I1_lin_default_nf_10_R0_G -+ I1_lin_default_nf_10_R0_S gnd! pmos_6p0_sab m=1 w=600.000u l=0.7u nf=24 ++ I1_lin_default_nf_10_R0_S gnd! pfet_06v0_dss m=1 w=600.000u l=0.7u nf=24 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_9_R0 I1_lin_default_nf_9_R0_D I1_lin_default_nf_9_R0_G -+ I1_lin_default_nf_9_R0_S gnd! pmos_6p0_sab m=1 w=550.000u l=0.7u nf=22 ++ I1_lin_default_nf_9_R0_S gnd! pfet_06v0_dss m=1 w=550.000u l=0.7u nf=22 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_8_R0 I1_lin_default_nf_8_R0_D I1_lin_default_nf_8_R0_G -+ I1_lin_default_nf_8_R0_S gnd! pmos_6p0_sab m=1 w=500.000u l=0.7u nf=20 ++ I1_lin_default_nf_8_R0_S gnd! pfet_06v0_dss m=1 w=500.000u l=0.7u nf=20 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_7_R0 I1_lin_default_nf_7_R0_D I1_lin_default_nf_7_R0_G -+ I1_lin_default_nf_7_R0_S gnd! pmos_6p0_sab m=1 w=450.000u l=0.7u nf=18 ++ I1_lin_default_nf_7_R0_S gnd! pfet_06v0_dss m=1 w=450.000u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_6_R0 I1_lin_default_nf_6_R0_D I1_lin_default_nf_6_R0_G -+ I1_lin_default_nf_6_R0_S gnd! pmos_6p0_sab m=1 w=400.000u l=0.7u nf=16 ++ I1_lin_default_nf_6_R0_S gnd! pfet_06v0_dss m=1 w=400.000u l=0.7u nf=16 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_5_R0 I1_lin_default_nf_5_R0_D I1_lin_default_nf_5_R0_G -+ I1_lin_default_nf_5_R0_S gnd! pmos_6p0_sab m=1 w=350.000u l=0.7u nf=14 ++ I1_lin_default_nf_5_R0_S gnd! pfet_06v0_dss m=1 w=350.000u l=0.7u nf=14 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_4_R0 I1_lin_default_nf_4_R0_D I1_lin_default_nf_4_R0_G -+ I1_lin_default_nf_4_R0_S gnd! pmos_6p0_sab m=1 w=300.000u l=0.7u nf=12 ++ I1_lin_default_nf_4_R0_S gnd! pfet_06v0_dss m=1 w=300.000u l=0.7u nf=12 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_3_R0 I1_lin_default_nf_3_R0_D I1_lin_default_nf_3_R0_G -+ I1_lin_default_nf_3_R0_S gnd! pmos_6p0_sab m=1 w=250.000u l=0.7u nf=10 ++ I1_lin_default_nf_3_R0_S gnd! pfet_06v0_dss m=1 w=250.000u l=0.7u nf=10 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_2_R0 I1_lin_default_nf_2_R0_D I1_lin_default_nf_2_R0_G -+ I1_lin_default_nf_2_R0_S gnd! pmos_6p0_sab m=1 w=200.000u l=0.7u nf=8 ++ I1_lin_default_nf_2_R0_S gnd! pfet_06v0_dss m=1 w=200.000u l=0.7u nf=8 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_1_R0 I1_lin_default_nf_1_R0_D I1_lin_default_nf_1_R0_G -+ I1_lin_default_nf_1_R0_S gnd! pmos_6p0_sab m=1 w=150.000u l=0.7u nf=6 ++ I1_lin_default_nf_1_R0_S gnd! pfet_06v0_dss m=1 w=150.000u l=0.7u nf=6 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_nf_0_R0 I1_lin_default_nf_0_R0_D I1_lin_default_nf_0_R0_G -+ I1_lin_default_nf_0_R0_S gnd! pmos_6p0_sab m=1 w=100.000u l=0.7u nf=4 ++ I1_lin_default_nf_0_R0_S gnd! pfet_06v0_dss m=1 w=100.000u l=0.7u nf=4 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_m_2_R0 I1_lin_default_m_2_R0_D I1_lin_default_m_2_R0_G -+ I1_lin_default_m_2_R0_S gnd! pmos_6p0_sab m=3 w=450u l=0.7u nf=18 ++ I1_lin_default_m_2_R0_S gnd! pfet_06v0_dss m=3 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=3 dtemp=0 MI1_lin_default_m_1_R0 I1_lin_default_m_1_R0_D I1_lin_default_m_1_R0_G -+ I1_lin_default_m_1_R0_S gnd! pmos_6p0_sab m=2 w=450u l=0.7u nf=18 ++ I1_lin_default_m_1_R0_S gnd! pfet_06v0_dss m=2 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=2 dtemp=0 MI1_lin_default_m_0_R0 I1_lin_default_m_0_R0_D I1_lin_default_m_0_R0_G -+ I1_lin_default_m_0_R0_S gnd! pmos_6p0_sab m=1 w=450u l=0.7u nf=18 ++ I1_lin_default_m_0_R0_S gnd! pfet_06v0_dss m=1 w=450u l=0.7u nf=18 + s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_guardRing_0_R0 I1_lin_default_guardRing_0_R0_D + I1_lin_default_guardRing_0_R0_G I1_lin_default_guardRing_0_R0_S gnd! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 MI1_lin_default_strapSD_0_R0 I1_lin_default_strapSD_0_R0_D + I1_lin_default_strapSD_0_R0_G I1_lin_default_strapSD_0_R0_S gnd! -+ pmos_6p0_sab m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_6p0_sab m=1 ++ pfet_06v0_dss m=1 w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_06v0_dss m=1 + w=450u l=0.7u nf=18 s_sab=0.28u d_sab=2.78u par=1 dtemp=0 .ENDS diff --git a/rules/klayout/lvs/testing/testcases/sample_pmos_10p0_asym.src.cdl b/rules/klayout/lvs/testing/testcases/sample_pfet_10v0_asym.src.cdl similarity index 82% rename from rules/klayout/lvs/testing/testcases/sample_pmos_10p0_asym.src.cdl rename to rules/klayout/lvs/testing/testcases/sample_pfet_10v0_asym.src.cdl index 52f49f58..5783f897 100644 --- a/rules/klayout/lvs/testing/testcases/sample_pmos_10p0_asym.src.cdl +++ b/rules/klayout/lvs/testing/testcases/sample_pfet_10v0_asym.src.cdl @@ -2,7 +2,7 @@ * auCdl Netlist: * * Library Name: TCG_library_2 -* Top Cell Name: sample_pmos_10p0_asym +* Top Cell Name: sample_pfet_10v0_asym * View Name: schematic * Netlisted on: Sep 10 17:05:33 2021 ************************************************************************ @@ -18,11 +18,11 @@ ************************************************************************ * Library Name: TCG_library_2 -* Cell Name: sample_pmos_10p0_asym +* Cell Name: sample_pfet_10v0_asym * View Name: schematic ************************************************************************ -.SUBCKT sample_pmos_10p0_asym I1_default_D I1_default_G I1_default_S +.SUBCKT sample_pfet_10v0_asym I1_default_D I1_default_G I1_default_S + I1_lin_default_Bodytie_0_R0_D I1_lin_default_Bodytie_0_R0_G + I1_lin_default_Bodytie_0_R0_S I1_lin_default_Bodytie_1_R0_D + I1_lin_default_Bodytie_1_R0_G I1_lin_default_ConnectGates_0_R0_D @@ -151,108 +151,108 @@ *.PININFO I1_lin_default_l_20_R0_D:I I1_lin_default_l_20_R0_G:I *.PININFO I1_lin_default_l_20_R0_S:I MI1_lin_default_l_20_R0 I1_lin_default_l_20_R0_D I1_lin_default_l_20_R0_G -+ I1_lin_default_l_20_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=20u nf=2 ++ I1_lin_default_l_20_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=20u nf=2 MI1_lin_default_l_19_R0 I1_lin_default_l_19_R0_D I1_lin_default_l_19_R0_G -+ I1_lin_default_l_19_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=19.17u nf=2 ++ I1_lin_default_l_19_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=19.17u nf=2 MI1_lin_default_l_18_R0 I1_lin_default_l_18_R0_D I1_lin_default_l_18_R0_G -+ I1_lin_default_l_18_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=15.975u nf=2 ++ I1_lin_default_l_18_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=15.975u nf=2 MI1_lin_default_l_17_R0 I1_lin_default_l_17_R0_D I1_lin_default_l_17_R0_G -+ I1_lin_default_l_17_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=13.31u nf=2 ++ I1_lin_default_l_17_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=13.31u nf=2 MI1_lin_default_l_16_R0 I1_lin_default_l_16_R0_D I1_lin_default_l_16_R0_G -+ I1_lin_default_l_16_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=11.095u nf=2 ++ I1_lin_default_l_16_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=11.095u nf=2 MI1_lin_default_l_15_R0 I1_lin_default_l_15_R0_D I1_lin_default_l_15_R0_G -+ I1_lin_default_l_15_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=9.245u nf=2 ++ I1_lin_default_l_15_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=9.245u nf=2 MI1_lin_default_l_14_R0 I1_lin_default_l_14_R0_D I1_lin_default_l_14_R0_G -+ I1_lin_default_l_14_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=7.705u nf=2 ++ I1_lin_default_l_14_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=7.705u nf=2 MI1_lin_default_l_13_R0 I1_lin_default_l_13_R0_D I1_lin_default_l_13_R0_G -+ I1_lin_default_l_13_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=6.42u nf=2 ++ I1_lin_default_l_13_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=6.42u nf=2 MI1_lin_default_l_12_R0 I1_lin_default_l_12_R0_D I1_lin_default_l_12_R0_G -+ I1_lin_default_l_12_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=5.35u nf=2 ++ I1_lin_default_l_12_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=5.35u nf=2 MI1_lin_default_l_11_R0 I1_lin_default_l_11_R0_D I1_lin_default_l_11_R0_G -+ I1_lin_default_l_11_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=4.46u nf=2 ++ I1_lin_default_l_11_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=4.46u nf=2 MI1_lin_default_l_10_R0 I1_lin_default_l_10_R0_D I1_lin_default_l_10_R0_G -+ I1_lin_default_l_10_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=3.715u nf=2 ++ I1_lin_default_l_10_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=3.715u nf=2 MI1_lin_default_l_9_R0 I1_lin_default_l_9_R0_D I1_lin_default_l_9_R0_G -+ I1_lin_default_l_9_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=3.095u nf=2 ++ I1_lin_default_l_9_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=3.095u nf=2 MI1_lin_default_l_8_R0 I1_lin_default_l_8_R0_D I1_lin_default_l_8_R0_G -+ I1_lin_default_l_8_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=2.58u nf=2 ++ I1_lin_default_l_8_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=2.58u nf=2 MI1_lin_default_l_7_R0 I1_lin_default_l_7_R0_D I1_lin_default_l_7_R0_G -+ I1_lin_default_l_7_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=2.15u nf=2 ++ I1_lin_default_l_7_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=2.15u nf=2 MI1_lin_default_l_6_R0 I1_lin_default_l_6_R0_D I1_lin_default_l_6_R0_G -+ I1_lin_default_l_6_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=1.79u nf=2 ++ I1_lin_default_l_6_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=1.79u nf=2 MI1_lin_default_l_5_R0 I1_lin_default_l_5_R0_D I1_lin_default_l_5_R0_G -+ I1_lin_default_l_5_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=1.495u nf=2 ++ I1_lin_default_l_5_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=1.495u nf=2 MI1_lin_default_l_4_R0 I1_lin_default_l_4_R0_D I1_lin_default_l_4_R0_G -+ I1_lin_default_l_4_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=1.245u nf=2 ++ I1_lin_default_l_4_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=1.245u nf=2 MI1_lin_default_l_3_R0 I1_lin_default_l_3_R0_D I1_lin_default_l_3_R0_G -+ I1_lin_default_l_3_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=1.035u nf=2 ++ I1_lin_default_l_3_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=1.035u nf=2 MI1_lin_default_l_2_R0 I1_lin_default_l_2_R0_D I1_lin_default_l_2_R0_G -+ I1_lin_default_l_2_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=865n nf=2 ++ I1_lin_default_l_2_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=865n nf=2 MI1_lin_default_l_1_R0 I1_lin_default_l_1_R0_D I1_lin_default_l_1_R0_G -+ I1_lin_default_l_1_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=720n nf=2 ++ I1_lin_default_l_1_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=720n nf=2 MI1_lin_default_l_0_R0 I1_lin_default_l_0_R0_D I1_lin_default_l_0_R0_G -+ I1_lin_default_l_0_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=600n nf=2 ++ I1_lin_default_l_0_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=600n nf=2 MI1_lin_default_fw_14_R0 I1_lin_default_fw_14_R0_D I1_lin_default_fw_14_R0_G -+ I1_lin_default_fw_14_R0_S gnd! pmos_10p0_asym m=1.0 w=100u l=600.0n nf=2 ++ I1_lin_default_fw_14_R0_S gnd! pfet_10v0_asym m=1.0 w=100u l=600.0n nf=2 MI1_lin_default_fw_13_R0 I1_lin_default_fw_13_R0_D I1_lin_default_fw_13_R0_G -+ I1_lin_default_fw_13_R0_S gnd! pmos_10p0_asym m=1.0 w=85.59u l=600.0n nf=2 ++ I1_lin_default_fw_13_R0_S gnd! pfet_10v0_asym m=1.0 w=85.59u l=600.0n nf=2 MI1_lin_default_fw_12_R0 I1_lin_default_fw_12_R0_D I1_lin_default_fw_12_R0_G -+ I1_lin_default_fw_12_R0_S gnd! pmos_10p0_asym m=1.0 w=71.33u l=600.0n nf=2 ++ I1_lin_default_fw_12_R0_S gnd! pfet_10v0_asym m=1.0 w=71.33u l=600.0n nf=2 MI1_lin_default_fw_11_R0 I1_lin_default_fw_11_R0_D I1_lin_default_fw_11_R0_G -+ I1_lin_default_fw_11_R0_S gnd! pmos_10p0_asym m=1.0 w=59.44u l=600.0n nf=2 ++ I1_lin_default_fw_11_R0_S gnd! pfet_10v0_asym m=1.0 w=59.44u l=600.0n nf=2 MI1_lin_default_fw_10_R0 I1_lin_default_fw_10_R0_D I1_lin_default_fw_10_R0_G -+ I1_lin_default_fw_10_R0_S gnd! pmos_10p0_asym m=1.0 w=49.53u l=600.0n nf=2 ++ I1_lin_default_fw_10_R0_S gnd! pfet_10v0_asym m=1.0 w=49.53u l=600.0n nf=2 MI1_lin_default_fw_9_R0 I1_lin_default_fw_9_R0_D I1_lin_default_fw_9_R0_G -+ I1_lin_default_fw_9_R0_S gnd! pmos_10p0_asym m=1.0 w=41.28u l=600.0n nf=2 ++ I1_lin_default_fw_9_R0_S gnd! pfet_10v0_asym m=1.0 w=41.28u l=600.0n nf=2 MI1_lin_default_fw_8_R0 I1_lin_default_fw_8_R0_D I1_lin_default_fw_8_R0_G -+ I1_lin_default_fw_8_R0_S gnd! pmos_10p0_asym m=1.0 w=34.4u l=600.0n nf=2 ++ I1_lin_default_fw_8_R0_S gnd! pfet_10v0_asym m=1.0 w=34.4u l=600.0n nf=2 MI1_lin_default_fw_7_R0 I1_lin_default_fw_7_R0_D I1_lin_default_fw_7_R0_G -+ I1_lin_default_fw_7_R0_S gnd! pmos_10p0_asym m=1.0 w=28.67u l=600.0n nf=2 ++ I1_lin_default_fw_7_R0_S gnd! pfet_10v0_asym m=1.0 w=28.67u l=600.0n nf=2 MI1_lin_default_fw_6_R0 I1_lin_default_fw_6_R0_D I1_lin_default_fw_6_R0_G -+ I1_lin_default_fw_6_R0_S gnd! pmos_10p0_asym m=1.0 w=23.89u l=600.0n nf=2 ++ I1_lin_default_fw_6_R0_S gnd! pfet_10v0_asym m=1.0 w=23.89u l=600.0n nf=2 MI1_lin_default_fw_5_R0 I1_lin_default_fw_5_R0_D I1_lin_default_fw_5_R0_G -+ I1_lin_default_fw_5_R0_S gnd! pmos_10p0_asym m=1.0 w=19.91u l=600.0n nf=2 ++ I1_lin_default_fw_5_R0_S gnd! pfet_10v0_asym m=1.0 w=19.91u l=600.0n nf=2 MI1_lin_default_fw_4_R0 I1_lin_default_fw_4_R0_D I1_lin_default_fw_4_R0_G -+ I1_lin_default_fw_4_R0_S gnd! pmos_10p0_asym m=1.0 w=16.59u l=600.0n nf=2 ++ I1_lin_default_fw_4_R0_S gnd! pfet_10v0_asym m=1.0 w=16.59u l=600.0n nf=2 MI1_lin_default_fw_3_R0 I1_lin_default_fw_3_R0_D I1_lin_default_fw_3_R0_G -+ I1_lin_default_fw_3_R0_S gnd! pmos_10p0_asym m=1.0 w=13.82u l=600.0n nf=2 ++ I1_lin_default_fw_3_R0_S gnd! pfet_10v0_asym m=1.0 w=13.82u l=600.0n nf=2 MI1_lin_default_fw_2_R0 I1_lin_default_fw_2_R0_D I1_lin_default_fw_2_R0_G -+ I1_lin_default_fw_2_R0_S gnd! pmos_10p0_asym m=1.0 w=11.52u l=600.0n nf=2 ++ I1_lin_default_fw_2_R0_S gnd! pfet_10v0_asym m=1.0 w=11.52u l=600.0n nf=2 MI1_lin_default_fw_1_R0 I1_lin_default_fw_1_R0_D I1_lin_default_fw_1_R0_G -+ I1_lin_default_fw_1_R0_S gnd! pmos_10p0_asym m=1.0 w=9.6u l=600.0n nf=2 ++ I1_lin_default_fw_1_R0_S gnd! pfet_10v0_asym m=1.0 w=9.6u l=600.0n nf=2 MI1_lin_default_fw_0_R0 I1_lin_default_fw_0_R0_D I1_lin_default_fw_0_R0_G -+ I1_lin_default_fw_0_R0_S gnd! pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ I1_lin_default_fw_0_R0_S gnd! pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_2_R0 I1_lin_default_ConnectGates_2_R0_D + I1_lin_default_ConnectGates_2_R0_G I1_lin_default_ConnectGates_2_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_1_R0 I1_lin_default_ConnectGates_1_R0_D + I1_lin_default_ConnectGates_1_R0_G I1_lin_default_ConnectGates_1_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectGates_0_R0 I1_lin_default_ConnectGates_0_R0_D + I1_lin_default_ConnectGates_0_R0_G I1_lin_default_ConnectGates_0_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_2_R0 I1_lin_default_ConnectSD_2_R0_D + I1_lin_default_ConnectSD_2_R0_G I1_lin_default_ConnectSD_2_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_1_R0 I1_lin_default_ConnectSD_1_R0_D + I1_lin_default_ConnectSD_1_R0_G I1_lin_default_ConnectSD_1_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_ConnectSD_0_R0 I1_lin_default_ConnectSD_0_R0_D + I1_lin_default_ConnectSD_0_R0_G I1_lin_default_ConnectSD_0_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_Bodytie_1_R0 I1_lin_default_Bodytie_1_R0_D -+ I1_lin_default_Bodytie_1_R0_G gnd! gnd! pmos_10p0_asym m=1.0 w=8u l=600.0n ++ I1_lin_default_Bodytie_1_R0_G gnd! gnd! pfet_10v0_asym m=1.0 w=8u l=600.0n + nf=2 MI1_lin_default_Bodytie_0_R0 I1_lin_default_Bodytie_0_R0_D + I1_lin_default_Bodytie_0_R0_G I1_lin_default_Bodytie_0_R0_S gnd! -+ pmos_10p0_asym m=1.0 w=8u l=600.0n nf=2 ++ pfet_10v0_asym m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_GRTap_1_R0 I1_lin_default_GRTap_1_R0_D -+ I1_lin_default_GRTap_1_R0_G I1_lin_default_GRTap_1_R0_S gnd! pmos_10p0_asym ++ I1_lin_default_GRTap_1_R0_G I1_lin_default_GRTap_1_R0_S gnd! pfet_10v0_asym + m=1.0 w=8u l=600.0n nf=2 MI1_lin_default_GRTap_0_R0 I1_lin_default_GRTap_0_R0_D -+ I1_lin_default_GRTap_0_R0_G I1_lin_default_GRTap_0_R0_S gnd! pmos_10p0_asym ++ I1_lin_default_GRTap_0_R0_G I1_lin_default_GRTap_0_R0_S gnd! pfet_10v0_asym + m=1.0 w=8u l=600.0n nf=2 -MI1_default I1_default_D I1_default_G I1_default_S gnd! pmos_10p0_asym m=1.0 +MI1_default I1_default_D I1_default_G I1_default_S gnd! pfet_10v0_asym m=1.0 + w=8u l=600.0n nf=2 .ENDS