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HardFault occurs randomly while sending HID report on CH32V203 #2764

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SEED264 opened this issue Aug 14, 2024 · 1 comment
Closed
1 task done

HardFault occurs randomly while sending HID report on CH32V203 #2764

SEED264 opened this issue Aug 14, 2024 · 1 comment
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@SEED264
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SEED264 commented Aug 14, 2024

Operating System

Windows 11

Board

CH32V203K8T6 without evaluation kit

Firmware

Sorry, it's a Platform.io project.
https://github.com/SEED264/ch32v203_tinyusb_hid_test

What happened ?

When creating an HID with CH32V203 and sending a report of random numbers as a test, a HardFault will occur after as little as a few seconds, or as long as a few tens of minutes.
The call stack is often displayed as shown below, but sometimes only up to tud_task is displayed, or the call stack cannot be obtained at all.

HardFault_Handler@0x00000794 (ch32v203_tinyusb_hid_test\src\main.c:16)
osal_queue_receive@0x00001c42 (ch32v203_tinyusb_hid_test\src\tinyusb\osal\osal_none.h:166)
tud_task_ext@0x00001c42 (ch32v203_tinyusb_hid_test\src\tinyusb\device\usbd.c:577)
tud_task@0x000008fe (ch32v203_tinyusb_hid_test\src\tinyusb\device\usbd.h:57)
main@0x000008fe (ch32v203_tinyusb_hid_test\src\main.c:89)

I tried it with two chips at first, and both ended up in the same situation.
The error also occurs when the contents of the report are changed from random numbers to incrementing them each time a report is sent, but if the same content is continuously reported, it will almost never occur regardless of the value.

How to reproduce ?

Build and upload firmware project

Debug Log as txt file (LOG/CFG_TUSB_DEBUG=2)

log.txt

USBD init on controller 0, Highspeed = 0
sizeof(usbd_device_t) = 52
sizeof(dcd_event_t) = 12
sizeof(tu_fifo_t) = 12
sizeof(tu_edpt_stream_t) = 24
HID init
USBD Bus Reset : Full Speed

USBD Setup Received 80 06 00 01 00 00 40 00
Get Descriptor Device
Queue EP 80 with 18 bytes ...
USBD Xfer Complete on EP 80 with 18 bytes
Queue EP 00 with 0 bytes ...
USBD Xfer Complete on EP 00 with 0 bytes
USBD Bus Reset : Full Speed

USBD Setup Received 00 05 01 00 00 00 00 00
Set Address
USBD Xfer Complete on EP 80 with 0 bytes

USBD Setup Received 80 06 00 01 00 00 12 00
Get Descriptor Device
Queue EP 80 with 18 bytes ...
USBD Xfer Complete on EP 80 with 18 bytes
Queue EP 00 with 0 bytes ...
USBD Xfer Complete on EP 00 with 0 bytes

USBD Setup Received 80 06 00 02 00 00 FF 00
Get Descriptor Configuration[0]
Queue EP 80 with 34 bytes ...
USBD Xfer Complete on EP 80 with 34 bytes
Queue EP 00 with 0 bytes ...
USBD Xfer Complete on EP 00 with 0 bytes

USBD Setup Received 80 06 03 03 09 04 FF 00
Get Descriptor String[3]
Queue EP 80 with 50 bytes ...
USBD Xfer Complete on EP 80 with 50 bytes
Queue EP 00 with 0 bytes ...
USBD Xfer Complete on EP 00 with 0 bytes

USBD Setup Received 80 06 00 03 00 00 FF 00
Get Descriptor String[0]
Queue EP 80 with 4 bytes ...
USBD Xfer Complete on EP 80 with 4 bytes
Queue EP 00 with 0 bytes ...
USBD Xfer Complete on EP 00 with 0 bytes

USBD Setup Received 80 06 00 06 00 00 0A 00
Get Descriptor Device Qualifier
Stall EP0

......
USBD Xfer Complete on EP 81 with 5 bytes
HID xfer callback
Queue EP 81 with 5 bytes ...
USBD Xfer Complete on EP 81 with 5 bytes
HID xfer callback
Queue EP 81 with 5 bytes ...
USBD Xfer Complete on EP 81 with 5 bytes
HID xfer callback
Queue EP 81 with 5 bytes ...

Screenshots

image

I have checked existing issues, dicussion and documentation

  • I confirm I have checked existing issues, dicussion and documentation.
@SEED264
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SEED264 commented Sep 30, 2024

I apologize for the confusion. After purchasing an evaluation board and conducting operational tests, it worked stably.

It appears that the uneven wire lengths in my previous wired connections were the cause of the issue.

As this problem has been self-resolved, I'll close this thread.

@SEED264 SEED264 closed this as completed Sep 30, 2024
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