diff --git a/gen/gen_code.cpp b/gen/gen_code.cpp
index 4c60d036..83593cf8 100644
--- a/gen/gen_code.cpp
+++ b/gen/gen_code.cpp
@@ -1751,9 +1751,9 @@ void put()
 		} tbl[] = {
 			{ "bextr", T_0F38 | T_VEX | T_NF, 0xF7 },
 			{ "bzhi", T_0F38 | T_VEX | T_NF, 0xF5 },
-			{ "sarx", T_0F38 | T_F3, 0xF7 },
-			{ "shlx", T_0F38 | T_66, 0xF7 },
-			{ "shrx", T_0F38 | T_F2, 0xF7 },
+			{ "sarx", T_0F38 | T_F3 | T_VEX, 0xF7 },
+			{ "shlx", T_0F38 | T_66 | T_VEX, 0xF7 },
+			{ "shrx", T_0F38 | T_F2 | T_VEX, 0xF7 },
 		};
 		for (size_t i = 0; i < NUM_OF_ARRAY(tbl); i++) {
 			const Tbl& p = tbl[i];
diff --git a/test/apx.cpp b/test/apx.cpp
index 9b38cba8..1e69fa77 100644
--- a/test/apx.cpp
+++ b/test/apx.cpp
@@ -524,13 +524,52 @@ CYBOZU_TEST_AUTO(bextr_etc)
 			bextr(r29|T_nf, r30, r31);
 			bextr(eax, ecx, r17d);
 			bextr(r29, ptr [r31+r20*4], r30);
+
+			bzhi(r29, r30, r31);
+			bzhi(r29|T_nf, r30, r31);
+			bzhi(eax, ecx, r17d);
+			bzhi(r29, ptr [r31+r20*4], r30);
+
+			sarx(r29, r30, r31);
+			sarx(eax, ecx, r17d);
+			sarx(r29, ptr [r31+r20*4], r30);
+
+			shlx(r29, r30, r31);
+			shlx(eax, ecx, r17d);
+			shlx(r29, ptr [r31+r20*4], r30);
+
+			shrx(r29, r30, r31);
+			shrx(eax, ecx, r17d);
+			shrx(r29, ptr [r31+r20*4], r30);
 		}
 	} c;
 	const uint8_t tbl[] = {
+		// bextr
 		0x62, 0x4a, 0x84, 0x00, 0xf7, 0xee,
 		0x62, 0x4a, 0x84, 0x04, 0xf7, 0xee,
 		0x62, 0xf2, 0x74, 0x00, 0xf7, 0xc1,
-		0x62, 0x4a, 0x88, 0x00, 0xf7, 0x2c, 0xa7
+		0x62, 0x4a, 0x88, 0x00, 0xf7, 0x2c, 0xa7,
+
+		// bzhi
+		0x62, 0x4a, 0x84, 0x00, 0xf5, 0xee,
+		0x62, 0x4a, 0x84, 0x04, 0xf5, 0xee,
+		0x62, 0xf2, 0x74, 0x00, 0xf5, 0xc1,
+		0x62, 0x4a, 0x88, 0x00, 0xf5, 0x2c, 0xa7,
+
+		// sarx
+		0x62, 0x4a, 0x86, 0x00, 0xf7, 0xee,
+		0x62, 0xf2, 0x76, 0x00, 0xf7, 0xc1,
+		0x62, 0x4a, 0x8a, 0x00, 0xf7, 0x2c, 0xa7,
+
+		// shlx
+		0x62, 0x4a, 0x85, 0x00, 0xf7, 0xee,
+		0x62, 0xf2, 0x75, 0x00, 0xf7, 0xc1,
+		0x62, 0x4a, 0x89, 0x00, 0xf7, 0x2c, 0xa7,
+
+		// shrx
+		0x62, 0x4a, 0x87, 0x00, 0xf7, 0xee,
+		0x62, 0xf2, 0x77, 0x00, 0xf7, 0xc1,
+		0x62, 0x4a, 0x8b, 0x00, 0xf7, 0x2c, 0xa7,
 	};
 	const size_t n = sizeof(tbl);
 	CYBOZU_TEST_EQUAL(c.getSize(), n);
diff --git a/xbyak/xbyak_mnemonic.h b/xbyak/xbyak_mnemonic.h
index 9b7e17e2..0af2c552 100644
--- a/xbyak/xbyak_mnemonic.h
+++ b/xbyak/xbyak_mnemonic.h
@@ -757,7 +757,7 @@ void sal(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 4); }
 void sal(const Operand& op, int imm) { opShift(op, imm, 4); }
 void sar(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 7); }
 void sar(const Operand& op, int imm) { opShift(op, imm, 7); }
-void sarx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_F3|T_0F38, 0xf7); }
+void sarx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_VEX|T_F3|T_0F38, 0xf7); }
 void sbb(const Operand& op, uint32_t imm) { opOI(op, imm, 0x18, 3); }
 void sbb(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x18); }
 void sbb(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 3); }
@@ -808,12 +808,12 @@ void shl(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 4); }
 void shl(const Operand& op, int imm) { opShift(op, imm, 4); }
 void shld(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(op, reg, 0, 0xA4, &_cl); }
 void shld(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(op, reg, imm, 0xA4); }
-void shlx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_66|T_0F38, 0xf7); }
+void shlx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_VEX|T_66|T_0F38, 0xf7); }
 void shr(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 5); }
 void shr(const Operand& op, int imm) { opShift(op, imm, 5); }
 void shrd(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(op, reg, 0, 0xAC, &_cl); }
 void shrd(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(op, reg, imm, 0xAC); }
-void shrx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_F2|T_0F38, 0xf7); }
+void shrx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_VEX|T_F2|T_0F38, 0xf7); }
 void shufpd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC6, isXMM_XMMorMEM, imm8); }
 void shufps(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC6, isXMM_XMMorMEM, imm8); }
 void sqrtpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x51, isXMM_XMMorMEM); }